Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 1 | /* |
| 2 | * XGL |
| 3 | * |
| 4 | * Copyright (C) 2014 LunarG, Inc. |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 7 | * copy of this software and associated documentation files (the "Software"), |
| 8 | * to deal in the Software without restriction, including without limitation |
| 9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 10 | * and/or sell copies of the Software, and to permit persons to whom the |
| 11 | * Software is furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included |
| 14 | * in all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
Chia-I Wu | 44e4236 | 2014-09-02 08:32:09 +0800 | [diff] [blame] | 23 | * |
| 24 | * Authors: |
| 25 | * Chia-I Wu <olv@lunarg.com> |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 26 | */ |
| 27 | |
| 28 | #ifndef GPU_H |
| 29 | #define GPU_H |
| 30 | |
| 31 | #include "intel.h" |
| 32 | |
Chia-I Wu | 9269d1c | 2014-08-16 12:47:47 +0800 | [diff] [blame] | 33 | #define INTEL_GPU_ASSERT(gpu, min_gen, max_gen) \ |
| 34 | assert(intel_gpu_gen(gpu) >= INTEL_GEN(min_gen) && \ |
| 35 | intel_gpu_gen(gpu) <= INTEL_GEN(max_gen)) |
| 36 | |
Chia-I Wu | 1db76e0 | 2014-09-15 14:21:14 +0800 | [diff] [blame] | 37 | enum intel_ext_type { |
| 38 | INTEL_EXT_WSI_X11, |
| 39 | |
| 40 | INTEL_EXT_COUNT, |
| 41 | INTEL_EXT_INVALID = INTEL_EXT_COUNT, |
| 42 | }; |
| 43 | |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 44 | enum intel_gpu_engine_type { |
| 45 | /* TODO BLT support */ |
| 46 | INTEL_GPU_ENGINE_3D, |
| 47 | |
| 48 | INTEL_GPU_ENGINE_COUNT |
| 49 | }; |
| 50 | |
Chia-I Wu | d71ff55 | 2015-02-20 12:50:12 -0700 | [diff] [blame^] | 51 | struct intel_instance; |
Chia-I Wu | d896593 | 2014-10-13 13:32:37 +0800 | [diff] [blame] | 52 | struct intel_winsys; |
Chia-I Wu | 1db76e0 | 2014-09-15 14:21:14 +0800 | [diff] [blame] | 53 | struct intel_wsi_x11; |
| 54 | |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 55 | /* |
| 56 | * intel_gpu is the only object that does not inherit from intel_base. |
| 57 | */ |
| 58 | struct intel_gpu { |
Chia-I Wu | 778a80c | 2015-01-03 22:45:10 +0800 | [diff] [blame] | 59 | /* the loader expects a "void *" at the beginning */ |
| 60 | void *loader_data; |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 61 | |
| 62 | struct intel_gpu *next; |
| 63 | |
| 64 | int devid; /* PCI device ID */ |
Chia-I Wu | f07865e | 2014-09-15 13:52:21 +0800 | [diff] [blame] | 65 | char *primary_node; /* path to the primary node */ |
| 66 | char *render_node; /* path to the render node */ |
| 67 | int gen_opaque; /* always read this with intel_gpu_gen() */ |
Chia-I Wu | 960f195 | 2014-08-28 23:27:10 +0800 | [diff] [blame] | 68 | int gt; |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 69 | |
Chia-I Wu | bd65794 | 2014-08-21 14:37:35 +0800 | [diff] [blame] | 70 | XGL_GPU_SIZE max_batch_buffer_size; |
Mark Lobodzinski | e2d07a5 | 2015-01-29 08:55:56 -0600 | [diff] [blame] | 71 | uint32_t batch_buffer_reloc_count; |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 72 | |
| 73 | /* |
Chia-I Wu | f07865e | 2014-09-15 13:52:21 +0800 | [diff] [blame] | 74 | * The enabled hardware features could be limited by the kernel. These |
| 75 | * mutable fds allows us to talk to the kernel before the device is |
| 76 | * created. |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 77 | */ |
Chia-I Wu | f07865e | 2014-09-15 13:52:21 +0800 | [diff] [blame] | 78 | int primary_fd_internal; |
| 79 | int render_fd_internal; |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 80 | |
Chia-I Wu | 1db76e0 | 2014-09-15 14:21:14 +0800 | [diff] [blame] | 81 | #ifdef ENABLE_WSI_X11 |
| 82 | struct intel_wsi_x11 *x11; |
| 83 | #endif |
| 84 | |
Chia-I Wu | d896593 | 2014-10-13 13:32:37 +0800 | [diff] [blame] | 85 | struct intel_winsys *winsys; |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | static inline struct intel_gpu *intel_gpu(XGL_PHYSICAL_GPU gpu) |
| 89 | { |
| 90 | return (struct intel_gpu *) gpu; |
| 91 | } |
| 92 | |
| 93 | static inline int intel_gpu_gen(const struct intel_gpu *gpu) |
| 94 | { |
| 95 | #ifdef INTEL_GEN_SPECIALIZED |
| 96 | return INTEL_GEN(INTEL_GEN_SPECIALIZED); |
| 97 | #else |
| 98 | return gpu->gen_opaque; |
| 99 | #endif |
| 100 | } |
| 101 | |
Chia-I Wu | d71ff55 | 2015-02-20 12:50:12 -0700 | [diff] [blame^] | 102 | XGL_RESULT intel_gpu_create(const struct intel_instance *instance, int devid, |
| 103 | const char *primary_node, const char *render_node, |
| 104 | struct intel_gpu **gpu_ret); |
| 105 | void intel_gpu_destroy(struct intel_gpu *gpu); |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 106 | |
| 107 | void intel_gpu_get_props(const struct intel_gpu *gpu, |
| 108 | XGL_PHYSICAL_GPU_PROPERTIES *props); |
| 109 | void intel_gpu_get_perf(const struct intel_gpu *gpu, |
| 110 | XGL_PHYSICAL_GPU_PERFORMANCE *perf); |
| 111 | void intel_gpu_get_queue_props(const struct intel_gpu *gpu, |
| 112 | enum intel_gpu_engine_type engine, |
| 113 | XGL_PHYSICAL_GPU_QUEUE_PROPERTIES *props); |
| 114 | void intel_gpu_get_memory_props(const struct intel_gpu *gpu, |
| 115 | XGL_PHYSICAL_GPU_MEMORY_PROPERTIES *props); |
| 116 | |
Chia-I Wu | 3f4bd10 | 2014-12-19 13:14:42 +0800 | [diff] [blame] | 117 | int intel_gpu_get_max_threads(const struct intel_gpu *gpu, |
| 118 | XGL_PIPELINE_SHADER_STAGE stage); |
| 119 | |
Chia-I Wu | 1db76e0 | 2014-09-15 14:21:14 +0800 | [diff] [blame] | 120 | void intel_gpu_associate_x11(struct intel_gpu *gpu, |
| 121 | struct intel_wsi_x11 *x11, |
| 122 | int fd); |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 123 | XGL_RESULT intel_gpu_open(struct intel_gpu *gpu); |
| 124 | void intel_gpu_close(struct intel_gpu *gpu); |
| 125 | |
Chia-I Wu | 1db76e0 | 2014-09-15 14:21:14 +0800 | [diff] [blame] | 126 | enum intel_ext_type intel_gpu_lookup_extension(const struct intel_gpu *gpu, |
| 127 | const char *ext); |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 128 | |
Chia-I Wu | 214dac6 | 2014-08-05 11:07:40 +0800 | [diff] [blame] | 129 | #endif /* GPU_H */ |