blob: 173ef44e79ae7a3d4d7f4ab7b4a21abe04e5de30 [file] [log] [blame]
Chia-I Wu82f50aa2014-08-05 10:43:03 +08001/*
2 * XGL
3 *
4 * Copyright (C) 2014 LunarG, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24
25#include "dispatch_tables.h"
26#include "gpu.h"
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -060027#include "dev.h"
Chia-I Wu82f50aa2014-08-05 10:43:03 +080028#include "obj.h"
29
30/**
31 * Return true if an (not so) arbitrary pointer casted to intel_base points to
32 * a valid intel_base. This assumes at least the first sizeof(void*) bytes of
33 * the address are accessible, and they does not happen to be our magic
34 * values.
35 */
36bool intel_base_is_valid(const struct intel_base *base)
37{
38 if (base->dispatch != &intel_normal_dispatch_table &&
39 base->dispatch != &intel_debug_dispatch_table)
40 return false;
41
42 return !intel_gpu_is_valid((const struct intel_gpu *) base);
43}
44
Chia-I Wu26f0bd02014-08-07 10:38:40 +080045XGL_RESULT intel_base_get_info(struct intel_base *base, int type,
46 XGL_SIZE *size, XGL_VOID *data)
47{
48 XGL_RESULT ret = XGL_SUCCESS;
49 XGL_SIZE s;
50
51 switch (type) {
52 case XGL_INFO_TYPE_MEMORY_REQUIREMENTS:
53 s = sizeof(XGL_MEMORY_REQUIREMENTS);
54 memset(data, 0, s);
55 *size = s;
56 break;
57 default:
58 ret = XGL_ERROR_INVALID_VALUE;
59 break;
60 }
61
62 return ret;
63}
64
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +080065static bool base_dbg_copy_create_info(struct intel_base_dbg *dbg,
66 const void *create_info)
67{
68 const union {
69 const void *ptr;
70 const struct {
71 XGL_STRUCTURE_TYPE struct_type;
72 XGL_VOID *next;
73 } *header;
74 } info = { .ptr = create_info };
75 XGL_SIZE shallow_copy = 0;
76
77 if (!create_info)
78 return true;
79
80 switch (info.header->struct_type) {
81 case XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO:
82 assert(dbg->type == XGL_DBG_OBJECT_DEVICE);
83 break;
84 case XGL_STRUCTURE_TYPE_MEMORY_ALLOC_INFO:
85 assert(dbg->type == XGL_DBG_OBJECT_GPU_MEMORY);
86 shallow_copy = sizeof(XGL_MEMORY_ALLOC_INFO);
87 break;
88 case XGL_STRUCTURE_TYPE_EVENT_CREATE_INFO:
89 assert(dbg->type == XGL_DBG_OBJECT_EVENT);
90 shallow_copy = sizeof(XGL_EVENT_CREATE_INFO);
91 break;
92 case XGL_STRUCTURE_TYPE_FENCE_CREATE_INFO:
93 assert(dbg->type == XGL_DBG_OBJECT_FENCE);
94 shallow_copy = sizeof(XGL_FENCE_CREATE_INFO);
95 break;
Courtney Goeltzenleuchter850d12c2014-08-07 18:13:10 -060096 case XGL_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO:
97 assert(dbg->type == XGL_DBG_OBJECT_QUERY_POOL);
98 shallow_copy = sizeof(XGL_QUERY_POOL_CREATE_INFO);
99 break;
Chia-I Wufeb441f2014-08-08 21:27:38 +0800100 case XGL_STRUCTURE_TYPE_IMAGE_CREATE_INFO:
101 assert(dbg->type == XGL_DBG_OBJECT_IMAGE);
102 shallow_copy = sizeof(XGL_IMAGE_CREATE_INFO);
103 break;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800104 default:
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600105 // log debug message regarding invalid struct_type?
106 intel_dev_log(dbg->dev, XGL_DBG_MSG_ERROR,
107 XGL_VALIDATION_LEVEL_0, XGL_NULL_HANDLE, 0, 0,
108 "Invalid Create Info type: 0x%x", info.header->struct_type);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800109 return false;
110 break;
111 }
112
113 if (shallow_copy) {
114 assert(!info.header->next);
115
116 dbg->create_info = icd_alloc(shallow_copy, 0, XGL_SYSTEM_ALLOC_DEBUG);
117 if (!dbg->create_info)
118 return false;
119
120 memcpy(dbg->create_info, create_info, shallow_copy);
Chia-I Wue2934f92014-08-16 13:17:22 +0800121 dbg->create_info_size = shallow_copy;
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800122 } else if (info.header->struct_type ==
123 XGL_STRUCTURE_TYPE_DEVICE_CREATE_INFO) {
124 const XGL_DEVICE_CREATE_INFO *src = info.ptr;
125 XGL_DEVICE_CREATE_INFO *dst;
126 uint8_t *d;
127 XGL_SIZE size;
128 XGL_UINT i;
129
130 size = sizeof(*src);
Chia-I Wue2934f92014-08-16 13:17:22 +0800131 dbg->create_info_size = size;
132
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800133 size += sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
134 size += sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
135 for (i = 0; i < src->extensionCount; i++) {
136 size += 1 +
137 strlen((const char *) src->ppEnabledExtensionNames[i]);
138 }
139
Chia-I Wu98dcfab2014-08-07 12:07:52 +0800140 dst = icd_alloc(size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800141 if (!dst)
142 return false;
143
144 memcpy(dst, src, sizeof(*src));
145
146 d = (uint8_t *) dst;
147 d += sizeof(*src);
148
149 size = sizeof(src->pRequestedQueues[0]) * src->queueRecordCount;
150 memcpy(d, src->pRequestedQueues, size);
151 dst->pRequestedQueues = (const XGL_DEVICE_QUEUE_CREATE_INFO *) d;
152 d += size;
153
154 size = sizeof(src->ppEnabledExtensionNames[0]) * src->extensionCount;
155 dst->ppEnabledExtensionNames = (const XGL_CHAR * const *) d;
156
157 for (i = 0; i < src->extensionCount; i++) {
158 const XGL_SIZE len =
159 strlen((const char *) src->ppEnabledExtensionNames[i]);
160
161 memcpy(d + size, src->ppEnabledExtensionNames[i], len + 1);
162 ((const XGL_CHAR **) d)[i] = (const XGL_CHAR *) (d + size);
163
164 size += len + 1;
165 }
166 }
167
168 return true;
169}
170
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800171/**
Chia-I Wubbf2c932014-08-07 12:20:08 +0800172 * Create an intel_base_dbg. When dbg_size is non-zero, a buffer of that
Chia-I Wu660caf82014-08-07 10:54:26 +0800173 * size is allocated and zeroed.
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800174 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600175struct intel_base_dbg *intel_base_dbg_create(struct intel_dev *dev,
176 XGL_DBG_OBJECT_TYPE type,
Chia-I Wu660caf82014-08-07 10:54:26 +0800177 const void *create_info,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800178 XGL_SIZE dbg_size)
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800179{
Chia-I Wu660caf82014-08-07 10:54:26 +0800180 struct intel_base_dbg *dbg;
181
Chia-I Wubbf2c932014-08-07 12:20:08 +0800182 if (!dbg_size)
183 dbg_size = sizeof(*dbg);
Chia-I Wu660caf82014-08-07 10:54:26 +0800184
Chia-I Wubbf2c932014-08-07 12:20:08 +0800185 assert(dbg_size >= sizeof(*dbg));
Chia-I Wu660caf82014-08-07 10:54:26 +0800186
Chia-I Wubbf2c932014-08-07 12:20:08 +0800187 dbg = icd_alloc(dbg_size, 0, XGL_SYSTEM_ALLOC_DEBUG);
Chia-I Wu660caf82014-08-07 10:54:26 +0800188 if (!dbg)
189 return NULL;
190
Chia-I Wubbf2c932014-08-07 12:20:08 +0800191 memset(dbg, 0, dbg_size);
Chia-I Wu660caf82014-08-07 10:54:26 +0800192
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800193 dbg->alloc_id = icd_get_allocator_id();
194 dbg->type = type;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600195 dbg->dev = dev;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800196
Chia-I Wu1f8fc7c2014-08-07 11:09:11 +0800197 if (!base_dbg_copy_create_info(dbg, create_info)) {
198 icd_free(dbg);
199 return NULL;
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800200 }
201
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800202 return dbg;
203}
204
205void intel_base_dbg_destroy(struct intel_base_dbg *dbg)
206{
Chia-I Wu660caf82014-08-07 10:54:26 +0800207 if (dbg->tag)
208 icd_free(dbg->tag);
209
210 if (dbg->create_info)
211 icd_free(dbg->create_info);
212
Chia-I Wu82f50aa2014-08-05 10:43:03 +0800213 icd_free(dbg);
214}
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800215
Chia-I Wubbf2c932014-08-07 12:20:08 +0800216/**
217 * Create an intel_base. obj_size and dbg_size specify the real sizes of the
218 * object and the debug metadata. Memories are zeroed.
219 */
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600220struct intel_base *intel_base_create(struct intel_dev *dev,
221 XGL_SIZE obj_size, bool debug,
Chia-I Wubbf2c932014-08-07 12:20:08 +0800222 XGL_DBG_OBJECT_TYPE type,
223 const void *create_info,
224 XGL_SIZE dbg_size)
225{
226 struct intel_base *base;
227
228 if (!obj_size)
229 obj_size = sizeof(*base);
230
231 assert(obj_size >= sizeof(*base));
232
233 base = icd_alloc(obj_size, 0, XGL_SYSTEM_ALLOC_API_OBJECT);
234 if (!base)
235 return NULL;
236
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600237 if (dev == NULL) {
238 /*
239 * dev is NULL when we are creating the base device object
240 * Set dev now so that debug setup happens correctly
241 */
242 dev = (struct intel_dev *) base;
243 }
244
Chia-I Wubbf2c932014-08-07 12:20:08 +0800245 memset(base, 0, obj_size);
246
247 if (debug) {
248 base->dispatch = &intel_debug_dispatch_table;
Courtney Goeltzenleuchterfb4fb532014-08-14 09:35:21 -0600249 base->dbg = intel_base_dbg_create(dev, type, create_info, dbg_size);
Chia-I Wubbf2c932014-08-07 12:20:08 +0800250 if (!base->dbg) {
251 icd_free(base);
252 return NULL;
253 }
254 }
255 else {
256 base->dispatch = &intel_normal_dispatch_table;
257 }
258 base->get_info = intel_base_get_info;
259
260 return base;
261}
262
263void intel_base_destroy(struct intel_base *base)
264{
265 if (base->dbg)
266 intel_base_dbg_destroy(base->dbg);
267 icd_free(base);
268}
269
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800270XGL_RESULT XGLAPI intelDestroyObject(
271 XGL_OBJECT object)
272{
273 struct intel_obj *obj = intel_obj(object);
274
275 obj->destroy(obj);
276
277 return XGL_SUCCESS;
278}
279
280XGL_RESULT XGLAPI intelGetObjectInfo(
281 XGL_BASE_OBJECT object,
282 XGL_OBJECT_INFO_TYPE infoType,
283 XGL_SIZE* pDataSize,
284 XGL_VOID* pData)
285{
286 struct intel_base *base = intel_base(object);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800287
Chia-I Wu26f0bd02014-08-07 10:38:40 +0800288 return base->get_info(base, infoType, pDataSize, pData);
Chia-I Wu53fc6aa2014-08-06 14:22:51 +0800289}
290
291XGL_RESULT XGLAPI intelBindObjectMemory(
292 XGL_OBJECT object,
293 XGL_GPU_MEMORY mem,
294 XGL_GPU_SIZE offset)
295{
296 struct intel_obj *obj = intel_obj(object);
297
298 obj->mem = mem;
299 obj->offset = offset;
300
301 return XGL_SUCCESS;
302}