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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 2176abc150789e84721ccd2cb79bce246e3eb939 / . / asoc / kona.c
blob: 2c7671be1f284128bfe85676bd7db3773291fa3e [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]76#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]77
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]78enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]94 TDM_QUAT,
95 TDM_QUIN,
96 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]97 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]104 QUAT_AUX_PCM,
105 QUIN_AUX_PCM,
106 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]107 AUX_PCM_MAX,
108};
109
110enum {
111 PRIM_MI2S = 0,
112 SEC_MI2S,
113 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]114 QUAT_MI2S,
115 QUIN_MI2S,
116 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]117 MI2S_MAX,
118};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]119
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]120enum {
121 WSA_CDC_DMA_RX_0 = 0,
122 WSA_CDC_DMA_RX_1,
123 RX_CDC_DMA_RX_0,
124 RX_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_2,
126 RX_CDC_DMA_RX_3,
127 RX_CDC_DMA_RX_5,
128 CDC_DMA_RX_MAX,
129};
130
131enum {
132 WSA_CDC_DMA_TX_0 = 0,
133 WSA_CDC_DMA_TX_1,
134 WSA_CDC_DMA_TX_2,
135 TX_CDC_DMA_TX_0,
136 TX_CDC_DMA_TX_3,
137 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]138 VA_CDC_DMA_TX_0,
139 VA_CDC_DMA_TX_1,
140 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]141 CDC_DMA_TX_MAX,
142};
143
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]144enum {
145 SLIM_RX_7 = 0,
146 SLIM_RX_MAX,
147};
148enum {
149 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]150 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]151 SLIM_TX_MAX,
152};
153
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]154enum {
155 AFE_LOOPBACK_TX_IDX = 0,
156 AFE_LOOPBACK_TX_IDX_MAX,
157};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]158struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]159 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]160 int usbc_en2_gpio; /* used by gpio driver API */
161 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
162 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
163 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]164 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
165 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]166 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
167 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
168 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
169 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
170 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]171 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]172};
173
174struct tdm_port {
175 u32 mode;
176 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]177};
178
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]179enum {
180 EXT_DISP_RX_IDX_DP = 0,
181 EXT_DISP_RX_IDX_MAX,
182};
183
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]184struct msm_wsa881x_dev_info {
185 struct device_node *of_node;
186 u32 index;
187};
188
189struct aux_codec_dev_info {
190 struct device_node *of_node;
191 u32 index;
192};
193
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]194struct dev_config {
195 u32 sample_rate;
196 u32 bit_format;
197 u32 channels;
198};
199
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]200/* Default configuration of slimbus channels */
201static struct dev_config slim_rx_cfg[] = {
202 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
203};
204
205static struct dev_config slim_tx_cfg[] = {
206 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]207 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]208};
209
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]210/* Default configuration of external display BE */
211static struct dev_config ext_disp_rx_cfg[] = {
212 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
213};
214
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]215static struct dev_config usb_rx_cfg = {
216 .sample_rate = SAMPLING_RATE_48KHZ,
217 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
218 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]219};
220
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]221static struct dev_config usb_tx_cfg = {
222 .sample_rate = SAMPLING_RATE_48KHZ,
223 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
224 .channels = 1,
225};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]226
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]227static struct dev_config proxy_rx_cfg = {
228 .sample_rate = SAMPLING_RATE_48KHZ,
229 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
230 .channels = 2,
231};
232
233static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
234 {
235 AFE_API_VERSION_I2S_CONFIG,
236 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
237 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
238 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
239 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
240 0,
241 },
242 {
243 AFE_API_VERSION_I2S_CONFIG,
244 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
245 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
246 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
247 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
248 0,
249 },
250 {
251 AFE_API_VERSION_I2S_CONFIG,
252 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
253 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
254 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
255 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
256 0,
257 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]258 {
259 AFE_API_VERSION_I2S_CONFIG,
260 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
261 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
262 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
263 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
264 0,
265 },
266 {
267 AFE_API_VERSION_I2S_CONFIG,
268 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
269 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
270 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
271 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
272 0,
273 },
274 {
275 AFE_API_VERSION_I2S_CONFIG,
276 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
277 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
278 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
279 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
280 0,
281 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]282};
283
284struct mi2s_conf {
285 struct mutex lock;
286 u32 ref_cnt;
287 u32 msm_is_mi2s_master;
288};
289
290static u32 mi2s_ebit_clk[MI2S_MAX] = {
291 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
292 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
293 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
294};
295
296static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
297
298/* Default configuration of TDM channels */
299static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
300 { /* PRI TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
309 },
310 { /* SEC TDM */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
319 },
320 { /* TERT TDM */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
329 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]330 { /* QUAT TDM */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
339 },
340 { /* QUIN TDM */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
349 },
350 { /* SEN TDM */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
359 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]360};
361
362static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
363 { /* PRI TDM */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
372 },
373 { /* SEC TDM */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
382 },
383 { /* TERT TDM */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
392 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]393 { /* QUAT TDM */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
402 },
403 { /* QUIN TDM */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
412 },
413 { /* SEN TDM */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
422 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]423};
424
425/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]426static struct dev_config aux_pcm_rx_cfg[] = {
427 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]428 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]430 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]433};
434
435static struct dev_config aux_pcm_tx_cfg[] = {
436 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]437 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]439 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]442};
443
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]444/* Default configuration of MI2S channels */
445static struct dev_config mi2s_rx_cfg[] = {
446 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
447 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
448 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]449 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
450 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
451 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]452};
453
454static struct dev_config mi2s_tx_cfg[] = {
455 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]458 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
460 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]461};
462
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]463/* Default configuration of Codec DMA Interface RX */
464static struct dev_config cdc_dma_rx_cfg[] = {
465 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
466 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
467 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
468 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
469 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
470 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
471 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
472};
473
474/* Default configuration of Codec DMA Interface TX */
475static struct dev_config cdc_dma_tx_cfg[] = {
476 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]482 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
483 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
484 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]485};
486
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]487static struct dev_config afe_loopback_tx_cfg[] = {
488 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
489};
490
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]491static int msm_vi_feed_tx_ch = 2;
492static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]493static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
494 "S32_LE"};
495static char const *ch_text[] = {"Two", "Three", "Four", "Five",
496 "Six", "Seven", "Eight"};
497static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
498 "KHZ_16", "KHZ_22P05",
499 "KHZ_32", "KHZ_44P1", "KHZ_48",
500 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
501 "KHZ_192", "KHZ_352P8", "KHZ_384"};
502static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
503 "Five", "Six", "Seven",
504 "Eight"};
505static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
506 "KHZ_48", "KHZ_176P4",
507 "KHZ_352P8"};
508static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
509static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
510 "Five", "Six", "Seven", "Eight"};
511static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
512static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
513 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
514 "KHZ_48", "KHZ_96", "KHZ_192"};
515static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
516 "Five", "Six", "Seven",
517 "Eight"};
518
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]519static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
520static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
521 "Five", "Six", "Seven",
522 "Eight"};
523static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
524 "KHZ_16", "KHZ_22P05",
525 "KHZ_32", "KHZ_44P1", "KHZ_48",
526 "KHZ_88P2", "KHZ_96",
527 "KHZ_176P4", "KHZ_192",
528 "KHZ_352P8", "KHZ_384"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]529static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
530 "S24_3LE"};
531static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
532 "KHZ_192", "KHZ_32", "KHZ_44P1",
533 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]534static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
535 "KHZ_44P1", "KHZ_48",
536 "KHZ_88P2", "KHZ_96"};
537static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
538 "KHZ_44P1", "KHZ_48",
539 "KHZ_88P2", "KHZ_96"};
540static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
541 "KHZ_44P1", "KHZ_48",
542 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]543static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]544
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]545static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
548static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
549static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
550static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]551static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]552static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]559static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]560static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]562static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]565static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]566static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]568static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]571static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
572static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]573static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
574static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]576static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
578static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]579static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
580static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
581static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]582static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
583static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
584static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]585static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]590static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]593static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]596static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
609static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
610static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
611static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]612static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
613static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
614static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
618static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
619static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
620static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
621static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
622static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]627static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
628static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
629static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]630static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
631 cdc_dma_sample_rate_text);
632static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
633 cdc_dma_sample_rate_text);
634static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
635 cdc_dma_sample_rate_text);
636static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
637 cdc_dma_sample_rate_text);
638static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
639 cdc_dma_sample_rate_text);
640static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
641 cdc_dma_sample_rate_text);
642static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
643 cdc_dma_sample_rate_text);
644static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
645 cdc_dma_sample_rate_text);
646static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
647 cdc_dma_sample_rate_text);
648static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
649 cdc_dma_sample_rate_text);
650static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
651 cdc_dma_sample_rate_text);
652static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
653 cdc_dma_sample_rate_text);
654static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
655 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]656static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
657 cdc_dma_sample_rate_text);
658static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
659 cdc_dma_sample_rate_text);
660static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
661 cdc_dma_sample_rate_text);
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]662static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
663static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
664static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
665 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]666static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
667static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
668static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]669static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]670
671static bool is_initial_boot;
672static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]673static struct snd_soc_aux_dev *msm_aux_dev;
674static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]675static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]676static int dmic_0_1_gpio_cnt;
677static int dmic_2_3_gpio_cnt;
678static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]679
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]680static void *def_wcd_mbhc_cal(void);
681
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]682/*
683 * Need to report LINEIN
684 * if R/L channel impedance is larger than 5K ohm
685 */
686static struct wcd_mbhc_config wcd_mbhc_cfg = {
687 .read_fw_bin = false,
688 .calibration = NULL,
689 .detect_extn_cable = true,
690 .mono_stero_detection = false,
691 .swap_gnd_mic = NULL,
692 .hs_ext_micbias = true,
693 .key_code[0] = KEY_MEDIA,
694 .key_code[1] = KEY_VOICECOMMAND,
695 .key_code[2] = KEY_VOLUMEUP,
696 .key_code[3] = KEY_VOLUMEDOWN,
697 .key_code[4] = 0,
698 .key_code[5] = 0,
699 .key_code[6] = 0,
700 .key_code[7] = 0,
701 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]702 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]703 .mbhc_micbias = MIC_BIAS_2,
704 .anc_micbias = MIC_BIAS_2,
705 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]706 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]707};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]708
709static inline int param_is_mask(int p)
710{
711 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
712 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
713}
714
715static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
716 int n)
717{
718 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
719}
720
721static void param_set_mask(struct snd_pcm_hw_params *p, int n,
722 unsigned int bit)
723{
724 if (bit >= SNDRV_MASK_MAX)
725 return;
726 if (param_is_mask(n)) {
727 struct snd_mask *m = param_to_mask(p, n);
728
729 m->bits[0] = 0;
730 m->bits[1] = 0;
731 m->bits[bit >> 5] |= (1 << (bit & 31));
732 }
733}
734
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]735static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
736 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]737{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]738 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]739
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]740 switch (usb_rx_cfg.sample_rate) {
741 case SAMPLING_RATE_384KHZ:
742 sample_rate_val = 12;
743 break;
744 case SAMPLING_RATE_352P8KHZ:
745 sample_rate_val = 11;
746 break;
747 case SAMPLING_RATE_192KHZ:
748 sample_rate_val = 10;
749 break;
750 case SAMPLING_RATE_176P4KHZ:
751 sample_rate_val = 9;
752 break;
753 case SAMPLING_RATE_96KHZ:
754 sample_rate_val = 8;
755 break;
756 case SAMPLING_RATE_88P2KHZ:
757 sample_rate_val = 7;
758 break;
759 case SAMPLING_RATE_48KHZ:
760 sample_rate_val = 6;
761 break;
762 case SAMPLING_RATE_44P1KHZ:
763 sample_rate_val = 5;
764 break;
765 case SAMPLING_RATE_32KHZ:
766 sample_rate_val = 4;
767 break;
768 case SAMPLING_RATE_22P05KHZ:
769 sample_rate_val = 3;
770 break;
771 case SAMPLING_RATE_16KHZ:
772 sample_rate_val = 2;
773 break;
774 case SAMPLING_RATE_11P025KHZ:
775 sample_rate_val = 1;
776 break;
777 case SAMPLING_RATE_8KHZ:
778 default:
779 sample_rate_val = 0;
780 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]781 }
782
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]783 ucontrol->value.integer.value[0] = sample_rate_val;
784 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
785 usb_rx_cfg.sample_rate);
786 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]787}
788
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]789static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 switch (ucontrol->value.integer.value[0]) {
793 case 12:
794 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
795 break;
796 case 11:
797 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
798 break;
799 case 10:
800 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
801 break;
802 case 9:
803 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
804 break;
805 case 8:
806 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
807 break;
808 case 7:
809 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
810 break;
811 case 6:
812 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
813 break;
814 case 5:
815 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
816 break;
817 case 4:
818 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
819 break;
820 case 3:
821 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
822 break;
823 case 2:
824 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
825 break;
826 case 1:
827 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
828 break;
829 case 0:
830 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
831 break;
832 default:
833 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
834 break;
835 }
836
837 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
838 __func__, ucontrol->value.integer.value[0],
839 usb_rx_cfg.sample_rate);
840 return 0;
841}
842
843static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
844 struct snd_ctl_elem_value *ucontrol)
845{
846 int sample_rate_val = 0;
847
848 switch (usb_tx_cfg.sample_rate) {
849 case SAMPLING_RATE_384KHZ:
850 sample_rate_val = 12;
851 break;
852 case SAMPLING_RATE_352P8KHZ:
853 sample_rate_val = 11;
854 break;
855 case SAMPLING_RATE_192KHZ:
856 sample_rate_val = 10;
857 break;
858 case SAMPLING_RATE_176P4KHZ:
859 sample_rate_val = 9;
860 break;
861 case SAMPLING_RATE_96KHZ:
862 sample_rate_val = 8;
863 break;
864 case SAMPLING_RATE_88P2KHZ:
865 sample_rate_val = 7;
866 break;
867 case SAMPLING_RATE_48KHZ:
868 sample_rate_val = 6;
869 break;
870 case SAMPLING_RATE_44P1KHZ:
871 sample_rate_val = 5;
872 break;
873 case SAMPLING_RATE_32KHZ:
874 sample_rate_val = 4;
875 break;
876 case SAMPLING_RATE_22P05KHZ:
877 sample_rate_val = 3;
878 break;
879 case SAMPLING_RATE_16KHZ:
880 sample_rate_val = 2;
881 break;
882 case SAMPLING_RATE_11P025KHZ:
883 sample_rate_val = 1;
884 break;
885 case SAMPLING_RATE_8KHZ:
886 sample_rate_val = 0;
887 break;
888 default:
889 sample_rate_val = 6;
890 break;
891 }
892
893 ucontrol->value.integer.value[0] = sample_rate_val;
894 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
895 usb_tx_cfg.sample_rate);
896 return 0;
897}
898
899static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
900 struct snd_ctl_elem_value *ucontrol)
901{
902 switch (ucontrol->value.integer.value[0]) {
903 case 12:
904 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
905 break;
906 case 11:
907 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
908 break;
909 case 10:
910 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
911 break;
912 case 9:
913 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
914 break;
915 case 8:
916 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
917 break;
918 case 7:
919 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
920 break;
921 case 6:
922 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
923 break;
924 case 5:
925 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
926 break;
927 case 4:
928 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
929 break;
930 case 3:
931 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
932 break;
933 case 2:
934 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
935 break;
936 case 1:
937 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
938 break;
939 case 0:
940 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
941 break;
942 default:
943 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
944 break;
945 }
946
947 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
948 __func__, ucontrol->value.integer.value[0],
949 usb_tx_cfg.sample_rate);
950 return 0;
951}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]952static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_value *ucontrol)
954{
955 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
956 afe_loopback_tx_cfg[0].channels);
957 ucontrol->value.enumerated.item[0] =
958 afe_loopback_tx_cfg[0].channels - 1;
959
960 return 0;
961}
962
963static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
964 struct snd_ctl_elem_value *ucontrol)
965{
966 afe_loopback_tx_cfg[0].channels =
967 ucontrol->value.enumerated.item[0] + 1;
968 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
969 afe_loopback_tx_cfg[0].channels);
970
971 return 1;
972}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]973
974static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
975 struct snd_ctl_elem_value *ucontrol)
976{
977 switch (usb_rx_cfg.bit_format) {
978 case SNDRV_PCM_FORMAT_S32_LE:
979 ucontrol->value.integer.value[0] = 3;
980 break;
981 case SNDRV_PCM_FORMAT_S24_3LE:
982 ucontrol->value.integer.value[0] = 2;
983 break;
984 case SNDRV_PCM_FORMAT_S24_LE:
985 ucontrol->value.integer.value[0] = 1;
986 break;
987 case SNDRV_PCM_FORMAT_S16_LE:
988 default:
989 ucontrol->value.integer.value[0] = 0;
990 break;
991 }
992
993 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
994 __func__, usb_rx_cfg.bit_format,
995 ucontrol->value.integer.value[0]);
996 return 0;
997}
998
999static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1000 struct snd_ctl_elem_value *ucontrol)
1001{
1002 int rc = 0;
1003
1004 switch (ucontrol->value.integer.value[0]) {
1005 case 3:
1006 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1007 break;
1008 case 2:
1009 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1010 break;
1011 case 1:
1012 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1013 break;
1014 case 0:
1015 default:
1016 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1017 break;
1018 }
1019 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1020 __func__, usb_rx_cfg.bit_format,
1021 ucontrol->value.integer.value[0]);
1022
1023 return rc;
1024}
1025
1026static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 switch (usb_tx_cfg.bit_format) {
1030 case SNDRV_PCM_FORMAT_S32_LE:
1031 ucontrol->value.integer.value[0] = 3;
1032 break;
1033 case SNDRV_PCM_FORMAT_S24_3LE:
1034 ucontrol->value.integer.value[0] = 2;
1035 break;
1036 case SNDRV_PCM_FORMAT_S24_LE:
1037 ucontrol->value.integer.value[0] = 1;
1038 break;
1039 case SNDRV_PCM_FORMAT_S16_LE:
1040 default:
1041 ucontrol->value.integer.value[0] = 0;
1042 break;
1043 }
1044
1045 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1046 __func__, usb_tx_cfg.bit_format,
1047 ucontrol->value.integer.value[0]);
1048 return 0;
1049}
1050
1051static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1052 struct snd_ctl_elem_value *ucontrol)
1053{
1054 int rc = 0;
1055
1056 switch (ucontrol->value.integer.value[0]) {
1057 case 3:
1058 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1059 break;
1060 case 2:
1061 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1062 break;
1063 case 1:
1064 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1065 break;
1066 case 0:
1067 default:
1068 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1069 break;
1070 }
1071 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1072 __func__, usb_tx_cfg.bit_format,
1073 ucontrol->value.integer.value[0]);
1074
1075 return rc;
1076}
1077
1078static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1082 usb_rx_cfg.channels);
1083 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1084 return 0;
1085}
1086
1087static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1091
1092 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1093 return 1;
1094}
1095
1096static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1097 struct snd_ctl_elem_value *ucontrol)
1098{
1099 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1100 usb_tx_cfg.channels);
1101 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1102 return 0;
1103}
1104
1105static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1106 struct snd_ctl_elem_value *ucontrol)
1107{
1108 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1109
1110 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1111 return 1;
1112}
1113
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1114static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1115 struct snd_ctl_elem_value *ucontrol)
1116{
1117 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1118 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1119 ucontrol->value.integer.value[0]);
1120 return 0;
1121}
1122
1123static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125{
1126 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1127 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1128 return 1;
1129}
1130
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1131static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1132{
1133 int idx = 0;
1134
1135 if (strnstr(kcontrol->id.name, "Display Port RX",
1136 sizeof("Display Port RX"))) {
1137 idx = EXT_DISP_RX_IDX_DP;
1138 } else {
1139 pr_err("%s: unsupported BE: %s\n",
1140 __func__, kcontrol->id.name);
1141 idx = -EINVAL;
1142 }
1143
1144 return idx;
1145}
1146
1147static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_value *ucontrol)
1149{
1150 int idx = ext_disp_get_port_idx(kcontrol);
1151
1152 if (idx < 0)
1153 return idx;
1154
1155 switch (ext_disp_rx_cfg[idx].bit_format) {
1156 case SNDRV_PCM_FORMAT_S24_3LE:
1157 ucontrol->value.integer.value[0] = 2;
1158 break;
1159 case SNDRV_PCM_FORMAT_S24_LE:
1160 ucontrol->value.integer.value[0] = 1;
1161 break;
1162 case SNDRV_PCM_FORMAT_S16_LE:
1163 default:
1164 ucontrol->value.integer.value[0] = 0;
1165 break;
1166 }
1167
1168 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1169 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1170 ucontrol->value.integer.value[0]);
1171 return 0;
1172}
1173
1174static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_value *ucontrol)
1176{
1177 int idx = ext_disp_get_port_idx(kcontrol);
1178
1179 if (idx < 0)
1180 return idx;
1181
1182 switch (ucontrol->value.integer.value[0]) {
1183 case 2:
1184 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1185 break;
1186 case 1:
1187 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1188 break;
1189 case 0:
1190 default:
1191 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1192 break;
1193 }
1194 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1195 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1196 ucontrol->value.integer.value[0]);
1197
1198 return 0;
1199}
1200
1201static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1202 struct snd_ctl_elem_value *ucontrol)
1203{
1204 int idx = ext_disp_get_port_idx(kcontrol);
1205
1206 if (idx < 0)
1207 return idx;
1208
1209 ucontrol->value.integer.value[0] =
1210 ext_disp_rx_cfg[idx].channels - 2;
1211
1212 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1213 idx, ext_disp_rx_cfg[idx].channels);
1214
1215 return 0;
1216}
1217
1218static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1219 struct snd_ctl_elem_value *ucontrol)
1220{
1221 int idx = ext_disp_get_port_idx(kcontrol);
1222
1223 if (idx < 0)
1224 return idx;
1225
1226 ext_disp_rx_cfg[idx].channels =
1227 ucontrol->value.integer.value[0] + 2;
1228
1229 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1230 idx, ext_disp_rx_cfg[idx].channels);
1231 return 1;
1232}
1233
1234static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1235 struct snd_ctl_elem_value *ucontrol)
1236{
1237 int sample_rate_val;
1238 int idx = ext_disp_get_port_idx(kcontrol);
1239
1240 if (idx < 0)
1241 return idx;
1242
1243 switch (ext_disp_rx_cfg[idx].sample_rate) {
1244 case SAMPLING_RATE_176P4KHZ:
1245 sample_rate_val = 6;
1246 break;
1247
1248 case SAMPLING_RATE_88P2KHZ:
1249 sample_rate_val = 5;
1250 break;
1251
1252 case SAMPLING_RATE_44P1KHZ:
1253 sample_rate_val = 4;
1254 break;
1255
1256 case SAMPLING_RATE_32KHZ:
1257 sample_rate_val = 3;
1258 break;
1259
1260 case SAMPLING_RATE_192KHZ:
1261 sample_rate_val = 2;
1262 break;
1263
1264 case SAMPLING_RATE_96KHZ:
1265 sample_rate_val = 1;
1266 break;
1267
1268 case SAMPLING_RATE_48KHZ:
1269 default:
1270 sample_rate_val = 0;
1271 break;
1272 }
1273
1274 ucontrol->value.integer.value[0] = sample_rate_val;
1275 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1276 idx, ext_disp_rx_cfg[idx].sample_rate);
1277
1278 return 0;
1279}
1280
1281static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_value *ucontrol)
1283{
1284 int idx = ext_disp_get_port_idx(kcontrol);
1285
1286 if (idx < 0)
1287 return idx;
1288
1289 switch (ucontrol->value.integer.value[0]) {
1290 case 6:
1291 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1292 break;
1293 case 5:
1294 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1295 break;
1296 case 4:
1297 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1298 break;
1299 case 3:
1300 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1301 break;
1302 case 2:
1303 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1304 break;
1305 case 1:
1306 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1307 break;
1308 case 0:
1309 default:
1310 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1311 break;
1312 }
1313
1314 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1315 __func__, ucontrol->value.integer.value[0], idx,
1316 ext_disp_rx_cfg[idx].sample_rate);
1317 return 0;
1318}
1319
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1320static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_value *ucontrol)
1322{
1323 pr_debug("%s: proxy_rx channels = %d\n",
1324 __func__, proxy_rx_cfg.channels);
1325 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1326
1327 return 0;
1328}
1329
1330static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1331 struct snd_ctl_elem_value *ucontrol)
1332{
1333 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1334 pr_debug("%s: proxy_rx channels = %d\n",
1335 __func__, proxy_rx_cfg.channels);
1336
1337 return 1;
1338}
1339
1340static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1341 struct tdm_port *port)
1342{
1343 if (port) {
1344 if (strnstr(kcontrol->id.name, "PRI",
1345 sizeof(kcontrol->id.name))) {
1346 port->mode = TDM_PRI;
1347 } else if (strnstr(kcontrol->id.name, "SEC",
1348 sizeof(kcontrol->id.name))) {
1349 port->mode = TDM_SEC;
1350 } else if (strnstr(kcontrol->id.name, "TERT",
1351 sizeof(kcontrol->id.name))) {
1352 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1353 } else if (strnstr(kcontrol->id.name, "QUAT",
1354 sizeof(kcontrol->id.name))) {
1355 port->mode = TDM_QUAT;
1356 } else if (strnstr(kcontrol->id.name, "QUIN",
1357 sizeof(kcontrol->id.name))) {
1358 port->mode = TDM_QUIN;
1359 } else if (strnstr(kcontrol->id.name, "SEN",
1360 sizeof(kcontrol->id.name))) {
1361 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1362 } else {
1363 pr_err("%s: unsupported mode in: %s\n",
1364 __func__, kcontrol->id.name);
1365 return -EINVAL;
1366 }
1367
1368 if (strnstr(kcontrol->id.name, "RX_0",
1369 sizeof(kcontrol->id.name)) ||
1370 strnstr(kcontrol->id.name, "TX_0",
1371 sizeof(kcontrol->id.name))) {
1372 port->channel = TDM_0;
1373 } else if (strnstr(kcontrol->id.name, "RX_1",
1374 sizeof(kcontrol->id.name)) ||
1375 strnstr(kcontrol->id.name, "TX_1",
1376 sizeof(kcontrol->id.name))) {
1377 port->channel = TDM_1;
1378 } else if (strnstr(kcontrol->id.name, "RX_2",
1379 sizeof(kcontrol->id.name)) ||
1380 strnstr(kcontrol->id.name, "TX_2",
1381 sizeof(kcontrol->id.name))) {
1382 port->channel = TDM_2;
1383 } else if (strnstr(kcontrol->id.name, "RX_3",
1384 sizeof(kcontrol->id.name)) ||
1385 strnstr(kcontrol->id.name, "TX_3",
1386 sizeof(kcontrol->id.name))) {
1387 port->channel = TDM_3;
1388 } else if (strnstr(kcontrol->id.name, "RX_4",
1389 sizeof(kcontrol->id.name)) ||
1390 strnstr(kcontrol->id.name, "TX_4",
1391 sizeof(kcontrol->id.name))) {
1392 port->channel = TDM_4;
1393 } else if (strnstr(kcontrol->id.name, "RX_5",
1394 sizeof(kcontrol->id.name)) ||
1395 strnstr(kcontrol->id.name, "TX_5",
1396 sizeof(kcontrol->id.name))) {
1397 port->channel = TDM_5;
1398 } else if (strnstr(kcontrol->id.name, "RX_6",
1399 sizeof(kcontrol->id.name)) ||
1400 strnstr(kcontrol->id.name, "TX_6",
1401 sizeof(kcontrol->id.name))) {
1402 port->channel = TDM_6;
1403 } else if (strnstr(kcontrol->id.name, "RX_7",
1404 sizeof(kcontrol->id.name)) ||
1405 strnstr(kcontrol->id.name, "TX_7",
1406 sizeof(kcontrol->id.name))) {
1407 port->channel = TDM_7;
1408 } else {
1409 pr_err("%s: unsupported channel in: %s\n",
1410 __func__, kcontrol->id.name);
1411 return -EINVAL;
1412 }
1413 } else {
1414 return -EINVAL;
1415 }
1416 return 0;
1417}
1418
1419static int tdm_get_sample_rate(int value)
1420{
1421 int sample_rate = 0;
1422
1423 switch (value) {
1424 case 0:
1425 sample_rate = SAMPLING_RATE_8KHZ;
1426 break;
1427 case 1:
1428 sample_rate = SAMPLING_RATE_16KHZ;
1429 break;
1430 case 2:
1431 sample_rate = SAMPLING_RATE_32KHZ;
1432 break;
1433 case 3:
1434 sample_rate = SAMPLING_RATE_48KHZ;
1435 break;
1436 case 4:
1437 sample_rate = SAMPLING_RATE_176P4KHZ;
1438 break;
1439 case 5:
1440 sample_rate = SAMPLING_RATE_352P8KHZ;
1441 break;
1442 default:
1443 sample_rate = SAMPLING_RATE_48KHZ;
1444 break;
1445 }
1446 return sample_rate;
1447}
1448
1449static int tdm_get_sample_rate_val(int sample_rate)
1450{
1451 int sample_rate_val = 0;
1452
1453 switch (sample_rate) {
1454 case SAMPLING_RATE_8KHZ:
1455 sample_rate_val = 0;
1456 break;
1457 case SAMPLING_RATE_16KHZ:
1458 sample_rate_val = 1;
1459 break;
1460 case SAMPLING_RATE_32KHZ:
1461 sample_rate_val = 2;
1462 break;
1463 case SAMPLING_RATE_48KHZ:
1464 sample_rate_val = 3;
1465 break;
1466 case SAMPLING_RATE_176P4KHZ:
1467 sample_rate_val = 4;
1468 break;
1469 case SAMPLING_RATE_352P8KHZ:
1470 sample_rate_val = 5;
1471 break;
1472 default:
1473 sample_rate_val = 3;
1474 break;
1475 }
1476 return sample_rate_val;
1477}
1478
1479static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 struct tdm_port port;
1483 int ret = tdm_get_port_idx(kcontrol, &port);
1484
1485 if (ret) {
1486 pr_err("%s: unsupported control: %s\n",
1487 __func__, kcontrol->id.name);
1488 } else {
1489 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1490 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1491
1492 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1493 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1494 ucontrol->value.enumerated.item[0]);
1495 }
1496 return ret;
1497}
1498
1499static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1500 struct snd_ctl_elem_value *ucontrol)
1501{
1502 struct tdm_port port;
1503 int ret = tdm_get_port_idx(kcontrol, &port);
1504
1505 if (ret) {
1506 pr_err("%s: unsupported control: %s\n",
1507 __func__, kcontrol->id.name);
1508 } else {
1509 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1510 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1511
1512 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1513 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1514 ucontrol->value.enumerated.item[0]);
1515 }
1516 return ret;
1517}
1518
1519static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1520 struct snd_ctl_elem_value *ucontrol)
1521{
1522 struct tdm_port port;
1523 int ret = tdm_get_port_idx(kcontrol, &port);
1524
1525 if (ret) {
1526 pr_err("%s: unsupported control: %s\n",
1527 __func__, kcontrol->id.name);
1528 } else {
1529 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1530 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1531
1532 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1533 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1534 ucontrol->value.enumerated.item[0]);
1535 }
1536 return ret;
1537}
1538
1539static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1540 struct snd_ctl_elem_value *ucontrol)
1541{
1542 struct tdm_port port;
1543 int ret = tdm_get_port_idx(kcontrol, &port);
1544
1545 if (ret) {
1546 pr_err("%s: unsupported control: %s\n",
1547 __func__, kcontrol->id.name);
1548 } else {
1549 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1550 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1551
1552 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1553 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1554 ucontrol->value.enumerated.item[0]);
1555 }
1556 return ret;
1557}
1558
1559static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1560{
1561 int format = 0;
1562
1563 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1564 case 0:
1565 format = SNDRV_PCM_FORMAT_S16_LE;
1566 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1567 case 1:
1568 format = SNDRV_PCM_FORMAT_S24_LE;
1569 break;
1570 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1571 format = SNDRV_PCM_FORMAT_S32_LE;
1572 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1573 default:
1574 format = SNDRV_PCM_FORMAT_S16_LE;
1575 break;
1576 }
1577 return format;
1578}
1579
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1580static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1581{
1582 int value = 0;
1583
1584 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1585 case SNDRV_PCM_FORMAT_S16_LE:
1586 value = 0;
1587 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1588 case SNDRV_PCM_FORMAT_S24_LE:
1589 value = 1;
1590 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1591 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1592 value = 2;
1593 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1594 default:
1595 value = 0;
1596 break;
1597 }
1598 return value;
1599}
1600
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1601static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1602 struct snd_ctl_elem_value *ucontrol)
1603{
1604 struct tdm_port port;
1605 int ret = tdm_get_port_idx(kcontrol, &port);
1606
1607 if (ret) {
1608 pr_err("%s: unsupported control: %s\n",
1609 __func__, kcontrol->id.name);
1610 } else {
1611 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1612 tdm_rx_cfg[port.mode][port.channel].bit_format);
1613
1614 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1615 tdm_rx_cfg[port.mode][port.channel].bit_format,
1616 ucontrol->value.enumerated.item[0]);
1617 }
1618 return ret;
1619}
1620
1621static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1622 struct snd_ctl_elem_value *ucontrol)
1623{
1624 struct tdm_port port;
1625 int ret = tdm_get_port_idx(kcontrol, &port);
1626
1627 if (ret) {
1628 pr_err("%s: unsupported control: %s\n",
1629 __func__, kcontrol->id.name);
1630 } else {
1631 tdm_rx_cfg[port.mode][port.channel].bit_format =
1632 tdm_get_format(ucontrol->value.enumerated.item[0]);
1633
1634 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1635 tdm_rx_cfg[port.mode][port.channel].bit_format,
1636 ucontrol->value.enumerated.item[0]);
1637 }
1638 return ret;
1639}
1640
1641static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1643{
1644 struct tdm_port port;
1645 int ret = tdm_get_port_idx(kcontrol, &port);
1646
1647 if (ret) {
1648 pr_err("%s: unsupported control: %s\n",
1649 __func__, kcontrol->id.name);
1650 } else {
1651 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1652 tdm_tx_cfg[port.mode][port.channel].bit_format);
1653
1654 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1655 tdm_tx_cfg[port.mode][port.channel].bit_format,
1656 ucontrol->value.enumerated.item[0]);
1657 }
1658 return ret;
1659}
1660
1661static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1662 struct snd_ctl_elem_value *ucontrol)
1663{
1664 struct tdm_port port;
1665 int ret = tdm_get_port_idx(kcontrol, &port);
1666
1667 if (ret) {
1668 pr_err("%s: unsupported control: %s\n",
1669 __func__, kcontrol->id.name);
1670 } else {
1671 tdm_tx_cfg[port.mode][port.channel].bit_format =
1672 tdm_get_format(ucontrol->value.enumerated.item[0]);
1673
1674 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1675 tdm_tx_cfg[port.mode][port.channel].bit_format,
1676 ucontrol->value.enumerated.item[0]);
1677 }
1678 return ret;
1679}
1680
1681static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1682 struct snd_ctl_elem_value *ucontrol)
1683{
1684 struct tdm_port port;
1685 int ret = tdm_get_port_idx(kcontrol, &port);
1686
1687 if (ret) {
1688 pr_err("%s: unsupported control: %s\n",
1689 __func__, kcontrol->id.name);
1690 } else {
1691
1692 ucontrol->value.enumerated.item[0] =
1693 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1694
1695 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1696 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1697 ucontrol->value.enumerated.item[0]);
1698 }
1699 return ret;
1700}
1701
1702static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct tdm_port port;
1706 int ret = tdm_get_port_idx(kcontrol, &port);
1707
1708 if (ret) {
1709 pr_err("%s: unsupported control: %s\n",
1710 __func__, kcontrol->id.name);
1711 } else {
1712 tdm_rx_cfg[port.mode][port.channel].channels =
1713 ucontrol->value.enumerated.item[0] + 1;
1714
1715 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1716 tdm_rx_cfg[port.mode][port.channel].channels,
1717 ucontrol->value.enumerated.item[0] + 1);
1718 }
1719 return ret;
1720}
1721
1722static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724{
1725 struct tdm_port port;
1726 int ret = tdm_get_port_idx(kcontrol, &port);
1727
1728 if (ret) {
1729 pr_err("%s: unsupported control: %s\n",
1730 __func__, kcontrol->id.name);
1731 } else {
1732 ucontrol->value.enumerated.item[0] =
1733 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1734
1735 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1736 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1737 ucontrol->value.enumerated.item[0]);
1738 }
1739 return ret;
1740}
1741
1742static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1743 struct snd_ctl_elem_value *ucontrol)
1744{
1745 struct tdm_port port;
1746 int ret = tdm_get_port_idx(kcontrol, &port);
1747
1748 if (ret) {
1749 pr_err("%s: unsupported control: %s\n",
1750 __func__, kcontrol->id.name);
1751 } else {
1752 tdm_tx_cfg[port.mode][port.channel].channels =
1753 ucontrol->value.enumerated.item[0] + 1;
1754
1755 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1756 tdm_tx_cfg[port.mode][port.channel].channels,
1757 ucontrol->value.enumerated.item[0] + 1);
1758 }
1759 return ret;
1760}
1761
1762static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1763{
1764 int idx = 0;
1765
1766 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1767 sizeof("PRIM_AUX_PCM"))) {
1768 idx = PRIM_AUX_PCM;
1769 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1770 sizeof("SEC_AUX_PCM"))) {
1771 idx = SEC_AUX_PCM;
1772 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1773 sizeof("TERT_AUX_PCM"))) {
1774 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1775 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1776 sizeof("QUAT_AUX_PCM"))) {
1777 idx = QUAT_AUX_PCM;
1778 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
1779 sizeof("QUIN_AUX_PCM"))) {
1780 idx = QUIN_AUX_PCM;
1781 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
1782 sizeof("SEN_AUX_PCM"))) {
1783 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1784 } else {
1785 pr_err("%s: unsupported port: %s\n",
1786 __func__, kcontrol->id.name);
1787 idx = -EINVAL;
1788 }
1789
1790 return idx;
1791}
1792
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1793static int aux_pcm_get_sample_rate(int value)
1794{
1795 int sample_rate = 0;
1796
1797 switch (value) {
1798 case 1:
1799 sample_rate = SAMPLING_RATE_16KHZ;
1800 break;
1801 case 0:
1802 default:
1803 sample_rate = SAMPLING_RATE_8KHZ;
1804 break;
1805 }
1806 return sample_rate;
1807}
1808
1809static int aux_pcm_get_sample_rate_val(int sample_rate)
1810{
1811 int sample_rate_val = 0;
1812
1813 switch (sample_rate) {
1814 case SAMPLING_RATE_16KHZ:
1815 sample_rate_val = 1;
1816 break;
1817 case SAMPLING_RATE_8KHZ:
1818 default:
1819 sample_rate_val = 0;
1820 break;
1821 }
1822 return sample_rate_val;
1823}
1824
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1825static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1826{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1827 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1828
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1829 switch (value) {
1830 case 0:
1831 format = SNDRV_PCM_FORMAT_S16_LE;
1832 break;
1833 case 1:
1834 format = SNDRV_PCM_FORMAT_S24_LE;
1835 break;
1836 case 2:
1837 format = SNDRV_PCM_FORMAT_S24_3LE;
1838 break;
1839 case 3:
1840 format = SNDRV_PCM_FORMAT_S32_LE;
1841 break;
1842 default:
1843 format = SNDRV_PCM_FORMAT_S16_LE;
1844 break;
1845 }
1846 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1847}
1848
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1849static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1850{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1851 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1852
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1853 switch (format) {
1854 case SNDRV_PCM_FORMAT_S16_LE:
1855 value = 0;
1856 break;
1857 case SNDRV_PCM_FORMAT_S24_LE:
1858 value = 1;
1859 break;
1860 case SNDRV_PCM_FORMAT_S24_3LE:
1861 value = 2;
1862 break;
1863 case SNDRV_PCM_FORMAT_S32_LE:
1864 value = 3;
1865 break;
1866 default:
1867 value = 0;
1868 break;
1869 }
1870 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1871}
1872
1873static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1874 struct snd_ctl_elem_value *ucontrol)
1875{
1876 int idx = aux_pcm_get_port_idx(kcontrol);
1877
1878 if (idx < 0)
1879 return idx;
1880
1881 ucontrol->value.enumerated.item[0] =
1882 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1883
1884 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1885 idx, aux_pcm_rx_cfg[idx].sample_rate,
1886 ucontrol->value.enumerated.item[0]);
1887
1888 return 0;
1889}
1890
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1891static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1892 struct snd_ctl_elem_value *ucontrol)
1893{
1894 int idx = aux_pcm_get_port_idx(kcontrol);
1895
1896 if (idx < 0)
1897 return idx;
1898
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1899 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1900 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1901
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1902 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1903 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1904 ucontrol->value.enumerated.item[0]);
1905
1906 return 0;
1907}
1908
1909static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1910 struct snd_ctl_elem_value *ucontrol)
1911{
1912 int idx = aux_pcm_get_port_idx(kcontrol);
1913
1914 if (idx < 0)
1915 return idx;
1916
1917 ucontrol->value.enumerated.item[0] =
1918 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1919
1920 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1921 idx, aux_pcm_tx_cfg[idx].sample_rate,
1922 ucontrol->value.enumerated.item[0]);
1923
1924 return 0;
1925}
1926
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1927static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1928 struct snd_ctl_elem_value *ucontrol)
1929{
1930 int idx = aux_pcm_get_port_idx(kcontrol);
1931
1932 if (idx < 0)
1933 return idx;
1934
1935 aux_pcm_tx_cfg[idx].sample_rate =
1936 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1937
1938 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1939 idx, aux_pcm_tx_cfg[idx].sample_rate,
1940 ucontrol->value.enumerated.item[0]);
1941
1942 return 0;
1943}
1944
1945static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 int idx = aux_pcm_get_port_idx(kcontrol);
1949
1950 if (idx < 0)
1951 return idx;
1952
1953 ucontrol->value.enumerated.item[0] =
1954 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1955
1956 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1957 idx, aux_pcm_rx_cfg[idx].bit_format,
1958 ucontrol->value.enumerated.item[0]);
1959
1960 return 0;
1961}
1962
1963static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1965{
1966 int idx = aux_pcm_get_port_idx(kcontrol);
1967
1968 if (idx < 0)
1969 return idx;
1970
1971 aux_pcm_rx_cfg[idx].bit_format =
1972 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1973
1974 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1975 idx, aux_pcm_rx_cfg[idx].bit_format,
1976 ucontrol->value.enumerated.item[0]);
1977
1978 return 0;
1979}
1980
1981static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1982 struct snd_ctl_elem_value *ucontrol)
1983{
1984 int idx = aux_pcm_get_port_idx(kcontrol);
1985
1986 if (idx < 0)
1987 return idx;
1988
1989 ucontrol->value.enumerated.item[0] =
1990 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1991
1992 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1993 idx, aux_pcm_tx_cfg[idx].bit_format,
1994 ucontrol->value.enumerated.item[0]);
1995
1996 return 0;
1997}
1998
1999static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2000 struct snd_ctl_elem_value *ucontrol)
2001{
2002 int idx = aux_pcm_get_port_idx(kcontrol);
2003
2004 if (idx < 0)
2005 return idx;
2006
2007 aux_pcm_tx_cfg[idx].bit_format =
2008 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2009
2010 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2011 idx, aux_pcm_tx_cfg[idx].bit_format,
2012 ucontrol->value.enumerated.item[0]);
2013
2014 return 0;
2015}
2016
2017static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2018{
2019 int idx = 0;
2020
2021 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2022 sizeof("PRIM_MI2S_RX"))) {
2023 idx = PRIM_MI2S;
2024 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2025 sizeof("SEC_MI2S_RX"))) {
2026 idx = SEC_MI2S;
2027 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2028 sizeof("TERT_MI2S_RX"))) {
2029 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2030 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2031 sizeof("QUAT_MI2S_RX"))) {
2032 idx = QUAT_MI2S;
2033 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2034 sizeof("QUIN_MI2S_RX"))) {
2035 idx = QUIN_MI2S;
2036 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2037 sizeof("SEN_MI2S_RX"))) {
2038 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2039 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2040 sizeof("PRIM_MI2S_TX"))) {
2041 idx = PRIM_MI2S;
2042 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2043 sizeof("SEC_MI2S_TX"))) {
2044 idx = SEC_MI2S;
2045 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2046 sizeof("TERT_MI2S_TX"))) {
2047 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2048 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2049 sizeof("QUAT_MI2S_TX"))) {
2050 idx = QUAT_MI2S;
2051 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2052 sizeof("QUIN_MI2S_TX"))) {
2053 idx = QUIN_MI2S;
2054 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2055 sizeof("SEN_MI2S_TX"))) {
2056 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2057 } else {
2058 pr_err("%s: unsupported channel: %s\n",
2059 __func__, kcontrol->id.name);
2060 idx = -EINVAL;
2061 }
2062
2063 return idx;
2064}
2065
2066static int mi2s_get_sample_rate(int value)
2067{
2068 int sample_rate = 0;
2069
2070 switch (value) {
2071 case 0:
2072 sample_rate = SAMPLING_RATE_8KHZ;
2073 break;
2074 case 1:
2075 sample_rate = SAMPLING_RATE_11P025KHZ;
2076 break;
2077 case 2:
2078 sample_rate = SAMPLING_RATE_16KHZ;
2079 break;
2080 case 3:
2081 sample_rate = SAMPLING_RATE_22P05KHZ;
2082 break;
2083 case 4:
2084 sample_rate = SAMPLING_RATE_32KHZ;
2085 break;
2086 case 5:
2087 sample_rate = SAMPLING_RATE_44P1KHZ;
2088 break;
2089 case 6:
2090 sample_rate = SAMPLING_RATE_48KHZ;
2091 break;
2092 case 7:
2093 sample_rate = SAMPLING_RATE_96KHZ;
2094 break;
2095 case 8:
2096 sample_rate = SAMPLING_RATE_192KHZ;
2097 break;
2098 default:
2099 sample_rate = SAMPLING_RATE_48KHZ;
2100 break;
2101 }
2102 return sample_rate;
2103}
2104
2105static int mi2s_get_sample_rate_val(int sample_rate)
2106{
2107 int sample_rate_val = 0;
2108
2109 switch (sample_rate) {
2110 case SAMPLING_RATE_8KHZ:
2111 sample_rate_val = 0;
2112 break;
2113 case SAMPLING_RATE_11P025KHZ:
2114 sample_rate_val = 1;
2115 break;
2116 case SAMPLING_RATE_16KHZ:
2117 sample_rate_val = 2;
2118 break;
2119 case SAMPLING_RATE_22P05KHZ:
2120 sample_rate_val = 3;
2121 break;
2122 case SAMPLING_RATE_32KHZ:
2123 sample_rate_val = 4;
2124 break;
2125 case SAMPLING_RATE_44P1KHZ:
2126 sample_rate_val = 5;
2127 break;
2128 case SAMPLING_RATE_48KHZ:
2129 sample_rate_val = 6;
2130 break;
2131 case SAMPLING_RATE_96KHZ:
2132 sample_rate_val = 7;
2133 break;
2134 case SAMPLING_RATE_192KHZ:
2135 sample_rate_val = 8;
2136 break;
2137 default:
2138 sample_rate_val = 6;
2139 break;
2140 }
2141 return sample_rate_val;
2142}
2143
2144static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2145 struct snd_ctl_elem_value *ucontrol)
2146{
2147 int idx = mi2s_get_port_idx(kcontrol);
2148
2149 if (idx < 0)
2150 return idx;
2151
2152 ucontrol->value.enumerated.item[0] =
2153 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2154
2155 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2156 idx, mi2s_rx_cfg[idx].sample_rate,
2157 ucontrol->value.enumerated.item[0]);
2158
2159 return 0;
2160}
2161
2162static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
2164{
2165 int idx = mi2s_get_port_idx(kcontrol);
2166
2167 if (idx < 0)
2168 return idx;
2169
2170 mi2s_rx_cfg[idx].sample_rate =
2171 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2172
2173 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2174 idx, mi2s_rx_cfg[idx].sample_rate,
2175 ucontrol->value.enumerated.item[0]);
2176
2177 return 0;
2178}
2179
2180static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2181 struct snd_ctl_elem_value *ucontrol)
2182{
2183 int idx = mi2s_get_port_idx(kcontrol);
2184
2185 if (idx < 0)
2186 return idx;
2187
2188 ucontrol->value.enumerated.item[0] =
2189 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2190
2191 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2192 idx, mi2s_tx_cfg[idx].sample_rate,
2193 ucontrol->value.enumerated.item[0]);
2194
2195 return 0;
2196}
2197
2198static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2199 struct snd_ctl_elem_value *ucontrol)
2200{
2201 int idx = mi2s_get_port_idx(kcontrol);
2202
2203 if (idx < 0)
2204 return idx;
2205
2206 mi2s_tx_cfg[idx].sample_rate =
2207 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2208
2209 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2210 idx, mi2s_tx_cfg[idx].sample_rate,
2211 ucontrol->value.enumerated.item[0]);
2212
2213 return 0;
2214}
2215
2216static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218{
2219 int idx = mi2s_get_port_idx(kcontrol);
2220
2221 if (idx < 0)
2222 return idx;
2223
2224 ucontrol->value.enumerated.item[0] =
2225 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2226
2227 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2228 idx, mi2s_rx_cfg[idx].bit_format,
2229 ucontrol->value.enumerated.item[0]);
2230
2231 return 0;
2232}
2233
2234static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2235 struct snd_ctl_elem_value *ucontrol)
2236{
2237 int idx = mi2s_get_port_idx(kcontrol);
2238
2239 if (idx < 0)
2240 return idx;
2241
2242 mi2s_rx_cfg[idx].bit_format =
2243 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2244
2245 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2246 idx, mi2s_rx_cfg[idx].bit_format,
2247 ucontrol->value.enumerated.item[0]);
2248
2249 return 0;
2250}
2251
2252static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2253 struct snd_ctl_elem_value *ucontrol)
2254{
2255 int idx = mi2s_get_port_idx(kcontrol);
2256
2257 if (idx < 0)
2258 return idx;
2259
2260 ucontrol->value.enumerated.item[0] =
2261 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2262
2263 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2264 idx, mi2s_tx_cfg[idx].bit_format,
2265 ucontrol->value.enumerated.item[0]);
2266
2267 return 0;
2268}
2269
2270static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2271 struct snd_ctl_elem_value *ucontrol)
2272{
2273 int idx = mi2s_get_port_idx(kcontrol);
2274
2275 if (idx < 0)
2276 return idx;
2277
2278 mi2s_tx_cfg[idx].bit_format =
2279 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2280
2281 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2282 idx, mi2s_tx_cfg[idx].bit_format,
2283 ucontrol->value.enumerated.item[0]);
2284
2285 return 0;
2286}
2287static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2288 struct snd_ctl_elem_value *ucontrol)
2289{
2290 int idx = mi2s_get_port_idx(kcontrol);
2291
2292 if (idx < 0)
2293 return idx;
2294
2295 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2296 idx, mi2s_rx_cfg[idx].channels);
2297 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2298
2299 return 0;
2300}
2301
2302static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2303 struct snd_ctl_elem_value *ucontrol)
2304{
2305 int idx = mi2s_get_port_idx(kcontrol);
2306
2307 if (idx < 0)
2308 return idx;
2309
2310 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2311 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2312 idx, mi2s_rx_cfg[idx].channels);
2313
2314 return 1;
2315}
2316
2317static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2318 struct snd_ctl_elem_value *ucontrol)
2319{
2320 int idx = mi2s_get_port_idx(kcontrol);
2321
2322 if (idx < 0)
2323 return idx;
2324
2325 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2326 idx, mi2s_tx_cfg[idx].channels);
2327 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2328
2329 return 0;
2330}
2331
2332static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2333 struct snd_ctl_elem_value *ucontrol)
2334{
2335 int idx = mi2s_get_port_idx(kcontrol);
2336
2337 if (idx < 0)
2338 return idx;
2339
2340 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2341 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2342 idx, mi2s_tx_cfg[idx].channels);
2343
2344 return 1;
2345}
2346
2347static int msm_get_port_id(int be_id)
2348{
2349 int afe_port_id = 0;
2350
2351 switch (be_id) {
2352 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2353 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2354 break;
2355 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2356 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2357 break;
2358 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2359 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2360 break;
2361 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2362 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2363 break;
2364 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2365 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2366 break;
2367 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2368 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2369 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2370 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2371 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2372 break;
2373 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2374 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2375 break;
2376 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2377 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2378 break;
2379 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2380 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2381 break;
2382 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2383 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2384 break;
2385 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2386 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2387 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2388 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2389 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2390 break;
2391 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2392 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2393 break;
2394 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2395 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2396 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2397 default:
2398 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2399 afe_port_id = -EINVAL;
2400 }
2401
2402 return afe_port_id;
2403}
2404
2405static u32 get_mi2s_bits_per_sample(u32 bit_format)
2406{
2407 u32 bit_per_sample = 0;
2408
2409 switch (bit_format) {
2410 case SNDRV_PCM_FORMAT_S32_LE:
2411 case SNDRV_PCM_FORMAT_S24_3LE:
2412 case SNDRV_PCM_FORMAT_S24_LE:
2413 bit_per_sample = 32;
2414 break;
2415 case SNDRV_PCM_FORMAT_S16_LE:
2416 default:
2417 bit_per_sample = 16;
2418 break;
2419 }
2420
2421 return bit_per_sample;
2422}
2423
2424static void update_mi2s_clk_val(int dai_id, int stream)
2425{
2426 u32 bit_per_sample = 0;
2427
2428 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2429 bit_per_sample =
2430 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2431 mi2s_clk[dai_id].clk_freq_in_hz =
2432 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2433 } else {
2434 bit_per_sample =
2435 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2436 mi2s_clk[dai_id].clk_freq_in_hz =
2437 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2438 }
2439}
2440
2441static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2442{
2443 int ret = 0;
2444 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2445 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2446 int port_id = 0;
2447 int index = cpu_dai->id;
2448
2449 port_id = msm_get_port_id(rtd->dai_link->id);
2450 if (port_id < 0) {
2451 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2452 ret = port_id;
2453 goto err;
2454 }
2455
2456 if (enable) {
2457 update_mi2s_clk_val(index, substream->stream);
2458 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2459 mi2s_clk[index].clk_freq_in_hz);
2460 }
2461
2462 mi2s_clk[index].enable = enable;
2463 ret = afe_set_lpass_clock_v2(port_id,
2464 &mi2s_clk[index]);
2465 if (ret < 0) {
2466 dev_err(rtd->card->dev,
2467 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2468 __func__, port_id, ret);
2469 goto err;
2470 }
2471
2472err:
2473 return ret;
2474}
2475
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2476static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2477{
2478 int idx = 0;
2479
2480 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2481 sizeof("WSA_CDC_DMA_RX_0")))
2482 idx = WSA_CDC_DMA_RX_0;
2483 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2484 sizeof("WSA_CDC_DMA_RX_0")))
2485 idx = WSA_CDC_DMA_RX_1;
2486 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2487 sizeof("RX_CDC_DMA_RX_0")))
2488 idx = RX_CDC_DMA_RX_0;
2489 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2490 sizeof("RX_CDC_DMA_RX_1")))
2491 idx = RX_CDC_DMA_RX_1;
2492 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2493 sizeof("RX_CDC_DMA_RX_2")))
2494 idx = RX_CDC_DMA_RX_2;
2495 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2496 sizeof("RX_CDC_DMA_RX_3")))
2497 idx = RX_CDC_DMA_RX_3;
2498 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2499 sizeof("RX_CDC_DMA_RX_5")))
2500 idx = RX_CDC_DMA_RX_5;
2501 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2502 sizeof("WSA_CDC_DMA_TX_0")))
2503 idx = WSA_CDC_DMA_TX_0;
2504 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2505 sizeof("WSA_CDC_DMA_TX_1")))
2506 idx = WSA_CDC_DMA_TX_1;
2507 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2508 sizeof("WSA_CDC_DMA_TX_2")))
2509 idx = WSA_CDC_DMA_TX_2;
2510 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2511 sizeof("TX_CDC_DMA_TX_0")))
2512 idx = TX_CDC_DMA_TX_0;
2513 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2514 sizeof("TX_CDC_DMA_TX_3")))
2515 idx = TX_CDC_DMA_TX_3;
2516 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2517 sizeof("TX_CDC_DMA_TX_4")))
2518 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2519 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2520 sizeof("VA_CDC_DMA_TX_0")))
2521 idx = VA_CDC_DMA_TX_0;
2522 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2523 sizeof("VA_CDC_DMA_TX_1")))
2524 idx = VA_CDC_DMA_TX_1;
2525 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2526 sizeof("VA_CDC_DMA_TX_2")))
2527 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2528 else {
2529 pr_err("%s: unsupported channel: %s\n",
2530 __func__, kcontrol->id.name);
2531 return -EINVAL;
2532 }
2533
2534 return idx;
2535}
2536
2537static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 int ch_num = cdc_dma_get_port_idx(kcontrol);
2541
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2542 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2543 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2544 return ch_num;
2545 }
2546
2547 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2548 cdc_dma_rx_cfg[ch_num].channels - 1);
2549 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2550 return 0;
2551}
2552
2553static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2554 struct snd_ctl_elem_value *ucontrol)
2555{
2556 int ch_num = cdc_dma_get_port_idx(kcontrol);
2557
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2558 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2559 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2560 return ch_num;
2561 }
2562
2563 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2564
2565 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2566 cdc_dma_rx_cfg[ch_num].channels);
2567 return 1;
2568}
2569
2570static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2571 struct snd_ctl_elem_value *ucontrol)
2572{
2573 int ch_num = cdc_dma_get_port_idx(kcontrol);
2574
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2575 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2576 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2577 return ch_num;
2578 }
2579
2580 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2581 case SNDRV_PCM_FORMAT_S32_LE:
2582 ucontrol->value.integer.value[0] = 3;
2583 break;
2584 case SNDRV_PCM_FORMAT_S24_3LE:
2585 ucontrol->value.integer.value[0] = 2;
2586 break;
2587 case SNDRV_PCM_FORMAT_S24_LE:
2588 ucontrol->value.integer.value[0] = 1;
2589 break;
2590 case SNDRV_PCM_FORMAT_S16_LE:
2591 default:
2592 ucontrol->value.integer.value[0] = 0;
2593 break;
2594 }
2595
2596 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2597 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2598 ucontrol->value.integer.value[0]);
2599 return 0;
2600}
2601
2602static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2603 struct snd_ctl_elem_value *ucontrol)
2604{
2605 int rc = 0;
2606 int ch_num = cdc_dma_get_port_idx(kcontrol);
2607
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2608 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2609 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2610 return ch_num;
2611 }
2612
2613 switch (ucontrol->value.integer.value[0]) {
2614 case 3:
2615 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2616 break;
2617 case 2:
2618 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2619 break;
2620 case 1:
2621 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2622 break;
2623 case 0:
2624 default:
2625 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2626 break;
2627 }
2628 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2629 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2630 ucontrol->value.integer.value[0]);
2631
2632 return rc;
2633}
2634
2635
2636static int cdc_dma_get_sample_rate_val(int sample_rate)
2637{
2638 int sample_rate_val = 0;
2639
2640 switch (sample_rate) {
2641 case SAMPLING_RATE_8KHZ:
2642 sample_rate_val = 0;
2643 break;
2644 case SAMPLING_RATE_11P025KHZ:
2645 sample_rate_val = 1;
2646 break;
2647 case SAMPLING_RATE_16KHZ:
2648 sample_rate_val = 2;
2649 break;
2650 case SAMPLING_RATE_22P05KHZ:
2651 sample_rate_val = 3;
2652 break;
2653 case SAMPLING_RATE_32KHZ:
2654 sample_rate_val = 4;
2655 break;
2656 case SAMPLING_RATE_44P1KHZ:
2657 sample_rate_val = 5;
2658 break;
2659 case SAMPLING_RATE_48KHZ:
2660 sample_rate_val = 6;
2661 break;
2662 case SAMPLING_RATE_88P2KHZ:
2663 sample_rate_val = 7;
2664 break;
2665 case SAMPLING_RATE_96KHZ:
2666 sample_rate_val = 8;
2667 break;
2668 case SAMPLING_RATE_176P4KHZ:
2669 sample_rate_val = 9;
2670 break;
2671 case SAMPLING_RATE_192KHZ:
2672 sample_rate_val = 10;
2673 break;
2674 case SAMPLING_RATE_352P8KHZ:
2675 sample_rate_val = 11;
2676 break;
2677 case SAMPLING_RATE_384KHZ:
2678 sample_rate_val = 12;
2679 break;
2680 default:
2681 sample_rate_val = 6;
2682 break;
2683 }
2684 return sample_rate_val;
2685}
2686
2687static int cdc_dma_get_sample_rate(int value)
2688{
2689 int sample_rate = 0;
2690
2691 switch (value) {
2692 case 0:
2693 sample_rate = SAMPLING_RATE_8KHZ;
2694 break;
2695 case 1:
2696 sample_rate = SAMPLING_RATE_11P025KHZ;
2697 break;
2698 case 2:
2699 sample_rate = SAMPLING_RATE_16KHZ;
2700 break;
2701 case 3:
2702 sample_rate = SAMPLING_RATE_22P05KHZ;
2703 break;
2704 case 4:
2705 sample_rate = SAMPLING_RATE_32KHZ;
2706 break;
2707 case 5:
2708 sample_rate = SAMPLING_RATE_44P1KHZ;
2709 break;
2710 case 6:
2711 sample_rate = SAMPLING_RATE_48KHZ;
2712 break;
2713 case 7:
2714 sample_rate = SAMPLING_RATE_88P2KHZ;
2715 break;
2716 case 8:
2717 sample_rate = SAMPLING_RATE_96KHZ;
2718 break;
2719 case 9:
2720 sample_rate = SAMPLING_RATE_176P4KHZ;
2721 break;
2722 case 10:
2723 sample_rate = SAMPLING_RATE_192KHZ;
2724 break;
2725 case 11:
2726 sample_rate = SAMPLING_RATE_352P8KHZ;
2727 break;
2728 case 12:
2729 sample_rate = SAMPLING_RATE_384KHZ;
2730 break;
2731 default:
2732 sample_rate = SAMPLING_RATE_48KHZ;
2733 break;
2734 }
2735 return sample_rate;
2736}
2737
2738static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2739 struct snd_ctl_elem_value *ucontrol)
2740{
2741 int ch_num = cdc_dma_get_port_idx(kcontrol);
2742
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2743 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2744 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2745 return ch_num;
2746 }
2747
2748 ucontrol->value.enumerated.item[0] =
2749 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2750
2751 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2752 cdc_dma_rx_cfg[ch_num].sample_rate);
2753 return 0;
2754}
2755
2756static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2757 struct snd_ctl_elem_value *ucontrol)
2758{
2759 int ch_num = cdc_dma_get_port_idx(kcontrol);
2760
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2761 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2762 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2763 return ch_num;
2764 }
2765
2766 cdc_dma_rx_cfg[ch_num].sample_rate =
2767 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2768
2769
2770 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2771 __func__, ucontrol->value.enumerated.item[0],
2772 cdc_dma_rx_cfg[ch_num].sample_rate);
2773 return 0;
2774}
2775
2776static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2777 struct snd_ctl_elem_value *ucontrol)
2778{
2779 int ch_num = cdc_dma_get_port_idx(kcontrol);
2780
2781 if (ch_num < 0) {
2782 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2783 return ch_num;
2784 }
2785
2786 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2787 cdc_dma_tx_cfg[ch_num].channels);
2788 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2789 return 0;
2790}
2791
2792static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2793 struct snd_ctl_elem_value *ucontrol)
2794{
2795 int ch_num = cdc_dma_get_port_idx(kcontrol);
2796
2797 if (ch_num < 0) {
2798 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2799 return ch_num;
2800 }
2801
2802 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2803
2804 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2805 cdc_dma_tx_cfg[ch_num].channels);
2806 return 1;
2807}
2808
2809static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2810 struct snd_ctl_elem_value *ucontrol)
2811{
2812 int sample_rate_val;
2813 int ch_num = cdc_dma_get_port_idx(kcontrol);
2814
2815 if (ch_num < 0) {
2816 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2817 return ch_num;
2818 }
2819
2820 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2821 case SAMPLING_RATE_384KHZ:
2822 sample_rate_val = 12;
2823 break;
2824 case SAMPLING_RATE_352P8KHZ:
2825 sample_rate_val = 11;
2826 break;
2827 case SAMPLING_RATE_192KHZ:
2828 sample_rate_val = 10;
2829 break;
2830 case SAMPLING_RATE_176P4KHZ:
2831 sample_rate_val = 9;
2832 break;
2833 case SAMPLING_RATE_96KHZ:
2834 sample_rate_val = 8;
2835 break;
2836 case SAMPLING_RATE_88P2KHZ:
2837 sample_rate_val = 7;
2838 break;
2839 case SAMPLING_RATE_48KHZ:
2840 sample_rate_val = 6;
2841 break;
2842 case SAMPLING_RATE_44P1KHZ:
2843 sample_rate_val = 5;
2844 break;
2845 case SAMPLING_RATE_32KHZ:
2846 sample_rate_val = 4;
2847 break;
2848 case SAMPLING_RATE_22P05KHZ:
2849 sample_rate_val = 3;
2850 break;
2851 case SAMPLING_RATE_16KHZ:
2852 sample_rate_val = 2;
2853 break;
2854 case SAMPLING_RATE_11P025KHZ:
2855 sample_rate_val = 1;
2856 break;
2857 case SAMPLING_RATE_8KHZ:
2858 sample_rate_val = 0;
2859 break;
2860 default:
2861 sample_rate_val = 6;
2862 break;
2863 }
2864
2865 ucontrol->value.integer.value[0] = sample_rate_val;
2866 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2867 cdc_dma_tx_cfg[ch_num].sample_rate);
2868 return 0;
2869}
2870
2871static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2872 struct snd_ctl_elem_value *ucontrol)
2873{
2874 int ch_num = cdc_dma_get_port_idx(kcontrol);
2875
2876 if (ch_num < 0) {
2877 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2878 return ch_num;
2879 }
2880
2881 switch (ucontrol->value.integer.value[0]) {
2882 case 12:
2883 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2884 break;
2885 case 11:
2886 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2887 break;
2888 case 10:
2889 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2890 break;
2891 case 9:
2892 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2893 break;
2894 case 8:
2895 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2896 break;
2897 case 7:
2898 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2899 break;
2900 case 6:
2901 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2902 break;
2903 case 5:
2904 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2905 break;
2906 case 4:
2907 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2908 break;
2909 case 3:
2910 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2911 break;
2912 case 2:
2913 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2914 break;
2915 case 1:
2916 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2917 break;
2918 case 0:
2919 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2920 break;
2921 default:
2922 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2923 break;
2924 }
2925
2926 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2927 __func__, ucontrol->value.integer.value[0],
2928 cdc_dma_tx_cfg[ch_num].sample_rate);
2929 return 0;
2930}
2931
2932static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2933 struct snd_ctl_elem_value *ucontrol)
2934{
2935 int ch_num = cdc_dma_get_port_idx(kcontrol);
2936
2937 if (ch_num < 0) {
2938 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2939 return ch_num;
2940 }
2941
2942 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2943 case SNDRV_PCM_FORMAT_S32_LE:
2944 ucontrol->value.integer.value[0] = 3;
2945 break;
2946 case SNDRV_PCM_FORMAT_S24_3LE:
2947 ucontrol->value.integer.value[0] = 2;
2948 break;
2949 case SNDRV_PCM_FORMAT_S24_LE:
2950 ucontrol->value.integer.value[0] = 1;
2951 break;
2952 case SNDRV_PCM_FORMAT_S16_LE:
2953 default:
2954 ucontrol->value.integer.value[0] = 0;
2955 break;
2956 }
2957
2958 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2959 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2960 ucontrol->value.integer.value[0]);
2961 return 0;
2962}
2963
2964static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2965 struct snd_ctl_elem_value *ucontrol)
2966{
2967 int rc = 0;
2968 int ch_num = cdc_dma_get_port_idx(kcontrol);
2969
2970 if (ch_num < 0) {
2971 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2972 return ch_num;
2973 }
2974
2975 switch (ucontrol->value.integer.value[0]) {
2976 case 3:
2977 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2978 break;
2979 case 2:
2980 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2981 break;
2982 case 1:
2983 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2984 break;
2985 case 0:
2986 default:
2987 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2988 break;
2989 }
2990 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2991 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2992 ucontrol->value.integer.value[0]);
2993
2994 return rc;
2995}
2996
2997static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2998{
2999 int idx = 0;
3000
3001 switch (be_id) {
3002 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3003 idx = WSA_CDC_DMA_RX_0;
3004 break;
3005 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3006 idx = WSA_CDC_DMA_TX_0;
3007 break;
3008 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3009 idx = WSA_CDC_DMA_RX_1;
3010 break;
3011 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3012 idx = WSA_CDC_DMA_TX_1;
3013 break;
3014 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3015 idx = WSA_CDC_DMA_TX_2;
3016 break;
3017 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3018 idx = RX_CDC_DMA_RX_0;
3019 break;
3020 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3021 idx = RX_CDC_DMA_RX_1;
3022 break;
3023 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3024 idx = RX_CDC_DMA_RX_2;
3025 break;
3026 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3027 idx = RX_CDC_DMA_RX_3;
3028 break;
3029 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3030 idx = RX_CDC_DMA_RX_5;
3031 break;
3032 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3033 idx = TX_CDC_DMA_TX_0;
3034 break;
3035 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3036 idx = TX_CDC_DMA_TX_3;
3037 break;
3038 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3039 idx = TX_CDC_DMA_TX_4;
3040 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3041 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3042 idx = VA_CDC_DMA_TX_0;
3043 break;
3044 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3045 idx = VA_CDC_DMA_TX_1;
3046 break;
3047 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3048 idx = VA_CDC_DMA_TX_2;
3049 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3050 default:
3051 idx = RX_CDC_DMA_RX_0;
3052 break;
3053 }
3054
3055 return idx;
3056}
3057
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3058static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3059 struct snd_ctl_elem_value *ucontrol)
3060{
3061 /*
3062 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3063 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3064 * value.
3065 */
3066 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3067 case SAMPLING_RATE_96KHZ:
3068 ucontrol->value.integer.value[0] = 5;
3069 break;
3070 case SAMPLING_RATE_88P2KHZ:
3071 ucontrol->value.integer.value[0] = 4;
3072 break;
3073 case SAMPLING_RATE_48KHZ:
3074 ucontrol->value.integer.value[0] = 3;
3075 break;
3076 case SAMPLING_RATE_44P1KHZ:
3077 ucontrol->value.integer.value[0] = 2;
3078 break;
3079 case SAMPLING_RATE_16KHZ:
3080 ucontrol->value.integer.value[0] = 1;
3081 break;
3082 case SAMPLING_RATE_8KHZ:
3083 default:
3084 ucontrol->value.integer.value[0] = 0;
3085 break;
3086 }
3087 pr_debug("%s: sample rate = %d\n", __func__,
3088 slim_rx_cfg[SLIM_RX_7].sample_rate);
3089
3090 return 0;
3091}
3092
3093static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3094 struct snd_ctl_elem_value *ucontrol)
3095{
3096 switch (ucontrol->value.integer.value[0]) {
3097 case 1:
3098 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3099 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3100 break;
3101 case 2:
3102 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3103 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3104 break;
3105 case 3:
3106 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3107 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3108 break;
3109 case 4:
3110 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3111 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3112 break;
3113 case 5:
3114 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3115 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3116 break;
3117 case 0:
3118 default:
3119 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3120 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3121 break;
3122 }
3123 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3124 __func__,
3125 slim_rx_cfg[SLIM_RX_7].sample_rate,
3126 slim_tx_cfg[SLIM_TX_7].sample_rate,
3127 ucontrol->value.enumerated.item[0]);
3128
3129 return 0;
3130}
3131
3132static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3133 struct snd_ctl_elem_value *ucontrol)
3134{
3135 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3136 case SAMPLING_RATE_96KHZ:
3137 ucontrol->value.integer.value[0] = 5;
3138 break;
3139 case SAMPLING_RATE_88P2KHZ:
3140 ucontrol->value.integer.value[0] = 4;
3141 break;
3142 case SAMPLING_RATE_48KHZ:
3143 ucontrol->value.integer.value[0] = 3;
3144 break;
3145 case SAMPLING_RATE_44P1KHZ:
3146 ucontrol->value.integer.value[0] = 2;
3147 break;
3148 case SAMPLING_RATE_16KHZ:
3149 ucontrol->value.integer.value[0] = 1;
3150 break;
3151 case SAMPLING_RATE_8KHZ:
3152 default:
3153 ucontrol->value.integer.value[0] = 0;
3154 break;
3155 }
3156 pr_debug("%s: sample rate rx = %d\n", __func__,
3157 slim_rx_cfg[SLIM_RX_7].sample_rate);
3158
3159 return 0;
3160}
3161
3162static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3163 struct snd_ctl_elem_value *ucontrol)
3164{
3165 switch (ucontrol->value.integer.value[0]) {
3166 case 1:
3167 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3168 break;
3169 case 2:
3170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3171 break;
3172 case 3:
3173 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3174 break;
3175 case 4:
3176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3177 break;
3178 case 5:
3179 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3180 break;
3181 case 0:
3182 default:
3183 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3184 break;
3185 }
3186 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3187 __func__,
3188 slim_rx_cfg[SLIM_RX_7].sample_rate,
3189 ucontrol->value.enumerated.item[0]);
3190
3191 return 0;
3192}
3193
3194static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3195 struct snd_ctl_elem_value *ucontrol)
3196{
3197 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3198 case SAMPLING_RATE_96KHZ:
3199 ucontrol->value.integer.value[0] = 5;
3200 break;
3201 case SAMPLING_RATE_88P2KHZ:
3202 ucontrol->value.integer.value[0] = 4;
3203 break;
3204 case SAMPLING_RATE_48KHZ:
3205 ucontrol->value.integer.value[0] = 3;
3206 break;
3207 case SAMPLING_RATE_44P1KHZ:
3208 ucontrol->value.integer.value[0] = 2;
3209 break;
3210 case SAMPLING_RATE_16KHZ:
3211 ucontrol->value.integer.value[0] = 1;
3212 break;
3213 case SAMPLING_RATE_8KHZ:
3214 default:
3215 ucontrol->value.integer.value[0] = 0;
3216 break;
3217 }
3218 pr_debug("%s: sample rate tx = %d\n", __func__,
3219 slim_tx_cfg[SLIM_TX_7].sample_rate);
3220
3221 return 0;
3222}
3223
3224static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3225 struct snd_ctl_elem_value *ucontrol)
3226{
3227 switch (ucontrol->value.integer.value[0]) {
3228 case 1:
3229 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3230 break;
3231 case 2:
3232 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3233 break;
3234 case 3:
3235 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3236 break;
3237 case 4:
3238 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3239 break;
3240 case 5:
3241 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3242 break;
3243 case 0:
3244 default:
3245 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3246 break;
3247 }
3248 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3249 __func__,
3250 slim_tx_cfg[SLIM_TX_7].sample_rate,
3251 ucontrol->value.enumerated.item[0]);
3252
3253 return 0;
3254}
3255
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3256static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3257 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3258 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3259 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3260 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3261 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3262 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3263 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3264 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3265 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3266 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3267 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3268 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3269 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3270 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3271 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3272 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3273 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3274 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3275 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3276 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3277 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3278 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3279 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3280 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3281 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3282 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3283 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3284 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3285 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3286 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3287 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3288 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3289 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3290 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3291 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3292 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3293 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3294 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3295 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3296 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3297 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3298 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3299 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3300 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3301 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3302 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3303 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3304 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3305 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3306 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3307 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3308 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3309 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3310 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3311 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3312 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3313 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3314 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3315 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3316 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3317 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3318 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3319 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3320 wsa_cdc_dma_rx_0_sample_rate,
3321 cdc_dma_rx_sample_rate_get,
3322 cdc_dma_rx_sample_rate_put),
3323 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3324 wsa_cdc_dma_rx_1_sample_rate,
3325 cdc_dma_rx_sample_rate_get,
3326 cdc_dma_rx_sample_rate_put),
3327 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3328 rx_cdc_dma_rx_0_sample_rate,
3329 cdc_dma_rx_sample_rate_get,
3330 cdc_dma_rx_sample_rate_put),
3331 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3332 rx_cdc_dma_rx_1_sample_rate,
3333 cdc_dma_rx_sample_rate_get,
3334 cdc_dma_rx_sample_rate_put),
3335 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3336 rx_cdc_dma_rx_2_sample_rate,
3337 cdc_dma_rx_sample_rate_get,
3338 cdc_dma_rx_sample_rate_put),
3339 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3340 rx_cdc_dma_rx_3_sample_rate,
3341 cdc_dma_rx_sample_rate_get,
3342 cdc_dma_rx_sample_rate_put),
3343 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3344 rx_cdc_dma_rx_5_sample_rate,
3345 cdc_dma_rx_sample_rate_get,
3346 cdc_dma_rx_sample_rate_put),
3347 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3348 wsa_cdc_dma_tx_0_sample_rate,
3349 cdc_dma_tx_sample_rate_get,
3350 cdc_dma_tx_sample_rate_put),
3351 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3352 wsa_cdc_dma_tx_1_sample_rate,
3353 cdc_dma_tx_sample_rate_get,
3354 cdc_dma_tx_sample_rate_put),
3355 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3356 wsa_cdc_dma_tx_2_sample_rate,
3357 cdc_dma_tx_sample_rate_get,
3358 cdc_dma_tx_sample_rate_put),
3359 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3360 tx_cdc_dma_tx_0_sample_rate,
3361 cdc_dma_tx_sample_rate_get,
3362 cdc_dma_tx_sample_rate_put),
3363 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3364 tx_cdc_dma_tx_3_sample_rate,
3365 cdc_dma_tx_sample_rate_get,
3366 cdc_dma_tx_sample_rate_put),
3367 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3368 tx_cdc_dma_tx_4_sample_rate,
3369 cdc_dma_tx_sample_rate_get,
3370 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3371 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3372 va_cdc_dma_tx_0_sample_rate,
3373 cdc_dma_tx_sample_rate_get,
3374 cdc_dma_tx_sample_rate_put),
3375 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3376 va_cdc_dma_tx_1_sample_rate,
3377 cdc_dma_tx_sample_rate_get,
3378 cdc_dma_tx_sample_rate_put),
3379 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3380 va_cdc_dma_tx_2_sample_rate,
3381 cdc_dma_tx_sample_rate_get,
3382 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3383};
3384
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3385static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3386 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3387 usb_audio_rx_sample_rate_get,
3388 usb_audio_rx_sample_rate_put),
3389 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3390 usb_audio_tx_sample_rate_get,
3391 usb_audio_tx_sample_rate_put),
3392 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3393 tdm_rx_sample_rate_get,
3394 tdm_rx_sample_rate_put),
3395 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3396 tdm_rx_sample_rate_get,
3397 tdm_rx_sample_rate_put),
3398 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3399 tdm_rx_sample_rate_get,
3400 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3401 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3402 tdm_rx_sample_rate_get,
3403 tdm_rx_sample_rate_put),
3404 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3405 tdm_rx_sample_rate_get,
3406 tdm_rx_sample_rate_put),
3407 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3408 tdm_rx_sample_rate_get,
3409 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3410 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3411 tdm_tx_sample_rate_get,
3412 tdm_tx_sample_rate_put),
3413 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3414 tdm_tx_sample_rate_get,
3415 tdm_tx_sample_rate_put),
3416 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3417 tdm_tx_sample_rate_get,
3418 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3419 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3420 tdm_tx_sample_rate_get,
3421 tdm_tx_sample_rate_put),
3422 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3423 tdm_tx_sample_rate_get,
3424 tdm_tx_sample_rate_put),
3425 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3426 tdm_tx_sample_rate_get,
3427 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3428 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3429 aux_pcm_rx_sample_rate_get,
3430 aux_pcm_rx_sample_rate_put),
3431 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3432 aux_pcm_rx_sample_rate_get,
3433 aux_pcm_rx_sample_rate_put),
3434 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3435 aux_pcm_rx_sample_rate_get,
3436 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3437 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3438 aux_pcm_rx_sample_rate_get,
3439 aux_pcm_rx_sample_rate_put),
3440 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3441 aux_pcm_rx_sample_rate_get,
3442 aux_pcm_rx_sample_rate_put),
3443 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3444 aux_pcm_rx_sample_rate_get,
3445 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3446 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3447 aux_pcm_tx_sample_rate_get,
3448 aux_pcm_tx_sample_rate_put),
3449 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3450 aux_pcm_tx_sample_rate_get,
3451 aux_pcm_tx_sample_rate_put),
3452 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3453 aux_pcm_tx_sample_rate_get,
3454 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3455 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3456 aux_pcm_tx_sample_rate_get,
3457 aux_pcm_tx_sample_rate_put),
3458 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3459 aux_pcm_tx_sample_rate_get,
3460 aux_pcm_tx_sample_rate_put),
3461 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3462 aux_pcm_tx_sample_rate_get,
3463 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3464 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3465 mi2s_rx_sample_rate_get,
3466 mi2s_rx_sample_rate_put),
3467 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3468 mi2s_rx_sample_rate_get,
3469 mi2s_rx_sample_rate_put),
3470 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3471 mi2s_rx_sample_rate_get,
3472 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3473 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3474 mi2s_rx_sample_rate_get,
3475 mi2s_rx_sample_rate_put),
3476 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3477 mi2s_rx_sample_rate_get,
3478 mi2s_rx_sample_rate_put),
3479 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3480 mi2s_rx_sample_rate_get,
3481 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3482 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3483 mi2s_tx_sample_rate_get,
3484 mi2s_tx_sample_rate_put),
3485 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3486 mi2s_tx_sample_rate_get,
3487 mi2s_tx_sample_rate_put),
3488 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3489 mi2s_tx_sample_rate_get,
3490 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3491 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3492 mi2s_tx_sample_rate_get,
3493 mi2s_tx_sample_rate_put),
3494 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3495 mi2s_tx_sample_rate_get,
3496 mi2s_tx_sample_rate_put),
3497 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3498 mi2s_tx_sample_rate_get,
3499 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3500 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3501 usb_audio_rx_format_get, usb_audio_rx_format_put),
3502 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3503 usb_audio_tx_format_get, usb_audio_tx_format_put),
3504 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3505 tdm_rx_format_get,
3506 tdm_rx_format_put),
3507 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3508 tdm_rx_format_get,
3509 tdm_rx_format_put),
3510 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3511 tdm_rx_format_get,
3512 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3513 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3514 tdm_rx_format_get,
3515 tdm_rx_format_put),
3516 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3517 tdm_rx_format_get,
3518 tdm_rx_format_put),
3519 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3520 tdm_rx_format_get,
3521 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3522 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3523 tdm_tx_format_get,
3524 tdm_tx_format_put),
3525 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3526 tdm_tx_format_get,
3527 tdm_tx_format_put),
3528 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3529 tdm_tx_format_get,
3530 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3531 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3532 tdm_tx_format_get,
3533 tdm_tx_format_put),
3534 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3535 tdm_tx_format_get,
3536 tdm_tx_format_put),
3537 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3538 tdm_tx_format_get,
3539 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3540 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3541 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3542 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3543 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3544 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3545 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3546 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3547 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3548 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3549 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3550 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3551 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3552 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3553 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3554 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3555 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3556 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3557 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3558 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3559 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3560 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3561 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3562 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3563 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3564 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3565 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3566 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3567 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3568 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3569 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3570 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3571 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3572 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3573 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3574 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3575 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3576 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3577 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3578 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3579 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3580 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3581 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3582 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3583 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3584 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3585 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3586 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3587 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3588 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3589 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3590 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3591 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3592 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3593 proxy_rx_ch_get, proxy_rx_ch_put),
3594 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3595 tdm_rx_ch_get,
3596 tdm_rx_ch_put),
3597 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3598 tdm_rx_ch_get,
3599 tdm_rx_ch_put),
3600 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3601 tdm_rx_ch_get,
3602 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3603 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3604 tdm_rx_ch_get,
3605 tdm_rx_ch_put),
3606 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3607 tdm_rx_ch_get,
3608 tdm_rx_ch_put),
3609 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3610 tdm_rx_ch_get,
3611 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3612 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3613 tdm_tx_ch_get,
3614 tdm_tx_ch_put),
3615 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3616 tdm_tx_ch_get,
3617 tdm_tx_ch_put),
3618 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3619 tdm_tx_ch_get,
3620 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3621 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3622 tdm_tx_ch_get,
3623 tdm_tx_ch_put),
3624 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3625 tdm_tx_ch_get,
3626 tdm_tx_ch_put),
3627 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3628 tdm_tx_ch_get,
3629 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3630 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3631 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3632 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3633 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3634 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3635 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3636 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3637 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3638 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3639 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3640 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3641 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3642 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3643 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3644 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3645 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3646 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3647 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3648 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3649 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3650 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3651 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3652 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3653 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3654 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3655 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3656 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3657 ext_disp_rx_format_get, ext_disp_rx_format_put),
3658 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3659 ext_disp_rx_sample_rate_get,
3660 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3661 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3662 msm_bt_sample_rate_get,
3663 msm_bt_sample_rate_put),
3664 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3665 msm_bt_sample_rate_rx_get,
3666 msm_bt_sample_rate_rx_put),
3667 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3668 msm_bt_sample_rate_tx_get,
3669 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3670 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3671 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3672 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3673 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3674};
3675
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3676static const struct snd_kcontrol_new msm_snd_controls[] = {
3677 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3678 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3679 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3680 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3681 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3682 aux_pcm_rx_sample_rate_get,
3683 aux_pcm_rx_sample_rate_put),
3684 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3685 aux_pcm_tx_sample_rate_get,
3686 aux_pcm_tx_sample_rate_put),
3687};
3688
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3689static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3690{
3691 int idx;
3692
3693 switch (be_id) {
3694 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3695 idx = EXT_DISP_RX_IDX_DP;
3696 break;
3697 default:
3698 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3699 idx = -EINVAL;
3700 break;
3701 }
3702
3703 return idx;
3704}
3705
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]3706static int kona_send_island_va_config(int32_t be_id)
3707{
3708 int rc = 0;
3709 int port_id = 0xFFFF;
3710
3711 port_id = msm_get_port_id(be_id);
3712 if (port_id < 0) {
3713 pr_err("%s: Invalid island interface, be_id: %d\n",
3714 __func__, be_id);
3715 rc = -EINVAL;
3716 } else {
3717 /*
3718 * send island mode config
3719 * This should be the first configuration
3720 */
3721 rc = afe_send_port_island_mode(port_id);
3722 if (rc)
3723 pr_err("%s: afe send island mode failed %d\n",
3724 __func__, rc);
3725 }
3726
3727 return rc;
3728}
3729
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3730static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3731 struct snd_pcm_hw_params *params)
3732{
3733 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3734 struct snd_interval *rate = hw_param_interval(params,
3735 SNDRV_PCM_HW_PARAM_RATE);
3736 struct snd_interval *channels = hw_param_interval(params,
3737 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3738 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3739
3740 pr_debug("%s: format = %d, rate = %d\n",
3741 __func__, params_format(params), params_rate(params));
3742
3743 switch (dai_link->id) {
3744 case MSM_BACKEND_DAI_USB_RX:
3745 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3746 usb_rx_cfg.bit_format);
3747 rate->min = rate->max = usb_rx_cfg.sample_rate;
3748 channels->min = channels->max = usb_rx_cfg.channels;
3749 break;
3750
3751 case MSM_BACKEND_DAI_USB_TX:
3752 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3753 usb_tx_cfg.bit_format);
3754 rate->min = rate->max = usb_tx_cfg.sample_rate;
3755 channels->min = channels->max = usb_tx_cfg.channels;
3756 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3757
3758 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3759 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
3760 if (idx < 0) {
3761 pr_err("%s: Incorrect ext disp idx %d\n",
3762 __func__, idx);
3763 rc = idx;
3764 goto done;
3765 }
3766
3767 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3768 ext_disp_rx_cfg[idx].bit_format);
3769 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
3770 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
3771 break;
3772
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3773 case MSM_BACKEND_DAI_AFE_PCM_RX:
3774 channels->min = channels->max = proxy_rx_cfg.channels;
3775 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3776 break;
3777
3778 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3779 channels->min = channels->max =
3780 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3781 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3782 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3783 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3784 break;
3785
3786 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3787 channels->min = channels->max =
3788 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3789 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3790 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3791 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3792 break;
3793
3794 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3795 channels->min = channels->max =
3796 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3797 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3798 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3799 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3800 break;
3801
3802 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3803 channels->min = channels->max =
3804 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3805 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3806 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3807 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3808 break;
3809
3810 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3811 channels->min = channels->max =
3812 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3813 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3814 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3815 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3816 break;
3817
3818 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3819 channels->min = channels->max =
3820 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3821 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3822 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3823 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3824 break;
3825
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3826 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3827 channels->min = channels->max =
3828 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3829 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3830 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3831 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3832 break;
3833
3834 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3835 channels->min = channels->max =
3836 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3837 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3838 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3839 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3840 break;
3841
3842 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
3843 channels->min = channels->max =
3844 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
3845 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3846 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
3847 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
3848 break;
3849
3850 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
3851 channels->min = channels->max =
3852 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
3853 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3854 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
3855 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
3856 break;
3857
3858 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
3859 channels->min = channels->max =
3860 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
3861 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3862 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
3863 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
3864 break;
3865
3866 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
3867 channels->min = channels->max =
3868 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
3869 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3870 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
3871 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
3872 break;
3873
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3874 case MSM_BACKEND_DAI_AUXPCM_RX:
3875 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3876 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3877 rate->min = rate->max =
3878 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3879 channels->min = channels->max =
3880 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3881 break;
3882
3883 case MSM_BACKEND_DAI_AUXPCM_TX:
3884 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3885 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3886 rate->min = rate->max =
3887 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3888 channels->min = channels->max =
3889 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3890 break;
3891
3892 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3893 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3894 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3895 rate->min = rate->max =
3896 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3897 channels->min = channels->max =
3898 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3899 break;
3900
3901 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3902 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3903 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3904 rate->min = rate->max =
3905 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3906 channels->min = channels->max =
3907 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3908 break;
3909
3910 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3911 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3912 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3913 rate->min = rate->max =
3914 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3915 channels->min = channels->max =
3916 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3917 break;
3918
3919 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3920 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3921 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3922 rate->min = rate->max =
3923 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3924 channels->min = channels->max =
3925 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3926 break;
3927
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3928 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3929 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3930 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3931 rate->min = rate->max =
3932 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3933 channels->min = channels->max =
3934 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3935 break;
3936
3937 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3938 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3939 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3940 rate->min = rate->max =
3941 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3942 channels->min = channels->max =
3943 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3944 break;
3945
3946 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
3947 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3948 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
3949 rate->min = rate->max =
3950 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
3951 channels->min = channels->max =
3952 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
3953 break;
3954
3955 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
3956 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3957 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
3958 rate->min = rate->max =
3959 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
3960 channels->min = channels->max =
3961 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
3962 break;
3963
3964 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
3965 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3966 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
3967 rate->min = rate->max =
3968 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
3969 channels->min = channels->max =
3970 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
3971 break;
3972
3973 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
3974 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3975 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
3976 rate->min = rate->max =
3977 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
3978 channels->min = channels->max =
3979 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
3980 break;
3981
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3982 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3983 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3984 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3985 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3986 channels->min = channels->max =
3987 mi2s_rx_cfg[PRIM_MI2S].channels;
3988 break;
3989
3990 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3991 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3992 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3993 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3994 channels->min = channels->max =
3995 mi2s_tx_cfg[PRIM_MI2S].channels;
3996 break;
3997
3998 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3999 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4000 mi2s_rx_cfg[SEC_MI2S].bit_format);
4001 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4002 channels->min = channels->max =
4003 mi2s_rx_cfg[SEC_MI2S].channels;
4004 break;
4005
4006 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4007 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4008 mi2s_tx_cfg[SEC_MI2S].bit_format);
4009 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4010 channels->min = channels->max =
4011 mi2s_tx_cfg[SEC_MI2S].channels;
4012 break;
4013
4014 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4015 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4016 mi2s_rx_cfg[TERT_MI2S].bit_format);
4017 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4018 channels->min = channels->max =
4019 mi2s_rx_cfg[TERT_MI2S].channels;
4020 break;
4021
4022 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4023 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4024 mi2s_tx_cfg[TERT_MI2S].bit_format);
4025 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4026 channels->min = channels->max =
4027 mi2s_tx_cfg[TERT_MI2S].channels;
4028 break;
4029
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4030 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4031 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4032 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4033 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4034 channels->min = channels->max =
4035 mi2s_rx_cfg[QUAT_MI2S].channels;
4036 break;
4037
4038 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4039 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4040 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4041 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4042 channels->min = channels->max =
4043 mi2s_tx_cfg[QUAT_MI2S].channels;
4044 break;
4045
4046 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4047 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4048 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4049 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4050 channels->min = channels->max =
4051 mi2s_rx_cfg[QUIN_MI2S].channels;
4052 break;
4053
4054 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4055 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4056 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4057 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4058 channels->min = channels->max =
4059 mi2s_tx_cfg[QUIN_MI2S].channels;
4060 break;
4061
4062 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4063 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4064 mi2s_rx_cfg[SEN_MI2S].bit_format);
4065 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4066 channels->min = channels->max =
4067 mi2s_rx_cfg[SEN_MI2S].channels;
4068 break;
4069
4070 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4071 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4072 mi2s_tx_cfg[SEN_MI2S].bit_format);
4073 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4074 channels->min = channels->max =
4075 mi2s_tx_cfg[SEN_MI2S].channels;
4076 break;
4077
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4078 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4079 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4080 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4081 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4082 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4083 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4084 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4085 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4086 cdc_dma_rx_cfg[idx].bit_format);
4087 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4088 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4089 break;
4090
4091 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4092 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4093 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4094 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4095 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4096 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4097 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4098 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4099 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4100 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4101 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4102 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4103 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4104 break;
4105
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4106 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4107 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4108 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4109 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4110 channels->min = channels->max = msm_vi_feed_tx_ch;
4111 break;
4112
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4113 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4114 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4115 slim_rx_cfg[SLIM_RX_7].bit_format);
4116 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4117 channels->min = channels->max =
4118 slim_rx_cfg[SLIM_RX_7].channels;
4119 break;
4120
4121 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4122 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4123 channels->min = channels->max =
4124 slim_tx_cfg[SLIM_TX_7].channels;
4125 break;
4126
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4127 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4128 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4129 channels->min = channels->max =
4130 slim_tx_cfg[SLIM_TX_8].channels;
4131 break;
4132
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4133 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4134 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4135 afe_loopback_tx_cfg[idx].bit_format);
4136 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4137 channels->min = channels->max =
4138 afe_loopback_tx_cfg[idx].channels;
4139 break;
4140
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4141 default:
4142 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4143 break;
4144 }
4145
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4146done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4147 return rc;
4148}
4149
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4150static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4151{
4152 struct snd_soc_card *card = component->card;
4153 struct msm_asoc_mach_data *pdata =
4154 snd_soc_card_get_drvdata(card);
4155
4156 if (!pdata->fsa_handle)
4157 return false;
4158
4159 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4160}
4161
4162static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4163{
4164 int value = 0;
4165 bool ret = false;
4166 struct snd_soc_card *card;
4167 struct msm_asoc_mach_data *pdata;
4168
4169 if (!component) {
4170 pr_err("%s component is NULL\n", __func__);
4171 return false;
4172 }
4173 card = component->card;
4174 pdata = snd_soc_card_get_drvdata(card);
4175
4176 if (!pdata)
4177 return false;
4178
4179 if (wcd_mbhc_cfg.enable_usbc_analog)
4180 return msm_usbc_swap_gnd_mic(component, active);
4181
4182 /* if usbc is not defined, swap using us_euro_gpio_p */
4183 if (pdata->us_euro_gpio_p) {
4184 value = msm_cdc_pinctrl_get_state(
4185 pdata->us_euro_gpio_p);
4186 if (value)
4187 msm_cdc_pinctrl_select_sleep_state(
4188 pdata->us_euro_gpio_p);
4189 else
4190 msm_cdc_pinctrl_select_active_state(
4191 pdata->us_euro_gpio_p);
4192 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4193 __func__, value, !value);
4194 ret = true;
4195 }
4196
4197 return ret;
4198}
4199
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4200static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4201 struct snd_pcm_hw_params *params)
4202{
4203 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4204 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4205 int ret = 0;
4206 int slot_width = 32;
4207 int channels, slots;
4208 unsigned int slot_mask, rate, clk_freq;
4209 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
4210
4211 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4212
4213 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
4214 switch (cpu_dai->id) {
4215 case AFE_PORT_ID_PRIMARY_TDM_RX:
4216 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4217 break;
4218 case AFE_PORT_ID_SECONDARY_TDM_RX:
4219 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4220 break;
4221 case AFE_PORT_ID_TERTIARY_TDM_RX:
4222 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4223 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4224 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4225 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4226 break;
4227 case AFE_PORT_ID_QUINARY_TDM_RX:
4228 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4229 break;
4230 case AFE_PORT_ID_SENARY_TDM_RX:
4231 slots = tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4232 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4233 case AFE_PORT_ID_PRIMARY_TDM_TX:
4234 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4235 break;
4236 case AFE_PORT_ID_SECONDARY_TDM_TX:
4237 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4238 break;
4239 case AFE_PORT_ID_TERTIARY_TDM_TX:
4240 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4241 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4242 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4243 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4244 break;
4245 case AFE_PORT_ID_QUINARY_TDM_TX:
4246 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4247 break;
4248 case AFE_PORT_ID_SENARY_TDM_TX:
4249 slots = tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4250 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4251
4252 default:
4253 pr_err("%s: dai id 0x%x not supported\n",
4254 __func__, cpu_dai->id);
4255 return -EINVAL;
4256 }
4257
4258 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4259 /*2 slot config - bits 0 and 1 set for the first two slots */
4260 slot_mask = 0x0000FFFF >> (16 - slots);
4261 channels = slots;
4262
4263 pr_debug("%s: tdm rx slot_width %d slots %d\n",
4264 __func__, slot_width, slots);
4265
4266 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4267 slots, slot_width);
4268 if (ret < 0) {
4269 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4270 __func__, ret);
4271 goto end;
4272 }
4273
4274 ret = snd_soc_dai_set_channel_map(cpu_dai,
4275 0, NULL, channels, slot_offset);
4276 if (ret < 0) {
4277 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4278 __func__, ret);
4279 goto end;
4280 }
4281 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4282 /*2 slot config - bits 0 and 1 set for the first two slots */
4283 slot_mask = 0x0000FFFF >> (16 - slots);
4284 channels = slots;
4285
4286 pr_debug("%s: tdm tx slot_width %d slots %d\n",
4287 __func__, slot_width, slots);
4288
4289 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4290 slots, slot_width);
4291 if (ret < 0) {
4292 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4293 __func__, ret);
4294 goto end;
4295 }
4296
4297 ret = snd_soc_dai_set_channel_map(cpu_dai,
4298 channels, slot_offset, 0, NULL);
4299 if (ret < 0) {
4300 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4301 __func__, ret);
4302 goto end;
4303 }
4304 } else {
4305 ret = -EINVAL;
4306 pr_err("%s: invalid use case, err:%d\n",
4307 __func__, ret);
4308 goto end;
4309 }
4310
4311 rate = params_rate(params);
4312 clk_freq = rate * slot_width * slots;
4313 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4314 if (ret < 0)
4315 pr_err("%s: failed to set tdm clk, err:%d\n",
4316 __func__, ret);
4317
4318end:
4319 return ret;
4320}
4321
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4322static int msm_get_tdm_mode(u32 port_id)
4323{
4324 int tdm_mode;
4325
4326 switch (port_id) {
4327 case AFE_PORT_ID_PRIMARY_TDM_RX:
4328 case AFE_PORT_ID_PRIMARY_TDM_TX:
4329 tdm_mode = TDM_PRI;
4330 break;
4331 case AFE_PORT_ID_SECONDARY_TDM_RX:
4332 case AFE_PORT_ID_SECONDARY_TDM_TX:
4333 tdm_mode = TDM_SEC;
4334 break;
4335 case AFE_PORT_ID_TERTIARY_TDM_RX:
4336 case AFE_PORT_ID_TERTIARY_TDM_TX:
4337 tdm_mode = TDM_TERT;
4338 break;
4339 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4340 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4341 tdm_mode = TDM_QUAT;
4342 break;
4343 case AFE_PORT_ID_QUINARY_TDM_RX:
4344 case AFE_PORT_ID_QUINARY_TDM_TX:
4345 tdm_mode = TDM_QUIN;
4346 break;
4347 case AFE_PORT_ID_SENARY_TDM_RX:
4348 case AFE_PORT_ID_SENARY_TDM_TX:
4349 tdm_mode = TDM_SEN;
4350 break;
4351 default:
4352 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4353 tdm_mode = -EINVAL;
4354 }
4355 return tdm_mode;
4356}
4357
4358static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4359{
4360 int ret = 0;
4361 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4362 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4363 struct snd_soc_card *card = rtd->card;
4364 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4365 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4366
4367 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4368 ret = -EINVAL;
4369 pr_err("%s: Invalid TDM interface %d\n",
4370 __func__, ret);
4371 return ret;
4372 }
4373
4374 if (pdata->mi2s_gpio_p[tdm_mode]) {
4375 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4376 == 0) {
4377 ret = msm_cdc_pinctrl_select_active_state(
4378 pdata->mi2s_gpio_p[tdm_mode]);
4379 if (ret) {
4380 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4381 __func__, ret);
4382 goto done;
4383 }
4384 }
4385 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4386 }
4387
4388done:
4389 return ret;
4390}
4391
4392static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4393{
4394 int ret = 0;
4395 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4396 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4397 struct snd_soc_card *card = rtd->card;
4398 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4399 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4400
4401 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4402 ret = -EINVAL;
4403 pr_err("%s: Invalid TDM interface %d\n",
4404 __func__, ret);
4405 return;
4406 }
4407
4408 if (pdata->mi2s_gpio_p[tdm_mode]) {
4409 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4410 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4411 == 0) {
4412 ret = msm_cdc_pinctrl_select_sleep_state(
4413 pdata->mi2s_gpio_p[tdm_mode]);
4414 if (ret)
4415 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4416 __func__, ret);
4417 }
4418 }
4419}
4420
4421static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4422{
4423 int ret = 0;
4424 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4425 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4426 struct snd_soc_card *card = rtd->card;
4427 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4428 u32 aux_mode = cpu_dai->id - 1;
4429
4430 if (aux_mode >= AUX_PCM_MAX) {
4431 ret = -EINVAL;
4432 pr_err("%s: Invalid AUX interface %d\n",
4433 __func__, ret);
4434 return ret;
4435 }
4436
4437 if (pdata->mi2s_gpio_p[aux_mode]) {
4438 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4439 == 0) {
4440 ret = msm_cdc_pinctrl_select_active_state(
4441 pdata->mi2s_gpio_p[aux_mode]);
4442 if (ret) {
4443 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4444 __func__, ret);
4445 goto done;
4446 }
4447 }
4448 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4449 }
4450
4451done:
4452 return ret;
4453}
4454
4455static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4456{
4457 int ret = 0;
4458 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4459 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4460 struct snd_soc_card *card = rtd->card;
4461 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4462 u32 aux_mode = cpu_dai->id - 1;
4463
4464 if (aux_mode >= AUX_PCM_MAX) {
4465 pr_err("%s: Invalid AUX interface %d\n",
4466 __func__, ret);
4467 return;
4468 }
4469
4470 if (pdata->mi2s_gpio_p[aux_mode]) {
4471 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4472 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4473 == 0) {
4474 ret = msm_cdc_pinctrl_select_sleep_state(
4475 pdata->mi2s_gpio_p[aux_mode]);
4476 if (ret)
4477 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4478 __func__, ret);
4479 }
4480 }
4481}
4482
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4483static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4484{
4485 int ret = 0;
4486 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4487 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4488
4489 switch (dai_link->id) {
4490 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4491 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4492 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4493 ret = kona_send_island_va_config(dai_link->id);
4494 if (ret)
4495 pr_err("%s: send island va cfg failed, err: %d\n",
4496 __func__, ret);
4497 break;
4498 }
4499
4500 return ret;
4501}
4502
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4503static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4504 struct snd_pcm_hw_params *params)
4505{
4506 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4507 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4508 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4509 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4510
4511 int ret = 0;
4512 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4513 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4514 u32 user_set_tx_ch = 0;
4515 u32 user_set_rx_ch = 0;
4516 u32 ch_id;
4517
4518 ret = snd_soc_dai_get_channel_map(codec_dai,
4519 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4520 &rx_ch_cdc_dma);
4521 if (ret < 0) {
4522 pr_err("%s: failed to get codec chan map, err:%d\n",
4523 __func__, ret);
4524 goto err;
4525 }
4526
4527 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4528 switch (dai_link->id) {
4529 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4530 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4531 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4532 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4533 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4534 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4535 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4536 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4537 {
4538 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4539 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4540 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4541 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4542 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4543 user_set_rx_ch, &rx_ch_cdc_dma);
4544 if (ret < 0) {
4545 pr_err("%s: failed to set cpu chan map, err:%d\n",
4546 __func__, ret);
4547 goto err;
4548 }
4549
4550 }
4551 break;
4552 }
4553 } else {
4554 switch (dai_link->id) {
4555 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4556 {
4557 user_set_tx_ch = msm_vi_feed_tx_ch;
4558 }
4559 break;
4560 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4561 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4562 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4563 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4564 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4565 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4566 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4567 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4568 {
4569 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4570 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4571 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4572 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4573 }
4574 break;
4575 }
4576
4577 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4578 &tx_ch_cdc_dma, 0, 0);
4579 if (ret < 0) {
4580 pr_err("%s: failed to set cpu chan map, err:%d\n",
4581 __func__, ret);
4582 goto err;
4583 }
4584 }
4585
4586err:
4587 return ret;
4588}
4589
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4590static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4591{
4592 cpumask_t mask;
4593
4594 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4595 pm_qos_remove_request(&substream->latency_pm_qos_req);
4596
4597 cpumask_clear(&mask);
4598 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4599 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4600 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4601
4602 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4603
4604 pm_qos_add_request(&substream->latency_pm_qos_req,
4605 PM_QOS_CPU_DMA_LATENCY,
4606 MSM_LL_QOS_VALUE);
4607 return 0;
4608}
4609
4610static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4611{
4612 int ret = 0;
4613 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4614 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4615 int index = cpu_dai->id;
4616 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4617 struct snd_soc_card *card = rtd->card;
4618 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4619
4620 dev_dbg(rtd->card->dev,
4621 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4622 __func__, substream->name, substream->stream,
4623 cpu_dai->name, cpu_dai->id);
4624
4625 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4626 ret = -EINVAL;
4627 dev_err(rtd->card->dev,
4628 "%s: CPU DAI id (%d) out of range\n",
4629 __func__, cpu_dai->id);
4630 goto err;
4631 }
4632 /*
4633 * Mutex protection in case the same MI2S
4634 * interface using for both TX and RX so
4635 * that the same clock won't be enable twice.
4636 */
4637 mutex_lock(&mi2s_intf_conf[index].lock);
4638 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4639 /* Check if msm needs to provide the clock to the interface */
4640 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4641 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4642 fmt = SND_SOC_DAIFMT_CBM_CFM;
4643 }
4644 ret = msm_mi2s_set_sclk(substream, true);
4645 if (ret < 0) {
4646 dev_err(rtd->card->dev,
4647 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4648 __func__, ret);
4649 goto clean_up;
4650 }
4651
4652 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4653 if (ret < 0) {
4654 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4655 __func__, index, ret);
4656 goto clk_off;
4657 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4658 if (pdata->mi2s_gpio_p[index]) {
4659 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4660 == 0) {
4661 ret = msm_cdc_pinctrl_select_active_state(
4662 pdata->mi2s_gpio_p[index]);
4663 if (ret) {
4664 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4665 __func__, ret);
4666 goto clk_off;
4667 }
4668 }
4669 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4670 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4671 }
4672clk_off:
4673 if (ret < 0)
4674 msm_mi2s_set_sclk(substream, false);
4675clean_up:
4676 if (ret < 0)
4677 mi2s_intf_conf[index].ref_cnt--;
4678 mutex_unlock(&mi2s_intf_conf[index].lock);
4679err:
4680 return ret;
4681}
4682
4683static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4684{
4685 int ret = 0;
4686 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4687 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4688 struct snd_soc_card *card = rtd->card;
4689 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4690
4691 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4692 substream->name, substream->stream);
4693 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4694 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4695 return;
4696 }
4697
4698 mutex_lock(&mi2s_intf_conf[index].lock);
4699 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4700 if (pdata->mi2s_gpio_p[index]) {
4701 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4702 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4703 == 0) {
4704 ret = msm_cdc_pinctrl_select_sleep_state(
4705 pdata->mi2s_gpio_p[index]);
4706 if (ret)
4707 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4708 __func__, ret);
4709 }
4710 }
4711
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4712 ret = msm_mi2s_set_sclk(substream, false);
4713 if (ret < 0)
4714 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4715 __func__, index, ret);
4716 }
4717 mutex_unlock(&mi2s_intf_conf[index].lock);
4718}
4719
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4720static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4721 struct snd_pcm_hw_params *params)
4722{
4723 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4724 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4725 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4726 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4727 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4728 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4729 int ret = 0;
4730
4731 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4732 codec_dai->name, codec_dai->id);
4733 ret = snd_soc_dai_get_channel_map(codec_dai,
4734 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4735 if (ret) {
4736 dev_err(rtd->dev,
4737 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4738 __func__, ret);
4739 goto err;
4740 }
4741
4742 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4743 __func__, tx_ch_cnt, dai_link->id);
4744
4745 ret = snd_soc_dai_set_channel_map(cpu_dai,
4746 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4747 if (ret)
4748 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4749 __func__, ret);
4750
4751err:
4752 return ret;
4753}
4754
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4755static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4756 struct snd_pcm_hw_params *params)
4757{
4758 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4759 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4760 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4761 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4762 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4763 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4764 int ret = 0;
4765
4766 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4767 codec_dai->name, codec_dai->id);
4768 ret = snd_soc_dai_get_channel_map(codec_dai,
4769 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4770 if (ret) {
4771 dev_err(rtd->dev,
4772 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4773 __func__, ret);
4774 goto err;
4775 }
4776
4777 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4778 __func__, tx_ch_cnt, dai_link->id);
4779
4780 ret = snd_soc_dai_set_channel_map(cpu_dai,
4781 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4782 if (ret)
4783 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4784 __func__, ret);
4785
4786err:
4787 return ret;
4788}
4789
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4790static struct snd_soc_ops kona_aux_be_ops = {
4791 .startup = kona_aux_snd_startup,
4792 .shutdown = kona_aux_snd_shutdown
4793};
4794
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4795static struct snd_soc_ops kona_tdm_be_ops = {
4796 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4797 .startup = kona_tdm_snd_startup,
4798 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4799};
4800
4801static struct snd_soc_ops msm_mi2s_be_ops = {
4802 .startup = msm_mi2s_snd_startup,
4803 .shutdown = msm_mi2s_snd_shutdown,
4804};
4805
4806static struct snd_soc_ops msm_fe_qos_ops = {
4807 .prepare = msm_fe_qos_prepare,
4808};
4809
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4810static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4811 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4812 .hw_params = msm_snd_cdc_dma_hw_params,
4813};
4814
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4815static struct snd_soc_ops msm_wcn_ops = {
4816 .hw_params = msm_wcn_hw_params,
4817};
4818
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4819static struct snd_soc_ops msm_wcn_ops_lito = {
4820 .hw_params = msm_wcn_hw_params_lito,
4821};
4822
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4823static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4824 struct snd_kcontrol *kcontrol, int event)
4825{
4826 struct msm_asoc_mach_data *pdata = NULL;
4827 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
4828 int ret = 0;
4829 u32 dmic_idx;
4830 int *dmic_gpio_cnt;
4831 struct device_node *dmic_gpio;
4832 char *wname;
4833
4834 wname = strpbrk(w->name, "012345");
4835 if (!wname) {
4836 dev_err(component->dev, "%s: widget not found\n", __func__);
4837 return -EINVAL;
4838 }
4839
4840 ret = kstrtouint(wname, 10, &dmic_idx);
4841 if (ret < 0) {
4842 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4843 __func__);
4844 return -EINVAL;
4845 }
4846
4847 pdata = snd_soc_card_get_drvdata(component->card);
4848
4849 switch (dmic_idx) {
4850 case 0:
4851 case 1:
4852 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4853 dmic_gpio = pdata->dmic01_gpio_p;
4854 break;
4855 case 2:
4856 case 3:
4857 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4858 dmic_gpio = pdata->dmic23_gpio_p;
4859 break;
4860 case 4:
4861 case 5:
4862 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
4863 dmic_gpio = pdata->dmic45_gpio_p;
4864 break;
4865 default:
4866 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4867 __func__);
4868 return -EINVAL;
4869 }
4870
4871 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4872 __func__, event, dmic_idx, *dmic_gpio_cnt);
4873
4874 switch (event) {
4875 case SND_SOC_DAPM_PRE_PMU:
4876 (*dmic_gpio_cnt)++;
4877 if (*dmic_gpio_cnt == 1) {
4878 ret = msm_cdc_pinctrl_select_active_state(
4879 dmic_gpio);
4880 if (ret < 0) {
4881 pr_err("%s: gpio set cannot be activated %sd",
4882 __func__, "dmic_gpio");
4883 return ret;
4884 }
4885 }
4886
4887 break;
4888 case SND_SOC_DAPM_POST_PMD:
4889 (*dmic_gpio_cnt)--;
4890 if (*dmic_gpio_cnt == 0) {
4891 ret = msm_cdc_pinctrl_select_sleep_state(
4892 dmic_gpio);
4893 if (ret < 0) {
4894 pr_err("%s: gpio set cannot be de-activated %sd",
4895 __func__, "dmic_gpio");
4896 return ret;
4897 }
4898 }
4899 break;
4900 default:
4901 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4902 return -EINVAL;
4903 }
4904 return 0;
4905}
4906
4907static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4908 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4909 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4910 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4911 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4912 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4913 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4914 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4915 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4916 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4917 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
4918 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
4919};
4920
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4921static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4922{
4923 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4924 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
4925 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4926
4927 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4928 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4929}
4930
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4931static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
4932{
4933 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4934 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
4935 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4936
4937 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4938 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4939}
4940
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4941static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4942{
4943 int ret = -EINVAL;
4944 struct snd_soc_component *component;
4945 struct snd_soc_dapm_context *dapm;
4946 struct snd_card *card;
4947 struct snd_info_entry *entry;
4948 struct snd_soc_component *aux_comp;
4949 struct msm_asoc_mach_data *pdata =
4950 snd_soc_card_get_drvdata(rtd->card);
4951
4952 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4953 if (!component) {
4954 pr_err("%s: could not find component for bolero_codec\n",
4955 __func__);
4956 return ret;
4957 }
4958
4959 dapm = snd_soc_component_get_dapm(component);
4960
4961 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4962 ARRAY_SIZE(msm_int_snd_controls));
4963 if (ret < 0) {
4964 pr_err("%s: add_component_controls failed: %d\n",
4965 __func__, ret);
4966 return ret;
4967 }
4968 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4969 ARRAY_SIZE(msm_common_snd_controls));
4970 if (ret < 0) {
4971 pr_err("%s: add common snd controls failed: %d\n",
4972 __func__, ret);
4973 return ret;
4974 }
4975
4976 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4977 ARRAY_SIZE(msm_int_dapm_widgets));
4978
4979 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4980 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4981 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4982 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]4983 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4984 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4985
4986 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4987 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4988 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4989 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4990 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4991
4992 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4993 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4994 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4995 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
4996
4997 snd_soc_dapm_sync(dapm);
4998
4999 /*
5000 * Send speaker configuration only for WSA8810.
5001 * Default configuration is for WSA8815.
5002 */
5003 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5004 __func__, rtd->card->num_aux_devs);
5005 if (rtd->card->num_aux_devs &&
5006 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5007 list_for_each_entry(aux_comp,
5008 &rtd->card->aux_comp_list,
5009 card_aux_list) {
5010 if (aux_comp->name != NULL && (
5011 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5012 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5013 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5014 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5015 wsa_macro_set_spkr_gain_offset(component,
5016 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5017 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5018 }
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]5019 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5020 sm_port_map);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5021 }
5022 card = rtd->card->snd_card;
5023 if (!pdata->codec_root) {
5024 entry = snd_info_create_subdir(card->module, "codecs",
5025 card->proc_root);
5026 if (!entry) {
5027 pr_debug("%s: Cannot create codecs module entry\n",
5028 __func__);
5029 ret = 0;
5030 goto err;
5031 }
5032 pdata->codec_root = entry;
5033 }
5034 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5035 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5036 codec_reg_done = true;
5037 return 0;
5038err:
5039 return ret;
5040}
5041
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5042static void *def_wcd_mbhc_cal(void)
5043{
5044 void *wcd_mbhc_cal;
5045 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5046 u16 *btn_high;
5047
5048 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5049 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5050 if (!wcd_mbhc_cal)
5051 return NULL;
5052
5053 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5054 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5055 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5056 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5057 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5058
5059 btn_high[0] = 75;
5060 btn_high[1] = 150;
5061 btn_high[2] = 237;
5062 btn_high[3] = 500;
5063 btn_high[4] = 500;
5064 btn_high[5] = 500;
5065 btn_high[6] = 500;
5066 btn_high[7] = 500;
5067
5068 return wcd_mbhc_cal;
5069}
5070
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5071/* Digital audio interface glue - connects codec <---> CPU */
5072static struct snd_soc_dai_link msm_common_dai_links[] = {
5073 /* FrontEnd DAI Links */
5074 {/* hw:x,0 */
5075 .name = MSM_DAILINK_NAME(Media1),
5076 .stream_name = "MultiMedia1",
5077 .cpu_dai_name = "MultiMedia1",
5078 .platform_name = "msm-pcm-dsp.0",
5079 .dynamic = 1,
5080 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5081 .dpcm_playback = 1,
5082 .dpcm_capture = 1,
5083 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5084 SND_SOC_DPCM_TRIGGER_POST},
5085 .codec_dai_name = "snd-soc-dummy-dai",
5086 .codec_name = "snd-soc-dummy",
5087 .ignore_suspend = 1,
5088 /* this dainlink has playback support */
5089 .ignore_pmdown_time = 1,
5090 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5091 },
5092 {/* hw:x,1 */
5093 .name = MSM_DAILINK_NAME(Media2),
5094 .stream_name = "MultiMedia2",
5095 .cpu_dai_name = "MultiMedia2",
5096 .platform_name = "msm-pcm-dsp.0",
5097 .dynamic = 1,
5098 .dpcm_playback = 1,
5099 .dpcm_capture = 1,
5100 .codec_dai_name = "snd-soc-dummy-dai",
5101 .codec_name = "snd-soc-dummy",
5102 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5103 SND_SOC_DPCM_TRIGGER_POST},
5104 .ignore_suspend = 1,
5105 /* this dainlink has playback support */
5106 .ignore_pmdown_time = 1,
5107 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5108 },
5109 {/* hw:x,2 */
5110 .name = "VoiceMMode1",
5111 .stream_name = "VoiceMMode1",
5112 .cpu_dai_name = "VoiceMMode1",
5113 .platform_name = "msm-pcm-voice",
5114 .dynamic = 1,
5115 .dpcm_playback = 1,
5116 .dpcm_capture = 1,
5117 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5118 SND_SOC_DPCM_TRIGGER_POST},
5119 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5120 .ignore_suspend = 1,
5121 .ignore_pmdown_time = 1,
5122 .codec_dai_name = "snd-soc-dummy-dai",
5123 .codec_name = "snd-soc-dummy",
5124 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5125 },
5126 {/* hw:x,3 */
5127 .name = "MSM VoIP",
5128 .stream_name = "VoIP",
5129 .cpu_dai_name = "VoIP",
5130 .platform_name = "msm-voip-dsp",
5131 .dynamic = 1,
5132 .dpcm_playback = 1,
5133 .dpcm_capture = 1,
5134 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5135 SND_SOC_DPCM_TRIGGER_POST},
5136 .codec_dai_name = "snd-soc-dummy-dai",
5137 .codec_name = "snd-soc-dummy",
5138 .ignore_suspend = 1,
5139 /* this dainlink has playback support */
5140 .ignore_pmdown_time = 1,
5141 .id = MSM_FRONTEND_DAI_VOIP,
5142 },
5143 {/* hw:x,4 */
5144 .name = MSM_DAILINK_NAME(ULL),
5145 .stream_name = "MultiMedia3",
5146 .cpu_dai_name = "MultiMedia3",
5147 .platform_name = "msm-pcm-dsp.2",
5148 .dynamic = 1,
5149 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5150 .dpcm_playback = 1,
5151 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5152 SND_SOC_DPCM_TRIGGER_POST},
5153 .codec_dai_name = "snd-soc-dummy-dai",
5154 .codec_name = "snd-soc-dummy",
5155 .ignore_suspend = 1,
5156 /* this dainlink has playback support */
5157 .ignore_pmdown_time = 1,
5158 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5159 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5160 {/* hw:x,5 */
5161 .name = "MSM AFE-PCM RX",
5162 .stream_name = "AFE-PROXY RX",
5163 .cpu_dai_name = "msm-dai-q6-dev.241",
5164 .codec_name = "msm-stub-codec.1",
5165 .codec_dai_name = "msm-stub-rx",
5166 .platform_name = "msm-pcm-afe",
5167 .dpcm_playback = 1,
5168 .ignore_suspend = 1,
5169 /* this dainlink has playback support */
5170 .ignore_pmdown_time = 1,
5171 },
5172 {/* hw:x,6 */
5173 .name = "MSM AFE-PCM TX",
5174 .stream_name = "AFE-PROXY TX",
5175 .cpu_dai_name = "msm-dai-q6-dev.240",
5176 .codec_name = "msm-stub-codec.1",
5177 .codec_dai_name = "msm-stub-tx",
5178 .platform_name = "msm-pcm-afe",
5179 .dpcm_capture = 1,
5180 .ignore_suspend = 1,
5181 },
5182 {/* hw:x,7 */
5183 .name = MSM_DAILINK_NAME(Compress1),
5184 .stream_name = "Compress1",
5185 .cpu_dai_name = "MultiMedia4",
5186 .platform_name = "msm-compress-dsp",
5187 .dynamic = 1,
5188 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5189 .dpcm_playback = 1,
5190 .dpcm_capture = 1,
5191 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5192 SND_SOC_DPCM_TRIGGER_POST},
5193 .codec_dai_name = "snd-soc-dummy-dai",
5194 .codec_name = "snd-soc-dummy",
5195 .ignore_suspend = 1,
5196 .ignore_pmdown_time = 1,
5197 /* this dainlink has playback support */
5198 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5199 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5200 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5201 {/* hw:x,8 */
5202 .name = "AUXPCM Hostless",
5203 .stream_name = "AUXPCM Hostless",
5204 .cpu_dai_name = "AUXPCM_HOSTLESS",
5205 .platform_name = "msm-pcm-hostless",
5206 .dynamic = 1,
5207 .dpcm_playback = 1,
5208 .dpcm_capture = 1,
5209 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5210 SND_SOC_DPCM_TRIGGER_POST},
5211 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5212 .ignore_suspend = 1,
5213 /* this dainlink has playback support */
5214 .ignore_pmdown_time = 1,
5215 .codec_dai_name = "snd-soc-dummy-dai",
5216 .codec_name = "snd-soc-dummy",
5217 },
5218 {/* hw:x,9 */
5219 .name = MSM_DAILINK_NAME(LowLatency),
5220 .stream_name = "MultiMedia5",
5221 .cpu_dai_name = "MultiMedia5",
5222 .platform_name = "msm-pcm-dsp.1",
5223 .dynamic = 1,
5224 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5225 .dpcm_playback = 1,
5226 .dpcm_capture = 1,
5227 .codec_dai_name = "snd-soc-dummy-dai",
5228 .codec_name = "snd-soc-dummy",
5229 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5230 SND_SOC_DPCM_TRIGGER_POST},
5231 .ignore_suspend = 1,
5232 /* this dainlink has playback support */
5233 .ignore_pmdown_time = 1,
5234 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5235 .ops = &msm_fe_qos_ops,
5236 },
5237 {/* hw:x,10 */
5238 .name = "Listen 1 Audio Service",
5239 .stream_name = "Listen 1 Audio Service",
5240 .cpu_dai_name = "LSM1",
5241 .platform_name = "msm-lsm-client",
5242 .dynamic = 1,
5243 .dpcm_capture = 1,
5244 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5245 SND_SOC_DPCM_TRIGGER_POST },
5246 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5247 .ignore_suspend = 1,
5248 .codec_dai_name = "snd-soc-dummy-dai",
5249 .codec_name = "snd-soc-dummy",
5250 .id = MSM_FRONTEND_DAI_LSM1,
5251 },
5252 /* Multiple Tunnel instances */
5253 {/* hw:x,11 */
5254 .name = MSM_DAILINK_NAME(Compress2),
5255 .stream_name = "Compress2",
5256 .cpu_dai_name = "MultiMedia7",
5257 .platform_name = "msm-compress-dsp",
5258 .dynamic = 1,
5259 .dpcm_playback = 1,
5260 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5261 SND_SOC_DPCM_TRIGGER_POST},
5262 .codec_dai_name = "snd-soc-dummy-dai",
5263 .codec_name = "snd-soc-dummy",
5264 .ignore_suspend = 1,
5265 .ignore_pmdown_time = 1,
5266 /* this dainlink has playback support */
5267 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5268 },
5269 {/* hw:x,12 */
5270 .name = MSM_DAILINK_NAME(MultiMedia10),
5271 .stream_name = "MultiMedia10",
5272 .cpu_dai_name = "MultiMedia10",
5273 .platform_name = "msm-pcm-dsp.1",
5274 .dynamic = 1,
5275 .dpcm_playback = 1,
5276 .dpcm_capture = 1,
5277 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5278 SND_SOC_DPCM_TRIGGER_POST},
5279 .codec_dai_name = "snd-soc-dummy-dai",
5280 .codec_name = "snd-soc-dummy",
5281 .ignore_suspend = 1,
5282 .ignore_pmdown_time = 1,
5283 /* this dainlink has playback support */
5284 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5285 },
5286 {/* hw:x,13 */
5287 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5288 .stream_name = "MM_NOIRQ",
5289 .cpu_dai_name = "MultiMedia8",
5290 .platform_name = "msm-pcm-dsp-noirq",
5291 .dynamic = 1,
5292 .dpcm_playback = 1,
5293 .dpcm_capture = 1,
5294 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5295 SND_SOC_DPCM_TRIGGER_POST},
5296 .codec_dai_name = "snd-soc-dummy-dai",
5297 .codec_name = "snd-soc-dummy",
5298 .ignore_suspend = 1,
5299 .ignore_pmdown_time = 1,
5300 /* this dainlink has playback support */
5301 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5302 .ops = &msm_fe_qos_ops,
5303 },
5304 /* HDMI Hostless */
5305 {/* hw:x,14 */
5306 .name = "HDMI_RX_HOSTLESS",
5307 .stream_name = "HDMI_RX_HOSTLESS",
5308 .cpu_dai_name = "HDMI_HOSTLESS",
5309 .platform_name = "msm-pcm-hostless",
5310 .dynamic = 1,
5311 .dpcm_playback = 1,
5312 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5313 SND_SOC_DPCM_TRIGGER_POST},
5314 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5315 .ignore_suspend = 1,
5316 .ignore_pmdown_time = 1,
5317 .codec_dai_name = "snd-soc-dummy-dai",
5318 .codec_name = "snd-soc-dummy",
5319 },
5320 {/* hw:x,15 */
5321 .name = "VoiceMMode2",
5322 .stream_name = "VoiceMMode2",
5323 .cpu_dai_name = "VoiceMMode2",
5324 .platform_name = "msm-pcm-voice",
5325 .dynamic = 1,
5326 .dpcm_playback = 1,
5327 .dpcm_capture = 1,
5328 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5329 SND_SOC_DPCM_TRIGGER_POST},
5330 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5331 .ignore_suspend = 1,
5332 .ignore_pmdown_time = 1,
5333 .codec_dai_name = "snd-soc-dummy-dai",
5334 .codec_name = "snd-soc-dummy",
5335 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5336 },
5337 /* LSM FE */
5338 {/* hw:x,16 */
5339 .name = "Listen 2 Audio Service",
5340 .stream_name = "Listen 2 Audio Service",
5341 .cpu_dai_name = "LSM2",
5342 .platform_name = "msm-lsm-client",
5343 .dynamic = 1,
5344 .dpcm_capture = 1,
5345 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5346 SND_SOC_DPCM_TRIGGER_POST },
5347 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5348 .ignore_suspend = 1,
5349 .codec_dai_name = "snd-soc-dummy-dai",
5350 .codec_name = "snd-soc-dummy",
5351 .id = MSM_FRONTEND_DAI_LSM2,
5352 },
5353 {/* hw:x,17 */
5354 .name = "Listen 3 Audio Service",
5355 .stream_name = "Listen 3 Audio Service",
5356 .cpu_dai_name = "LSM3",
5357 .platform_name = "msm-lsm-client",
5358 .dynamic = 1,
5359 .dpcm_capture = 1,
5360 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5361 SND_SOC_DPCM_TRIGGER_POST },
5362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5363 .ignore_suspend = 1,
5364 .codec_dai_name = "snd-soc-dummy-dai",
5365 .codec_name = "snd-soc-dummy",
5366 .id = MSM_FRONTEND_DAI_LSM3,
5367 },
5368 {/* hw:x,18 */
5369 .name = "Listen 4 Audio Service",
5370 .stream_name = "Listen 4 Audio Service",
5371 .cpu_dai_name = "LSM4",
5372 .platform_name = "msm-lsm-client",
5373 .dynamic = 1,
5374 .dpcm_capture = 1,
5375 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5376 SND_SOC_DPCM_TRIGGER_POST },
5377 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5378 .ignore_suspend = 1,
5379 .codec_dai_name = "snd-soc-dummy-dai",
5380 .codec_name = "snd-soc-dummy",
5381 .id = MSM_FRONTEND_DAI_LSM4,
5382 },
5383 {/* hw:x,19 */
5384 .name = "Listen 5 Audio Service",
5385 .stream_name = "Listen 5 Audio Service",
5386 .cpu_dai_name = "LSM5",
5387 .platform_name = "msm-lsm-client",
5388 .dynamic = 1,
5389 .dpcm_capture = 1,
5390 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5391 SND_SOC_DPCM_TRIGGER_POST },
5392 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5393 .ignore_suspend = 1,
5394 .codec_dai_name = "snd-soc-dummy-dai",
5395 .codec_name = "snd-soc-dummy",
5396 .id = MSM_FRONTEND_DAI_LSM5,
5397 },
5398 {/* hw:x,20 */
5399 .name = "Listen 6 Audio Service",
5400 .stream_name = "Listen 6 Audio Service",
5401 .cpu_dai_name = "LSM6",
5402 .platform_name = "msm-lsm-client",
5403 .dynamic = 1,
5404 .dpcm_capture = 1,
5405 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5406 SND_SOC_DPCM_TRIGGER_POST },
5407 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5408 .ignore_suspend = 1,
5409 .codec_dai_name = "snd-soc-dummy-dai",
5410 .codec_name = "snd-soc-dummy",
5411 .id = MSM_FRONTEND_DAI_LSM6,
5412 },
5413 {/* hw:x,21 */
5414 .name = "Listen 7 Audio Service",
5415 .stream_name = "Listen 7 Audio Service",
5416 .cpu_dai_name = "LSM7",
5417 .platform_name = "msm-lsm-client",
5418 .dynamic = 1,
5419 .dpcm_capture = 1,
5420 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5421 SND_SOC_DPCM_TRIGGER_POST },
5422 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5423 .ignore_suspend = 1,
5424 .codec_dai_name = "snd-soc-dummy-dai",
5425 .codec_name = "snd-soc-dummy",
5426 .id = MSM_FRONTEND_DAI_LSM7,
5427 },
5428 {/* hw:x,22 */
5429 .name = "Listen 8 Audio Service",
5430 .stream_name = "Listen 8 Audio Service",
5431 .cpu_dai_name = "LSM8",
5432 .platform_name = "msm-lsm-client",
5433 .dynamic = 1,
5434 .dpcm_capture = 1,
5435 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5436 SND_SOC_DPCM_TRIGGER_POST },
5437 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5438 .ignore_suspend = 1,
5439 .codec_dai_name = "snd-soc-dummy-dai",
5440 .codec_name = "snd-soc-dummy",
5441 .id = MSM_FRONTEND_DAI_LSM8,
5442 },
5443 {/* hw:x,23 */
5444 .name = MSM_DAILINK_NAME(Media9),
5445 .stream_name = "MultiMedia9",
5446 .cpu_dai_name = "MultiMedia9",
5447 .platform_name = "msm-pcm-dsp.0",
5448 .dynamic = 1,
5449 .dpcm_playback = 1,
5450 .dpcm_capture = 1,
5451 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5452 SND_SOC_DPCM_TRIGGER_POST},
5453 .codec_dai_name = "snd-soc-dummy-dai",
5454 .codec_name = "snd-soc-dummy",
5455 .ignore_suspend = 1,
5456 /* this dainlink has playback support */
5457 .ignore_pmdown_time = 1,
5458 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5459 },
5460 {/* hw:x,24 */
5461 .name = MSM_DAILINK_NAME(Compress4),
5462 .stream_name = "Compress4",
5463 .cpu_dai_name = "MultiMedia11",
5464 .platform_name = "msm-compress-dsp",
5465 .dynamic = 1,
5466 .dpcm_playback = 1,
5467 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5468 SND_SOC_DPCM_TRIGGER_POST},
5469 .codec_dai_name = "snd-soc-dummy-dai",
5470 .codec_name = "snd-soc-dummy",
5471 .ignore_suspend = 1,
5472 .ignore_pmdown_time = 1,
5473 /* this dainlink has playback support */
5474 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5475 },
5476 {/* hw:x,25 */
5477 .name = MSM_DAILINK_NAME(Compress5),
5478 .stream_name = "Compress5",
5479 .cpu_dai_name = "MultiMedia12",
5480 .platform_name = "msm-compress-dsp",
5481 .dynamic = 1,
5482 .dpcm_playback = 1,
5483 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5484 SND_SOC_DPCM_TRIGGER_POST},
5485 .codec_dai_name = "snd-soc-dummy-dai",
5486 .codec_name = "snd-soc-dummy",
5487 .ignore_suspend = 1,
5488 .ignore_pmdown_time = 1,
5489 /* this dainlink has playback support */
5490 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5491 },
5492 {/* hw:x,26 */
5493 .name = MSM_DAILINK_NAME(Compress6),
5494 .stream_name = "Compress6",
5495 .cpu_dai_name = "MultiMedia13",
5496 .platform_name = "msm-compress-dsp",
5497 .dynamic = 1,
5498 .dpcm_playback = 1,
5499 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5500 SND_SOC_DPCM_TRIGGER_POST},
5501 .codec_dai_name = "snd-soc-dummy-dai",
5502 .codec_name = "snd-soc-dummy",
5503 .ignore_suspend = 1,
5504 .ignore_pmdown_time = 1,
5505 /* this dainlink has playback support */
5506 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5507 },
5508 {/* hw:x,27 */
5509 .name = MSM_DAILINK_NAME(Compress7),
5510 .stream_name = "Compress7",
5511 .cpu_dai_name = "MultiMedia14",
5512 .platform_name = "msm-compress-dsp",
5513 .dynamic = 1,
5514 .dpcm_playback = 1,
5515 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5516 SND_SOC_DPCM_TRIGGER_POST},
5517 .codec_dai_name = "snd-soc-dummy-dai",
5518 .codec_name = "snd-soc-dummy",
5519 .ignore_suspend = 1,
5520 .ignore_pmdown_time = 1,
5521 /* this dainlink has playback support */
5522 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5523 },
5524 {/* hw:x,28 */
5525 .name = MSM_DAILINK_NAME(Compress8),
5526 .stream_name = "Compress8",
5527 .cpu_dai_name = "MultiMedia15",
5528 .platform_name = "msm-compress-dsp",
5529 .dynamic = 1,
5530 .dpcm_playback = 1,
5531 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5532 SND_SOC_DPCM_TRIGGER_POST},
5533 .codec_dai_name = "snd-soc-dummy-dai",
5534 .codec_name = "snd-soc-dummy",
5535 .ignore_suspend = 1,
5536 .ignore_pmdown_time = 1,
5537 /* this dainlink has playback support */
5538 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5539 },
5540 {/* hw:x,29 */
5541 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5542 .stream_name = "MM_NOIRQ_2",
5543 .cpu_dai_name = "MultiMedia16",
5544 .platform_name = "msm-pcm-dsp-noirq",
5545 .dynamic = 1,
5546 .dpcm_playback = 1,
5547 .dpcm_capture = 1,
5548 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5549 SND_SOC_DPCM_TRIGGER_POST},
5550 .codec_dai_name = "snd-soc-dummy-dai",
5551 .codec_name = "snd-soc-dummy",
5552 .ignore_suspend = 1,
5553 .ignore_pmdown_time = 1,
5554 /* this dainlink has playback support */
5555 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
5556 },
5557 {/* hw:x,30 */
5558 .name = "CDC_DMA Hostless",
5559 .stream_name = "CDC_DMA Hostless",
5560 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5561 .platform_name = "msm-pcm-hostless",
5562 .dynamic = 1,
5563 .dpcm_playback = 1,
5564 .dpcm_capture = 1,
5565 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5566 SND_SOC_DPCM_TRIGGER_POST},
5567 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5568 .ignore_suspend = 1,
5569 /* this dailink has playback support */
5570 .ignore_pmdown_time = 1,
5571 .codec_dai_name = "snd-soc-dummy-dai",
5572 .codec_name = "snd-soc-dummy",
5573 },
5574 {/* hw:x,31 */
5575 .name = "TX3_CDC_DMA Hostless",
5576 .stream_name = "TX3_CDC_DMA Hostless",
5577 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5578 .platform_name = "msm-pcm-hostless",
5579 .dynamic = 1,
5580 .dpcm_capture = 1,
5581 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5582 SND_SOC_DPCM_TRIGGER_POST},
5583 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5584 .ignore_suspend = 1,
5585 .codec_dai_name = "snd-soc-dummy-dai",
5586 .codec_name = "snd-soc-dummy",
5587 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5588 {/* hw:x,32 */
5589 .name = "Tertiary MI2S TX_Hostless",
5590 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5591 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5592 .platform_name = "msm-pcm-hostless",
5593 .dynamic = 1,
5594 .dpcm_capture = 1,
5595 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5596 SND_SOC_DPCM_TRIGGER_POST},
5597 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5598 .ignore_suspend = 1,
5599 .ignore_pmdown_time = 1,
5600 .codec_dai_name = "snd-soc-dummy-dai",
5601 .codec_name = "snd-soc-dummy",
5602 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5603};
5604
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5605static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5606 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5607 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5608 .stream_name = "WSA CDC DMA0 Capture",
5609 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5610 .platform_name = "msm-pcm-hostless",
5611 .codec_name = "bolero_codec",
5612 .codec_dai_name = "wsa_macro_vifeedback",
5613 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
5614 .be_hw_params_fixup = msm_be_hw_params_fixup,
5615 .ignore_suspend = 1,
5616 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5617 .ops = &msm_cdc_dma_be_ops,
5618 },
5619};
5620
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5621static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5622 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5623 .name = MSM_DAILINK_NAME(ASM Loopback),
5624 .stream_name = "MultiMedia6",
5625 .cpu_dai_name = "MultiMedia6",
5626 .platform_name = "msm-pcm-loopback",
5627 .dynamic = 1,
5628 .dpcm_playback = 1,
5629 .dpcm_capture = 1,
5630 .codec_dai_name = "snd-soc-dummy-dai",
5631 .codec_name = "snd-soc-dummy",
5632 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5633 SND_SOC_DPCM_TRIGGER_POST},
5634 .ignore_suspend = 1,
5635 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5636 .ignore_pmdown_time = 1,
5637 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5638 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5639 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5640 .name = "USB Audio Hostless",
5641 .stream_name = "USB Audio Hostless",
5642 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5643 .platform_name = "msm-pcm-hostless",
5644 .dynamic = 1,
5645 .dpcm_playback = 1,
5646 .dpcm_capture = 1,
5647 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5648 SND_SOC_DPCM_TRIGGER_POST},
5649 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5650 .ignore_suspend = 1,
5651 .ignore_pmdown_time = 1,
5652 .codec_dai_name = "snd-soc-dummy-dai",
5653 .codec_name = "snd-soc-dummy",
5654 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5655 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5656 .name = "SLIMBUS_7 Hostless",
5657 .stream_name = "SLIMBUS_7 Hostless",
5658 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5659 .platform_name = "msm-pcm-hostless",
5660 .dynamic = 1,
5661 .dpcm_capture = 1,
5662 .dpcm_playback = 1,
5663 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5664 SND_SOC_DPCM_TRIGGER_POST},
5665 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5666 .ignore_suspend = 1,
5667 .ignore_pmdown_time = 1,
5668 .codec_dai_name = "snd-soc-dummy-dai",
5669 .codec_name = "snd-soc-dummy",
5670 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5671 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5672 .name = "Compress Capture",
5673 .stream_name = "Compress9",
5674 .cpu_dai_name = "MultiMedia17",
5675 .platform_name = "msm-compress-dsp",
5676 .dynamic = 1,
5677 .dpcm_capture = 1,
5678 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5679 SND_SOC_DPCM_TRIGGER_POST},
5680 .codec_dai_name = "snd-soc-dummy-dai",
5681 .codec_name = "snd-soc-dummy",
5682 .ignore_suspend = 1,
5683 .ignore_pmdown_time = 1,
5684 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5685 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5686 {/* hw:x,38 */
5687 .name = "SLIMBUS_8 Hostless",
5688 .stream_name = "SLIMBUS_8 Hostless",
5689 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5690 .platform_name = "msm-pcm-hostless",
5691 .dynamic = 1,
5692 .dpcm_capture = 1,
5693 .dpcm_playback = 1,
5694 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5695 SND_SOC_DPCM_TRIGGER_POST},
5696 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5697 .ignore_suspend = 1,
5698 .ignore_pmdown_time = 1,
5699 .codec_dai_name = "snd-soc-dummy-dai",
5700 .codec_name = "snd-soc-dummy",
5701 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame^]5702 {/* hw:x,39 */
5703 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5704 .stream_name = "TX CDC DMA5 Capture",
5705 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5706 .platform_name = "msm-pcm-hostless",
5707 .codec_name = "bolero_codec",
5708 .codec_dai_name = "tx_macro_tx3",
5709 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5710 .be_hw_params_fixup = msm_be_hw_params_fixup,
5711 .ignore_suspend = 1,
5712 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5713 .ops = &msm_cdc_dma_be_ops,
5714 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5715};
5716
5717static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5718 /* Backend AFE DAI Links */
5719 {
5720 .name = LPASS_BE_AFE_PCM_RX,
5721 .stream_name = "AFE Playback",
5722 .cpu_dai_name = "msm-dai-q6-dev.224",
5723 .platform_name = "msm-pcm-routing",
5724 .codec_name = "msm-stub-codec.1",
5725 .codec_dai_name = "msm-stub-rx",
5726 .no_pcm = 1,
5727 .dpcm_playback = 1,
5728 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5729 .be_hw_params_fixup = msm_be_hw_params_fixup,
5730 /* this dainlink has playback support */
5731 .ignore_pmdown_time = 1,
5732 .ignore_suspend = 1,
5733 },
5734 {
5735 .name = LPASS_BE_AFE_PCM_TX,
5736 .stream_name = "AFE Capture",
5737 .cpu_dai_name = "msm-dai-q6-dev.225",
5738 .platform_name = "msm-pcm-routing",
5739 .codec_name = "msm-stub-codec.1",
5740 .codec_dai_name = "msm-stub-tx",
5741 .no_pcm = 1,
5742 .dpcm_capture = 1,
5743 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5744 .be_hw_params_fixup = msm_be_hw_params_fixup,
5745 .ignore_suspend = 1,
5746 },
5747 /* Incall Record Uplink BACK END DAI Link */
5748 {
5749 .name = LPASS_BE_INCALL_RECORD_TX,
5750 .stream_name = "Voice Uplink Capture",
5751 .cpu_dai_name = "msm-dai-q6-dev.32772",
5752 .platform_name = "msm-pcm-routing",
5753 .codec_name = "msm-stub-codec.1",
5754 .codec_dai_name = "msm-stub-tx",
5755 .no_pcm = 1,
5756 .dpcm_capture = 1,
5757 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5758 .be_hw_params_fixup = msm_be_hw_params_fixup,
5759 .ignore_suspend = 1,
5760 },
5761 /* Incall Record Downlink BACK END DAI Link */
5762 {
5763 .name = LPASS_BE_INCALL_RECORD_RX,
5764 .stream_name = "Voice Downlink Capture",
5765 .cpu_dai_name = "msm-dai-q6-dev.32771",
5766 .platform_name = "msm-pcm-routing",
5767 .codec_name = "msm-stub-codec.1",
5768 .codec_dai_name = "msm-stub-tx",
5769 .no_pcm = 1,
5770 .dpcm_capture = 1,
5771 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5772 .be_hw_params_fixup = msm_be_hw_params_fixup,
5773 .ignore_suspend = 1,
5774 },
5775 /* Incall Music BACK END DAI Link */
5776 {
5777 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5778 .stream_name = "Voice Farend Playback",
5779 .cpu_dai_name = "msm-dai-q6-dev.32773",
5780 .platform_name = "msm-pcm-routing",
5781 .codec_name = "msm-stub-codec.1",
5782 .codec_dai_name = "msm-stub-rx",
5783 .no_pcm = 1,
5784 .dpcm_playback = 1,
5785 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5786 .be_hw_params_fixup = msm_be_hw_params_fixup,
5787 .ignore_suspend = 1,
5788 .ignore_pmdown_time = 1,
5789 },
5790 /* Incall Music 2 BACK END DAI Link */
5791 {
5792 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5793 .stream_name = "Voice2 Farend Playback",
5794 .cpu_dai_name = "msm-dai-q6-dev.32770",
5795 .platform_name = "msm-pcm-routing",
5796 .codec_name = "msm-stub-codec.1",
5797 .codec_dai_name = "msm-stub-rx",
5798 .no_pcm = 1,
5799 .dpcm_playback = 1,
5800 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5801 .be_hw_params_fixup = msm_be_hw_params_fixup,
5802 .ignore_suspend = 1,
5803 .ignore_pmdown_time = 1,
5804 },
5805 {
5806 .name = LPASS_BE_USB_AUDIO_RX,
5807 .stream_name = "USB Audio Playback",
5808 .cpu_dai_name = "msm-dai-q6-dev.28672",
5809 .platform_name = "msm-pcm-routing",
5810 .codec_name = "msm-stub-codec.1",
5811 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]5812 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5813 .no_pcm = 1,
5814 .dpcm_playback = 1,
5815 .id = MSM_BACKEND_DAI_USB_RX,
5816 .be_hw_params_fixup = msm_be_hw_params_fixup,
5817 .ignore_pmdown_time = 1,
5818 .ignore_suspend = 1,
5819 },
5820 {
5821 .name = LPASS_BE_USB_AUDIO_TX,
5822 .stream_name = "USB Audio Capture",
5823 .cpu_dai_name = "msm-dai-q6-dev.28673",
5824 .platform_name = "msm-pcm-routing",
5825 .codec_name = "msm-stub-codec.1",
5826 .codec_dai_name = "msm-stub-tx",
5827 .no_pcm = 1,
5828 .dpcm_capture = 1,
5829 .id = MSM_BACKEND_DAI_USB_TX,
5830 .be_hw_params_fixup = msm_be_hw_params_fixup,
5831 .ignore_suspend = 1,
5832 },
5833 {
5834 .name = LPASS_BE_PRI_TDM_RX_0,
5835 .stream_name = "Primary TDM0 Playback",
5836 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5837 .platform_name = "msm-pcm-routing",
5838 .codec_name = "msm-stub-codec.1",
5839 .codec_dai_name = "msm-stub-rx",
5840 .no_pcm = 1,
5841 .dpcm_playback = 1,
5842 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5843 .be_hw_params_fixup = msm_be_hw_params_fixup,
5844 .ops = &kona_tdm_be_ops,
5845 .ignore_suspend = 1,
5846 .ignore_pmdown_time = 1,
5847 },
5848 {
5849 .name = LPASS_BE_PRI_TDM_TX_0,
5850 .stream_name = "Primary TDM0 Capture",
5851 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5852 .platform_name = "msm-pcm-routing",
5853 .codec_name = "msm-stub-codec.1",
5854 .codec_dai_name = "msm-stub-tx",
5855 .no_pcm = 1,
5856 .dpcm_capture = 1,
5857 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5858 .be_hw_params_fixup = msm_be_hw_params_fixup,
5859 .ops = &kona_tdm_be_ops,
5860 .ignore_suspend = 1,
5861 },
5862 {
5863 .name = LPASS_BE_SEC_TDM_RX_0,
5864 .stream_name = "Secondary TDM0 Playback",
5865 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5866 .platform_name = "msm-pcm-routing",
5867 .codec_name = "msm-stub-codec.1",
5868 .codec_dai_name = "msm-stub-rx",
5869 .no_pcm = 1,
5870 .dpcm_playback = 1,
5871 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5872 .be_hw_params_fixup = msm_be_hw_params_fixup,
5873 .ops = &kona_tdm_be_ops,
5874 .ignore_suspend = 1,
5875 .ignore_pmdown_time = 1,
5876 },
5877 {
5878 .name = LPASS_BE_SEC_TDM_TX_0,
5879 .stream_name = "Secondary TDM0 Capture",
5880 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5881 .platform_name = "msm-pcm-routing",
5882 .codec_name = "msm-stub-codec.1",
5883 .codec_dai_name = "msm-stub-tx",
5884 .no_pcm = 1,
5885 .dpcm_capture = 1,
5886 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5887 .be_hw_params_fixup = msm_be_hw_params_fixup,
5888 .ops = &kona_tdm_be_ops,
5889 .ignore_suspend = 1,
5890 },
5891 {
5892 .name = LPASS_BE_TERT_TDM_RX_0,
5893 .stream_name = "Tertiary TDM0 Playback",
5894 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5895 .platform_name = "msm-pcm-routing",
5896 .codec_name = "msm-stub-codec.1",
5897 .codec_dai_name = "msm-stub-rx",
5898 .no_pcm = 1,
5899 .dpcm_playback = 1,
5900 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5901 .be_hw_params_fixup = msm_be_hw_params_fixup,
5902 .ops = &kona_tdm_be_ops,
5903 .ignore_suspend = 1,
5904 .ignore_pmdown_time = 1,
5905 },
5906 {
5907 .name = LPASS_BE_TERT_TDM_TX_0,
5908 .stream_name = "Tertiary TDM0 Capture",
5909 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5910 .platform_name = "msm-pcm-routing",
5911 .codec_name = "msm-stub-codec.1",
5912 .codec_dai_name = "msm-stub-tx",
5913 .no_pcm = 1,
5914 .dpcm_capture = 1,
5915 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5916 .be_hw_params_fixup = msm_be_hw_params_fixup,
5917 .ops = &kona_tdm_be_ops,
5918 .ignore_suspend = 1,
5919 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5920 {
5921 .name = LPASS_BE_QUAT_TDM_RX_0,
5922 .stream_name = "Quaternary TDM0 Playback",
5923 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5924 .platform_name = "msm-pcm-routing",
5925 .codec_name = "msm-stub-codec.1",
5926 .codec_dai_name = "msm-stub-rx",
5927 .no_pcm = 1,
5928 .dpcm_playback = 1,
5929 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5930 .be_hw_params_fixup = msm_be_hw_params_fixup,
5931 .ops = &kona_tdm_be_ops,
5932 .ignore_suspend = 1,
5933 .ignore_pmdown_time = 1,
5934 },
5935 {
5936 .name = LPASS_BE_QUAT_TDM_TX_0,
5937 .stream_name = "Quaternary TDM0 Capture",
5938 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5939 .platform_name = "msm-pcm-routing",
5940 .codec_name = "msm-stub-codec.1",
5941 .codec_dai_name = "msm-stub-tx",
5942 .no_pcm = 1,
5943 .dpcm_capture = 1,
5944 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5945 .be_hw_params_fixup = msm_be_hw_params_fixup,
5946 .ops = &kona_tdm_be_ops,
5947 .ignore_suspend = 1,
5948 },
5949 {
5950 .name = LPASS_BE_QUIN_TDM_RX_0,
5951 .stream_name = "Quinary TDM0 Playback",
5952 .cpu_dai_name = "msm-dai-q6-tdm.36928",
5953 .platform_name = "msm-pcm-routing",
5954 .codec_name = "msm-stub-codec.1",
5955 .codec_dai_name = "msm-stub-rx",
5956 .no_pcm = 1,
5957 .dpcm_playback = 1,
5958 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
5959 .be_hw_params_fixup = msm_be_hw_params_fixup,
5960 .ops = &kona_tdm_be_ops,
5961 .ignore_suspend = 1,
5962 .ignore_pmdown_time = 1,
5963 },
5964 {
5965 .name = LPASS_BE_QUIN_TDM_TX_0,
5966 .stream_name = "Quinary TDM0 Capture",
5967 .cpu_dai_name = "msm-dai-q6-tdm.36929",
5968 .platform_name = "msm-pcm-routing",
5969 .codec_name = "msm-stub-codec.1",
5970 .codec_dai_name = "msm-stub-tx",
5971 .no_pcm = 1,
5972 .dpcm_capture = 1,
5973 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
5974 .be_hw_params_fixup = msm_be_hw_params_fixup,
5975 .ops = &kona_tdm_be_ops,
5976 .ignore_suspend = 1,
5977 },
5978 {
5979 .name = LPASS_BE_SEN_TDM_RX_0,
5980 .stream_name = "Senary TDM0 Playback",
5981 .cpu_dai_name = "msm-dai-q6-tdm.36944",
5982 .platform_name = "msm-pcm-routing",
5983 .codec_name = "msm-stub-codec.1",
5984 .codec_dai_name = "msm-stub-rx",
5985 .no_pcm = 1,
5986 .dpcm_playback = 1,
5987 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
5988 .be_hw_params_fixup = msm_be_hw_params_fixup,
5989 .ops = &kona_tdm_be_ops,
5990 .ignore_suspend = 1,
5991 .ignore_pmdown_time = 1,
5992 },
5993 {
5994 .name = LPASS_BE_SEN_TDM_TX_0,
5995 .stream_name = "Senary TDM0 Capture",
5996 .cpu_dai_name = "msm-dai-q6-tdm.36945",
5997 .platform_name = "msm-pcm-routing",
5998 .codec_name = "msm-stub-codec.1",
5999 .codec_dai_name = "msm-stub-tx",
6000 .no_pcm = 1,
6001 .dpcm_capture = 1,
6002 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6003 .be_hw_params_fixup = msm_be_hw_params_fixup,
6004 .ops = &kona_tdm_be_ops,
6005 .ignore_suspend = 1,
6006 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6007};
6008
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6009static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6010 {
6011 .name = LPASS_BE_SLIMBUS_7_RX,
6012 .stream_name = "Slimbus7 Playback",
6013 .cpu_dai_name = "msm-dai-q6-dev.16398",
6014 .platform_name = "msm-pcm-routing",
6015 .codec_name = "btfmslim_slave",
6016 /* BT codec driver determines capabilities based on
6017 * dai name, bt codecdai name should always contains
6018 * supported usecase information
6019 */
6020 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6021 .no_pcm = 1,
6022 .dpcm_playback = 1,
6023 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6024 .be_hw_params_fixup = msm_be_hw_params_fixup,
6025 .init = &msm_wcn_init,
6026 .ops = &msm_wcn_ops,
6027 /* dai link has playback support */
6028 .ignore_pmdown_time = 1,
6029 .ignore_suspend = 1,
6030 },
6031 {
6032 .name = LPASS_BE_SLIMBUS_7_TX,
6033 .stream_name = "Slimbus7 Capture",
6034 .cpu_dai_name = "msm-dai-q6-dev.16399",
6035 .platform_name = "msm-pcm-routing",
6036 .codec_name = "btfmslim_slave",
6037 .codec_dai_name = "btfm_bt_sco_slim_tx",
6038 .no_pcm = 1,
6039 .dpcm_capture = 1,
6040 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6041 .be_hw_params_fixup = msm_be_hw_params_fixup,
6042 .ops = &msm_wcn_ops,
6043 .ignore_suspend = 1,
6044 },
6045};
6046
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6047static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6048 {
6049 .name = LPASS_BE_SLIMBUS_7_RX,
6050 .stream_name = "Slimbus7 Playback",
6051 .cpu_dai_name = "msm-dai-q6-dev.16398",
6052 .platform_name = "msm-pcm-routing",
6053 .codec_name = "btfmslim_slave",
6054 /* BT codec driver determines capabilities based on
6055 * dai name, bt codecdai name should always contains
6056 * supported usecase information
6057 */
6058 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6059 .no_pcm = 1,
6060 .dpcm_playback = 1,
6061 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6062 .be_hw_params_fixup = msm_be_hw_params_fixup,
6063 .init = &msm_wcn_init_lito,
6064 .ops = &msm_wcn_ops_lito,
6065 /* dai link has playback support */
6066 .ignore_pmdown_time = 1,
6067 .ignore_suspend = 1,
6068 },
6069 {
6070 .name = LPASS_BE_SLIMBUS_7_TX,
6071 .stream_name = "Slimbus7 Capture",
6072 .cpu_dai_name = "msm-dai-q6-dev.16399",
6073 .platform_name = "msm-pcm-routing",
6074 .codec_name = "btfmslim_slave",
6075 .codec_dai_name = "btfm_bt_sco_slim_tx",
6076 .no_pcm = 1,
6077 .dpcm_capture = 1,
6078 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6079 .be_hw_params_fixup = msm_be_hw_params_fixup,
6080 .ops = &msm_wcn_ops_lito,
6081 .ignore_suspend = 1,
6082 },
6083 {
6084 .name = LPASS_BE_SLIMBUS_8_TX,
6085 .stream_name = "Slimbus8 Capture",
6086 .cpu_dai_name = "msm-dai-q6-dev.16401",
6087 .platform_name = "msm-pcm-routing",
6088 .codec_name = "btfmslim_slave",
6089 .codec_dai_name = "btfm_fm_slim_tx",
6090 .no_pcm = 1,
6091 .dpcm_capture = 1,
6092 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6093 .be_hw_params_fixup = msm_be_hw_params_fixup,
6094 .ops = &msm_wcn_ops_lito,
6095 .ignore_suspend = 1,
6096 },
6097};
6098
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6099static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6100 /* DISP PORT BACK END DAI Link */
6101 {
6102 .name = LPASS_BE_DISPLAY_PORT,
6103 .stream_name = "Display Port Playback",
6104 .cpu_dai_name = "msm-dai-q6-dp.24608",
6105 .platform_name = "msm-pcm-routing",
6106 .codec_name = "msm-ext-disp-audio-codec-rx",
6107 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6108 .no_pcm = 1,
6109 .dpcm_playback = 1,
6110 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6111 .be_hw_params_fixup = msm_be_hw_params_fixup,
6112 .ignore_pmdown_time = 1,
6113 .ignore_suspend = 1,
6114 },
6115 /* DISP PORT 1 BACK END DAI Link */
6116 {
6117 .name = LPASS_BE_DISPLAY_PORT1,
6118 .stream_name = "Display Port1 Playback",
6119 .cpu_dai_name = "msm-dai-q6-dp.24608",
6120 .platform_name = "msm-pcm-routing",
6121 .codec_name = "msm-ext-disp-audio-codec-rx",
6122 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6123 .no_pcm = 1,
6124 .dpcm_playback = 1,
6125 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6126 .be_hw_params_fixup = msm_be_hw_params_fixup,
6127 .ignore_pmdown_time = 1,
6128 .ignore_suspend = 1,
6129 },
6130};
6131
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6132static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6133 {
6134 .name = LPASS_BE_PRI_MI2S_RX,
6135 .stream_name = "Primary MI2S Playback",
6136 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6137 .platform_name = "msm-pcm-routing",
6138 .codec_name = "msm-stub-codec.1",
6139 .codec_dai_name = "msm-stub-rx",
6140 .no_pcm = 1,
6141 .dpcm_playback = 1,
6142 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6143 .be_hw_params_fixup = msm_be_hw_params_fixup,
6144 .ops = &msm_mi2s_be_ops,
6145 .ignore_suspend = 1,
6146 .ignore_pmdown_time = 1,
6147 },
6148 {
6149 .name = LPASS_BE_PRI_MI2S_TX,
6150 .stream_name = "Primary MI2S Capture",
6151 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6152 .platform_name = "msm-pcm-routing",
6153 .codec_name = "msm-stub-codec.1",
6154 .codec_dai_name = "msm-stub-tx",
6155 .no_pcm = 1,
6156 .dpcm_capture = 1,
6157 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6158 .be_hw_params_fixup = msm_be_hw_params_fixup,
6159 .ops = &msm_mi2s_be_ops,
6160 .ignore_suspend = 1,
6161 },
6162 {
6163 .name = LPASS_BE_SEC_MI2S_RX,
6164 .stream_name = "Secondary MI2S Playback",
6165 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6166 .platform_name = "msm-pcm-routing",
6167 .codec_name = "msm-stub-codec.1",
6168 .codec_dai_name = "msm-stub-rx",
6169 .no_pcm = 1,
6170 .dpcm_playback = 1,
6171 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6172 .be_hw_params_fixup = msm_be_hw_params_fixup,
6173 .ops = &msm_mi2s_be_ops,
6174 .ignore_suspend = 1,
6175 .ignore_pmdown_time = 1,
6176 },
6177 {
6178 .name = LPASS_BE_SEC_MI2S_TX,
6179 .stream_name = "Secondary MI2S Capture",
6180 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6181 .platform_name = "msm-pcm-routing",
6182 .codec_name = "msm-stub-codec.1",
6183 .codec_dai_name = "msm-stub-tx",
6184 .no_pcm = 1,
6185 .dpcm_capture = 1,
6186 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6187 .be_hw_params_fixup = msm_be_hw_params_fixup,
6188 .ops = &msm_mi2s_be_ops,
6189 .ignore_suspend = 1,
6190 },
6191 {
6192 .name = LPASS_BE_TERT_MI2S_RX,
6193 .stream_name = "Tertiary MI2S Playback",
6194 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6195 .platform_name = "msm-pcm-routing",
6196 .codec_name = "msm-stub-codec.1",
6197 .codec_dai_name = "msm-stub-rx",
6198 .no_pcm = 1,
6199 .dpcm_playback = 1,
6200 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6201 .be_hw_params_fixup = msm_be_hw_params_fixup,
6202 .ops = &msm_mi2s_be_ops,
6203 .ignore_suspend = 1,
6204 .ignore_pmdown_time = 1,
6205 },
6206 {
6207 .name = LPASS_BE_TERT_MI2S_TX,
6208 .stream_name = "Tertiary MI2S Capture",
6209 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6210 .platform_name = "msm-pcm-routing",
6211 .codec_name = "msm-stub-codec.1",
6212 .codec_dai_name = "msm-stub-tx",
6213 .no_pcm = 1,
6214 .dpcm_capture = 1,
6215 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6216 .be_hw_params_fixup = msm_be_hw_params_fixup,
6217 .ops = &msm_mi2s_be_ops,
6218 .ignore_suspend = 1,
6219 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6220 {
6221 .name = LPASS_BE_QUAT_MI2S_RX,
6222 .stream_name = "Quaternary MI2S Playback",
6223 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6224 .platform_name = "msm-pcm-routing",
6225 .codec_name = "msm-stub-codec.1",
6226 .codec_dai_name = "msm-stub-rx",
6227 .no_pcm = 1,
6228 .dpcm_playback = 1,
6229 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6230 .be_hw_params_fixup = msm_be_hw_params_fixup,
6231 .ops = &msm_mi2s_be_ops,
6232 .ignore_suspend = 1,
6233 .ignore_pmdown_time = 1,
6234 },
6235 {
6236 .name = LPASS_BE_QUAT_MI2S_TX,
6237 .stream_name = "Quaternary MI2S Capture",
6238 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6239 .platform_name = "msm-pcm-routing",
6240 .codec_name = "msm-stub-codec.1",
6241 .codec_dai_name = "msm-stub-tx",
6242 .no_pcm = 1,
6243 .dpcm_capture = 1,
6244 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6245 .be_hw_params_fixup = msm_be_hw_params_fixup,
6246 .ops = &msm_mi2s_be_ops,
6247 .ignore_suspend = 1,
6248 },
6249 {
6250 .name = LPASS_BE_QUIN_MI2S_RX,
6251 .stream_name = "Quinary MI2S Playback",
6252 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6253 .platform_name = "msm-pcm-routing",
6254 .codec_name = "msm-stub-codec.1",
6255 .codec_dai_name = "msm-stub-rx",
6256 .no_pcm = 1,
6257 .dpcm_playback = 1,
6258 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6259 .be_hw_params_fixup = msm_be_hw_params_fixup,
6260 .ops = &msm_mi2s_be_ops,
6261 .ignore_suspend = 1,
6262 .ignore_pmdown_time = 1,
6263 },
6264 {
6265 .name = LPASS_BE_QUIN_MI2S_TX,
6266 .stream_name = "Quinary MI2S Capture",
6267 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6268 .platform_name = "msm-pcm-routing",
6269 .codec_name = "msm-stub-codec.1",
6270 .codec_dai_name = "msm-stub-tx",
6271 .no_pcm = 1,
6272 .dpcm_capture = 1,
6273 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6274 .be_hw_params_fixup = msm_be_hw_params_fixup,
6275 .ops = &msm_mi2s_be_ops,
6276 .ignore_suspend = 1,
6277 },
6278 {
6279 .name = LPASS_BE_SENARY_MI2S_RX,
6280 .stream_name = "Senary MI2S Playback",
6281 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6282 .platform_name = "msm-pcm-routing",
6283 .codec_name = "msm-stub-codec.1",
6284 .codec_dai_name = "msm-stub-rx",
6285 .no_pcm = 1,
6286 .dpcm_playback = 1,
6287 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6288 .be_hw_params_fixup = msm_be_hw_params_fixup,
6289 .ops = &msm_mi2s_be_ops,
6290 .ignore_suspend = 1,
6291 .ignore_pmdown_time = 1,
6292 },
6293 {
6294 .name = LPASS_BE_SENARY_MI2S_TX,
6295 .stream_name = "Senary MI2S Capture",
6296 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6297 .platform_name = "msm-pcm-routing",
6298 .codec_name = "msm-stub-codec.1",
6299 .codec_dai_name = "msm-stub-tx",
6300 .no_pcm = 1,
6301 .dpcm_capture = 1,
6302 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6303 .be_hw_params_fixup = msm_be_hw_params_fixup,
6304 .ops = &msm_mi2s_be_ops,
6305 .ignore_suspend = 1,
6306 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6307};
6308
6309static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6310 /* Primary AUX PCM Backend DAI Links */
6311 {
6312 .name = LPASS_BE_AUXPCM_RX,
6313 .stream_name = "AUX PCM Playback",
6314 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6315 .platform_name = "msm-pcm-routing",
6316 .codec_name = "msm-stub-codec.1",
6317 .codec_dai_name = "msm-stub-rx",
6318 .no_pcm = 1,
6319 .dpcm_playback = 1,
6320 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6321 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6322 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6323 .ignore_pmdown_time = 1,
6324 .ignore_suspend = 1,
6325 },
6326 {
6327 .name = LPASS_BE_AUXPCM_TX,
6328 .stream_name = "AUX PCM Capture",
6329 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6330 .platform_name = "msm-pcm-routing",
6331 .codec_name = "msm-stub-codec.1",
6332 .codec_dai_name = "msm-stub-tx",
6333 .no_pcm = 1,
6334 .dpcm_capture = 1,
6335 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6336 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6337 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6338 .ignore_suspend = 1,
6339 },
6340 /* Secondary AUX PCM Backend DAI Links */
6341 {
6342 .name = LPASS_BE_SEC_AUXPCM_RX,
6343 .stream_name = "Sec AUX PCM Playback",
6344 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6345 .platform_name = "msm-pcm-routing",
6346 .codec_name = "msm-stub-codec.1",
6347 .codec_dai_name = "msm-stub-rx",
6348 .no_pcm = 1,
6349 .dpcm_playback = 1,
6350 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6351 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6352 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6353 .ignore_pmdown_time = 1,
6354 .ignore_suspend = 1,
6355 },
6356 {
6357 .name = LPASS_BE_SEC_AUXPCM_TX,
6358 .stream_name = "Sec AUX PCM Capture",
6359 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6360 .platform_name = "msm-pcm-routing",
6361 .codec_name = "msm-stub-codec.1",
6362 .codec_dai_name = "msm-stub-tx",
6363 .no_pcm = 1,
6364 .dpcm_capture = 1,
6365 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6366 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6367 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6368 .ignore_suspend = 1,
6369 },
6370 /* Tertiary AUX PCM Backend DAI Links */
6371 {
6372 .name = LPASS_BE_TERT_AUXPCM_RX,
6373 .stream_name = "Tert AUX PCM Playback",
6374 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6375 .platform_name = "msm-pcm-routing",
6376 .codec_name = "msm-stub-codec.1",
6377 .codec_dai_name = "msm-stub-rx",
6378 .no_pcm = 1,
6379 .dpcm_playback = 1,
6380 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6381 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6382 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6383 .ignore_suspend = 1,
6384 },
6385 {
6386 .name = LPASS_BE_TERT_AUXPCM_TX,
6387 .stream_name = "Tert AUX PCM Capture",
6388 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6389 .platform_name = "msm-pcm-routing",
6390 .codec_name = "msm-stub-codec.1",
6391 .codec_dai_name = "msm-stub-tx",
6392 .no_pcm = 1,
6393 .dpcm_capture = 1,
6394 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6395 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6396 .ops = &kona_aux_be_ops,
6397 .ignore_suspend = 1,
6398 },
6399 /* Quaternary AUX PCM Backend DAI Links */
6400 {
6401 .name = LPASS_BE_QUAT_AUXPCM_RX,
6402 .stream_name = "Quat AUX PCM Playback",
6403 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6404 .platform_name = "msm-pcm-routing",
6405 .codec_name = "msm-stub-codec.1",
6406 .codec_dai_name = "msm-stub-rx",
6407 .no_pcm = 1,
6408 .dpcm_playback = 1,
6409 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6410 .be_hw_params_fixup = msm_be_hw_params_fixup,
6411 .ops = &kona_aux_be_ops,
6412 .ignore_suspend = 1,
6413 },
6414 {
6415 .name = LPASS_BE_QUAT_AUXPCM_TX,
6416 .stream_name = "Quat AUX PCM Capture",
6417 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6418 .platform_name = "msm-pcm-routing",
6419 .codec_name = "msm-stub-codec.1",
6420 .codec_dai_name = "msm-stub-tx",
6421 .no_pcm = 1,
6422 .dpcm_capture = 1,
6423 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6424 .be_hw_params_fixup = msm_be_hw_params_fixup,
6425 .ops = &kona_aux_be_ops,
6426 .ignore_suspend = 1,
6427 },
6428 /* Quinary AUX PCM Backend DAI Links */
6429 {
6430 .name = LPASS_BE_QUIN_AUXPCM_RX,
6431 .stream_name = "Quin AUX PCM Playback",
6432 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6433 .platform_name = "msm-pcm-routing",
6434 .codec_name = "msm-stub-codec.1",
6435 .codec_dai_name = "msm-stub-rx",
6436 .no_pcm = 1,
6437 .dpcm_playback = 1,
6438 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6439 .be_hw_params_fixup = msm_be_hw_params_fixup,
6440 .ops = &kona_aux_be_ops,
6441 .ignore_suspend = 1,
6442 },
6443 {
6444 .name = LPASS_BE_QUIN_AUXPCM_TX,
6445 .stream_name = "Quin AUX PCM Capture",
6446 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6447 .platform_name = "msm-pcm-routing",
6448 .codec_name = "msm-stub-codec.1",
6449 .codec_dai_name = "msm-stub-tx",
6450 .no_pcm = 1,
6451 .dpcm_capture = 1,
6452 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6453 .be_hw_params_fixup = msm_be_hw_params_fixup,
6454 .ops = &kona_aux_be_ops,
6455 .ignore_suspend = 1,
6456 },
6457 /* Senary AUX PCM Backend DAI Links */
6458 {
6459 .name = LPASS_BE_SEN_AUXPCM_RX,
6460 .stream_name = "Sen AUX PCM Playback",
6461 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6462 .platform_name = "msm-pcm-routing",
6463 .codec_name = "msm-stub-codec.1",
6464 .codec_dai_name = "msm-stub-rx",
6465 .no_pcm = 1,
6466 .dpcm_playback = 1,
6467 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6468 .be_hw_params_fixup = msm_be_hw_params_fixup,
6469 .ops = &kona_aux_be_ops,
6470 .ignore_suspend = 1,
6471 },
6472 {
6473 .name = LPASS_BE_SEN_AUXPCM_TX,
6474 .stream_name = "Sen AUX PCM Capture",
6475 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6476 .platform_name = "msm-pcm-routing",
6477 .codec_name = "msm-stub-codec.1",
6478 .codec_dai_name = "msm-stub-tx",
6479 .no_pcm = 1,
6480 .dpcm_capture = 1,
6481 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6482 .be_hw_params_fixup = msm_be_hw_params_fixup,
6483 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6484 .ignore_suspend = 1,
6485 },
6486};
6487
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6488static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6489 /* WSA CDC DMA Backend DAI Links */
6490 {
6491 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6492 .stream_name = "WSA CDC DMA0 Playback",
6493 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6494 .platform_name = "msm-pcm-routing",
6495 .codec_name = "bolero_codec",
6496 .codec_dai_name = "wsa_macro_rx1",
6497 .no_pcm = 1,
6498 .dpcm_playback = 1,
6499 .init = &msm_int_audrx_init,
6500 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6501 .be_hw_params_fixup = msm_be_hw_params_fixup,
6502 .ignore_pmdown_time = 1,
6503 .ignore_suspend = 1,
6504 .ops = &msm_cdc_dma_be_ops,
6505 },
6506 {
6507 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6508 .stream_name = "WSA CDC DMA1 Playback",
6509 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6510 .platform_name = "msm-pcm-routing",
6511 .codec_name = "bolero_codec",
6512 .codec_dai_name = "wsa_macro_rx_mix",
6513 .no_pcm = 1,
6514 .dpcm_playback = 1,
6515 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6516 .be_hw_params_fixup = msm_be_hw_params_fixup,
6517 .ignore_pmdown_time = 1,
6518 .ignore_suspend = 1,
6519 .ops = &msm_cdc_dma_be_ops,
6520 },
6521 {
6522 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6523 .stream_name = "WSA CDC DMA1 Capture",
6524 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6525 .platform_name = "msm-pcm-routing",
6526 .codec_name = "bolero_codec",
6527 .codec_dai_name = "wsa_macro_echo",
6528 .no_pcm = 1,
6529 .dpcm_capture = 1,
6530 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6531 .be_hw_params_fixup = msm_be_hw_params_fixup,
6532 .ignore_suspend = 1,
6533 .ops = &msm_cdc_dma_be_ops,
6534 },
6535};
6536
6537static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6538 /* RX CDC DMA Backend DAI Links */
6539 {
6540 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6541 .stream_name = "RX CDC DMA0 Playback",
6542 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6543 .platform_name = "msm-pcm-routing",
6544 .codec_name = "bolero_codec",
6545 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6546 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6547 .no_pcm = 1,
6548 .dpcm_playback = 1,
6549 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6550 .be_hw_params_fixup = msm_be_hw_params_fixup,
6551 .ignore_pmdown_time = 1,
6552 .ignore_suspend = 1,
6553 .ops = &msm_cdc_dma_be_ops,
6554 },
6555 {
6556 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6557 .stream_name = "RX CDC DMA1 Playback",
6558 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6559 .platform_name = "msm-pcm-routing",
6560 .codec_name = "bolero_codec",
6561 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6562 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6563 .no_pcm = 1,
6564 .dpcm_playback = 1,
6565 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6566 .be_hw_params_fixup = msm_be_hw_params_fixup,
6567 .ignore_pmdown_time = 1,
6568 .ignore_suspend = 1,
6569 .ops = &msm_cdc_dma_be_ops,
6570 },
6571 {
6572 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6573 .stream_name = "RX CDC DMA2 Playback",
6574 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6575 .platform_name = "msm-pcm-routing",
6576 .codec_name = "bolero_codec",
6577 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6578 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6579 .no_pcm = 1,
6580 .dpcm_playback = 1,
6581 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6582 .be_hw_params_fixup = msm_be_hw_params_fixup,
6583 .ignore_pmdown_time = 1,
6584 .ignore_suspend = 1,
6585 .ops = &msm_cdc_dma_be_ops,
6586 },
6587 {
6588 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6589 .stream_name = "RX CDC DMA3 Playback",
6590 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6591 .platform_name = "msm-pcm-routing",
6592 .codec_name = "bolero_codec",
6593 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6594 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6595 .no_pcm = 1,
6596 .dpcm_playback = 1,
6597 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6598 .be_hw_params_fixup = msm_be_hw_params_fixup,
6599 .ignore_pmdown_time = 1,
6600 .ignore_suspend = 1,
6601 .ops = &msm_cdc_dma_be_ops,
6602 },
6603 /* TX CDC DMA Backend DAI Links */
6604 {
6605 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6606 .stream_name = "TX CDC DMA3 Capture",
6607 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6608 .platform_name = "msm-pcm-routing",
6609 .codec_name = "bolero_codec",
6610 .codec_dai_name = "tx_macro_tx1",
6611 .no_pcm = 1,
6612 .dpcm_capture = 1,
6613 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
6614 .be_hw_params_fixup = msm_be_hw_params_fixup,
6615 .ignore_suspend = 1,
6616 .ops = &msm_cdc_dma_be_ops,
6617 },
6618 {
6619 .name = LPASS_BE_TX_CDC_DMA_TX_4,
6620 .stream_name = "TX CDC DMA4 Capture",
6621 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
6622 .platform_name = "msm-pcm-routing",
6623 .codec_name = "bolero_codec",
6624 .codec_dai_name = "tx_macro_tx2",
6625 .no_pcm = 1,
6626 .dpcm_capture = 1,
6627 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
6628 .be_hw_params_fixup = msm_be_hw_params_fixup,
6629 .ignore_suspend = 1,
6630 .ops = &msm_cdc_dma_be_ops,
6631 },
6632};
6633
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6634static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
6635 {
6636 .name = LPASS_BE_VA_CDC_DMA_TX_0,
6637 .stream_name = "VA CDC DMA0 Capture",
6638 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
6639 .platform_name = "msm-pcm-routing",
6640 .codec_name = "bolero_codec",
6641 .codec_dai_name = "va_macro_tx1",
6642 .no_pcm = 1,
6643 .dpcm_capture = 1,
6644 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
6645 .be_hw_params_fixup = msm_be_hw_params_fixup,
6646 .ignore_suspend = 1,
6647 .ops = &msm_cdc_dma_be_ops,
6648 },
6649 {
6650 .name = LPASS_BE_VA_CDC_DMA_TX_1,
6651 .stream_name = "VA CDC DMA1 Capture",
6652 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
6653 .platform_name = "msm-pcm-routing",
6654 .codec_name = "bolero_codec",
6655 .codec_dai_name = "va_macro_tx2",
6656 .no_pcm = 1,
6657 .dpcm_capture = 1,
6658 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
6659 .be_hw_params_fixup = msm_be_hw_params_fixup,
6660 .ignore_suspend = 1,
6661 .ops = &msm_cdc_dma_be_ops,
6662 },
6663 {
6664 .name = LPASS_BE_VA_CDC_DMA_TX_2,
6665 .stream_name = "VA CDC DMA2 Capture",
6666 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
6667 .platform_name = "msm-pcm-routing",
6668 .codec_name = "bolero_codec",
6669 .codec_dai_name = "va_macro_tx3",
6670 .no_pcm = 1,
6671 .dpcm_capture = 1,
6672 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
6673 .be_hw_params_fixup = msm_be_hw_params_fixup,
6674 .ignore_suspend = 1,
6675 .ops = &msm_cdc_dma_be_ops,
6676 },
6677};
6678
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6679static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
6680 {
6681 .name = LPASS_BE_AFE_LOOPBACK_TX,
6682 .stream_name = "AFE Loopback Capture",
6683 .cpu_dai_name = "msm-dai-q6-dev.24577",
6684 .platform_name = "msm-pcm-routing",
6685 .codec_name = "msm-stub-codec.1",
6686 .codec_dai_name = "msm-stub-tx",
6687 .no_pcm = 1,
6688 .dpcm_capture = 1,
6689 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
6690 .be_hw_params_fixup = msm_be_hw_params_fixup,
6691 .ignore_pmdown_time = 1,
6692 .ignore_suspend = 1,
6693 },
6694};
6695
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6696static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6697 ARRAY_SIZE(msm_common_dai_links) +
6698 ARRAY_SIZE(msm_bolero_fe_dai_links) +
6699 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
6700 ARRAY_SIZE(msm_common_be_dai_links) +
6701 ARRAY_SIZE(msm_mi2s_be_dai_links) +
6702 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
6703 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6704 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6705 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
6706 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6707 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6708 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
6709 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6710
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6711static int msm_populate_dai_link_component_of_node(
6712 struct snd_soc_card *card)
6713{
6714 int i, index, ret = 0;
6715 struct device *cdev = card->dev;
6716 struct snd_soc_dai_link *dai_link = card->dai_link;
6717 struct device_node *np;
6718
6719 if (!cdev) {
6720 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
6721 return -ENODEV;
6722 }
6723
6724 for (i = 0; i < card->num_links; i++) {
6725 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
6726 continue;
6727
6728 /* populate platform_of_node for snd card dai links */
6729 if (dai_link[i].platform_name &&
6730 !dai_link[i].platform_of_node) {
6731 index = of_property_match_string(cdev->of_node,
6732 "asoc-platform-names",
6733 dai_link[i].platform_name);
6734 if (index < 0) {
6735 dev_err(cdev, "%s: No match found for platform name: %s\n",
6736 __func__, dai_link[i].platform_name);
6737 ret = index;
6738 goto err;
6739 }
6740 np = of_parse_phandle(cdev->of_node, "asoc-platform",
6741 index);
6742 if (!np) {
6743 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
6744 __func__, dai_link[i].platform_name,
6745 index);
6746 ret = -ENODEV;
6747 goto err;
6748 }
6749 dai_link[i].platform_of_node = np;
6750 dai_link[i].platform_name = NULL;
6751 }
6752
6753 /* populate cpu_of_node for snd card dai links */
6754 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
6755 index = of_property_match_string(cdev->of_node,
6756 "asoc-cpu-names",
6757 dai_link[i].cpu_dai_name);
6758 if (index >= 0) {
6759 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
6760 index);
6761 if (!np) {
6762 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
6763 __func__,
6764 dai_link[i].cpu_dai_name);
6765 ret = -ENODEV;
6766 goto err;
6767 }
6768 dai_link[i].cpu_of_node = np;
6769 dai_link[i].cpu_dai_name = NULL;
6770 }
6771 }
6772
6773 /* populate codec_of_node for snd card dai links */
6774 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
6775 index = of_property_match_string(cdev->of_node,
6776 "asoc-codec-names",
6777 dai_link[i].codec_name);
6778 if (index < 0)
6779 continue;
6780 np = of_parse_phandle(cdev->of_node, "asoc-codec",
6781 index);
6782 if (!np) {
6783 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
6784 __func__, dai_link[i].codec_name);
6785 ret = -ENODEV;
6786 goto err;
6787 }
6788 dai_link[i].codec_of_node = np;
6789 dai_link[i].codec_name = NULL;
6790 }
6791 }
6792
6793err:
6794 return ret;
6795}
6796
6797static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
6798{
6799 int ret = -EINVAL;
6800 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
6801
6802 if (!component) {
6803 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
6804 return ret;
6805 }
6806
6807 ret = snd_soc_add_component_controls(component, msm_snd_controls,
6808 ARRAY_SIZE(msm_snd_controls));
6809 if (ret < 0) {
6810 dev_err(component->dev,
6811 "%s: add_codec_controls failed, err = %d\n",
6812 __func__, ret);
6813 return ret;
6814 }
6815
6816 return ret;
6817}
6818
6819static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
6820 struct snd_pcm_hw_params *params)
6821{
6822 return 0;
6823}
6824
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6825static struct snd_soc_ops msm_stub_be_ops = {
6826 .hw_params = msm_snd_stub_hw_params,
6827};
6828
6829struct snd_soc_card snd_soc_card_stub_msm = {
6830 .name = "kona-stub-snd-card",
6831};
6832
6833static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
6834 /* FrontEnd DAI Links */
6835 {
6836 .name = "MSMSTUB Media1",
6837 .stream_name = "MultiMedia1",
6838 .cpu_dai_name = "MultiMedia1",
6839 .platform_name = "msm-pcm-dsp.0",
6840 .dynamic = 1,
6841 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6842 .dpcm_playback = 1,
6843 .dpcm_capture = 1,
6844 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6845 SND_SOC_DPCM_TRIGGER_POST},
6846 .codec_dai_name = "snd-soc-dummy-dai",
6847 .codec_name = "snd-soc-dummy",
6848 .ignore_suspend = 1,
6849 /* this dainlink has playback support */
6850 .ignore_pmdown_time = 1,
6851 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6852 },
6853};
6854
6855static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
6856 /* Backend DAI Links */
6857 {
6858 .name = LPASS_BE_AUXPCM_RX,
6859 .stream_name = "AUX PCM Playback",
6860 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6861 .platform_name = "msm-pcm-routing",
6862 .codec_name = "msm-stub-codec.1",
6863 .codec_dai_name = "msm-stub-rx",
6864 .no_pcm = 1,
6865 .dpcm_playback = 1,
6866 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6867 .init = &msm_audrx_stub_init,
6868 .be_hw_params_fixup = msm_be_hw_params_fixup,
6869 .ignore_pmdown_time = 1,
6870 .ignore_suspend = 1,
6871 .ops = &msm_stub_be_ops,
6872 },
6873 {
6874 .name = LPASS_BE_AUXPCM_TX,
6875 .stream_name = "AUX PCM Capture",
6876 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6877 .platform_name = "msm-pcm-routing",
6878 .codec_name = "msm-stub-codec.1",
6879 .codec_dai_name = "msm-stub-tx",
6880 .no_pcm = 1,
6881 .dpcm_capture = 1,
6882 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6883 .be_hw_params_fixup = msm_be_hw_params_fixup,
6884 .ignore_suspend = 1,
6885 .ops = &msm_stub_be_ops,
6886 },
6887};
6888
6889static struct snd_soc_dai_link msm_stub_dai_links[
6890 ARRAY_SIZE(msm_stub_fe_dai_links) +
6891 ARRAY_SIZE(msm_stub_be_dai_links)];
6892
6893static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6894 { .compatible = "qcom,kona-asoc-snd",
6895 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6896 { .compatible = "qcom,kona-asoc-snd-stub",
6897 .data = "stub_codec"},
6898 {},
6899};
6900
6901static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6902{
6903 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6904 struct snd_soc_dai_link *dailink = NULL;
6905 int len_1 = 0;
6906 int len_2 = 0;
6907 int total_links = 0;
6908 int rc = 0;
6909 u32 mi2s_audio_intf = 0;
6910 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6911 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6912 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6913 const struct of_device_id *match;
6914
6915 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
6916 if (!match) {
6917 dev_err(dev, "%s: No DT match found for sound card\n",
6918 __func__);
6919 return NULL;
6920 }
6921
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6922 if (!strcmp(match->data, "codec")) {
6923 card = &snd_soc_card_kona_msm;
6924
6925 memcpy(msm_kona_dai_links + total_links,
6926 msm_common_dai_links,
6927 sizeof(msm_common_dai_links));
6928 total_links += ARRAY_SIZE(msm_common_dai_links);
6929
6930 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6931 msm_bolero_fe_dai_links,
6932 sizeof(msm_bolero_fe_dai_links));
6933 total_links +=
6934 ARRAY_SIZE(msm_bolero_fe_dai_links);
6935
6936 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6937 msm_common_misc_fe_dai_links,
6938 sizeof(msm_common_misc_fe_dai_links));
6939 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
6940
6941 memcpy(msm_kona_dai_links + total_links,
6942 msm_common_be_dai_links,
6943 sizeof(msm_common_be_dai_links));
6944 total_links += ARRAY_SIZE(msm_common_be_dai_links);
6945
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6946 memcpy(msm_kona_dai_links + total_links,
6947 msm_wsa_cdc_dma_be_dai_links,
6948 sizeof(msm_wsa_cdc_dma_be_dai_links));
6949 total_links +=
6950 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
6951
6952 memcpy(msm_kona_dai_links + total_links,
6953 msm_rx_tx_cdc_dma_be_dai_links,
6954 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
6955 total_links +=
6956 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
6957
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6958 memcpy(msm_kona_dai_links + total_links,
6959 msm_va_cdc_dma_be_dai_links,
6960 sizeof(msm_va_cdc_dma_be_dai_links));
6961 total_links +=
6962 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
6963
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6964 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
6965 &mi2s_audio_intf);
6966 if (rc) {
6967 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
6968 __func__);
6969 } else {
6970 if (mi2s_audio_intf) {
6971 memcpy(msm_kona_dai_links + total_links,
6972 msm_mi2s_be_dai_links,
6973 sizeof(msm_mi2s_be_dai_links));
6974 total_links +=
6975 ARRAY_SIZE(msm_mi2s_be_dai_links);
6976 }
6977 }
6978
6979 rc = of_property_read_u32(dev->of_node,
6980 "qcom,auxpcm-audio-intf",
6981 &auxpcm_audio_intf);
6982 if (rc) {
6983 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
6984 __func__);
6985 } else {
6986 if (auxpcm_audio_intf) {
6987 memcpy(msm_kona_dai_links + total_links,
6988 msm_auxpcm_be_dai_links,
6989 sizeof(msm_auxpcm_be_dai_links));
6990 total_links +=
6991 ARRAY_SIZE(msm_auxpcm_be_dai_links);
6992 }
6993 }
6994
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6995 rc = of_property_read_u32(dev->of_node,
6996 "qcom,ext-disp-audio-rx", &val);
6997 if (!rc && val) {
6998 dev_dbg(dev, "%s(): ext disp audio support present\n",
6999 __func__);
7000 memcpy(msm_kona_dai_links + total_links,
7001 ext_disp_be_dai_link,
7002 sizeof(ext_disp_be_dai_link));
7003 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7004 }
7005
7006 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7007 if (!rc && val) {
7008 dev_dbg(dev, "%s(): WCN BT support present\n",
7009 __func__);
7010 memcpy(msm_kona_dai_links + total_links,
7011 msm_wcn_be_dai_links,
7012 sizeof(msm_wcn_be_dai_links));
7013 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7014 }
7015
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7016 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7017 &val);
7018 if (!rc && val) {
7019 memcpy(msm_kona_dai_links + total_links,
7020 msm_afe_rxtx_lb_be_dai_link,
7021 sizeof(msm_afe_rxtx_lb_be_dai_link));
7022 total_links +=
7023 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7024 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7025
7026 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7027 &wcn_btfm_intf);
7028 if (rc) {
7029 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7030 __func__);
7031 } else {
7032 if (wcn_btfm_intf) {
7033 memcpy(msm_kona_dai_links + total_links,
7034 msm_wcn_btfm_be_dai_links,
7035 sizeof(msm_wcn_btfm_be_dai_links));
7036 total_links +=
7037 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7038 }
7039 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7040 dailink = msm_kona_dai_links;
7041 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7042 card = &snd_soc_card_stub_msm;
7043 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7044 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7045
7046 memcpy(msm_stub_dai_links,
7047 msm_stub_fe_dai_links,
7048 sizeof(msm_stub_fe_dai_links));
7049 memcpy(msm_stub_dai_links + len_1,
7050 msm_stub_be_dai_links,
7051 sizeof(msm_stub_be_dai_links));
7052
7053 dailink = msm_stub_dai_links;
7054 total_links = len_2;
7055 }
7056
7057 if (card) {
7058 card->dai_link = dailink;
7059 card->num_links = total_links;
7060 }
7061
7062 return card;
7063}
7064
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7065static int msm_wsa881x_init(struct snd_soc_component *component)
7066{
7067 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7068 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7069 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7070 SPKR_L_BOOST, SPKR_L_VI};
7071 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7072 SPKR_R_BOOST, SPKR_R_VI};
7073 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7074 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7075 struct msm_asoc_mach_data *pdata;
7076 struct snd_soc_dapm_context *dapm;
7077 struct snd_card *card;
7078 struct snd_info_entry *entry;
7079 int ret = 0;
7080
7081 if (!component) {
7082 pr_err("%s component is NULL\n", __func__);
7083 return -EINVAL;
7084 }
7085
7086 card = component->card->snd_card;
7087 dapm = snd_soc_component_get_dapm(component);
7088
7089 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7090 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7091 __func__, component->name);
7092 wsa881x_set_channel_map(component, &spkleft_ports[0],
7093 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7094 &ch_rate[0], &spkleft_port_types[0]);
7095 if (dapm->component) {
7096 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7097 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7098 }
7099 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7100 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7101 __func__, component->name);
7102 wsa881x_set_channel_map(component, &spkright_ports[0],
7103 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7104 &ch_rate[0], &spkright_port_types[0]);
7105 if (dapm->component) {
7106 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7107 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7108 }
7109 } else {
7110 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7111 component->name);
7112 ret = -EINVAL;
7113 goto err;
7114 }
7115 pdata = snd_soc_card_get_drvdata(component->card);
7116 if (!pdata->codec_root) {
7117 entry = snd_info_create_subdir(card->module, "codecs",
7118 card->proc_root);
7119 if (!entry) {
7120 pr_err("%s: Cannot create codecs module entry\n",
7121 __func__);
7122 ret = 0;
7123 goto err;
7124 }
7125 pdata->codec_root = entry;
7126 }
7127 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7128 component);
7129err:
7130 return ret;
7131}
7132
7133static int msm_aux_codec_init(struct snd_soc_component *component)
7134{
7135 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7136 int ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7137 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7138 struct snd_info_entry *entry;
7139 struct snd_card *card = component->card->snd_card;
7140 struct msm_asoc_mach_data *pdata;
7141
7142 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7143 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7144 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7145 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7146 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7147 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7148 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7149 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7150 snd_soc_dapm_sync(dapm);
7151
7152 pdata = snd_soc_card_get_drvdata(component->card);
7153 if (!pdata->codec_root) {
7154 entry = snd_info_create_subdir(card->module, "codecs",
7155 card->proc_root);
7156 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7157 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7158 __func__);
7159 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7160 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7161 }
7162 pdata->codec_root = entry;
7163 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7164 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7165
7166mbhc_cfg_cal:
7167 mbhc_calibration = def_wcd_mbhc_cal();
7168 if (!mbhc_calibration)
7169 return -ENOMEM;
7170 wcd_mbhc_cfg.calibration = mbhc_calibration;
7171 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7172 if (ret) {
7173 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7174 __func__, ret);
7175 goto err_hs_detect;
7176 }
7177 return 0;
7178
7179err_hs_detect:
7180 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7181 return ret;
7182}
7183
7184static int msm_init_aux_dev(struct platform_device *pdev,
7185 struct snd_soc_card *card)
7186{
7187 struct device_node *wsa_of_node;
7188 struct device_node *aux_codec_of_node;
7189 u32 wsa_max_devs;
7190 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7191 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7192 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7193 int i;
7194 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7195 struct aux_codec_dev_info *aux_cdc_dev_info;
7196 const char *auxdev_name_prefix[1];
7197 char *dev_name_str = NULL;
7198 int found = 0;
7199 int codecs_found = 0;
7200 int ret = 0;
7201
7202 /* Get maximum WSA device count for this platform */
7203 ret = of_property_read_u32(pdev->dev.of_node,
7204 "qcom,wsa-max-devs", &wsa_max_devs);
7205 if (ret) {
7206 dev_info(&pdev->dev,
7207 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7208 __func__, pdev->dev.of_node->full_name, ret);
7209 wsa_max_devs = 0;
7210 goto codec_aux_dev;
7211 }
7212 if (wsa_max_devs == 0) {
7213 dev_warn(&pdev->dev,
7214 "%s: Max WSA devices is 0 for this target?\n",
7215 __func__);
7216 goto codec_aux_dev;
7217 }
7218
7219 /* Get count of WSA device phandles for this platform */
7220 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7221 "qcom,wsa-devs", NULL);
7222 if (wsa_dev_cnt == -ENOENT) {
7223 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7224 __func__);
7225 goto err;
7226 } else if (wsa_dev_cnt <= 0) {
7227 dev_err(&pdev->dev,
7228 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7229 __func__, wsa_dev_cnt);
7230 ret = -EINVAL;
7231 goto err;
7232 }
7233
7234 /*
7235 * Expect total phandles count to be NOT less than maximum possible
7236 * WSA count. However, if it is less, then assign same value to
7237 * max count as well.
7238 */
7239 if (wsa_dev_cnt < wsa_max_devs) {
7240 dev_dbg(&pdev->dev,
7241 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7242 __func__, wsa_max_devs, wsa_dev_cnt);
7243 wsa_max_devs = wsa_dev_cnt;
7244 }
7245
7246 /* Make sure prefix string passed for each WSA device */
7247 ret = of_property_count_strings(pdev->dev.of_node,
7248 "qcom,wsa-aux-dev-prefix");
7249 if (ret != wsa_dev_cnt) {
7250 dev_err(&pdev->dev,
7251 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7252 __func__, wsa_dev_cnt, ret);
7253 ret = -EINVAL;
7254 goto err;
7255 }
7256
7257 /*
7258 * Alloc mem to store phandle and index info of WSA device, if already
7259 * registered with ALSA core
7260 */
7261 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7262 sizeof(struct msm_wsa881x_dev_info),
7263 GFP_KERNEL);
7264 if (!wsa881x_dev_info) {
7265 ret = -ENOMEM;
7266 goto err;
7267 }
7268
7269 /*
7270 * search and check whether all WSA devices are already
7271 * registered with ALSA core or not. If found a node, store
7272 * the node and the index in a local array of struct for later
7273 * use.
7274 */
7275 for (i = 0; i < wsa_dev_cnt; i++) {
7276 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7277 "qcom,wsa-devs", i);
7278 if (unlikely(!wsa_of_node)) {
7279 /* we should not be here */
7280 dev_err(&pdev->dev,
7281 "%s: wsa dev node is not present\n",
7282 __func__);
7283 ret = -EINVAL;
7284 goto err;
7285 }
7286 if (soc_find_component(wsa_of_node, NULL)) {
7287 /* WSA device registered with ALSA core */
7288 wsa881x_dev_info[found].of_node = wsa_of_node;
7289 wsa881x_dev_info[found].index = i;
7290 found++;
7291 if (found == wsa_max_devs)
7292 break;
7293 }
7294 }
7295
7296 if (found < wsa_max_devs) {
7297 dev_dbg(&pdev->dev,
7298 "%s: failed to find %d components. Found only %d\n",
7299 __func__, wsa_max_devs, found);
7300 return -EPROBE_DEFER;
7301 }
7302 dev_info(&pdev->dev,
7303 "%s: found %d wsa881x devices registered with ALSA core\n",
7304 __func__, found);
7305
7306codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7307 /* Get maximum aux codec device count for this platform */
7308 ret = of_property_read_u32(pdev->dev.of_node,
7309 "qcom,codec-max-aux-devs",
7310 &codec_max_aux_devs);
7311 if (ret) {
7312 dev_err(&pdev->dev,
7313 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7314 __func__, pdev->dev.of_node->full_name, ret);
7315 codec_max_aux_devs = 0;
7316 goto aux_dev_register;
7317 }
7318 if (codec_max_aux_devs == 0) {
7319 dev_dbg(&pdev->dev,
7320 "%s: Max aux codec devices is 0 for this target?\n",
7321 __func__);
7322 goto aux_dev_register;
7323 }
7324
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7325 /* Get count of aux codec device phandles for this platform */
7326 codec_aux_dev_cnt = of_count_phandle_with_args(
7327 pdev->dev.of_node,
7328 "qcom,codec-aux-devs", NULL);
7329 if (codec_aux_dev_cnt == -ENOENT) {
7330 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7331 __func__);
7332 goto err;
7333 } else if (codec_aux_dev_cnt <= 0) {
7334 dev_err(&pdev->dev,
7335 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7336 __func__, codec_aux_dev_cnt);
7337 ret = -EINVAL;
7338 goto err;
7339 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7340
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7341 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7342 * Expect total phandles count to be NOT less than maximum possible
7343 * AUX device count. However, if it is less, then assign same value to
7344 * max count as well.
7345 */
7346 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7347 dev_dbg(&pdev->dev,
7348 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7349 __func__, codec_max_aux_devs,
7350 codec_aux_dev_cnt);
7351 codec_max_aux_devs = codec_aux_dev_cnt;
7352 }
7353
7354 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7355 * Alloc mem to store phandle and index info of aux codec
7356 * if already registered with ALSA core
7357 */
7358 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7359 sizeof(struct aux_codec_dev_info),
7360 GFP_KERNEL);
7361 if (!aux_cdc_dev_info) {
7362 ret = -ENOMEM;
7363 goto err;
7364 }
7365
7366 /*
7367 * search and check whether all aux codecs are already
7368 * registered with ALSA core or not. If found a node, store
7369 * the node and the index in a local array of struct for later
7370 * use.
7371 */
7372 for (i = 0; i < codec_aux_dev_cnt; i++) {
7373 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7374 "qcom,codec-aux-devs", i);
7375 if (unlikely(!aux_codec_of_node)) {
7376 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7377 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7378 "%s: aux codec dev node is not present\n",
7379 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7380 ret = -EINVAL;
7381 goto err;
7382 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7383 if (soc_find_component(aux_codec_of_node, NULL)) {
7384 /* AUX codec registered with ALSA core */
7385 aux_cdc_dev_info[codecs_found].of_node =
7386 aux_codec_of_node;
7387 aux_cdc_dev_info[codecs_found].index = i;
7388 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7389 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7390 }
7391
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7392 if (codecs_found < codec_aux_dev_cnt) {
7393 dev_dbg(&pdev->dev,
7394 "%s: failed to find %d components. Found only %d\n",
7395 __func__, codec_aux_dev_cnt, codecs_found);
7396 return -EPROBE_DEFER;
7397 }
7398 dev_info(&pdev->dev,
7399 "%s: found %d AUX codecs registered with ALSA core\n",
7400 __func__, codecs_found);
7401
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7402aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7403 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7404 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7405
7406 /* Alloc array of AUX devs struct */
7407 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7408 sizeof(struct snd_soc_aux_dev),
7409 GFP_KERNEL);
7410 if (!msm_aux_dev) {
7411 ret = -ENOMEM;
7412 goto err;
7413 }
7414
7415 /* Alloc array of codec conf struct */
7416 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7417 sizeof(struct snd_soc_codec_conf),
7418 GFP_KERNEL);
7419 if (!msm_codec_conf) {
7420 ret = -ENOMEM;
7421 goto err;
7422 }
7423
7424 for (i = 0; i < wsa_max_devs; i++) {
7425 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7426 GFP_KERNEL);
7427 if (!dev_name_str) {
7428 ret = -ENOMEM;
7429 goto err;
7430 }
7431
7432 ret = of_property_read_string_index(pdev->dev.of_node,
7433 "qcom,wsa-aux-dev-prefix",
7434 wsa881x_dev_info[i].index,
7435 auxdev_name_prefix);
7436 if (ret) {
7437 dev_err(&pdev->dev,
7438 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7439 __func__, ret);
7440 ret = -EINVAL;
7441 goto err;
7442 }
7443
7444 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7445 msm_aux_dev[i].name = dev_name_str;
7446 msm_aux_dev[i].codec_name = NULL;
7447 msm_aux_dev[i].codec_of_node =
7448 wsa881x_dev_info[i].of_node;
7449 msm_aux_dev[i].init = msm_wsa881x_init;
7450 msm_codec_conf[i].dev_name = NULL;
7451 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7452 msm_codec_conf[i].of_node =
7453 wsa881x_dev_info[i].of_node;
7454 }
7455
7456 for (i = 0; i < codec_aux_dev_cnt; i++) {
7457 msm_aux_dev[wsa_max_devs + i].name = NULL;
7458 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7459 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7460 aux_cdc_dev_info[i].of_node;
7461 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7462 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7463 msm_codec_conf[wsa_max_devs + i].name_prefix =
7464 NULL;
7465 msm_codec_conf[wsa_max_devs + i].of_node =
7466 aux_cdc_dev_info[i].of_node;
7467 }
7468
7469 card->codec_conf = msm_codec_conf;
7470 card->aux_dev = msm_aux_dev;
7471err:
7472 return ret;
7473}
7474
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7475static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7476{
7477 int count = 0;
7478 u32 mi2s_master_slave[MI2S_MAX];
7479 int ret = 0;
7480
7481 for (count = 0; count < MI2S_MAX; count++) {
7482 mutex_init(&mi2s_intf_conf[count].lock);
7483 mi2s_intf_conf[count].ref_cnt = 0;
7484 }
7485
7486 ret = of_property_read_u32_array(pdev->dev.of_node,
7487 "qcom,msm-mi2s-master",
7488 mi2s_master_slave, MI2S_MAX);
7489 if (ret) {
7490 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7491 __func__);
7492 } else {
7493 for (count = 0; count < MI2S_MAX; count++) {
7494 mi2s_intf_conf[count].msm_is_mi2s_master =
7495 mi2s_master_slave[count];
7496 }
7497 }
7498}
7499
7500static void msm_i2s_auxpcm_deinit(void)
7501{
7502 int count = 0;
7503
7504 for (count = 0; count < MI2S_MAX; count++) {
7505 mutex_destroy(&mi2s_intf_conf[count].lock);
7506 mi2s_intf_conf[count].ref_cnt = 0;
7507 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7508 }
7509}
7510
7511static int kona_ssr_enable(struct device *dev, void *data)
7512{
7513 struct platform_device *pdev = to_platform_device(dev);
7514 struct snd_soc_card *card = platform_get_drvdata(pdev);
7515 int ret = 0;
7516
7517 if (!card) {
7518 dev_err(dev, "%s: card is NULL\n", __func__);
7519 ret = -EINVAL;
7520 goto err;
7521 }
7522
7523 if (!strcmp(card->name, "kona-stub-snd-card")) {
7524 /* TODO */
7525 dev_dbg(dev, "%s: TODO \n", __func__);
7526 }
7527
7528 snd_soc_card_change_online_state(card, 1);
7529 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7530
7531err:
7532 return ret;
7533}
7534
7535static void kona_ssr_disable(struct device *dev, void *data)
7536{
7537 struct platform_device *pdev = to_platform_device(dev);
7538 struct snd_soc_card *card = platform_get_drvdata(pdev);
7539
7540 if (!card) {
7541 dev_err(dev, "%s: card is NULL\n", __func__);
7542 return;
7543 }
7544
7545 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7546 snd_soc_card_change_online_state(card, 0);
7547
7548 if (!strcmp(card->name, "kona-stub-snd-card")) {
7549 /* TODO */
7550 dev_dbg(dev, "%s: TODO \n", __func__);
7551 }
7552}
7553
7554static const struct snd_event_ops kona_ssr_ops = {
7555 .enable = kona_ssr_enable,
7556 .disable = kona_ssr_disable,
7557};
7558
7559static int msm_audio_ssr_compare(struct device *dev, void *data)
7560{
7561 struct device_node *node = data;
7562
7563 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7564 __func__, dev->of_node, node);
7565 return (dev->of_node && dev->of_node == node);
7566}
7567
7568static int msm_audio_ssr_register(struct device *dev)
7569{
7570 struct device_node *np = dev->of_node;
7571 struct snd_event_clients *ssr_clients = NULL;
7572 struct device_node *node = NULL;
7573 int ret = 0;
7574 int i = 0;
7575
7576 for (i = 0; ; i++) {
7577 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7578 if (!node)
7579 break;
7580 snd_event_mstr_add_client(&ssr_clients,
7581 msm_audio_ssr_compare, node);
7582 }
7583
7584 ret = snd_event_master_register(dev, &kona_ssr_ops,
7585 ssr_clients, NULL);
7586 if (!ret)
7587 snd_event_notify(dev, SND_EVENT_UP);
7588
7589 return ret;
7590}
7591
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7592static int msm_asoc_machine_probe(struct platform_device *pdev)
7593{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7594 struct snd_soc_card *card = NULL;
7595 struct msm_asoc_mach_data *pdata = NULL;
7596 const char *mbhc_audio_jack_type = NULL;
7597 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]7598 uint index = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7599
7600 if (!pdev->dev.of_node) {
7601 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
7602 return -EINVAL;
7603 }
7604
7605 pdata = devm_kzalloc(&pdev->dev,
7606 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
7607 if (!pdata)
7608 return -ENOMEM;
7609
7610 card = populate_snd_card_dailinks(&pdev->dev);
7611 if (!card) {
7612 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
7613 ret = -EINVAL;
7614 goto err;
7615 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7616
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7617 card->dev = &pdev->dev;
7618 platform_set_drvdata(pdev, card);
7619 snd_soc_card_set_drvdata(card, pdata);
7620
7621 ret = snd_soc_of_parse_card_name(card, "qcom,model");
7622 if (ret) {
7623 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
7624 __func__, ret);
7625 goto err;
7626 }
7627
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7628 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
7629 if (ret) {
7630 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
7631 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7632 goto err;
7633 }
7634
7635 ret = msm_populate_dai_link_component_of_node(card);
7636 if (ret) {
7637 ret = -EPROBE_DEFER;
7638 goto err;
7639 }
7640
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7641 ret = msm_init_aux_dev(pdev, card);
7642 if (ret)
7643 goto err;
7644
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7645 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7646 if (ret == -EPROBE_DEFER) {
7647 if (codec_reg_done)
7648 ret = -EINVAL;
7649 goto err;
7650 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7651 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
7652 __func__, ret);
7653 goto err;
7654 }
7655 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
7656 __func__, card->name);
7657
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7658 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
7659 "qcom,hph-en1-gpio", 0);
7660 if (!pdata->hph_en1_gpio_p) {
7661 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7662 __func__, "qcom,hph-en1-gpio",
7663 pdev->dev.of_node->full_name);
7664 }
7665
7666 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
7667 "qcom,hph-en0-gpio", 0);
7668 if (!pdata->hph_en0_gpio_p) {
7669 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7670 __func__, "qcom,hph-en0-gpio",
7671 pdev->dev.of_node->full_name);
7672 }
7673
7674 ret = of_property_read_string(pdev->dev.of_node,
7675 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
7676 if (ret) {
7677 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
7678 __func__, "qcom,mbhc-audio-jack-type",
7679 pdev->dev.of_node->full_name);
7680 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
7681 } else {
7682 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
7683 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7684 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
7685 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
7686 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7687 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
7688 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
7689 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7690 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
7691 } else {
7692 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7693 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
7694 }
7695 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7696 /*
7697 * Parse US-Euro gpio info from DT. Report no error if us-euro
7698 * entry is not found in DT file as some targets do not support
7699 * US-Euro detection
7700 */
7701 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
7702 "qcom,us-euro-gpios", 0);
7703 if (!pdata->us_euro_gpio_p) {
7704 dev_dbg(&pdev->dev, "property %s not detected in node %s",
7705 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
7706 } else {
7707 dev_dbg(&pdev->dev, "%s detected\n",
7708 "qcom,us-euro-gpios");
7709 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
7710 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7711
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]7712 if (wcd_mbhc_cfg.enable_usbc_analog)
7713 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
7714
7715 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
7716 "fsa4480-i2c-handle", 0);
7717 if (!pdata->fsa_handle)
7718 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
7719 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
7720
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7721 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7722 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
7723 "qcom,cdc-dmic01-gpios",
7724 0);
7725 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
7726 "qcom,cdc-dmic23-gpios",
7727 0);
7728 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
7729 "qcom,cdc-dmic45-gpios",
7730 0);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7731
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]7732 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
7733 "qcom,pri-mi2s-gpios", 0);
7734 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
7735 "qcom,sec-mi2s-gpios", 0);
7736 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7737 "qcom,tert-mi2s-gpios", 0);
7738 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7739 "qcom,quat-mi2s-gpios", 0);
7740 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7741 "qcom,quin-mi2s-gpios", 0);
7742 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7743 "qcom,sen-mi2s-gpios", 0);
7744 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
7745 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
7746
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7747 ret = msm_audio_ssr_register(&pdev->dev);
7748 if (ret)
7749 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
7750 __func__, ret);
7751
7752 is_initial_boot = true;
7753
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7754 return 0;
7755err:
7756 devm_kfree(&pdev->dev, pdata);
7757 return ret;
7758}
7759
7760static int msm_asoc_machine_remove(struct platform_device *pdev)
7761{
7762 struct snd_soc_card *card = platform_get_drvdata(pdev);
7763
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7764 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7765 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7766 msm_i2s_auxpcm_deinit();
7767
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7768 return 0;
7769}
7770
7771static struct platform_driver kona_asoc_machine_driver = {
7772 .driver = {
7773 .name = DRV_NAME,
7774 .owner = THIS_MODULE,
7775 .pm = &snd_soc_pm_ops,
7776 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]7777 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7778 },
7779 .probe = msm_asoc_machine_probe,
7780 .remove = msm_asoc_machine_remove,
7781};
7782module_platform_driver(kona_asoc_machine_driver);
7783
7784MODULE_DESCRIPTION("ALSA SoC msm");
7785MODULE_LICENSE("GPL v2");
7786MODULE_ALIAS("platform:" DRV_NAME);
7787MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);