blob: 72181221ea1f24e5d4f7c06c34a9dd07b41235df [file] [log] [blame]
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301/*
2 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/clk.h>
15#include <linux/delay.h>
16#include <linux/gpio.h>
17#include <linux/of_gpio.h>
18#include <linux/platform_device.h>
19#include <linux/slab.h>
20#include <linux/io.h>
21#include <linux/module.h>
22#include <linux/input.h>
23#include <linux/of_device.h>
24#include <linux/pm_qos.h>
25#include <sound/core.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/pcm.h>
29#include <sound/pcm_params.h>
30#include <sound/info.h>
31#include <dsp/audio_notifier.h>
32#include <dsp/q6afe-v2.h>
33#include <dsp/q6core.h>
34#include "device_event.h"
35#include "msm-pcm-routing-v2.h"
36#include "codecs/msm-cdc-pinctrl.h"
37#include "codecs/wcd934x/wcd934x.h"
38#include "codecs/wcd934x/wcd934x-mbhc.h"
Ramprasad Katkam997da402018-08-17 20:20:06 +053039#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053040#include "codecs/wsa881x.h"
41#include "codecs/bolero/bolero-cdc.h"
42#include <dt-bindings/sound/audio-codec-port-types.h>
Aditya Bavanari0b26ab32018-08-03 23:53:01 +053043#include "codecs/bolero/wsa-macro.h"
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +053044#include "codecs/wcd937x/internal.h"
Aditya Bavanari44eb8952018-05-09 19:01:50 +053045
46#define DRV_NAME "sm6150-asoc-snd"
47
48#define __CHIPSET__ "SM6150 "
49#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
50
51#define SAMPLING_RATE_8KHZ 8000
52#define SAMPLING_RATE_11P025KHZ 11025
53#define SAMPLING_RATE_16KHZ 16000
54#define SAMPLING_RATE_22P05KHZ 22050
55#define SAMPLING_RATE_32KHZ 32000
56#define SAMPLING_RATE_44P1KHZ 44100
57#define SAMPLING_RATE_48KHZ 48000
58#define SAMPLING_RATE_88P2KHZ 88200
59#define SAMPLING_RATE_96KHZ 96000
60#define SAMPLING_RATE_176P4KHZ 176400
61#define SAMPLING_RATE_192KHZ 192000
62#define SAMPLING_RATE_352P8KHZ 352800
63#define SAMPLING_RATE_384KHZ 384000
64
65#define WCD9XXX_MBHC_DEF_BUTTONS 8
66#define WCD9XXX_MBHC_DEF_RLOADS 5
67#define CODEC_EXT_CLK_RATE 9600000
68#define ADSP_STATE_READY_TIMEOUT_MS 3000
69#define DEV_NAME_STR_LEN 32
70
71#define WSA8810_NAME_1 "wsa881x.20170211"
72#define WSA8810_NAME_2 "wsa881x.20170212"
73#define WCN_CDC_SLIM_RX_CH_MAX 2
74#define WCN_CDC_SLIM_TX_CH_MAX 3
75#define TDM_CHANNEL_MAX 8
76
77#define ADSP_STATE_READY_TIMEOUT_MS 3000
78#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
79#define MSM_HIFI_ON 1
80
81enum {
82 SLIM_RX_0 = 0,
83 SLIM_RX_1,
84 SLIM_RX_2,
85 SLIM_RX_3,
86 SLIM_RX_4,
87 SLIM_RX_5,
88 SLIM_RX_6,
89 SLIM_RX_7,
90 SLIM_RX_MAX,
91};
92enum {
93 SLIM_TX_0 = 0,
94 SLIM_TX_1,
95 SLIM_TX_2,
96 SLIM_TX_3,
97 SLIM_TX_4,
98 SLIM_TX_5,
99 SLIM_TX_6,
100 SLIM_TX_7,
101 SLIM_TX_8,
102 SLIM_TX_MAX,
103};
104
105enum {
106 PRIM_MI2S = 0,
107 SEC_MI2S,
108 TERT_MI2S,
109 QUAT_MI2S,
110 QUIN_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 PRIM_AUX_PCM = 0,
116 SEC_AUX_PCM,
117 TERT_AUX_PCM,
118 QUAT_AUX_PCM,
119 QUIN_AUX_PCM,
120 AUX_PCM_MAX,
121};
122
123enum {
124 WSA_CDC_DMA_RX_0 = 0,
125 WSA_CDC_DMA_RX_1,
126 RX_CDC_DMA_RX_0,
127 RX_CDC_DMA_RX_1,
128 RX_CDC_DMA_RX_2,
129 RX_CDC_DMA_RX_3,
130 RX_CDC_DMA_RX_5,
131 CDC_DMA_RX_MAX,
132};
133
134enum {
135 WSA_CDC_DMA_TX_0 = 0,
136 WSA_CDC_DMA_TX_1,
137 WSA_CDC_DMA_TX_2,
138 TX_CDC_DMA_TX_0,
139 TX_CDC_DMA_TX_3,
140 TX_CDC_DMA_TX_4,
141 CDC_DMA_TX_MAX,
142};
143
144struct mi2s_conf {
145 struct mutex lock;
146 u32 ref_cnt;
147 u32 msm_is_mi2s_master;
148};
149
150static u32 mi2s_ebit_clk[MI2S_MAX] = {
151 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
152 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
153 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
154 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
155 Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
156};
157
158struct dev_config {
159 u32 sample_rate;
160 u32 bit_format;
161 u32 channels;
162};
163
164enum {
165 DP_RX_IDX = 0,
166 EXT_DISP_RX_IDX_MAX,
167};
168
169struct msm_wsa881x_dev_info {
170 struct device_node *of_node;
171 u32 index;
172};
173
174struct aux_codec_dev_info {
175 struct device_node *of_node;
176 u32 index;
177};
178
179enum pinctrl_pin_state {
180 STATE_DISABLE = 0, /* All pins are in sleep state */
181 STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
182 STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
183};
184
185struct msm_pinctrl_info {
186 struct pinctrl *pinctrl;
187 struct pinctrl_state *mi2s_disable;
188 struct pinctrl_state *tdm_disable;
189 struct pinctrl_state *mi2s_active;
190 struct pinctrl_state *tdm_active;
191 enum pinctrl_pin_state curr_state;
192};
193
194struct msm_asoc_mach_data {
195 struct snd_info_entry *codec_root;
196 struct msm_pinctrl_info pinctrl_info;
197 int usbc_en2_gpio; /* used by gpio driver API */
198 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
199 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
200 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
201 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
202 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
203 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
204};
205
206struct msm_asoc_wcd93xx_codec {
207 void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
208 enum afe_config_type config_type);
209};
210
211static const char *const pin_states[] = {"sleep", "i2s-active",
212 "tdm-active"};
213
214static struct snd_soc_card snd_soc_card_sm6150_msm;
215
216enum {
217 TDM_0 = 0,
218 TDM_1,
219 TDM_2,
220 TDM_3,
221 TDM_4,
222 TDM_5,
223 TDM_6,
224 TDM_7,
225 TDM_PORT_MAX,
226};
227
228enum {
229 TDM_PRI = 0,
230 TDM_SEC,
231 TDM_TERT,
232 TDM_QUAT,
233 TDM_QUIN,
234 TDM_INTERFACE_MAX,
235};
236
237struct tdm_port {
238 u32 mode;
239 u32 channel;
240};
241
242/* TDM default config */
243static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
244 { /* PRI TDM */
245 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
246 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
247 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
248 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
249 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
250 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
251 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
252 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
253 },
254 { /* SEC TDM */
255 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
256 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
257 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
258 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
259 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
260 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
261 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
262 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
263 },
264 { /* TERT TDM */
265 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
266 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
267 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
268 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
269 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
270 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
273 },
274 { /* QUAT TDM */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
279 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
280 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
283 },
284 { /* QUIN TDM */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
289 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
290 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
293 }
294
295};
296
297/* TDM default config */
298static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
299 { /* PRI TDM */
300 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
308 },
309 { /* SEC TDM */
310 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
318 },
319 { /* TERT TDM */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
328 },
329 { /* QUAT TDM */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
338 },
339 { /* QUIN TDM */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
348 }
349};
350
351
352/* Default configuration of slimbus channels */
353static struct dev_config slim_rx_cfg[] = {
354 [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
355 [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
356 [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
357 [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
362};
363
364static struct dev_config slim_tx_cfg[] = {
365 [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368 [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
369 [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
370 [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
371 [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
372 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
373 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374};
375
376/* Default configuration of Codec DMA Interface Tx */
377static struct dev_config cdc_dma_rx_cfg[] = {
378 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
379 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
380 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
381 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
382 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
383 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
384 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
385};
386
387/* Default configuration of Codec DMA Interface Rx */
388static struct dev_config cdc_dma_tx_cfg[] = {
389 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
393 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
394 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
395};
396
397/* Default configuration of external display BE */
398static struct dev_config ext_disp_rx_cfg[] = {
399 [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
400};
401
402static struct dev_config usb_rx_cfg = {
403 .sample_rate = SAMPLING_RATE_48KHZ,
404 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
405 .channels = 2,
406};
407
408static struct dev_config usb_tx_cfg = {
409 .sample_rate = SAMPLING_RATE_48KHZ,
410 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
411 .channels = 1,
412};
413
414static struct dev_config proxy_rx_cfg = {
415 .sample_rate = SAMPLING_RATE_48KHZ,
416 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
417 .channels = 2,
418};
419
420/* Default configuration of MI2S channels */
421static struct dev_config mi2s_rx_cfg[] = {
422 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
423 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
424 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
425 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
426 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
427};
428
429static struct dev_config mi2s_tx_cfg[] = {
430 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
433 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
434 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
435};
436
437static struct dev_config aux_pcm_rx_cfg[] = {
438 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
439 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
442 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
443};
444
445static struct dev_config aux_pcm_tx_cfg[] = {
446 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
447 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
448 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
449 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
450 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
451};
452static int msm_vi_feed_tx_ch = 2;
453static const char *const slim_rx_ch_text[] = {"One", "Two"};
454static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
455 "Five", "Six", "Seven",
456 "Eight"};
457static const char *const vi_feed_ch_text[] = {"One", "Two"};
458static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
459 "S32_LE"};
460static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
461 "S24_3LE"};
462static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
463 "KHZ_32", "KHZ_44P1", "KHZ_48",
464 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
465 "KHZ_192", "KHZ_352P8", "KHZ_384"};
466static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
467 "KHZ_44P1", "KHZ_48",
468 "KHZ_88P2", "KHZ_96"};
469static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
470 "Five", "Six", "Seven",
471 "Eight"};
472static char const *ch_text[] = {"Two", "Three", "Four", "Five",
473 "Six", "Seven", "Eight"};
474static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
475 "KHZ_16", "KHZ_22P05",
476 "KHZ_32", "KHZ_44P1", "KHZ_48",
477 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
478 "KHZ_192", "KHZ_352P8", "KHZ_384"};
479static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
480 "KHZ_192", "KHZ_32", "KHZ_44P1",
481 "KHZ_88P2", "KHZ_176P4" };
482static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
483 "Five", "Six", "Seven", "Eight"};
484static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
485static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
486 "KHZ_48", "KHZ_176P4",
487 "KHZ_352P8"};
488static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
489static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
490 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
491 "KHZ_48", "KHZ_96", "KHZ_192"};
492static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
493 "Five", "Six", "Seven",
494 "Eight"};
495static const char *const hifi_text[] = {"Off", "On"};
496static const char *const qos_text[] = {"Disable", "Enable"};
497
498static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
499static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
500 "Five", "Six", "Seven",
501 "Eight"};
Aditya Bavanari0b26ab32018-08-03 23:53:01 +0530502static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
503 "KHZ_16", "KHZ_22P05",
504 "KHZ_32", "KHZ_44P1", "KHZ_48",
505 "KHZ_88P2", "KHZ_96",
506 "KHZ_176P4", "KHZ_192",
507 "KHZ_352P8", "KHZ_384"};
508
Aditya Bavanari44eb8952018-05-09 19:01:50 +0530509
510static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
512static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
513static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
514static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
515static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
516static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
517static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
518static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
519static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
520static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
521static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
523static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
524static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
525static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
526static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
527static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
528static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
529static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
531static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
533static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
535static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
537 ext_disp_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
539static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
540static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
541static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
542static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
543static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
548static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
549static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
550static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
551static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
552static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
553static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
557static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
558static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
559static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
560static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
562static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
565static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
566static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
567static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
568static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
569static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
570static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
571static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
572static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
573static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
574static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
575static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
576static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
577static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
578static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
579static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
580static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
581static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
582static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
583static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
584static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
585static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
586static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
587static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
590static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
593static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
594static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
595static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
596static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
597static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
598static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
601static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
602static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
603static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
604static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
605 cdc_dma_sample_rate_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
607 cdc_dma_sample_rate_text);
608static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
609 cdc_dma_sample_rate_text);
610static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
611 cdc_dma_sample_rate_text);
612static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
613 cdc_dma_sample_rate_text);
614static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
615 cdc_dma_sample_rate_text);
616static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
617 cdc_dma_sample_rate_text);
618static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
619 cdc_dma_sample_rate_text);
620static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
621 cdc_dma_sample_rate_text);
622static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
623 cdc_dma_sample_rate_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
625 cdc_dma_sample_rate_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
627 cdc_dma_sample_rate_text);
628static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
629 cdc_dma_sample_rate_text);
630
631static struct platform_device *spdev;
632
633static int msm_hifi_control;
634static bool is_initial_boot;
635static bool codec_reg_done;
636static struct snd_soc_aux_dev *msm_aux_dev;
637static struct snd_soc_codec_conf *msm_codec_conf;
638static struct msm_asoc_wcd93xx_codec msm_codec_fn;
639
640static int dmic_0_1_gpio_cnt;
641static int dmic_2_3_gpio_cnt;
642
643static void *def_wcd_mbhc_cal(void);
644static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
645 int enable, bool dapm);
646static int msm_wsa881x_init(struct snd_soc_component *component);
647static int msm_aux_codec_init(struct snd_soc_component *component);
648
649/*
650 * Need to report LINEIN
651 * if R/L channel impedance is larger than 5K ohm
652 */
653static struct wcd_mbhc_config wcd_mbhc_cfg = {
654 .read_fw_bin = false,
655 .calibration = NULL,
656 .detect_extn_cable = true,
657 .mono_stero_detection = false,
658 .swap_gnd_mic = NULL,
659 .hs_ext_micbias = true,
660 .key_code[0] = KEY_MEDIA,
661 .key_code[1] = KEY_VOICECOMMAND,
662 .key_code[2] = KEY_VOLUMEUP,
663 .key_code[3] = KEY_VOLUMEDOWN,
664 .key_code[4] = 0,
665 .key_code[5] = 0,
666 .key_code[6] = 0,
667 .key_code[7] = 0,
668 .linein_th = 5000,
669 .moisture_en = true,
670 .mbhc_micbias = MIC_BIAS_2,
671 .anc_micbias = MIC_BIAS_2,
672 .enable_anc_mic_detect = false,
673};
674
675static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
676 {"MIC BIAS1", NULL, "MCLK TX"},
677 {"MIC BIAS2", NULL, "MCLK TX"},
678 {"MIC BIAS3", NULL, "MCLK TX"},
679 {"MIC BIAS4", NULL, "MCLK TX"},
680};
681
682static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
683 {
684 AFE_API_VERSION_I2S_CONFIG,
685 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
686 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
687 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
688 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
689 0,
690 },
691 {
692 AFE_API_VERSION_I2S_CONFIG,
693 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
694 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
695 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
696 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
697 0,
698 },
699 {
700 AFE_API_VERSION_I2S_CONFIG,
701 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
702 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
703 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
704 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
705 0,
706 },
707 {
708 AFE_API_VERSION_I2S_CONFIG,
709 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
710 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
711 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
712 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
713 0,
714 },
715 {
716 AFE_API_VERSION_I2S_CONFIG,
717 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
718 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
719 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
720 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
721 0,
722 }
723
724};
725
726static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
727
728static int slim_get_sample_rate_val(int sample_rate)
729{
730 int sample_rate_val = 0;
731
732 switch (sample_rate) {
733 case SAMPLING_RATE_8KHZ:
734 sample_rate_val = 0;
735 break;
736 case SAMPLING_RATE_16KHZ:
737 sample_rate_val = 1;
738 break;
739 case SAMPLING_RATE_32KHZ:
740 sample_rate_val = 2;
741 break;
742 case SAMPLING_RATE_44P1KHZ:
743 sample_rate_val = 3;
744 break;
745 case SAMPLING_RATE_48KHZ:
746 sample_rate_val = 4;
747 break;
748 case SAMPLING_RATE_88P2KHZ:
749 sample_rate_val = 5;
750 break;
751 case SAMPLING_RATE_96KHZ:
752 sample_rate_val = 6;
753 break;
754 case SAMPLING_RATE_176P4KHZ:
755 sample_rate_val = 7;
756 break;
757 case SAMPLING_RATE_192KHZ:
758 sample_rate_val = 8;
759 break;
760 case SAMPLING_RATE_352P8KHZ:
761 sample_rate_val = 9;
762 break;
763 case SAMPLING_RATE_384KHZ:
764 sample_rate_val = 10;
765 break;
766 default:
767 sample_rate_val = 4;
768 break;
769 }
770 return sample_rate_val;
771}
772
773static int slim_get_sample_rate(int value)
774{
775 int sample_rate = 0;
776
777 switch (value) {
778 case 0:
779 sample_rate = SAMPLING_RATE_8KHZ;
780 break;
781 case 1:
782 sample_rate = SAMPLING_RATE_16KHZ;
783 break;
784 case 2:
785 sample_rate = SAMPLING_RATE_32KHZ;
786 break;
787 case 3:
788 sample_rate = SAMPLING_RATE_44P1KHZ;
789 break;
790 case 4:
791 sample_rate = SAMPLING_RATE_48KHZ;
792 break;
793 case 5:
794 sample_rate = SAMPLING_RATE_88P2KHZ;
795 break;
796 case 6:
797 sample_rate = SAMPLING_RATE_96KHZ;
798 break;
799 case 7:
800 sample_rate = SAMPLING_RATE_176P4KHZ;
801 break;
802 case 8:
803 sample_rate = SAMPLING_RATE_192KHZ;
804 break;
805 case 9:
806 sample_rate = SAMPLING_RATE_352P8KHZ;
807 break;
808 case 10:
809 sample_rate = SAMPLING_RATE_384KHZ;
810 break;
811 default:
812 sample_rate = SAMPLING_RATE_48KHZ;
813 break;
814 }
815 return sample_rate;
816}
817
818static int slim_get_bit_format_val(int bit_format)
819{
820 int val = 0;
821
822 switch (bit_format) {
823 case SNDRV_PCM_FORMAT_S32_LE:
824 val = 3;
825 break;
826 case SNDRV_PCM_FORMAT_S24_3LE:
827 val = 2;
828 break;
829 case SNDRV_PCM_FORMAT_S24_LE:
830 val = 1;
831 break;
832 case SNDRV_PCM_FORMAT_S16_LE:
833 default:
834 val = 0;
835 break;
836 }
837 return val;
838}
839
840static int slim_get_bit_format(int val)
841{
842 int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
843
844 switch (val) {
845 case 0:
846 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
847 break;
848 case 1:
849 bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
850 break;
851 case 2:
852 bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
853 break;
854 case 3:
855 bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
856 break;
857 default:
858 bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
859 break;
860 }
861 return bit_fmt;
862}
863
864static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
865{
866 int port_id = 0;
867
868 if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
869 port_id = SLIM_RX_0;
870 } else if (strnstr(kcontrol->id.name,
871 "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
872 port_id = SLIM_RX_2;
873 } else if (strnstr(kcontrol->id.name,
874 "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
875 port_id = SLIM_RX_5;
876 } else if (strnstr(kcontrol->id.name,
877 "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
878 port_id = SLIM_RX_6;
879 } else if (strnstr(kcontrol->id.name,
880 "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
881 port_id = SLIM_TX_0;
882 } else if (strnstr(kcontrol->id.name,
883 "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
884 port_id = SLIM_TX_1;
885 } else {
886 pr_err("%s: unsupported channel: %s\n",
887 __func__, kcontrol->id.name);
888 return -EINVAL;
889 }
890
891 return port_id;
892}
893
894static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
895 struct snd_ctl_elem_value *ucontrol)
896{
897 int ch_num = slim_get_port_idx(kcontrol);
898
899 if (ch_num < 0)
900 return ch_num;
901
902 ucontrol->value.enumerated.item[0] =
903 slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
904
905 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
906 ch_num, slim_rx_cfg[ch_num].sample_rate,
907 ucontrol->value.enumerated.item[0]);
908
909 return 0;
910}
911
912static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
913 struct snd_ctl_elem_value *ucontrol)
914{
915 int ch_num = slim_get_port_idx(kcontrol);
916
917 if (ch_num < 0)
918 return ch_num;
919
920 slim_rx_cfg[ch_num].sample_rate =
921 slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
922
923 pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
924 ch_num, slim_rx_cfg[ch_num].sample_rate,
925 ucontrol->value.enumerated.item[0]);
926
927 return 0;
928}
929
930static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
931 struct snd_ctl_elem_value *ucontrol)
932{
933 int ch_num = slim_get_port_idx(kcontrol);
934
935 if (ch_num < 0)
936 return ch_num;
937
938 ucontrol->value.enumerated.item[0] =
939 slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
940
941 pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
942 ch_num, slim_tx_cfg[ch_num].sample_rate,
943 ucontrol->value.enumerated.item[0]);
944
945 return 0;
946}
947
948static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
949 struct snd_ctl_elem_value *ucontrol)
950{
951 int sample_rate = 0;
952 int ch_num = slim_get_port_idx(kcontrol);
953
954 if (ch_num < 0)
955 return ch_num;
956
957 sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
958 if (sample_rate == SAMPLING_RATE_44P1KHZ) {
959 pr_err("%s: Unsupported sample rate %d: for Tx path\n",
960 __func__, sample_rate);
961 return -EINVAL;
962 }
963 slim_tx_cfg[ch_num].sample_rate = sample_rate;
964
965 pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
966 ch_num, slim_tx_cfg[ch_num].sample_rate,
967 ucontrol->value.enumerated.item[0]);
968
969 return 0;
970}
971
972static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
973 struct snd_ctl_elem_value *ucontrol)
974{
975 int ch_num = slim_get_port_idx(kcontrol);
976
977 if (ch_num < 0)
978 return ch_num;
979
980 ucontrol->value.enumerated.item[0] =
981 slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
982
983 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
984 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
985 ucontrol->value.enumerated.item[0]);
986
987 return 0;
988}
989
990static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
991 struct snd_ctl_elem_value *ucontrol)
992{
993 int ch_num = slim_get_port_idx(kcontrol);
994
995 if (ch_num < 0)
996 return ch_num;
997
998 slim_rx_cfg[ch_num].bit_format =
999 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1000
1001 pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
1002 __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
1003 ucontrol->value.enumerated.item[0]);
1004
1005 return 0;
1006}
1007
1008static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
1009 struct snd_ctl_elem_value *ucontrol)
1010{
1011 int ch_num = slim_get_port_idx(kcontrol);
1012
1013 if (ch_num < 0)
1014 return ch_num;
1015
1016 ucontrol->value.enumerated.item[0] =
1017 slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
1018
1019 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1020 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1021 ucontrol->value.enumerated.item[0]);
1022
1023 return 0;
1024}
1025
1026static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 int ch_num = slim_get_port_idx(kcontrol);
1030
1031 if (ch_num < 0)
1032 return ch_num;
1033
1034 slim_tx_cfg[ch_num].bit_format =
1035 slim_get_bit_format(ucontrol->value.enumerated.item[0]);
1036
1037 pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
1038 __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
1039 ucontrol->value.enumerated.item[0]);
1040
1041 return 0;
1042}
1043
1044static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
1045 struct snd_ctl_elem_value *ucontrol)
1046{
1047 int ch_num = slim_get_port_idx(kcontrol);
1048
1049 if (ch_num < 0)
1050 return ch_num;
1051
1052 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1053 ch_num, slim_rx_cfg[ch_num].channels);
1054 ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
1055
1056 return 0;
1057}
1058
1059static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
1060 struct snd_ctl_elem_value *ucontrol)
1061{
1062 int ch_num = slim_get_port_idx(kcontrol);
1063
1064 if (ch_num < 0)
1065 return ch_num;
1066
1067 slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1068 pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
1069 ch_num, slim_rx_cfg[ch_num].channels);
1070
1071 return 1;
1072}
1073
1074static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
1075 struct snd_ctl_elem_value *ucontrol)
1076{
1077 int ch_num = slim_get_port_idx(kcontrol);
1078
1079 if (ch_num < 0)
1080 return ch_num;
1081
1082 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1083 ch_num, slim_tx_cfg[ch_num].channels);
1084 ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
1085
1086 return 0;
1087}
1088
1089static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
1090 struct snd_ctl_elem_value *ucontrol)
1091{
1092 int ch_num = slim_get_port_idx(kcontrol);
1093
1094 if (ch_num < 0)
1095 return ch_num;
1096
1097 slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
1098 pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
1099 ch_num, slim_tx_cfg[ch_num].channels);
1100
1101 return 1;
1102}
1103
1104static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1105 struct snd_ctl_elem_value *ucontrol)
1106{
1107 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1108 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1109 ucontrol->value.integer.value[0]);
1110 return 0;
1111}
1112
1113static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1114 struct snd_ctl_elem_value *ucontrol)
1115{
1116 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1117
1118 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1119 return 1;
1120}
1121
1122static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
1123 struct snd_ctl_elem_value *ucontrol)
1124{
1125 /*
1126 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
1127 * when used for BT_SCO use case. Return either Rx or Tx sample rate
1128 * value.
1129 */
1130 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
1131 case SAMPLING_RATE_96KHZ:
1132 ucontrol->value.integer.value[0] = 5;
1133 break;
1134 case SAMPLING_RATE_88P2KHZ:
1135 ucontrol->value.integer.value[0] = 4;
1136 break;
1137 case SAMPLING_RATE_48KHZ:
1138 ucontrol->value.integer.value[0] = 3;
1139 break;
1140 case SAMPLING_RATE_44P1KHZ:
1141 ucontrol->value.integer.value[0] = 2;
1142 break;
1143 case SAMPLING_RATE_16KHZ:
1144 ucontrol->value.integer.value[0] = 1;
1145 break;
1146 case SAMPLING_RATE_8KHZ:
1147 default:
1148 ucontrol->value.integer.value[0] = 0;
1149 break;
1150 }
1151 pr_debug("%s: sample rate = %d\n", __func__,
1152 slim_rx_cfg[SLIM_RX_7].sample_rate);
1153
1154 return 0;
1155}
1156
1157static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
1158 struct snd_ctl_elem_value *ucontrol)
1159{
1160 switch (ucontrol->value.integer.value[0]) {
1161 case 1:
1162 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
1163 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
1164 break;
1165 case 2:
1166 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1167 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
1168 break;
1169 case 3:
1170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
1171 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
1172 break;
1173 case 4:
1174 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1175 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
1176 break;
1177 case 5:
1178 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
1179 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
1180 break;
1181 case 0:
1182 default:
1183 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
1184 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
1185 break;
1186 }
1187 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
1188 __func__,
1189 slim_rx_cfg[SLIM_RX_7].sample_rate,
1190 slim_tx_cfg[SLIM_TX_7].sample_rate,
1191 ucontrol->value.enumerated.item[0]);
1192
1193 return 0;
1194}
1195
1196static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
1197{
1198 int idx = 0;
1199
1200 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
1201 sizeof("WSA_CDC_DMA_RX_0")))
1202 idx = WSA_CDC_DMA_RX_0;
1203 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
1204 sizeof("WSA_CDC_DMA_RX_0")))
1205 idx = WSA_CDC_DMA_RX_1;
1206 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
1207 sizeof("RX_CDC_DMA_RX_0")))
1208 idx = RX_CDC_DMA_RX_0;
1209 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
1210 sizeof("RX_CDC_DMA_RX_1")))
1211 idx = RX_CDC_DMA_RX_1;
1212 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
1213 sizeof("RX_CDC_DMA_RX_2")))
1214 idx = RX_CDC_DMA_RX_2;
1215 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
1216 sizeof("RX_CDC_DMA_RX_3")))
1217 idx = RX_CDC_DMA_RX_3;
1218 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
1219 sizeof("RX_CDC_DMA_RX_5")))
1220 idx = RX_CDC_DMA_RX_5;
1221 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
1222 sizeof("WSA_CDC_DMA_TX_0")))
1223 idx = WSA_CDC_DMA_TX_0;
1224 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
1225 sizeof("WSA_CDC_DMA_TX_1")))
1226 idx = WSA_CDC_DMA_TX_1;
1227 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
1228 sizeof("WSA_CDC_DMA_TX_2")))
1229 idx = WSA_CDC_DMA_TX_2;
1230 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
1231 sizeof("TX_CDC_DMA_TX_0")))
1232 idx = TX_CDC_DMA_TX_0;
1233 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
1234 sizeof("TX_CDC_DMA_TX_3")))
1235 idx = TX_CDC_DMA_TX_3;
1236 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
1237 sizeof("TX_CDC_DMA_TX_4")))
1238 idx = TX_CDC_DMA_TX_4;
1239 else {
1240 pr_err("%s: unsupported channel: %s\n",
1241 __func__, kcontrol->id.name);
1242 return -EINVAL;
1243 }
1244
1245 return idx;
1246}
1247
1248static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
1249 struct snd_ctl_elem_value *ucontrol)
1250{
1251 int ch_num = cdc_dma_get_port_idx(kcontrol);
1252
1253 if (ch_num < 0)
1254 return ch_num;
1255
1256 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1257 cdc_dma_rx_cfg[ch_num].channels - 1);
1258 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
1259 return 0;
1260}
1261
1262static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
1263 struct snd_ctl_elem_value *ucontrol)
1264{
1265 int ch_num = cdc_dma_get_port_idx(kcontrol);
1266
1267 if (ch_num < 0)
1268 return ch_num;
1269
1270 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1271
1272 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
1273 cdc_dma_rx_cfg[ch_num].channels);
1274 return 1;
1275}
1276
1277static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
1278 struct snd_ctl_elem_value *ucontrol)
1279{
1280 int ch_num = cdc_dma_get_port_idx(kcontrol);
1281
1282 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
1283 case SNDRV_PCM_FORMAT_S32_LE:
1284 ucontrol->value.integer.value[0] = 3;
1285 break;
1286 case SNDRV_PCM_FORMAT_S24_3LE:
1287 ucontrol->value.integer.value[0] = 2;
1288 break;
1289 case SNDRV_PCM_FORMAT_S24_LE:
1290 ucontrol->value.integer.value[0] = 1;
1291 break;
1292 case SNDRV_PCM_FORMAT_S16_LE:
1293 default:
1294 ucontrol->value.integer.value[0] = 0;
1295 break;
1296 }
1297
1298 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1299 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1300 ucontrol->value.integer.value[0]);
1301 return 0;
1302}
1303
1304static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
1305 struct snd_ctl_elem_value *ucontrol)
1306{
1307 int rc = 0;
1308 int ch_num = cdc_dma_get_port_idx(kcontrol);
1309
1310 switch (ucontrol->value.integer.value[0]) {
1311 case 3:
1312 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1313 break;
1314 case 2:
1315 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1316 break;
1317 case 1:
1318 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1319 break;
1320 case 0:
1321 default:
1322 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1323 break;
1324 }
1325 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
1326 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
1327 ucontrol->value.integer.value[0]);
1328
1329 return rc;
1330}
1331
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301332
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301333static int cdc_dma_get_sample_rate_val(int sample_rate)
1334{
1335 int sample_rate_val = 0;
1336
1337 switch (sample_rate) {
1338 case SAMPLING_RATE_8KHZ:
1339 sample_rate_val = 0;
1340 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301341 case SAMPLING_RATE_11P025KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301342 sample_rate_val = 1;
1343 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301344 case SAMPLING_RATE_16KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301345 sample_rate_val = 2;
1346 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301347 case SAMPLING_RATE_22P05KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301348 sample_rate_val = 3;
1349 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301350 case SAMPLING_RATE_32KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301351 sample_rate_val = 4;
1352 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301353 case SAMPLING_RATE_44P1KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301354 sample_rate_val = 5;
1355 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301356 case SAMPLING_RATE_48KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301357 sample_rate_val = 6;
1358 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301359 case SAMPLING_RATE_88P2KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301360 sample_rate_val = 7;
1361 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301362 case SAMPLING_RATE_96KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301363 sample_rate_val = 8;
1364 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301365 case SAMPLING_RATE_176P4KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301366 sample_rate_val = 9;
1367 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301368 case SAMPLING_RATE_192KHZ:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301369 sample_rate_val = 10;
1370 break;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301371 case SAMPLING_RATE_352P8KHZ:
1372 sample_rate_val = 11;
1373 break;
1374 case SAMPLING_RATE_384KHZ:
1375 sample_rate_val = 12;
1376 break;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301377 default:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301378 sample_rate_val = 6;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301379 break;
1380 }
1381 return sample_rate_val;
1382}
1383
1384static int cdc_dma_get_sample_rate(int value)
1385{
1386 int sample_rate = 0;
1387
1388 switch (value) {
1389 case 0:
1390 sample_rate = SAMPLING_RATE_8KHZ;
1391 break;
1392 case 1:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301393 sample_rate = SAMPLING_RATE_11P025KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301394 break;
1395 case 2:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301396 sample_rate = SAMPLING_RATE_16KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301397 break;
1398 case 3:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301399 sample_rate = SAMPLING_RATE_22P05KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301400 break;
1401 case 4:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301402 sample_rate = SAMPLING_RATE_32KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301403 break;
1404 case 5:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301405 sample_rate = SAMPLING_RATE_44P1KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301406 break;
1407 case 6:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301408 sample_rate = SAMPLING_RATE_48KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301409 break;
1410 case 7:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301411 sample_rate = SAMPLING_RATE_88P2KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301412 break;
1413 case 8:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301414 sample_rate = SAMPLING_RATE_96KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301415 break;
1416 case 9:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301417 sample_rate = SAMPLING_RATE_176P4KHZ;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301418 break;
1419 case 10:
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05301420 sample_rate = SAMPLING_RATE_192KHZ;
1421 break;
1422 case 11:
1423 sample_rate = SAMPLING_RATE_352P8KHZ;
1424 break;
1425 case 12:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301426 sample_rate = SAMPLING_RATE_384KHZ;
1427 break;
1428 default:
1429 sample_rate = SAMPLING_RATE_48KHZ;
1430 break;
1431 }
1432 return sample_rate;
1433}
1434
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301435static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1436 struct snd_ctl_elem_value *ucontrol)
1437{
1438 int ch_num = cdc_dma_get_port_idx(kcontrol);
1439
1440 if (ch_num < 0)
1441 return ch_num;
1442
1443 ucontrol->value.enumerated.item[0] =
1444 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
1445
1446 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
1447 cdc_dma_rx_cfg[ch_num].sample_rate);
1448 return 0;
1449}
1450
1451static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1452 struct snd_ctl_elem_value *ucontrol)
1453{
1454 int ch_num = cdc_dma_get_port_idx(kcontrol);
1455
1456 if (ch_num < 0)
1457 return ch_num;
1458
1459 cdc_dma_rx_cfg[ch_num].sample_rate =
1460 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
1461
1462
1463 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
1464 __func__, ucontrol->value.enumerated.item[0],
1465 cdc_dma_rx_cfg[ch_num].sample_rate);
1466 return 0;
1467}
1468
1469static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
1470 struct snd_ctl_elem_value *ucontrol)
1471{
1472 int ch_num = cdc_dma_get_port_idx(kcontrol);
1473
1474 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1475 cdc_dma_tx_cfg[ch_num].channels);
1476 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
1477 return 0;
1478}
1479
1480static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
1481 struct snd_ctl_elem_value *ucontrol)
1482{
1483 int ch_num = cdc_dma_get_port_idx(kcontrol);
1484
1485 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
1486
1487 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
1488 cdc_dma_tx_cfg[ch_num].channels);
1489 return 1;
1490}
1491
1492static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1493 struct snd_ctl_elem_value *ucontrol)
1494{
1495 int sample_rate_val;
1496 int ch_num = cdc_dma_get_port_idx(kcontrol);
1497
1498 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
1499 case SAMPLING_RATE_384KHZ:
1500 sample_rate_val = 12;
1501 break;
1502 case SAMPLING_RATE_352P8KHZ:
1503 sample_rate_val = 11;
1504 break;
1505 case SAMPLING_RATE_192KHZ:
1506 sample_rate_val = 10;
1507 break;
1508 case SAMPLING_RATE_176P4KHZ:
1509 sample_rate_val = 9;
1510 break;
1511 case SAMPLING_RATE_96KHZ:
1512 sample_rate_val = 8;
1513 break;
1514 case SAMPLING_RATE_88P2KHZ:
1515 sample_rate_val = 7;
1516 break;
1517 case SAMPLING_RATE_48KHZ:
1518 sample_rate_val = 6;
1519 break;
1520 case SAMPLING_RATE_44P1KHZ:
1521 sample_rate_val = 5;
1522 break;
1523 case SAMPLING_RATE_32KHZ:
1524 sample_rate_val = 4;
1525 break;
1526 case SAMPLING_RATE_22P05KHZ:
1527 sample_rate_val = 3;
1528 break;
1529 case SAMPLING_RATE_16KHZ:
1530 sample_rate_val = 2;
1531 break;
1532 case SAMPLING_RATE_11P025KHZ:
1533 sample_rate_val = 1;
1534 break;
1535 case SAMPLING_RATE_8KHZ:
1536 sample_rate_val = 0;
1537 break;
1538 default:
1539 sample_rate_val = 6;
1540 break;
1541 }
1542
1543 ucontrol->value.integer.value[0] = sample_rate_val;
1544 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
1545 cdc_dma_tx_cfg[ch_num].sample_rate);
1546 return 0;
1547}
1548
1549static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1551{
1552 int ch_num = cdc_dma_get_port_idx(kcontrol);
1553
1554 switch (ucontrol->value.integer.value[0]) {
1555 case 12:
1556 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
1557 break;
1558 case 11:
1559 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
1560 break;
1561 case 10:
1562 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
1563 break;
1564 case 9:
1565 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
1566 break;
1567 case 8:
1568 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
1569 break;
1570 case 7:
1571 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
1572 break;
1573 case 6:
1574 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1575 break;
1576 case 5:
1577 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
1578 break;
1579 case 4:
1580 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
1581 break;
1582 case 3:
1583 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
1584 break;
1585 case 2:
1586 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
1587 break;
1588 case 1:
1589 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
1590 break;
1591 case 0:
1592 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
1593 break;
1594 default:
1595 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
1596 break;
1597 }
1598
1599 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
1600 __func__, ucontrol->value.integer.value[0],
1601 cdc_dma_tx_cfg[ch_num].sample_rate);
1602 return 0;
1603}
1604
1605static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
1606 struct snd_ctl_elem_value *ucontrol)
1607{
1608 int ch_num = cdc_dma_get_port_idx(kcontrol);
1609
1610 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
1611 case SNDRV_PCM_FORMAT_S32_LE:
1612 ucontrol->value.integer.value[0] = 3;
1613 break;
1614 case SNDRV_PCM_FORMAT_S24_3LE:
1615 ucontrol->value.integer.value[0] = 2;
1616 break;
1617 case SNDRV_PCM_FORMAT_S24_LE:
1618 ucontrol->value.integer.value[0] = 1;
1619 break;
1620 case SNDRV_PCM_FORMAT_S16_LE:
1621 default:
1622 ucontrol->value.integer.value[0] = 0;
1623 break;
1624 }
1625
1626 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1627 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1628 ucontrol->value.integer.value[0]);
1629 return 0;
1630}
1631
1632static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
1633 struct snd_ctl_elem_value *ucontrol)
1634{
1635 int rc = 0;
1636 int ch_num = cdc_dma_get_port_idx(kcontrol);
1637
1638 switch (ucontrol->value.integer.value[0]) {
1639 case 3:
1640 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
1641 break;
1642 case 2:
1643 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1644 break;
1645 case 1:
1646 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1647 break;
1648 case 0:
1649 default:
1650 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1651 break;
1652 }
1653 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
1654 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
1655 ucontrol->value.integer.value[0]);
1656
1657 return rc;
1658}
1659
Aditya Bavanari44eb8952018-05-09 19:01:50 +05301660static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1662{
1663 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1664 usb_rx_cfg.channels);
1665 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1666 return 0;
1667}
1668
1669static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1670 struct snd_ctl_elem_value *ucontrol)
1671{
1672 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1673
1674 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1675 return 1;
1676}
1677
1678static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1679 struct snd_ctl_elem_value *ucontrol)
1680{
1681 int sample_rate_val;
1682
1683 switch (usb_rx_cfg.sample_rate) {
1684 case SAMPLING_RATE_384KHZ:
1685 sample_rate_val = 12;
1686 break;
1687 case SAMPLING_RATE_352P8KHZ:
1688 sample_rate_val = 11;
1689 break;
1690 case SAMPLING_RATE_192KHZ:
1691 sample_rate_val = 10;
1692 break;
1693 case SAMPLING_RATE_176P4KHZ:
1694 sample_rate_val = 9;
1695 break;
1696 case SAMPLING_RATE_96KHZ:
1697 sample_rate_val = 8;
1698 break;
1699 case SAMPLING_RATE_88P2KHZ:
1700 sample_rate_val = 7;
1701 break;
1702 case SAMPLING_RATE_48KHZ:
1703 sample_rate_val = 6;
1704 break;
1705 case SAMPLING_RATE_44P1KHZ:
1706 sample_rate_val = 5;
1707 break;
1708 case SAMPLING_RATE_32KHZ:
1709 sample_rate_val = 4;
1710 break;
1711 case SAMPLING_RATE_22P05KHZ:
1712 sample_rate_val = 3;
1713 break;
1714 case SAMPLING_RATE_16KHZ:
1715 sample_rate_val = 2;
1716 break;
1717 case SAMPLING_RATE_11P025KHZ:
1718 sample_rate_val = 1;
1719 break;
1720 case SAMPLING_RATE_8KHZ:
1721 default:
1722 sample_rate_val = 0;
1723 break;
1724 }
1725
1726 ucontrol->value.integer.value[0] = sample_rate_val;
1727 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
1728 usb_rx_cfg.sample_rate);
1729 return 0;
1730}
1731
1732static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1733 struct snd_ctl_elem_value *ucontrol)
1734{
1735 switch (ucontrol->value.integer.value[0]) {
1736 case 12:
1737 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1738 break;
1739 case 11:
1740 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1741 break;
1742 case 10:
1743 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1744 break;
1745 case 9:
1746 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1747 break;
1748 case 8:
1749 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1750 break;
1751 case 7:
1752 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1753 break;
1754 case 6:
1755 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1756 break;
1757 case 5:
1758 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1759 break;
1760 case 4:
1761 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1762 break;
1763 case 3:
1764 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1765 break;
1766 case 2:
1767 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1768 break;
1769 case 1:
1770 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1771 break;
1772 case 0:
1773 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1774 break;
1775 default:
1776 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1777 break;
1778 }
1779
1780 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
1781 __func__, ucontrol->value.integer.value[0],
1782 usb_rx_cfg.sample_rate);
1783 return 0;
1784}
1785
1786static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
1787 struct snd_ctl_elem_value *ucontrol)
1788{
1789 switch (usb_rx_cfg.bit_format) {
1790 case SNDRV_PCM_FORMAT_S32_LE:
1791 ucontrol->value.integer.value[0] = 3;
1792 break;
1793 case SNDRV_PCM_FORMAT_S24_3LE:
1794 ucontrol->value.integer.value[0] = 2;
1795 break;
1796 case SNDRV_PCM_FORMAT_S24_LE:
1797 ucontrol->value.integer.value[0] = 1;
1798 break;
1799 case SNDRV_PCM_FORMAT_S16_LE:
1800 default:
1801 ucontrol->value.integer.value[0] = 0;
1802 break;
1803 }
1804
1805 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1806 __func__, usb_rx_cfg.bit_format,
1807 ucontrol->value.integer.value[0]);
1808 return 0;
1809}
1810
1811static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1812 struct snd_ctl_elem_value *ucontrol)
1813{
1814 int rc = 0;
1815
1816 switch (ucontrol->value.integer.value[0]) {
1817 case 3:
1818 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1819 break;
1820 case 2:
1821 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1822 break;
1823 case 1:
1824 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1825 break;
1826 case 0:
1827 default:
1828 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1829 break;
1830 }
1831 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1832 __func__, usb_rx_cfg.bit_format,
1833 ucontrol->value.integer.value[0]);
1834
1835 return rc;
1836}
1837
1838static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1839 struct snd_ctl_elem_value *ucontrol)
1840{
1841 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1842 usb_tx_cfg.channels);
1843 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1844 return 0;
1845}
1846
1847static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1848 struct snd_ctl_elem_value *ucontrol)
1849{
1850 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1851
1852 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1853 return 1;
1854}
1855
1856static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1857 struct snd_ctl_elem_value *ucontrol)
1858{
1859 int sample_rate_val;
1860
1861 switch (usb_tx_cfg.sample_rate) {
1862 case SAMPLING_RATE_384KHZ:
1863 sample_rate_val = 12;
1864 break;
1865 case SAMPLING_RATE_352P8KHZ:
1866 sample_rate_val = 11;
1867 break;
1868 case SAMPLING_RATE_192KHZ:
1869 sample_rate_val = 10;
1870 break;
1871 case SAMPLING_RATE_176P4KHZ:
1872 sample_rate_val = 9;
1873 break;
1874 case SAMPLING_RATE_96KHZ:
1875 sample_rate_val = 8;
1876 break;
1877 case SAMPLING_RATE_88P2KHZ:
1878 sample_rate_val = 7;
1879 break;
1880 case SAMPLING_RATE_48KHZ:
1881 sample_rate_val = 6;
1882 break;
1883 case SAMPLING_RATE_44P1KHZ:
1884 sample_rate_val = 5;
1885 break;
1886 case SAMPLING_RATE_32KHZ:
1887 sample_rate_val = 4;
1888 break;
1889 case SAMPLING_RATE_22P05KHZ:
1890 sample_rate_val = 3;
1891 break;
1892 case SAMPLING_RATE_16KHZ:
1893 sample_rate_val = 2;
1894 break;
1895 case SAMPLING_RATE_11P025KHZ:
1896 sample_rate_val = 1;
1897 break;
1898 case SAMPLING_RATE_8KHZ:
1899 sample_rate_val = 0;
1900 break;
1901 default:
1902 sample_rate_val = 6;
1903 break;
1904 }
1905
1906 ucontrol->value.integer.value[0] = sample_rate_val;
1907 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
1908 usb_tx_cfg.sample_rate);
1909 return 0;
1910}
1911
1912static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1913 struct snd_ctl_elem_value *ucontrol)
1914{
1915 switch (ucontrol->value.integer.value[0]) {
1916 case 12:
1917 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
1918 break;
1919 case 11:
1920 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
1921 break;
1922 case 10:
1923 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
1924 break;
1925 case 9:
1926 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
1927 break;
1928 case 8:
1929 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
1930 break;
1931 case 7:
1932 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
1933 break;
1934 case 6:
1935 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1936 break;
1937 case 5:
1938 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
1939 break;
1940 case 4:
1941 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
1942 break;
1943 case 3:
1944 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
1945 break;
1946 case 2:
1947 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
1948 break;
1949 case 1:
1950 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
1951 break;
1952 case 0:
1953 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
1954 break;
1955 default:
1956 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
1957 break;
1958 }
1959
1960 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
1961 __func__, ucontrol->value.integer.value[0],
1962 usb_tx_cfg.sample_rate);
1963 return 0;
1964}
1965
1966static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968{
1969 switch (usb_tx_cfg.bit_format) {
1970 case SNDRV_PCM_FORMAT_S32_LE:
1971 ucontrol->value.integer.value[0] = 3;
1972 break;
1973 case SNDRV_PCM_FORMAT_S24_3LE:
1974 ucontrol->value.integer.value[0] = 2;
1975 break;
1976 case SNDRV_PCM_FORMAT_S24_LE:
1977 ucontrol->value.integer.value[0] = 1;
1978 break;
1979 case SNDRV_PCM_FORMAT_S16_LE:
1980 default:
1981 ucontrol->value.integer.value[0] = 0;
1982 break;
1983 }
1984
1985 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1986 __func__, usb_tx_cfg.bit_format,
1987 ucontrol->value.integer.value[0]);
1988 return 0;
1989}
1990
1991static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1992 struct snd_ctl_elem_value *ucontrol)
1993{
1994 int rc = 0;
1995
1996 switch (ucontrol->value.integer.value[0]) {
1997 case 3:
1998 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1999 break;
2000 case 2:
2001 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2002 break;
2003 case 1:
2004 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
2005 break;
2006 case 0:
2007 default:
2008 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
2009 break;
2010 }
2011 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
2012 __func__, usb_tx_cfg.bit_format,
2013 ucontrol->value.integer.value[0]);
2014
2015 return rc;
2016}
2017
2018static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
2019{
2020 int idx;
2021
2022 if (strnstr(kcontrol->id.name, "Display Port RX",
2023 sizeof("Display Port RX"))) {
2024 idx = DP_RX_IDX;
2025 } else {
2026 pr_err("%s: unsupported BE: %s\n",
2027 __func__, kcontrol->id.name);
2028 idx = -EINVAL;
2029 }
2030
2031 return idx;
2032}
2033
2034static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
2035 struct snd_ctl_elem_value *ucontrol)
2036{
2037 int idx = ext_disp_get_port_idx(kcontrol);
2038
2039 if (idx < 0)
2040 return idx;
2041
2042 switch (ext_disp_rx_cfg[idx].bit_format) {
2043 case SNDRV_PCM_FORMAT_S24_3LE:
2044 ucontrol->value.integer.value[0] = 2;
2045 break;
2046 case SNDRV_PCM_FORMAT_S24_LE:
2047 ucontrol->value.integer.value[0] = 1;
2048 break;
2049 case SNDRV_PCM_FORMAT_S16_LE:
2050 default:
2051 ucontrol->value.integer.value[0] = 0;
2052 break;
2053 }
2054
2055 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2056 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2057 ucontrol->value.integer.value[0]);
2058 return 0;
2059}
2060
2061static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
2062 struct snd_ctl_elem_value *ucontrol)
2063{
2064 int idx = ext_disp_get_port_idx(kcontrol);
2065
2066 if (idx < 0)
2067 return idx;
2068
2069 switch (ucontrol->value.integer.value[0]) {
2070 case 2:
2071 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2072 break;
2073 case 1:
2074 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2075 break;
2076 case 0:
2077 default:
2078 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2079 break;
2080 }
2081 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
2082 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
2083 ucontrol->value.integer.value[0]);
2084
2085 return 0;
2086}
2087
2088static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
2089 struct snd_ctl_elem_value *ucontrol)
2090{
2091 int idx = ext_disp_get_port_idx(kcontrol);
2092
2093 if (idx < 0)
2094 return idx;
2095
2096 ucontrol->value.integer.value[0] =
2097 ext_disp_rx_cfg[idx].channels - 2;
2098
2099 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2100 idx, ext_disp_rx_cfg[idx].channels);
2101
2102 return 0;
2103}
2104
2105static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
2106 struct snd_ctl_elem_value *ucontrol)
2107{
2108 int idx = ext_disp_get_port_idx(kcontrol);
2109
2110 if (idx < 0)
2111 return idx;
2112
2113 ext_disp_rx_cfg[idx].channels =
2114 ucontrol->value.integer.value[0] + 2;
2115
2116 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
2117 idx, ext_disp_rx_cfg[idx].channels);
2118 return 1;
2119}
2120
2121static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2122 struct snd_ctl_elem_value *ucontrol)
2123{
2124 int sample_rate_val;
2125 int idx = ext_disp_get_port_idx(kcontrol);
2126
2127 if (idx < 0)
2128 return idx;
2129
2130 switch (ext_disp_rx_cfg[idx].sample_rate) {
2131 case SAMPLING_RATE_176P4KHZ:
2132 sample_rate_val = 6;
2133 break;
2134
2135 case SAMPLING_RATE_88P2KHZ:
2136 sample_rate_val = 5;
2137 break;
2138
2139 case SAMPLING_RATE_44P1KHZ:
2140 sample_rate_val = 4;
2141 break;
2142
2143 case SAMPLING_RATE_32KHZ:
2144 sample_rate_val = 3;
2145 break;
2146
2147 case SAMPLING_RATE_192KHZ:
2148 sample_rate_val = 2;
2149 break;
2150
2151 case SAMPLING_RATE_96KHZ:
2152 sample_rate_val = 1;
2153 break;
2154
2155 case SAMPLING_RATE_48KHZ:
2156 default:
2157 sample_rate_val = 0;
2158 break;
2159 }
2160
2161 ucontrol->value.integer.value[0] = sample_rate_val;
2162 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
2163 idx, ext_disp_rx_cfg[idx].sample_rate);
2164
2165 return 0;
2166}
2167
2168static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2169 struct snd_ctl_elem_value *ucontrol)
2170{
2171 int idx = ext_disp_get_port_idx(kcontrol);
2172
2173 if (idx < 0)
2174 return idx;
2175
2176 switch (ucontrol->value.integer.value[0]) {
2177 case 6:
2178 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
2179 break;
2180 case 5:
2181 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
2182 break;
2183 case 4:
2184 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
2185 break;
2186 case 3:
2187 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
2188 break;
2189 case 2:
2190 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
2191 break;
2192 case 1:
2193 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
2194 break;
2195 case 0:
2196 default:
2197 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
2198 break;
2199 }
2200
2201 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
2202 __func__, ucontrol->value.integer.value[0], idx,
2203 ext_disp_rx_cfg[idx].sample_rate);
2204 return 0;
2205}
2206
2207static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
2208 struct snd_ctl_elem_value *ucontrol)
2209{
2210 pr_debug("%s: proxy_rx channels = %d\n",
2211 __func__, proxy_rx_cfg.channels);
2212 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
2213
2214 return 0;
2215}
2216
2217static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
2218 struct snd_ctl_elem_value *ucontrol)
2219{
2220 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
2221 pr_debug("%s: proxy_rx channels = %d\n",
2222 __func__, proxy_rx_cfg.channels);
2223
2224 return 1;
2225}
2226
2227static int tdm_get_sample_rate(int value)
2228{
2229 int sample_rate = 0;
2230
2231 switch (value) {
2232 case 0:
2233 sample_rate = SAMPLING_RATE_8KHZ;
2234 break;
2235 case 1:
2236 sample_rate = SAMPLING_RATE_16KHZ;
2237 break;
2238 case 2:
2239 sample_rate = SAMPLING_RATE_32KHZ;
2240 break;
2241 case 3:
2242 sample_rate = SAMPLING_RATE_48KHZ;
2243 break;
2244 case 4:
2245 sample_rate = SAMPLING_RATE_176P4KHZ;
2246 break;
2247 case 5:
2248 sample_rate = SAMPLING_RATE_352P8KHZ;
2249 break;
2250 default:
2251 sample_rate = SAMPLING_RATE_48KHZ;
2252 break;
2253 }
2254 return sample_rate;
2255}
2256
2257static int aux_pcm_get_sample_rate(int value)
2258{
2259 int sample_rate;
2260
2261 switch (value) {
2262 case 1:
2263 sample_rate = SAMPLING_RATE_16KHZ;
2264 break;
2265 case 0:
2266 default:
2267 sample_rate = SAMPLING_RATE_8KHZ;
2268 break;
2269 }
2270 return sample_rate;
2271}
2272
2273static int tdm_get_sample_rate_val(int sample_rate)
2274{
2275 int sample_rate_val = 0;
2276
2277 switch (sample_rate) {
2278 case SAMPLING_RATE_8KHZ:
2279 sample_rate_val = 0;
2280 break;
2281 case SAMPLING_RATE_16KHZ:
2282 sample_rate_val = 1;
2283 break;
2284 case SAMPLING_RATE_32KHZ:
2285 sample_rate_val = 2;
2286 break;
2287 case SAMPLING_RATE_48KHZ:
2288 sample_rate_val = 3;
2289 break;
2290 case SAMPLING_RATE_176P4KHZ:
2291 sample_rate_val = 4;
2292 break;
2293 case SAMPLING_RATE_352P8KHZ:
2294 sample_rate_val = 5;
2295 break;
2296 default:
2297 sample_rate_val = 3;
2298 break;
2299 }
2300 return sample_rate_val;
2301}
2302
2303static int aux_pcm_get_sample_rate_val(int sample_rate)
2304{
2305 int sample_rate_val;
2306
2307 switch (sample_rate) {
2308 case SAMPLING_RATE_16KHZ:
2309 sample_rate_val = 1;
2310 break;
2311 case SAMPLING_RATE_8KHZ:
2312 default:
2313 sample_rate_val = 0;
2314 break;
2315 }
2316 return sample_rate_val;
2317}
2318
2319static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
2320 struct tdm_port *port)
2321{
2322 if (port) {
2323 if (strnstr(kcontrol->id.name, "PRI",
2324 sizeof(kcontrol->id.name))) {
2325 port->mode = TDM_PRI;
2326 } else if (strnstr(kcontrol->id.name, "SEC",
2327 sizeof(kcontrol->id.name))) {
2328 port->mode = TDM_SEC;
2329 } else if (strnstr(kcontrol->id.name, "TERT",
2330 sizeof(kcontrol->id.name))) {
2331 port->mode = TDM_TERT;
2332 } else if (strnstr(kcontrol->id.name, "QUAT",
2333 sizeof(kcontrol->id.name))) {
2334 port->mode = TDM_QUAT;
2335 } else if (strnstr(kcontrol->id.name, "QUIN",
2336 sizeof(kcontrol->id.name))) {
2337 port->mode = TDM_QUIN;
2338 } else {
2339 pr_err("%s: unsupported mode in: %s\n",
2340 __func__, kcontrol->id.name);
2341 return -EINVAL;
2342 }
2343
2344 if (strnstr(kcontrol->id.name, "RX_0",
2345 sizeof(kcontrol->id.name)) ||
2346 strnstr(kcontrol->id.name, "TX_0",
2347 sizeof(kcontrol->id.name))) {
2348 port->channel = TDM_0;
2349 } else if (strnstr(kcontrol->id.name, "RX_1",
2350 sizeof(kcontrol->id.name)) ||
2351 strnstr(kcontrol->id.name, "TX_1",
2352 sizeof(kcontrol->id.name))) {
2353 port->channel = TDM_1;
2354 } else if (strnstr(kcontrol->id.name, "RX_2",
2355 sizeof(kcontrol->id.name)) ||
2356 strnstr(kcontrol->id.name, "TX_2",
2357 sizeof(kcontrol->id.name))) {
2358 port->channel = TDM_2;
2359 } else if (strnstr(kcontrol->id.name, "RX_3",
2360 sizeof(kcontrol->id.name)) ||
2361 strnstr(kcontrol->id.name, "TX_3",
2362 sizeof(kcontrol->id.name))) {
2363 port->channel = TDM_3;
2364 } else if (strnstr(kcontrol->id.name, "RX_4",
2365 sizeof(kcontrol->id.name)) ||
2366 strnstr(kcontrol->id.name, "TX_4",
2367 sizeof(kcontrol->id.name))) {
2368 port->channel = TDM_4;
2369 } else if (strnstr(kcontrol->id.name, "RX_5",
2370 sizeof(kcontrol->id.name)) ||
2371 strnstr(kcontrol->id.name, "TX_5",
2372 sizeof(kcontrol->id.name))) {
2373 port->channel = TDM_5;
2374 } else if (strnstr(kcontrol->id.name, "RX_6",
2375 sizeof(kcontrol->id.name)) ||
2376 strnstr(kcontrol->id.name, "TX_6",
2377 sizeof(kcontrol->id.name))) {
2378 port->channel = TDM_6;
2379 } else if (strnstr(kcontrol->id.name, "RX_7",
2380 sizeof(kcontrol->id.name)) ||
2381 strnstr(kcontrol->id.name, "TX_7",
2382 sizeof(kcontrol->id.name))) {
2383 port->channel = TDM_7;
2384 } else {
2385 pr_err("%s: unsupported channel in: %s\n",
2386 __func__, kcontrol->id.name);
2387 return -EINVAL;
2388 }
2389 } else {
2390 return -EINVAL;
2391 }
2392 return 0;
2393}
2394
2395static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2396 struct snd_ctl_elem_value *ucontrol)
2397{
2398 struct tdm_port port;
2399 int ret = tdm_get_port_idx(kcontrol, &port);
2400
2401 if (ret) {
2402 pr_err("%s: unsupported control: %s\n",
2403 __func__, kcontrol->id.name);
2404 } else {
2405 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2406 tdm_rx_cfg[port.mode][port.channel].sample_rate);
2407
2408 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2409 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2410 ucontrol->value.enumerated.item[0]);
2411 }
2412 return ret;
2413}
2414
2415static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2416 struct snd_ctl_elem_value *ucontrol)
2417{
2418 struct tdm_port port;
2419 int ret = tdm_get_port_idx(kcontrol, &port);
2420
2421 if (ret) {
2422 pr_err("%s: unsupported control: %s\n",
2423 __func__, kcontrol->id.name);
2424 } else {
2425 tdm_rx_cfg[port.mode][port.channel].sample_rate =
2426 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2427
2428 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
2429 tdm_rx_cfg[port.mode][port.channel].sample_rate,
2430 ucontrol->value.enumerated.item[0]);
2431 }
2432 return ret;
2433}
2434
2435static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2436 struct snd_ctl_elem_value *ucontrol)
2437{
2438 struct tdm_port port;
2439 int ret = tdm_get_port_idx(kcontrol, &port);
2440
2441 if (ret) {
2442 pr_err("%s: unsupported control: %s\n",
2443 __func__, kcontrol->id.name);
2444 } else {
2445 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
2446 tdm_tx_cfg[port.mode][port.channel].sample_rate);
2447
2448 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2449 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2450 ucontrol->value.enumerated.item[0]);
2451 }
2452 return ret;
2453}
2454
2455static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2456 struct snd_ctl_elem_value *ucontrol)
2457{
2458 struct tdm_port port;
2459 int ret = tdm_get_port_idx(kcontrol, &port);
2460
2461 if (ret) {
2462 pr_err("%s: unsupported control: %s\n",
2463 __func__, kcontrol->id.name);
2464 } else {
2465 tdm_tx_cfg[port.mode][port.channel].sample_rate =
2466 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2467
2468 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
2469 tdm_tx_cfg[port.mode][port.channel].sample_rate,
2470 ucontrol->value.enumerated.item[0]);
2471 }
2472 return ret;
2473}
2474
2475static int tdm_get_format(int value)
2476{
2477 int format = 0;
2478
2479 switch (value) {
2480 case 0:
2481 format = SNDRV_PCM_FORMAT_S16_LE;
2482 break;
2483 case 1:
2484 format = SNDRV_PCM_FORMAT_S24_LE;
2485 break;
2486 case 2:
2487 format = SNDRV_PCM_FORMAT_S32_LE;
2488 break;
2489 default:
2490 format = SNDRV_PCM_FORMAT_S16_LE;
2491 break;
2492 }
2493 return format;
2494}
2495
2496static int tdm_get_format_val(int format)
2497{
2498 int value = 0;
2499
2500 switch (format) {
2501 case SNDRV_PCM_FORMAT_S16_LE:
2502 value = 0;
2503 break;
2504 case SNDRV_PCM_FORMAT_S24_LE:
2505 value = 1;
2506 break;
2507 case SNDRV_PCM_FORMAT_S32_LE:
2508 value = 2;
2509 break;
2510 default:
2511 value = 0;
2512 break;
2513 }
2514 return value;
2515}
2516
2517static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
2518 struct snd_ctl_elem_value *ucontrol)
2519{
2520 struct tdm_port port;
2521 int ret = tdm_get_port_idx(kcontrol, &port);
2522
2523 if (ret) {
2524 pr_err("%s: unsupported control: %s\n",
2525 __func__, kcontrol->id.name);
2526 } else {
2527 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2528 tdm_rx_cfg[port.mode][port.channel].bit_format);
2529
2530 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2531 tdm_rx_cfg[port.mode][port.channel].bit_format,
2532 ucontrol->value.enumerated.item[0]);
2533 }
2534 return ret;
2535}
2536
2537static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 struct tdm_port port;
2541 int ret = tdm_get_port_idx(kcontrol, &port);
2542
2543 if (ret) {
2544 pr_err("%s: unsupported control: %s\n",
2545 __func__, kcontrol->id.name);
2546 } else {
2547 tdm_rx_cfg[port.mode][port.channel].bit_format =
2548 tdm_get_format(ucontrol->value.enumerated.item[0]);
2549
2550 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
2551 tdm_rx_cfg[port.mode][port.channel].bit_format,
2552 ucontrol->value.enumerated.item[0]);
2553 }
2554 return ret;
2555}
2556
2557static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
2558 struct snd_ctl_elem_value *ucontrol)
2559{
2560 struct tdm_port port;
2561 int ret = tdm_get_port_idx(kcontrol, &port);
2562
2563 if (ret) {
2564 pr_err("%s: unsupported control: %s\n",
2565 __func__, kcontrol->id.name);
2566 } else {
2567 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
2568 tdm_tx_cfg[port.mode][port.channel].bit_format);
2569
2570 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2571 tdm_tx_cfg[port.mode][port.channel].bit_format,
2572 ucontrol->value.enumerated.item[0]);
2573 }
2574 return ret;
2575}
2576
2577static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
2578 struct snd_ctl_elem_value *ucontrol)
2579{
2580 struct tdm_port port;
2581 int ret = tdm_get_port_idx(kcontrol, &port);
2582
2583 if (ret) {
2584 pr_err("%s: unsupported control: %s\n",
2585 __func__, kcontrol->id.name);
2586 } else {
2587 tdm_tx_cfg[port.mode][port.channel].bit_format =
2588 tdm_get_format(ucontrol->value.enumerated.item[0]);
2589
2590 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
2591 tdm_tx_cfg[port.mode][port.channel].bit_format,
2592 ucontrol->value.enumerated.item[0]);
2593 }
2594 return ret;
2595}
2596
2597static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
2598 struct snd_ctl_elem_value *ucontrol)
2599{
2600 struct tdm_port port;
2601 int ret = tdm_get_port_idx(kcontrol, &port);
2602
2603 if (ret) {
2604 pr_err("%s: unsupported control: %s\n",
2605 __func__, kcontrol->id.name);
2606 } else {
2607
2608 ucontrol->value.enumerated.item[0] =
2609 tdm_rx_cfg[port.mode][port.channel].channels - 1;
2610
2611 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2612 tdm_rx_cfg[port.mode][port.channel].channels - 1,
2613 ucontrol->value.enumerated.item[0]);
2614 }
2615 return ret;
2616}
2617
2618static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
2619 struct snd_ctl_elem_value *ucontrol)
2620{
2621 struct tdm_port port;
2622 int ret = tdm_get_port_idx(kcontrol, &port);
2623
2624 if (ret) {
2625 pr_err("%s: unsupported control: %s\n",
2626 __func__, kcontrol->id.name);
2627 } else {
2628 tdm_rx_cfg[port.mode][port.channel].channels =
2629 ucontrol->value.enumerated.item[0] + 1;
2630
2631 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
2632 tdm_rx_cfg[port.mode][port.channel].channels,
2633 ucontrol->value.enumerated.item[0] + 1);
2634 }
2635 return ret;
2636}
2637
2638static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
2639 struct snd_ctl_elem_value *ucontrol)
2640{
2641 struct tdm_port port;
2642 int ret = tdm_get_port_idx(kcontrol, &port);
2643
2644 if (ret) {
2645 pr_err("%s: unsupported control: %s\n",
2646 __func__, kcontrol->id.name);
2647 } else {
2648 ucontrol->value.enumerated.item[0] =
2649 tdm_tx_cfg[port.mode][port.channel].channels - 1;
2650
2651 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2652 tdm_tx_cfg[port.mode][port.channel].channels - 1,
2653 ucontrol->value.enumerated.item[0]);
2654 }
2655 return ret;
2656}
2657
2658static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
2659 struct snd_ctl_elem_value *ucontrol)
2660{
2661 struct tdm_port port;
2662 int ret = tdm_get_port_idx(kcontrol, &port);
2663
2664 if (ret) {
2665 pr_err("%s: unsupported control: %s\n",
2666 __func__, kcontrol->id.name);
2667 } else {
2668 tdm_tx_cfg[port.mode][port.channel].channels =
2669 ucontrol->value.enumerated.item[0] + 1;
2670
2671 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
2672 tdm_tx_cfg[port.mode][port.channel].channels,
2673 ucontrol->value.enumerated.item[0] + 1);
2674 }
2675 return ret;
2676}
2677
2678static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
2679{
2680 int idx;
2681
2682 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
2683 sizeof("PRIM_AUX_PCM"))) {
2684 idx = PRIM_AUX_PCM;
2685 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
2686 sizeof("SEC_AUX_PCM"))) {
2687 idx = SEC_AUX_PCM;
2688 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
2689 sizeof("TERT_AUX_PCM"))) {
2690 idx = TERT_AUX_PCM;
2691 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
2692 sizeof("QUAT_AUX_PCM"))) {
2693 idx = QUAT_AUX_PCM;
2694 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
2695 sizeof("QUIN_AUX_PCM"))) {
2696 idx = QUIN_AUX_PCM;
2697 } else {
2698 pr_err("%s: unsupported port: %s\n",
2699 __func__, kcontrol->id.name);
2700 idx = -EINVAL;
2701 }
2702
2703 return idx;
2704}
2705
2706static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2707 struct snd_ctl_elem_value *ucontrol)
2708{
2709 int idx = aux_pcm_get_port_idx(kcontrol);
2710
2711 if (idx < 0)
2712 return idx;
2713
2714 aux_pcm_rx_cfg[idx].sample_rate =
2715 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2716
2717 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2718 idx, aux_pcm_rx_cfg[idx].sample_rate,
2719 ucontrol->value.enumerated.item[0]);
2720
2721 return 0;
2722}
2723
2724static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2725 struct snd_ctl_elem_value *ucontrol)
2726{
2727 int idx = aux_pcm_get_port_idx(kcontrol);
2728
2729 if (idx < 0)
2730 return idx;
2731
2732 ucontrol->value.enumerated.item[0] =
2733 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
2734
2735 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2736 idx, aux_pcm_rx_cfg[idx].sample_rate,
2737 ucontrol->value.enumerated.item[0]);
2738
2739 return 0;
2740}
2741
2742static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2743 struct snd_ctl_elem_value *ucontrol)
2744{
2745 int idx = aux_pcm_get_port_idx(kcontrol);
2746
2747 if (idx < 0)
2748 return idx;
2749
2750 aux_pcm_tx_cfg[idx].sample_rate =
2751 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
2752
2753 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2754 idx, aux_pcm_tx_cfg[idx].sample_rate,
2755 ucontrol->value.enumerated.item[0]);
2756
2757 return 0;
2758}
2759
2760static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2761 struct snd_ctl_elem_value *ucontrol)
2762{
2763 int idx = aux_pcm_get_port_idx(kcontrol);
2764
2765 if (idx < 0)
2766 return idx;
2767
2768 ucontrol->value.enumerated.item[0] =
2769 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
2770
2771 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2772 idx, aux_pcm_tx_cfg[idx].sample_rate,
2773 ucontrol->value.enumerated.item[0]);
2774
2775 return 0;
2776}
2777
2778static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2779{
2780 int idx;
2781
2782 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2783 sizeof("PRIM_MI2S_RX"))) {
2784 idx = PRIM_MI2S;
2785 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2786 sizeof("SEC_MI2S_RX"))) {
2787 idx = SEC_MI2S;
2788 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2789 sizeof("TERT_MI2S_RX"))) {
2790 idx = TERT_MI2S;
2791 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2792 sizeof("QUAT_MI2S_RX"))) {
2793 idx = QUAT_MI2S;
2794 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2795 sizeof("QUIN_MI2S_RX"))) {
2796 idx = QUIN_MI2S;
2797 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2798 sizeof("PRIM_MI2S_TX"))) {
2799 idx = PRIM_MI2S;
2800 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2801 sizeof("SEC_MI2S_TX"))) {
2802 idx = SEC_MI2S;
2803 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2804 sizeof("TERT_MI2S_TX"))) {
2805 idx = TERT_MI2S;
2806 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2807 sizeof("QUAT_MI2S_TX"))) {
2808 idx = QUAT_MI2S;
2809 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2810 sizeof("QUIN_MI2S_TX"))) {
2811 idx = QUIN_MI2S;
2812 } else {
2813 pr_err("%s: unsupported channel: %s\n",
2814 __func__, kcontrol->id.name);
2815 idx = -EINVAL;
2816 }
2817
2818 return idx;
2819}
2820
2821static int mi2s_get_sample_rate_val(int sample_rate)
2822{
2823 int sample_rate_val;
2824
2825 switch (sample_rate) {
2826 case SAMPLING_RATE_8KHZ:
2827 sample_rate_val = 0;
2828 break;
2829 case SAMPLING_RATE_11P025KHZ:
2830 sample_rate_val = 1;
2831 break;
2832 case SAMPLING_RATE_16KHZ:
2833 sample_rate_val = 2;
2834 break;
2835 case SAMPLING_RATE_22P05KHZ:
2836 sample_rate_val = 3;
2837 break;
2838 case SAMPLING_RATE_32KHZ:
2839 sample_rate_val = 4;
2840 break;
2841 case SAMPLING_RATE_44P1KHZ:
2842 sample_rate_val = 5;
2843 break;
2844 case SAMPLING_RATE_48KHZ:
2845 sample_rate_val = 6;
2846 break;
2847 case SAMPLING_RATE_96KHZ:
2848 sample_rate_val = 7;
2849 break;
2850 case SAMPLING_RATE_192KHZ:
2851 sample_rate_val = 8;
2852 break;
2853 default:
2854 sample_rate_val = 6;
2855 break;
2856 }
2857 return sample_rate_val;
2858}
2859
2860static int mi2s_get_sample_rate(int value)
2861{
2862 int sample_rate;
2863
2864 switch (value) {
2865 case 0:
2866 sample_rate = SAMPLING_RATE_8KHZ;
2867 break;
2868 case 1:
2869 sample_rate = SAMPLING_RATE_11P025KHZ;
2870 break;
2871 case 2:
2872 sample_rate = SAMPLING_RATE_16KHZ;
2873 break;
2874 case 3:
2875 sample_rate = SAMPLING_RATE_22P05KHZ;
2876 break;
2877 case 4:
2878 sample_rate = SAMPLING_RATE_32KHZ;
2879 break;
2880 case 5:
2881 sample_rate = SAMPLING_RATE_44P1KHZ;
2882 break;
2883 case 6:
2884 sample_rate = SAMPLING_RATE_48KHZ;
2885 break;
2886 case 7:
2887 sample_rate = SAMPLING_RATE_96KHZ;
2888 break;
2889 case 8:
2890 sample_rate = SAMPLING_RATE_192KHZ;
2891 break;
2892 default:
2893 sample_rate = SAMPLING_RATE_48KHZ;
2894 break;
2895 }
2896 return sample_rate;
2897}
2898
2899static int mi2s_auxpcm_get_format(int value)
2900{
2901 int format;
2902
2903 switch (value) {
2904 case 0:
2905 format = SNDRV_PCM_FORMAT_S16_LE;
2906 break;
2907 case 1:
2908 format = SNDRV_PCM_FORMAT_S24_LE;
2909 break;
2910 case 2:
2911 format = SNDRV_PCM_FORMAT_S24_3LE;
2912 break;
2913 case 3:
2914 format = SNDRV_PCM_FORMAT_S32_LE;
2915 break;
2916 default:
2917 format = SNDRV_PCM_FORMAT_S16_LE;
2918 break;
2919 }
2920 return format;
2921}
2922
2923static int mi2s_auxpcm_get_format_value(int format)
2924{
2925 int value;
2926
2927 switch (format) {
2928 case SNDRV_PCM_FORMAT_S16_LE:
2929 value = 0;
2930 break;
2931 case SNDRV_PCM_FORMAT_S24_LE:
2932 value = 1;
2933 break;
2934 case SNDRV_PCM_FORMAT_S24_3LE:
2935 value = 2;
2936 break;
2937 case SNDRV_PCM_FORMAT_S32_LE:
2938 value = 3;
2939 break;
2940 default:
2941 value = 0;
2942 break;
2943 }
2944 return value;
2945}
2946
2947static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2948 struct snd_ctl_elem_value *ucontrol)
2949{
2950 int idx = mi2s_get_port_idx(kcontrol);
2951
2952 if (idx < 0)
2953 return idx;
2954
2955 mi2s_rx_cfg[idx].sample_rate =
2956 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2957
2958 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2959 idx, mi2s_rx_cfg[idx].sample_rate,
2960 ucontrol->value.enumerated.item[0]);
2961
2962 return 0;
2963}
2964
2965static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2966 struct snd_ctl_elem_value *ucontrol)
2967{
2968 int idx = mi2s_get_port_idx(kcontrol);
2969
2970 if (idx < 0)
2971 return idx;
2972
2973 ucontrol->value.enumerated.item[0] =
2974 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2975
2976 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2977 idx, mi2s_rx_cfg[idx].sample_rate,
2978 ucontrol->value.enumerated.item[0]);
2979
2980 return 0;
2981}
2982
2983static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2984 struct snd_ctl_elem_value *ucontrol)
2985{
2986 int idx = mi2s_get_port_idx(kcontrol);
2987
2988 if (idx < 0)
2989 return idx;
2990
2991 mi2s_tx_cfg[idx].sample_rate =
2992 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2993
2994 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2995 idx, mi2s_tx_cfg[idx].sample_rate,
2996 ucontrol->value.enumerated.item[0]);
2997
2998 return 0;
2999}
3000
3001static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
3002 struct snd_ctl_elem_value *ucontrol)
3003{
3004 int idx = mi2s_get_port_idx(kcontrol);
3005
3006 if (idx < 0)
3007 return idx;
3008
3009 ucontrol->value.enumerated.item[0] =
3010 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
3011
3012 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
3013 idx, mi2s_tx_cfg[idx].sample_rate,
3014 ucontrol->value.enumerated.item[0]);
3015
3016 return 0;
3017}
3018
3019static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
3020 struct snd_ctl_elem_value *ucontrol)
3021{
3022 int idx = mi2s_get_port_idx(kcontrol);
3023
3024 if (idx < 0)
3025 return idx;
3026
3027 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3028 idx, mi2s_rx_cfg[idx].channels);
3029 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
3030
3031 return 0;
3032}
3033
3034static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
3035 struct snd_ctl_elem_value *ucontrol)
3036{
3037 int idx = mi2s_get_port_idx(kcontrol);
3038
3039 if (idx < 0)
3040 return idx;
3041
3042 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3043 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
3044 idx, mi2s_rx_cfg[idx].channels);
3045
3046 return 1;
3047}
3048
3049static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
3050 struct snd_ctl_elem_value *ucontrol)
3051{
3052 int idx = mi2s_get_port_idx(kcontrol);
3053
3054 if (idx < 0)
3055 return idx;
3056
3057 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3058 idx, mi2s_tx_cfg[idx].channels);
3059 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
3060
3061 return 0;
3062}
3063
3064static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
3065 struct snd_ctl_elem_value *ucontrol)
3066{
3067 int idx = mi2s_get_port_idx(kcontrol);
3068
3069 if (idx < 0)
3070 return idx;
3071
3072 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
3073 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
3074 idx, mi2s_tx_cfg[idx].channels);
3075
3076 return 1;
3077}
3078
3079static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
3080 struct snd_ctl_elem_value *ucontrol)
3081{
3082 int idx = mi2s_get_port_idx(kcontrol);
3083
3084 if (idx < 0)
3085 return idx;
3086
3087 ucontrol->value.enumerated.item[0] =
3088 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
3089
3090 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3091 idx, mi2s_rx_cfg[idx].bit_format,
3092 ucontrol->value.enumerated.item[0]);
3093
3094 return 0;
3095}
3096
3097static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
3098 struct snd_ctl_elem_value *ucontrol)
3099{
3100 int idx = mi2s_get_port_idx(kcontrol);
3101
3102 if (idx < 0)
3103 return idx;
3104
3105 mi2s_rx_cfg[idx].bit_format =
3106 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3107
3108 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3109 idx, mi2s_rx_cfg[idx].bit_format,
3110 ucontrol->value.enumerated.item[0]);
3111
3112 return 0;
3113}
3114
3115static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
3116 struct snd_ctl_elem_value *ucontrol)
3117{
3118 int idx = mi2s_get_port_idx(kcontrol);
3119
3120 if (idx < 0)
3121 return idx;
3122
3123 ucontrol->value.enumerated.item[0] =
3124 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
3125
3126 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3127 idx, mi2s_tx_cfg[idx].bit_format,
3128 ucontrol->value.enumerated.item[0]);
3129
3130 return 0;
3131}
3132
3133static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
3134 struct snd_ctl_elem_value *ucontrol)
3135{
3136 int idx = mi2s_get_port_idx(kcontrol);
3137
3138 if (idx < 0)
3139 return idx;
3140
3141 mi2s_tx_cfg[idx].bit_format =
3142 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3143
3144 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3145 idx, mi2s_tx_cfg[idx].bit_format,
3146 ucontrol->value.enumerated.item[0]);
3147
3148 return 0;
3149}
3150
3151static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
3152 struct snd_ctl_elem_value *ucontrol)
3153{
3154 int idx = aux_pcm_get_port_idx(kcontrol);
3155
3156 if (idx < 0)
3157 return idx;
3158
3159 ucontrol->value.enumerated.item[0] =
3160 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
3161
3162 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3163 idx, aux_pcm_rx_cfg[idx].bit_format,
3164 ucontrol->value.enumerated.item[0]);
3165
3166 return 0;
3167}
3168
3169static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
3170 struct snd_ctl_elem_value *ucontrol)
3171{
3172 int idx = aux_pcm_get_port_idx(kcontrol);
3173
3174 if (idx < 0)
3175 return idx;
3176
3177 aux_pcm_rx_cfg[idx].bit_format =
3178 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3179
3180 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
3181 idx, aux_pcm_rx_cfg[idx].bit_format,
3182 ucontrol->value.enumerated.item[0]);
3183
3184 return 0;
3185}
3186
3187static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
3188 struct snd_ctl_elem_value *ucontrol)
3189{
3190 int idx = aux_pcm_get_port_idx(kcontrol);
3191
3192 if (idx < 0)
3193 return idx;
3194
3195 ucontrol->value.enumerated.item[0] =
3196 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
3197
3198 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3199 idx, aux_pcm_tx_cfg[idx].bit_format,
3200 ucontrol->value.enumerated.item[0]);
3201
3202 return 0;
3203}
3204
3205static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
3206 struct snd_ctl_elem_value *ucontrol)
3207{
3208 int idx = aux_pcm_get_port_idx(kcontrol);
3209
3210 if (idx < 0)
3211 return idx;
3212
3213 aux_pcm_tx_cfg[idx].bit_format =
3214 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
3215
3216 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
3217 idx, aux_pcm_tx_cfg[idx].bit_format,
3218 ucontrol->value.enumerated.item[0]);
3219
3220 return 0;
3221}
3222
3223static int msm_hifi_ctrl(struct snd_soc_codec *codec)
3224{
3225 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
3226 struct snd_soc_card *card = codec->component.card;
3227 struct msm_asoc_mach_data *pdata =
3228 snd_soc_card_get_drvdata(card);
3229
3230 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
3231 msm_hifi_control);
3232
3233 if (!pdata || !pdata->hph_en1_gpio_p) {
3234 dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
3235 return -EINVAL;
3236 }
3237 if (msm_hifi_control == MSM_HIFI_ON) {
3238 msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
3239 /* 5msec delay needed as per HW requirement */
3240 usleep_range(5000, 5010);
3241 } else {
3242 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
3243 }
3244 snd_soc_dapm_sync(dapm);
3245
3246 return 0;
3247}
3248
3249static int msm_hifi_get(struct snd_kcontrol *kcontrol,
3250 struct snd_ctl_elem_value *ucontrol)
3251{
3252 pr_debug("%s: msm_hifi_control = %d\n",
3253 __func__, msm_hifi_control);
3254 ucontrol->value.integer.value[0] = msm_hifi_control;
3255
3256 return 0;
3257}
3258
3259static int msm_hifi_put(struct snd_kcontrol *kcontrol,
3260 struct snd_ctl_elem_value *ucontrol)
3261{
3262 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
3263
3264 dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
3265 __func__, ucontrol->value.integer.value[0]);
3266
3267 msm_hifi_control = ucontrol->value.integer.value[0];
3268 msm_hifi_ctrl(codec);
3269
3270 return 0;
3271}
3272
3273static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3274 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3275 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3276 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3277 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3278 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3279 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3280 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3281 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3282 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3283 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3284 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3285 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3286 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3287 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3288 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3289 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3290 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3291 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3292 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3293 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3294 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3295 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3296 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3297 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3298 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3299 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3300 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3301 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3302 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3303 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3304 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3305 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3306 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3307 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3308 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3309 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3310 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3311 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3312 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3313 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3314 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3315 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3316 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3317 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3318 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3319 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3320 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3321 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3322 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3323 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3324 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3325 wsa_cdc_dma_rx_0_sample_rate,
3326 cdc_dma_rx_sample_rate_get,
3327 cdc_dma_rx_sample_rate_put),
3328 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3329 wsa_cdc_dma_rx_1_sample_rate,
3330 cdc_dma_rx_sample_rate_get,
3331 cdc_dma_rx_sample_rate_put),
3332 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3333 rx_cdc_dma_rx_0_sample_rate,
3334 cdc_dma_rx_sample_rate_get,
3335 cdc_dma_rx_sample_rate_put),
3336 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3337 rx_cdc_dma_rx_1_sample_rate,
3338 cdc_dma_rx_sample_rate_get,
3339 cdc_dma_rx_sample_rate_put),
3340 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3341 rx_cdc_dma_rx_2_sample_rate,
3342 cdc_dma_rx_sample_rate_get,
3343 cdc_dma_rx_sample_rate_put),
3344 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3345 rx_cdc_dma_rx_3_sample_rate,
3346 cdc_dma_rx_sample_rate_get,
3347 cdc_dma_rx_sample_rate_put),
3348 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3349 rx_cdc_dma_rx_5_sample_rate,
3350 cdc_dma_rx_sample_rate_get,
3351 cdc_dma_rx_sample_rate_put),
3352 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3353 wsa_cdc_dma_tx_0_sample_rate,
3354 cdc_dma_tx_sample_rate_get,
3355 cdc_dma_tx_sample_rate_put),
3356 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3357 wsa_cdc_dma_tx_1_sample_rate,
3358 cdc_dma_tx_sample_rate_get,
3359 cdc_dma_tx_sample_rate_put),
3360 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3361 wsa_cdc_dma_tx_2_sample_rate,
3362 cdc_dma_tx_sample_rate_get,
3363 cdc_dma_tx_sample_rate_put),
3364 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3365 tx_cdc_dma_tx_0_sample_rate,
3366 cdc_dma_tx_sample_rate_get,
3367 cdc_dma_tx_sample_rate_put),
3368 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3369 tx_cdc_dma_tx_3_sample_rate,
3370 cdc_dma_tx_sample_rate_get,
3371 cdc_dma_tx_sample_rate_put),
3372 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3373 tx_cdc_dma_tx_4_sample_rate,
3374 cdc_dma_tx_sample_rate_get,
3375 cdc_dma_tx_sample_rate_put),
3376};
3377
3378static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
3379 SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
3380 slim_rx_ch_get, slim_rx_ch_put),
3381 SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
3382 slim_rx_ch_get, slim_rx_ch_put),
3383 SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
3384 slim_tx_ch_get, slim_tx_ch_put),
3385 SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
3386 slim_tx_ch_get, slim_tx_ch_put),
3387 SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
3388 slim_rx_ch_get, slim_rx_ch_put),
3389 SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
3390 slim_rx_ch_get, slim_rx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303391 SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
3392 slim_rx_bit_format_get, slim_rx_bit_format_put),
3393 SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
3394 slim_rx_bit_format_get, slim_rx_bit_format_put),
3395 SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
3396 slim_rx_bit_format_get, slim_rx_bit_format_put),
3397 SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
3398 slim_tx_bit_format_get, slim_tx_bit_format_put),
3399 SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
3400 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3401 SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
3402 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3403 SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
3404 slim_tx_sample_rate_get, slim_tx_sample_rate_put),
3405 SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
3406 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3407 SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
3408 slim_rx_sample_rate_get, slim_rx_sample_rate_put),
3409};
3410
3411static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3412 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3413 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3414 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3415 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3416 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3417 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3418 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3419 proxy_rx_ch_get, proxy_rx_ch_put),
3420 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3421 usb_audio_rx_format_get, usb_audio_rx_format_put),
3422 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3423 usb_audio_tx_format_get, usb_audio_tx_format_put),
3424 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3425 ext_disp_rx_format_get, ext_disp_rx_format_put),
3426 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3427 usb_audio_rx_sample_rate_get,
3428 usb_audio_rx_sample_rate_put),
3429 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3430 usb_audio_tx_sample_rate_get,
3431 usb_audio_tx_sample_rate_put),
3432 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3433 ext_disp_rx_sample_rate_get,
3434 ext_disp_rx_sample_rate_put),
3435 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3436 tdm_rx_sample_rate_get,
3437 tdm_rx_sample_rate_put),
3438 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3439 tdm_tx_sample_rate_get,
3440 tdm_tx_sample_rate_put),
3441 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3442 tdm_rx_format_get,
3443 tdm_rx_format_put),
3444 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3445 tdm_tx_format_get,
3446 tdm_tx_format_put),
3447 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3448 tdm_rx_ch_get,
3449 tdm_rx_ch_put),
3450 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3451 tdm_tx_ch_get,
3452 tdm_tx_ch_put),
3453 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3454 tdm_rx_sample_rate_get,
3455 tdm_rx_sample_rate_put),
3456 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3457 tdm_tx_sample_rate_get,
3458 tdm_tx_sample_rate_put),
3459 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3460 tdm_rx_format_get,
3461 tdm_rx_format_put),
3462 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3463 tdm_tx_format_get,
3464 tdm_tx_format_put),
3465 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3466 tdm_rx_ch_get,
3467 tdm_rx_ch_put),
3468 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3469 tdm_tx_ch_get,
3470 tdm_tx_ch_put),
3471 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3472 tdm_rx_sample_rate_get,
3473 tdm_rx_sample_rate_put),
3474 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3475 tdm_tx_sample_rate_get,
3476 tdm_tx_sample_rate_put),
3477 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3478 tdm_rx_format_get,
3479 tdm_rx_format_put),
3480 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3481 tdm_tx_format_get,
3482 tdm_tx_format_put),
3483 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3484 tdm_rx_ch_get,
3485 tdm_rx_ch_put),
3486 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3487 tdm_tx_ch_get,
3488 tdm_tx_ch_put),
3489 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3490 tdm_rx_sample_rate_get,
3491 tdm_rx_sample_rate_put),
3492 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3493 tdm_tx_sample_rate_get,
3494 tdm_tx_sample_rate_put),
3495 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3496 tdm_rx_format_get,
3497 tdm_rx_format_put),
3498 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3499 tdm_tx_format_get,
3500 tdm_tx_format_put),
3501 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3502 tdm_rx_ch_get,
3503 tdm_rx_ch_put),
3504 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3505 tdm_tx_ch_get,
3506 tdm_tx_ch_put),
3507 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3508 tdm_rx_sample_rate_get,
3509 tdm_rx_sample_rate_put),
3510 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3511 tdm_tx_sample_rate_get,
3512 tdm_tx_sample_rate_put),
3513 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3514 tdm_rx_format_get,
3515 tdm_rx_format_put),
3516 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3517 tdm_tx_format_get,
3518 tdm_tx_format_put),
3519 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3520 tdm_rx_ch_get,
3521 tdm_rx_ch_put),
3522 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3523 tdm_tx_ch_get,
3524 tdm_tx_ch_put),
3525 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3526 aux_pcm_rx_sample_rate_get,
3527 aux_pcm_rx_sample_rate_put),
3528 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3529 aux_pcm_rx_sample_rate_get,
3530 aux_pcm_rx_sample_rate_put),
3531 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3532 aux_pcm_rx_sample_rate_get,
3533 aux_pcm_rx_sample_rate_put),
3534 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3535 aux_pcm_rx_sample_rate_get,
3536 aux_pcm_rx_sample_rate_put),
3537 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3538 aux_pcm_rx_sample_rate_get,
3539 aux_pcm_rx_sample_rate_put),
3540 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3541 aux_pcm_tx_sample_rate_get,
3542 aux_pcm_tx_sample_rate_put),
3543 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3544 aux_pcm_tx_sample_rate_get,
3545 aux_pcm_tx_sample_rate_put),
3546 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3547 aux_pcm_tx_sample_rate_get,
3548 aux_pcm_tx_sample_rate_put),
3549 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3550 aux_pcm_tx_sample_rate_get,
3551 aux_pcm_tx_sample_rate_put),
3552 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3553 aux_pcm_tx_sample_rate_get,
3554 aux_pcm_tx_sample_rate_put),
3555 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3556 mi2s_rx_sample_rate_get,
3557 mi2s_rx_sample_rate_put),
3558 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3559 mi2s_rx_sample_rate_get,
3560 mi2s_rx_sample_rate_put),
3561 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3562 mi2s_rx_sample_rate_get,
3563 mi2s_rx_sample_rate_put),
3564 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3565 mi2s_rx_sample_rate_get,
3566 mi2s_rx_sample_rate_put),
3567 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3568 mi2s_rx_sample_rate_get,
3569 mi2s_rx_sample_rate_put),
3570 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3571 mi2s_tx_sample_rate_get,
3572 mi2s_tx_sample_rate_put),
3573 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3574 mi2s_tx_sample_rate_get,
3575 mi2s_tx_sample_rate_put),
3576 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3577 mi2s_tx_sample_rate_get,
3578 mi2s_tx_sample_rate_put),
3579 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3580 mi2s_tx_sample_rate_get,
3581 mi2s_tx_sample_rate_put),
3582 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3583 mi2s_tx_sample_rate_get,
3584 mi2s_tx_sample_rate_put),
3585 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3586 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3587 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3588 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3589 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3590 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3591 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3592 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3593 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3594 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3595 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3596 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3597 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3598 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3599 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3600 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3601 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3602 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3603 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3604 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3605 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3606 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3607 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3608 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3609 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3610 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3611 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3612 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3613 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3614 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3615 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3616 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3617 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3618 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3619 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3620 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3621 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3622 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3623 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3624 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3625 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3626 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3627 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3628 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3629 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3630 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3631 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3632 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3633 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3634 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3635 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3636 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3637 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3638 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3639 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3640 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3641 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3642 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3643 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3644 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3645 SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
3646 msm_hifi_put),
3647 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3648 msm_bt_sample_rate_get,
3649 msm_bt_sample_rate_put),
Vatsal Bucha89262e62018-08-31 11:57:09 +05303650 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3651 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303652};
3653
3654static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
3655 int enable, bool dapm)
3656{
3657 int ret = 0;
3658
3659 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3660 ret = tavil_cdc_mclk_enable(codec, enable);
3661 } else {
3662 dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
3663 __func__);
3664 ret = -EINVAL;
3665 }
3666 return ret;
3667}
3668
3669static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
3670 int enable, bool dapm)
3671{
3672 int ret = 0;
3673
3674 if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
3675 ret = tavil_cdc_mclk_tx_enable(codec, enable);
3676 } else {
3677 dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
3678 __func__);
3679 ret = -EINVAL;
3680 }
3681
3682 return ret;
3683}
3684
3685static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
3686 struct snd_kcontrol *kcontrol, int event)
3687{
3688 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3689
3690 pr_debug("%s: event = %d\n", __func__, event);
3691
3692 switch (event) {
3693 case SND_SOC_DAPM_PRE_PMU:
3694 return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
3695 case SND_SOC_DAPM_POST_PMD:
3696 return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
3697 }
3698 return 0;
3699}
3700
3701static int msm_mclk_event(struct snd_soc_dapm_widget *w,
3702 struct snd_kcontrol *kcontrol, int event)
3703{
3704 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3705
3706 pr_debug("%s: event = %d\n", __func__, event);
3707
3708 switch (event) {
3709 case SND_SOC_DAPM_PRE_PMU:
3710 return msm_snd_enable_codec_ext_clk(codec, 1, true);
3711 case SND_SOC_DAPM_POST_PMD:
3712 return msm_snd_enable_codec_ext_clk(codec, 0, true);
3713 }
3714 return 0;
3715}
3716
3717static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
3718 struct snd_kcontrol *k, int event)
3719{
3720 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3721 struct snd_soc_card *card = codec->component.card;
3722 struct msm_asoc_mach_data *pdata =
3723 snd_soc_card_get_drvdata(card);
3724
3725 dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
3726 __func__, msm_hifi_control);
3727
3728 if (!pdata || !pdata->hph_en0_gpio_p) {
3729 dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
3730 return -EINVAL;
3731 }
3732
3733 if (msm_hifi_control != MSM_HIFI_ON) {
3734 dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
3735 __func__);
3736 return 0;
3737 }
3738
3739 switch (event) {
3740 case SND_SOC_DAPM_POST_PMU:
3741 msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
3742 break;
3743 case SND_SOC_DAPM_PRE_PMD:
3744 msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
3745 break;
3746 }
3747
3748 return 0;
3749}
3750
3751static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
3752
3753 SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
3754 msm_mclk_event,
3755 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3756
3757 SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
3758 msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
3759
3760 SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
3761 SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
3762 SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
3763 SND_SOC_DAPM_MIC("Handset Mic", NULL),
3764 SND_SOC_DAPM_MIC("Headset Mic", NULL),
3765 SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
3766 SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
3767 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
3768
3769 SND_SOC_DAPM_MIC("Digital Mic0", NULL),
3770 SND_SOC_DAPM_MIC("Digital Mic1", NULL),
3771 SND_SOC_DAPM_MIC("Digital Mic2", NULL),
3772 SND_SOC_DAPM_MIC("Digital Mic3", NULL),
3773 SND_SOC_DAPM_MIC("Digital Mic4", NULL),
3774 SND_SOC_DAPM_MIC("Digital Mic5", NULL),
3775};
3776
3777static int msm_dmic_event(struct snd_soc_dapm_widget *w,
3778 struct snd_kcontrol *kcontrol, int event)
3779{
3780 struct msm_asoc_mach_data *pdata = NULL;
3781 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
3782 int ret = 0;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05303783 u32 dmic_idx;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05303784 int *dmic_gpio_cnt;
3785 struct device_node *dmic_gpio;
3786 char *wname;
3787
3788 wname = strpbrk(w->name, "0123");
3789 if (!wname) {
3790 dev_err(codec->dev, "%s: widget not found\n", __func__);
3791 return -EINVAL;
3792 }
3793
3794 ret = kstrtouint(wname, 10, &dmic_idx);
3795 if (ret < 0) {
3796 dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
3797 __func__);
3798 return -EINVAL;
3799 }
3800
3801 pdata = snd_soc_card_get_drvdata(codec->component.card);
3802
3803 switch (dmic_idx) {
3804 case 0:
3805 case 1:
3806 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
3807 dmic_gpio = pdata->dmic01_gpio_p;
3808 break;
3809 case 2:
3810 case 3:
3811 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
3812 dmic_gpio = pdata->dmic23_gpio_p;
3813 break;
3814 default:
3815 dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
3816 __func__);
3817 return -EINVAL;
3818 }
3819
3820 dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
3821 __func__, event, dmic_idx, *dmic_gpio_cnt);
3822
3823 switch (event) {
3824 case SND_SOC_DAPM_PRE_PMU:
3825 (*dmic_gpio_cnt)++;
3826 if (*dmic_gpio_cnt == 1) {
3827 ret = msm_cdc_pinctrl_select_active_state(
3828 dmic_gpio);
3829 if (ret < 0) {
3830 pr_err("%s: gpio set cannot be activated %sd",
3831 __func__, "dmic_gpio");
3832 return ret;
3833 }
3834 }
3835
3836 break;
3837 case SND_SOC_DAPM_POST_PMD:
3838 (*dmic_gpio_cnt)--;
3839 if (*dmic_gpio_cnt == 0) {
3840 ret = msm_cdc_pinctrl_select_sleep_state(
3841 dmic_gpio);
3842 if (ret < 0) {
3843 pr_err("%s: gpio set cannot be de-activated %sd",
3844 __func__, "dmic_gpio");
3845 return ret;
3846 }
3847 }
3848 break;
3849 default:
3850 pr_err("%s: invalid DAPM event %d\n", __func__, event);
3851 return -EINVAL;
3852 }
3853 return 0;
3854}
3855
3856static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
3857 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
3858 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
3859 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
3860 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
3861 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
3862 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
3863 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
3864 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
3865};
3866
3867static inline int param_is_mask(int p)
3868{
3869 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
3870 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
3871}
3872
3873static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
3874 int n)
3875{
3876 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
3877}
3878
3879static void param_set_mask(struct snd_pcm_hw_params *p, int n,
3880 unsigned int bit)
3881{
3882 if (bit >= SNDRV_MASK_MAX)
3883 return;
3884 if (param_is_mask(n)) {
3885 struct snd_mask *m = param_to_mask(p, n);
3886
3887 m->bits[0] = 0;
3888 m->bits[1] = 0;
3889 m->bits[bit >> 5] |= (1 << (bit & 31));
3890 }
3891}
3892
3893static int msm_slim_get_ch_from_beid(int32_t be_id)
3894{
3895 int ch_id = 0;
3896
3897 switch (be_id) {
3898 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
3899 ch_id = SLIM_RX_0;
3900 break;
3901 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
3902 ch_id = SLIM_RX_1;
3903 break;
3904 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
3905 ch_id = SLIM_RX_2;
3906 break;
3907 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
3908 ch_id = SLIM_RX_3;
3909 break;
3910 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
3911 ch_id = SLIM_RX_4;
3912 break;
3913 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
3914 ch_id = SLIM_RX_6;
3915 break;
3916 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
3917 ch_id = SLIM_TX_0;
3918 break;
3919 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
3920 ch_id = SLIM_TX_3;
3921 break;
3922 default:
3923 ch_id = SLIM_RX_0;
3924 break;
3925 }
3926
3927 return ch_id;
3928}
3929
3930static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
3931{
3932 int idx = 0;
3933
3934 switch (be_id) {
3935 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3936 idx = WSA_CDC_DMA_RX_0;
3937 break;
3938 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3939 idx = WSA_CDC_DMA_TX_0;
3940 break;
3941 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3942 idx = WSA_CDC_DMA_RX_1;
3943 break;
3944 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3945 idx = WSA_CDC_DMA_TX_1;
3946 break;
3947 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3948 idx = WSA_CDC_DMA_TX_2;
3949 break;
3950 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3951 idx = RX_CDC_DMA_RX_0;
3952 break;
3953 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3954 idx = RX_CDC_DMA_RX_1;
3955 break;
3956 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3957 idx = RX_CDC_DMA_RX_2;
3958 break;
3959 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3960 idx = RX_CDC_DMA_RX_3;
3961 break;
3962 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3963 idx = RX_CDC_DMA_RX_5;
3964 break;
3965 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3966 idx = TX_CDC_DMA_TX_0;
3967 break;
3968 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3969 idx = TX_CDC_DMA_TX_3;
3970 break;
3971 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3972 idx = TX_CDC_DMA_TX_4;
3973 break;
3974 default:
3975 idx = RX_CDC_DMA_RX_0;
3976 break;
3977 }
3978
3979 return idx;
3980}
3981
3982static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3983{
3984 int idx = -EINVAL;
3985
3986 switch (be_id) {
3987 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3988 idx = DP_RX_IDX;
3989 break;
3990 default:
3991 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3992 idx = -EINVAL;
3993 break;
3994 }
3995
3996 return idx;
3997}
3998
3999static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
4000 struct snd_pcm_hw_params *params)
4001{
4002 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4003 struct snd_interval *rate = hw_param_interval(params,
4004 SNDRV_PCM_HW_PARAM_RATE);
4005 struct snd_interval *channels = hw_param_interval(params,
4006 SNDRV_PCM_HW_PARAM_CHANNELS);
4007 int rc = 0;
4008 int idx;
4009 void *config = NULL;
4010 struct snd_soc_codec *codec = NULL;
4011
4012 pr_debug("%s: format = %d, rate = %d\n",
4013 __func__, params_format(params), params_rate(params));
4014
4015 switch (dai_link->id) {
4016 case MSM_BACKEND_DAI_SLIMBUS_0_RX:
4017 case MSM_BACKEND_DAI_SLIMBUS_1_RX:
4018 case MSM_BACKEND_DAI_SLIMBUS_2_RX:
4019 case MSM_BACKEND_DAI_SLIMBUS_3_RX:
4020 case MSM_BACKEND_DAI_SLIMBUS_4_RX:
4021 case MSM_BACKEND_DAI_SLIMBUS_6_RX:
4022 idx = msm_slim_get_ch_from_beid(dai_link->id);
4023 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4024 slim_rx_cfg[idx].bit_format);
4025 rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
4026 channels->min = channels->max = slim_rx_cfg[idx].channels;
4027 break;
4028
4029 case MSM_BACKEND_DAI_SLIMBUS_0_TX:
4030 case MSM_BACKEND_DAI_SLIMBUS_3_TX:
4031 idx = msm_slim_get_ch_from_beid(dai_link->id);
4032 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4033 slim_tx_cfg[idx].bit_format);
4034 rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
4035 channels->min = channels->max = slim_tx_cfg[idx].channels;
4036 break;
4037
4038 case MSM_BACKEND_DAI_SLIMBUS_1_TX:
4039 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4040 slim_tx_cfg[1].bit_format);
4041 rate->min = rate->max = slim_tx_cfg[1].sample_rate;
4042 channels->min = channels->max = slim_tx_cfg[1].channels;
4043 break;
4044
4045 case MSM_BACKEND_DAI_SLIMBUS_4_TX:
4046 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4047 SNDRV_PCM_FORMAT_S32_LE);
4048 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4049 channels->min = channels->max = msm_vi_feed_tx_ch;
4050 break;
4051
4052 case MSM_BACKEND_DAI_SLIMBUS_5_RX:
4053 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4054 slim_rx_cfg[5].bit_format);
4055 rate->min = rate->max = slim_rx_cfg[5].sample_rate;
4056 channels->min = channels->max = slim_rx_cfg[5].channels;
4057 break;
4058
4059 case MSM_BACKEND_DAI_SLIMBUS_5_TX:
4060 codec = rtd->codec;
4061 rate->min = rate->max = SAMPLING_RATE_16KHZ;
4062 channels->min = channels->max = 1;
4063
4064 config = msm_codec_fn.get_afe_config_fn(codec,
4065 AFE_SLIMBUS_SLAVE_PORT_CONFIG);
4066 if (config) {
4067 rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
4068 config, SLIMBUS_5_TX);
4069 if (rc)
4070 pr_err("%s: Failed to set slimbus slave port config %d\n",
4071 __func__, rc);
4072 }
4073 break;
4074
4075 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4076 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4077 slim_rx_cfg[SLIM_RX_7].bit_format);
4078 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4079 channels->min = channels->max =
4080 slim_rx_cfg[SLIM_RX_7].channels;
4081 break;
4082
4083 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4084 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4085 channels->min = channels->max =
4086 slim_tx_cfg[SLIM_TX_7].channels;
4087 break;
4088
4089 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4090 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4091 channels->min = channels->max =
4092 slim_tx_cfg[SLIM_TX_8].channels;
4093 break;
4094
4095 case MSM_BACKEND_DAI_USB_RX:
4096 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4097 usb_rx_cfg.bit_format);
4098 rate->min = rate->max = usb_rx_cfg.sample_rate;
4099 channels->min = channels->max = usb_rx_cfg.channels;
4100 break;
4101
4102 case MSM_BACKEND_DAI_USB_TX:
4103 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4104 usb_tx_cfg.bit_format);
4105 rate->min = rate->max = usb_tx_cfg.sample_rate;
4106 channels->min = channels->max = usb_tx_cfg.channels;
4107 break;
4108
4109 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
4110 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
4111 if (idx < 0) {
4112 pr_err("%s: Incorrect ext disp idx %d\n",
4113 __func__, idx);
4114 rc = idx;
4115 goto done;
4116 }
4117
4118 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4119 ext_disp_rx_cfg[idx].bit_format);
4120 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
4121 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
4122 break;
4123
4124 case MSM_BACKEND_DAI_AFE_PCM_RX:
4125 channels->min = channels->max = proxy_rx_cfg.channels;
4126 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4127 break;
4128
4129 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
4130 channels->min = channels->max =
4131 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4132 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4133 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
4134 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
4135 break;
4136
4137 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
4138 channels->min = channels->max =
4139 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4140 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4141 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
4142 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
4143 break;
4144
4145 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
4146 channels->min = channels->max =
4147 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4148 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4149 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
4150 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
4151 break;
4152
4153 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
4154 channels->min = channels->max =
4155 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4156 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4157 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
4158 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
4159 break;
4160
4161 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
4162 channels->min = channels->max =
4163 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4164 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4165 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
4166 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
4167 break;
4168
4169 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
4170 channels->min = channels->max =
4171 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4172 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4173 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
4174 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
4175 break;
4176
4177 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
4178 channels->min = channels->max =
4179 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4180 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4181 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
4182 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
4183 break;
4184
4185 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
4186 channels->min = channels->max =
4187 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4188 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4189 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
4190 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
4191 break;
4192
4193 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
4194 channels->min = channels->max =
4195 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4196 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4197 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
4198 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
4199 break;
4200
4201 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
4202 channels->min = channels->max =
4203 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4204 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4205 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
4206 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
4207 break;
4208
4209
4210 case MSM_BACKEND_DAI_AUXPCM_RX:
4211 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4212 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
4213 rate->min = rate->max =
4214 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
4215 channels->min = channels->max =
4216 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
4217 break;
4218
4219 case MSM_BACKEND_DAI_AUXPCM_TX:
4220 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4221 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
4222 rate->min = rate->max =
4223 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
4224 channels->min = channels->max =
4225 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
4226 break;
4227
4228 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
4229 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4230 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
4231 rate->min = rate->max =
4232 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
4233 channels->min = channels->max =
4234 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
4235 break;
4236
4237 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
4238 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4239 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
4240 rate->min = rate->max =
4241 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
4242 channels->min = channels->max =
4243 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
4244 break;
4245
4246 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
4247 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4248 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
4249 rate->min = rate->max =
4250 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
4251 channels->min = channels->max =
4252 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
4253 break;
4254
4255 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
4256 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4257 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
4258 rate->min = rate->max =
4259 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
4260 channels->min = channels->max =
4261 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
4262 break;
4263
4264 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
4265 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4266 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
4267 rate->min = rate->max =
4268 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
4269 channels->min = channels->max =
4270 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
4271 break;
4272
4273 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
4274 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4275 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
4276 rate->min = rate->max =
4277 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
4278 channels->min = channels->max =
4279 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
4280 break;
4281
4282 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
4283 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4284 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
4285 rate->min = rate->max =
4286 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
4287 channels->min = channels->max =
4288 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
4289 break;
4290
4291 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
4292 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4293 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
4294 rate->min = rate->max =
4295 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
4296 channels->min = channels->max =
4297 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
4298 break;
4299
4300 case MSM_BACKEND_DAI_PRI_MI2S_RX:
4301 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4302 mi2s_rx_cfg[PRIM_MI2S].bit_format);
4303 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
4304 channels->min = channels->max =
4305 mi2s_rx_cfg[PRIM_MI2S].channels;
4306 break;
4307
4308 case MSM_BACKEND_DAI_PRI_MI2S_TX:
4309 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4310 mi2s_tx_cfg[PRIM_MI2S].bit_format);
4311 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
4312 channels->min = channels->max =
4313 mi2s_tx_cfg[PRIM_MI2S].channels;
4314 break;
4315
4316 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
4317 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4318 mi2s_rx_cfg[SEC_MI2S].bit_format);
4319 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4320 channels->min = channels->max =
4321 mi2s_rx_cfg[SEC_MI2S].channels;
4322 break;
4323
4324 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4325 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4326 mi2s_tx_cfg[SEC_MI2S].bit_format);
4327 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4328 channels->min = channels->max =
4329 mi2s_tx_cfg[SEC_MI2S].channels;
4330 break;
4331
4332 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4333 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4334 mi2s_rx_cfg[TERT_MI2S].bit_format);
4335 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4336 channels->min = channels->max =
4337 mi2s_rx_cfg[TERT_MI2S].channels;
4338 break;
4339
4340 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4341 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4342 mi2s_tx_cfg[TERT_MI2S].bit_format);
4343 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4344 channels->min = channels->max =
4345 mi2s_tx_cfg[TERT_MI2S].channels;
4346 break;
4347
4348 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4350 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4351 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4352 channels->min = channels->max =
4353 mi2s_rx_cfg[QUAT_MI2S].channels;
4354 break;
4355
4356 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4357 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4358 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4359 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4360 channels->min = channels->max =
4361 mi2s_tx_cfg[QUAT_MI2S].channels;
4362 break;
4363
4364 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4365 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4366 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4367 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4368 channels->min = channels->max =
4369 mi2s_rx_cfg[QUIN_MI2S].channels;
4370 break;
4371
4372 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4373 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4374 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4375 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4376 channels->min = channels->max =
4377 mi2s_tx_cfg[QUIN_MI2S].channels;
4378 break;
4379
4380 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4381 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4382 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4383 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4384 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4385 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4386 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4387 cdc_dma_rx_cfg[idx].bit_format);
4388 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4389 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4390 break;
4391
4392 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4393 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4394 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05304395 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4396 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304397 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4398 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4399 cdc_dma_tx_cfg[idx].bit_format);
4400 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4401 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4402 break;
4403
4404 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4405 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4406 SNDRV_PCM_FORMAT_S32_LE);
4407 rate->min = rate->max = SAMPLING_RATE_8KHZ;
4408 channels->min = channels->max = msm_vi_feed_tx_ch;
4409 break;
4410
4411 default:
4412 rate->min = rate->max = SAMPLING_RATE_48KHZ;
4413 break;
4414 }
4415
4416done:
4417 return rc;
4418}
4419
4420static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4421{
4422 int value = 0;
4423 bool ret = 0;
4424 struct snd_soc_card *card = codec->component.card;
4425 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4426 struct pinctrl_state *en2_pinctrl_active;
4427 struct pinctrl_state *en2_pinctrl_sleep;
4428
4429 if (!pdata->usbc_en2_gpio_p) {
4430 if (active) {
4431 /* if active and usbc_en2_gpio undefined, get pin */
4432 pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
4433 if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
4434 dev_err(card->dev,
4435 "%s: Can't get EN2 gpio pinctrl:%ld\n",
4436 __func__,
4437 PTR_ERR(pdata->usbc_en2_gpio_p));
4438 pdata->usbc_en2_gpio_p = NULL;
4439 return false;
4440 }
4441 } else {
4442 /* if not active and usbc_en2_gpio undefined, return */
4443 return false;
4444 }
4445 }
4446
4447 pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
4448 "qcom,usbc-analog-en2-gpio", 0);
4449 if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
4450 dev_err(card->dev, "%s, property %s not in node %s",
4451 __func__, "qcom,usbc-analog-en2-gpio",
4452 card->dev->of_node->full_name);
4453 return false;
4454 }
4455
4456 en2_pinctrl_active = pinctrl_lookup_state(
4457 pdata->usbc_en2_gpio_p, "aud_active");
4458 if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
4459 dev_err(card->dev,
4460 "%s: Cannot get aud_active pinctrl state:%ld\n",
4461 __func__, PTR_ERR(en2_pinctrl_active));
4462 ret = false;
4463 goto err_lookup_state;
4464 }
4465
4466 en2_pinctrl_sleep = pinctrl_lookup_state(
4467 pdata->usbc_en2_gpio_p, "aud_sleep");
4468 if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
4469 dev_err(card->dev,
4470 "%s: Cannot get aud_sleep pinctrl state:%ld\n",
4471 __func__, PTR_ERR(en2_pinctrl_sleep));
4472 ret = false;
4473 goto err_lookup_state;
4474 }
4475
4476 /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
4477 if (active) {
4478 dev_dbg(codec->dev, "%s: enter\n", __func__);
4479 if (pdata->usbc_en2_gpio_p) {
4480 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4481 if (value)
4482 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4483 en2_pinctrl_sleep);
4484 else
4485 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4486 en2_pinctrl_active);
4487 } else if (pdata->usbc_en2_gpio >= 0) {
4488 value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
4489 gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
4490 }
4491 pr_debug("%s: swap select switch %d to %d\n", __func__,
4492 value, !value);
4493 ret = true;
4494 } else {
4495 /* if not active, release usbc_en2_gpio_p pin */
4496 pinctrl_select_state(pdata->usbc_en2_gpio_p,
4497 en2_pinctrl_sleep);
4498 }
4499
4500err_lookup_state:
4501 devm_pinctrl_put(pdata->usbc_en2_gpio_p);
4502 pdata->usbc_en2_gpio_p = NULL;
4503 return ret;
4504}
4505
4506static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
4507{
4508 int value = 0;
4509 bool ret = false;
4510 struct snd_soc_card *card;
4511 struct msm_asoc_mach_data *pdata;
4512
4513 if (!codec) {
4514 pr_err("%s codec is NULL\n", __func__);
4515 return false;
4516 }
4517 card = codec->component.card;
4518 pdata = snd_soc_card_get_drvdata(card);
4519
4520 if (!pdata)
4521 return false;
4522
4523 if (wcd_mbhc_cfg.enable_usbc_analog)
4524 return msm_usbc_swap_gnd_mic(codec, active);
4525
4526 /* if usbc is not defined, swap using us_euro_gpio_p */
4527 if (pdata->us_euro_gpio_p) {
4528 value = msm_cdc_pinctrl_get_state(
4529 pdata->us_euro_gpio_p);
4530 if (value)
4531 msm_cdc_pinctrl_select_sleep_state(
4532 pdata->us_euro_gpio_p);
4533 else
4534 msm_cdc_pinctrl_select_active_state(
4535 pdata->us_euro_gpio_p);
4536 dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
4537 __func__, value, !value);
4538 ret = true;
4539 }
4540 return ret;
4541}
4542
4543static int msm_afe_set_config(struct snd_soc_codec *codec)
4544{
4545 int ret = 0;
4546 void *config_data = NULL;
4547
4548 if (!msm_codec_fn.get_afe_config_fn) {
4549 dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
4550 __func__);
4551 return -EINVAL;
4552 }
4553
4554 config_data = msm_codec_fn.get_afe_config_fn(codec,
4555 AFE_CDC_REGISTERS_CONFIG);
4556 if (config_data) {
4557 ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
4558 if (ret) {
4559 dev_err(codec->dev,
4560 "%s: Failed to set codec registers config %d\n",
4561 __func__, ret);
4562 return ret;
4563 }
4564 }
4565
4566 config_data = msm_codec_fn.get_afe_config_fn(codec,
4567 AFE_CDC_REGISTER_PAGE_CONFIG);
4568 if (config_data) {
4569 ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
4570 0);
4571 if (ret)
4572 dev_err(codec->dev,
4573 "%s: Failed to set cdc register page config\n",
4574 __func__);
4575 }
4576
4577 config_data = msm_codec_fn.get_afe_config_fn(codec,
4578 AFE_SLIMBUS_SLAVE_CONFIG);
4579 if (config_data) {
4580 ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
4581 if (ret) {
4582 dev_err(codec->dev,
4583 "%s: Failed to set slimbus slave config %d\n",
4584 __func__, ret);
4585 return ret;
4586 }
4587 }
4588
4589 return 0;
4590}
4591
4592static void msm_afe_clear_config(void)
4593{
4594 afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
4595 afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
4596}
4597
4598static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
4599 struct snd_card *card)
4600{
4601 int ret = 0;
4602 unsigned long timeout;
4603 int adsp_ready = 0;
4604 bool snd_card_online = 0;
4605
4606 timeout = jiffies +
4607 msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
4608
4609 do {
4610 if (!snd_card_online) {
4611 snd_card_online = snd_card_is_online_state(card);
4612 pr_debug("%s: Sound card is %s\n", __func__,
4613 snd_card_online ? "Online" : "Offline");
4614 }
4615 if (!adsp_ready) {
4616 adsp_ready = q6core_is_adsp_ready();
4617 pr_debug("%s: ADSP Audio is %s\n", __func__,
4618 adsp_ready ? "ready" : "not ready");
4619 }
4620 if (snd_card_online && adsp_ready)
4621 break;
4622
4623 /*
4624 * Sound card/ADSP will be coming up after subsystem restart and
4625 * it might not be fully up when the control reaches
4626 * here. So, wait for 50msec before checking ADSP state
4627 */
4628 msleep(50);
4629 } while (time_after(timeout, jiffies));
4630
4631 if (!snd_card_online || !adsp_ready) {
4632 pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
4633 __func__,
4634 snd_card_online ? "Online" : "Offline",
4635 adsp_ready ? "ready" : "not ready");
4636 ret = -ETIMEDOUT;
4637 goto err;
4638 }
4639
4640 ret = msm_afe_set_config(codec);
4641 if (ret)
4642 pr_err("%s: Failed to set AFE config. err %d\n",
4643 __func__, ret);
4644
4645 return 0;
4646
4647err:
4648 return ret;
4649}
4650
4651static int sm6150_notifier_service_cb(struct notifier_block *this,
4652 unsigned long opcode, void *ptr)
4653{
4654 int ret;
4655 struct snd_soc_card *card = NULL;
4656 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
4657 struct snd_soc_pcm_runtime *rtd;
4658 struct snd_soc_codec *codec;
4659
4660 pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
4661
4662 switch (opcode) {
4663 case AUDIO_NOTIFIER_SERVICE_DOWN:
4664 /*
4665 * Use flag to ignore initial boot notifications
4666 * On initial boot msm_adsp_power_up_config is
4667 * called on init. There is no need to clear
4668 * and set the config again on initial boot.
4669 */
4670 if (is_initial_boot)
4671 break;
4672 msm_afe_clear_config();
4673 break;
4674 case AUDIO_NOTIFIER_SERVICE_UP:
4675 if (is_initial_boot) {
4676 is_initial_boot = false;
4677 break;
4678 }
4679 if (!spdev)
4680 return -EINVAL;
4681
4682 card = platform_get_drvdata(spdev);
4683 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
4684 if (!rtd) {
4685 dev_err(card->dev,
4686 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
4687 __func__, be_dl_name);
4688 ret = -EINVAL;
4689 goto err;
4690 }
4691 codec = rtd->codec;
4692
4693 ret = msm_adsp_power_up_config(codec, card->snd_card);
4694 if (ret < 0) {
4695 dev_err(card->dev,
4696 "%s: msm_adsp_power_up_config failed ret = %d!\n",
4697 __func__, ret);
4698 goto err;
4699 }
4700 break;
4701 default:
4702 break;
4703 }
4704err:
4705 return NOTIFY_OK;
4706}
4707
4708static struct notifier_block service_nb = {
4709 .notifier_call = sm6150_notifier_service_cb,
4710 .priority = -INT_MAX,
4711};
4712
4713static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
4714{
4715 int ret = 0;
4716 void *config_data;
4717 struct snd_soc_codec *codec = rtd->codec;
4718 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4719 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4720 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4721 struct snd_soc_component *aux_comp;
4722 struct snd_card *card;
4723 struct snd_info_entry *entry;
4724 struct msm_asoc_mach_data *pdata =
4725 snd_soc_card_get_drvdata(rtd->card);
4726
4727 /*
4728 * Codec SLIMBUS configuration
4729 * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
4730 * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
4731 * TX14, TX15, TX16
4732 */
4733 unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
4734 150, 151};
4735 unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
4736 134, 135, 136, 137, 138, 139,
4737 140, 141, 142, 143};
4738
4739 pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
4740
4741 rtd->pmdown_time = 0;
4742
4743 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
4744 ARRAY_SIZE(msm_tavil_snd_controls));
4745 if (ret < 0) {
4746 pr_err("%s: add_codec_controls failed, err %d\n",
4747 __func__, ret);
4748 return ret;
4749 }
4750
4751 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4752 ARRAY_SIZE(msm_common_snd_controls));
4753 if (ret < 0) {
4754 pr_err("%s: add_codec_controls failed, err %d\n",
4755 __func__, ret);
4756 return ret;
4757 }
4758
4759 snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
4760 ARRAY_SIZE(msm_dapm_widgets_tavil));
4761
4762 snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
4763 ARRAY_SIZE(wcd_audio_paths_tavil));
4764
4765 snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
4766 snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
4767 snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
4768 snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
4769 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4770 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4771 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4772 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4773 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4774 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
4775 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
4776 snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
4777 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
4778 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
4779 snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
4780 snd_soc_dapm_ignore_suspend(dapm, "EAR");
4781 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
4782 snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
4783 snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
4784 snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
4785 snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
4786 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
4787 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
4788 snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
4789 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
4790 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
4791 snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
4792
4793 snd_soc_dapm_sync(dapm);
4794
4795 snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4796 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4797
4798 msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
4799
4800 ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
4801 if (ret) {
4802 pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
4803 goto err;
4804 }
4805
4806 config_data = msm_codec_fn.get_afe_config_fn(codec,
4807 AFE_AANC_VERSION);
4808 if (config_data) {
4809 ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
4810 if (ret) {
4811 pr_err("%s: Failed to set aanc version %d\n",
4812 __func__, ret);
4813 goto err;
4814 }
4815 }
4816
4817 /*
4818 * Send speaker configuration only for WSA8810.
4819 * Default configuration is for WSA8815.
4820 */
4821 pr_debug("%s: Number of aux devices: %d\n",
4822 __func__, rtd->card->num_aux_devs);
4823 if (rtd->card->num_aux_devs &&
4824 !list_empty(&rtd->card->aux_comp_list)) {
4825 aux_comp = list_first_entry(&rtd->card->aux_comp_list,
4826 struct snd_soc_component, card_aux_list);
4827 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4828 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4829 tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
4830 tavil_set_spkr_gain_offset(rtd->codec,
4831 WCD934X_RX_GAIN_OFFSET_M1P5_DB);
4832 }
4833 }
4834
4835 card = rtd->card->snd_card;
4836 entry = snd_info_create_subdir(card->module, "codecs",
4837 card->proc_root);
4838 if (!entry) {
4839 pr_debug("%s: Cannot create codecs module entry\n",
4840 __func__);
4841 ret = 0;
4842 goto err;
4843 }
4844 pdata->codec_root = entry;
4845 tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
4846
4847 codec_reg_done = true;
4848 return 0;
4849err:
4850 return ret;
4851}
4852
4853static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4854{
4855 int ret = 0;
4856 struct snd_soc_codec *codec = rtd->codec;
4857 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
4858 struct snd_card *card;
4859 struct snd_info_entry *entry;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304860 struct snd_soc_component *aux_comp;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304861 struct msm_asoc_mach_data *pdata =
4862 snd_soc_card_get_drvdata(rtd->card);
4863
4864 ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
4865 ARRAY_SIZE(msm_int_snd_controls));
4866 if (ret < 0) {
4867 pr_err("%s: add_codec_controls failed: %d\n",
4868 __func__, ret);
4869 return ret;
4870 }
4871 ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
4872 ARRAY_SIZE(msm_common_snd_controls));
4873 if (ret < 0) {
4874 pr_err("%s: add common snd controls failed: %d\n",
4875 __func__, ret);
4876 return ret;
4877 }
4878
4879 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4880 ARRAY_SIZE(msm_int_dapm_widgets));
4881
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304882 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304883 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4884 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4885 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304886
4887 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4888 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4889 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4890 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4891
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304892 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4893 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4894 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4895 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304896
4897 snd_soc_dapm_sync(dapm);
4898
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05304899 /*
4900 * Send speaker configuration only for WSA8810.
4901 * Default configuration is for WSA8815.
4902 */
4903 dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
4904 __func__, rtd->card->num_aux_devs);
4905 if (rtd->card->num_aux_devs &&
4906 !list_empty(&rtd->card->component_dev_list)) {
4907 aux_comp = list_first_entry(
4908 &rtd->card->component_dev_list,
4909 struct snd_soc_component,
4910 card_aux_list);
4911 if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
4912 !strcmp(aux_comp->name, WSA8810_NAME_2)) {
4913 wsa_macro_set_spkr_mode(rtd->codec,
4914 WSA_MACRO_SPKR_MODE_1);
4915 wsa_macro_set_spkr_gain_offset(rtd->codec,
4916 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
4917 }
4918 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304919 card = rtd->card->snd_card;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05304920 if (!pdata->codec_root) {
4921 entry = snd_info_create_subdir(card->module, "codecs",
4922 card->proc_root);
4923 if (!entry) {
4924 pr_debug("%s: Cannot create codecs module entry\n",
4925 __func__);
4926 ret = 0;
4927 goto err;
4928 }
4929 pdata->codec_root = entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304930 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05304931 bolero_info_create_codec_entry(pdata->codec_root, codec);
4932 codec_reg_done = true;
4933 return 0;
4934err:
4935 return ret;
4936}
4937
4938static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4939{
4940 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4941 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4942 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4943
4944 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4945 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4946}
4947
4948static void *def_wcd_mbhc_cal(void)
4949{
4950 void *wcd_mbhc_cal;
4951 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4952 u16 *btn_high;
4953
4954 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4955 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4956 if (!wcd_mbhc_cal)
4957 return NULL;
4958
4959#define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
4960 S(v_hs_max, 1600);
4961#undef S
4962#define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
4963 S(num_btn, WCD_MBHC_DEF_BUTTONS);
4964#undef S
4965
4966 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4967 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4968 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4969
4970 btn_high[0] = 75;
4971 btn_high[1] = 150;
4972 btn_high[2] = 237;
4973 btn_high[3] = 500;
4974 btn_high[4] = 500;
4975 btn_high[5] = 500;
4976 btn_high[6] = 500;
4977 btn_high[7] = 500;
4978
4979 return wcd_mbhc_cal;
4980}
4981
4982static int msm_snd_hw_params(struct snd_pcm_substream *substream,
4983 struct snd_pcm_hw_params *params)
4984{
4985 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4986 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4987 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4988 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4989
4990 int ret = 0;
4991 u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
4992 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4993 u32 user_set_tx_ch = 0;
4994 u32 rx_ch_count;
4995
4996 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4997 ret = snd_soc_dai_get_channel_map(codec_dai,
4998 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4999 if (ret < 0) {
5000 pr_err("%s: failed to get codec chan map, err:%d\n",
5001 __func__, ret);
5002 goto err;
5003 }
5004 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
5005 pr_debug("%s: rx_5_ch=%d\n", __func__,
5006 slim_rx_cfg[5].channels);
5007 rx_ch_count = slim_rx_cfg[5].channels;
5008 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
5009 pr_debug("%s: rx_2_ch=%d\n", __func__,
5010 slim_rx_cfg[2].channels);
5011 rx_ch_count = slim_rx_cfg[2].channels;
5012 } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
5013 pr_debug("%s: rx_6_ch=%d\n", __func__,
5014 slim_rx_cfg[6].channels);
5015 rx_ch_count = slim_rx_cfg[6].channels;
5016 } else {
5017 pr_debug("%s: rx_0_ch=%d\n", __func__,
5018 slim_rx_cfg[0].channels);
5019 rx_ch_count = slim_rx_cfg[0].channels;
5020 }
5021 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5022 rx_ch_count, rx_ch);
5023 if (ret < 0) {
5024 pr_err("%s: failed to set cpu chan map, err:%d\n",
5025 __func__, ret);
5026 goto err;
5027 }
5028 } else {
5029
5030 pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
5031 codec_dai->name, codec_dai->id, user_set_tx_ch);
5032 ret = snd_soc_dai_get_channel_map(codec_dai,
5033 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5034 if (ret < 0) {
5035 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5036 __func__, ret);
5037 goto err;
5038 }
5039 /* For <codec>_tx1 case */
5040 if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
5041 user_set_tx_ch = slim_tx_cfg[0].channels;
5042 /* For <codec>_tx3 case */
5043 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
5044 user_set_tx_ch = slim_tx_cfg[1].channels;
5045 else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
5046 user_set_tx_ch = msm_vi_feed_tx_ch;
5047 else
5048 user_set_tx_ch = tx_ch_cnt;
5049
5050 pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
5051 __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
5052 tx_ch_cnt, dai_link->id);
5053
5054 ret = snd_soc_dai_set_channel_map(cpu_dai,
5055 user_set_tx_ch, tx_ch, 0, 0);
5056 if (ret < 0)
5057 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5058 __func__, ret);
5059 }
5060
5061err:
5062 return ret;
5063}
5064
5065
5066static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
5067 struct snd_pcm_hw_params *params)
5068{
5069 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5070 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5071 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5072 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5073
5074 int ret = 0;
5075 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
5076 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5077 u32 user_set_tx_ch = 0;
5078 u32 user_set_rx_ch = 0;
5079 u32 ch_id;
5080
5081 ret = snd_soc_dai_get_channel_map(codec_dai,
5082 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
5083 &rx_ch_cdc_dma);
5084 if (ret < 0) {
5085 pr_err("%s: failed to get codec chan map, err:%d\n",
5086 __func__, ret);
5087 goto err;
5088 }
5089
5090 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5091 switch (dai_link->id) {
5092 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
5093 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
5094 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
5095 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
5096 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
5097 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
5098 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
5099 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
5100 {
5101 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5102 pr_debug("%s: id %d rx_ch=%d\n", __func__,
5103 ch_id, cdc_dma_rx_cfg[ch_id].channels);
5104 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
5105 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5106 user_set_rx_ch, &rx_ch_cdc_dma);
5107 if (ret < 0) {
5108 pr_err("%s: failed to set cpu chan map, err:%d\n",
5109 __func__, ret);
5110 goto err;
5111 }
5112
5113 }
5114 break;
5115 }
5116 } else {
5117 switch (dai_link->id) {
5118 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
5119 {
5120 user_set_tx_ch = msm_vi_feed_tx_ch;
5121 }
5122 break;
5123 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
5124 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
5125 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305126 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
5127 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305128 {
5129 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
5130 pr_debug("%s: id %d tx_ch=%d\n", __func__,
5131 ch_id, cdc_dma_tx_cfg[ch_id].channels);
5132 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
5133 }
5134 break;
5135 }
5136
5137 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
5138 &tx_ch_cdc_dma, 0, 0);
5139 if (ret < 0) {
5140 pr_err("%s: failed to set cpu chan map, err:%d\n",
5141 __func__, ret);
5142 goto err;
5143 }
5144 }
5145
5146err:
5147 return ret;
5148}
5149
5150static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
5151 struct snd_pcm_hw_params *params)
5152{
5153 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5154 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5155 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5156 unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
5157 unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
5158 unsigned int num_tx_ch = 0;
5159 unsigned int num_rx_ch = 0;
5160 int ret = 0;
5161
5162 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5163 num_rx_ch = params_channels(params);
5164 pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
5165 codec_dai->name, codec_dai->id, num_rx_ch);
5166 ret = snd_soc_dai_get_channel_map(codec_dai,
5167 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5168 if (ret < 0) {
5169 pr_err("%s: failed to get codec chan map, err:%d\n",
5170 __func__, ret);
5171 goto err;
5172 }
5173 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
5174 num_rx_ch, rx_ch);
5175 if (ret < 0) {
5176 pr_err("%s: failed to set cpu chan map, err:%d\n",
5177 __func__, ret);
5178 goto err;
5179 }
5180 } else {
5181 num_tx_ch = params_channels(params);
5182 pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
5183 codec_dai->name, codec_dai->id, num_tx_ch);
5184 ret = snd_soc_dai_get_channel_map(codec_dai,
5185 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5186 if (ret < 0) {
5187 pr_err("%s: failed to get tx codec chan map, err:%d\n",
5188 __func__, ret);
5189 goto err;
5190 }
5191 ret = snd_soc_dai_set_channel_map(cpu_dai,
5192 num_tx_ch, tx_ch, 0, 0);
5193 if (ret < 0) {
5194 pr_err("%s: failed to set tx cpu chan map, err:%d\n",
5195 __func__, ret);
5196 goto err;
5197 }
5198 }
5199
5200err:
5201 return ret;
5202}
5203
5204static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
5205 struct snd_pcm_hw_params *params)
5206{
5207 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5208 struct snd_soc_dai *codec_dai = rtd->codec_dai;
5209 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5210 struct snd_soc_dai_link *dai_link = rtd->dai_link;
5211 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
5212 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
5213 int ret;
5214
5215 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
5216 codec_dai->name, codec_dai->id);
5217 ret = snd_soc_dai_get_channel_map(codec_dai,
5218 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
5219 if (ret) {
5220 dev_err(rtd->dev,
5221 "%s: failed to get BTFM codec chan map\n, err:%d\n",
5222 __func__, ret);
5223 goto err;
5224 }
5225
5226 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
5227 __func__, tx_ch_cnt, dai_link->id);
5228
5229 ret = snd_soc_dai_set_channel_map(cpu_dai,
5230 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
5231 if (ret)
5232 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
5233 __func__, ret);
5234
5235err:
5236 return ret;
5237}
5238
5239static int msm_get_port_id(int be_id)
5240{
5241 int afe_port_id;
5242
5243 switch (be_id) {
5244 case MSM_BACKEND_DAI_PRI_MI2S_RX:
5245 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
5246 break;
5247 case MSM_BACKEND_DAI_PRI_MI2S_TX:
5248 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
5249 break;
5250 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
5251 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
5252 break;
5253 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
5254 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
5255 break;
5256 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
5257 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
5258 break;
5259 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
5260 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
5261 break;
5262 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
5263 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
5264 break;
5265 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
5266 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
5267 break;
5268 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
5269 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
5270 break;
5271 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
5272 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
5273 break;
5274 default:
5275 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
5276 afe_port_id = -EINVAL;
5277 }
5278
5279 return afe_port_id;
5280}
5281
5282static u32 get_mi2s_bits_per_sample(u32 bit_format)
5283{
5284 u32 bit_per_sample;
5285
5286 switch (bit_format) {
5287 case SNDRV_PCM_FORMAT_S32_LE:
5288 case SNDRV_PCM_FORMAT_S24_3LE:
5289 case SNDRV_PCM_FORMAT_S24_LE:
5290 bit_per_sample = 32;
5291 break;
5292 case SNDRV_PCM_FORMAT_S16_LE:
5293 default:
5294 bit_per_sample = 16;
5295 break;
5296 }
5297
5298 return bit_per_sample;
5299}
5300
5301static void update_mi2s_clk_val(int dai_id, int stream)
5302{
5303 u32 bit_per_sample;
5304
5305 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
5306 bit_per_sample =
5307 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
5308 mi2s_clk[dai_id].clk_freq_in_hz =
5309 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5310 } else {
5311 bit_per_sample =
5312 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
5313 mi2s_clk[dai_id].clk_freq_in_hz =
5314 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
5315 }
5316}
5317
5318static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
5319{
5320 int ret = 0;
5321 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5322 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5323 int port_id = 0;
5324 int index = cpu_dai->id;
5325
5326 port_id = msm_get_port_id(rtd->dai_link->id);
5327 if (port_id < 0) {
5328 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
5329 ret = port_id;
5330 goto err;
5331 }
5332
5333 if (enable) {
5334 update_mi2s_clk_val(index, substream->stream);
5335 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
5336 mi2s_clk[index].clk_freq_in_hz);
5337 }
5338
5339 mi2s_clk[index].enable = enable;
5340 ret = afe_set_lpass_clock_v2(port_id,
5341 &mi2s_clk[index]);
5342 if (ret < 0) {
5343 dev_err(rtd->card->dev,
5344 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
5345 __func__, port_id, ret);
5346 goto err;
5347 }
5348
5349err:
5350 return ret;
5351}
5352
5353static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
5354 enum pinctrl_pin_state new_state)
5355{
5356 int ret = 0;
5357 int curr_state = 0;
5358
5359 if (pinctrl_info == NULL) {
5360 pr_err("%s: pinctrl_info is NULL\n", __func__);
5361 ret = -EINVAL;
5362 goto err;
5363 }
5364
5365 if (pinctrl_info->pinctrl == NULL) {
5366 pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
5367 ret = -EINVAL;
5368 goto err;
5369 }
5370
5371 curr_state = pinctrl_info->curr_state;
5372 pinctrl_info->curr_state = new_state;
5373 pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
5374 pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
5375
5376 if (curr_state == pinctrl_info->curr_state) {
5377 pr_debug("%s: Already in same state\n", __func__);
5378 goto err;
5379 }
5380
5381 if (curr_state != STATE_DISABLE &&
5382 pinctrl_info->curr_state != STATE_DISABLE) {
5383 pr_debug("%s: state already active cannot switch\n", __func__);
5384 ret = -EIO;
5385 goto err;
5386 }
5387
5388 switch (pinctrl_info->curr_state) {
5389 case STATE_MI2S_ACTIVE:
5390 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5391 pinctrl_info->mi2s_active);
5392 if (ret) {
5393 pr_err("%s: MI2S state select failed with %d\n",
5394 __func__, ret);
5395 ret = -EIO;
5396 goto err;
5397 }
5398 break;
5399 case STATE_TDM_ACTIVE:
5400 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5401 pinctrl_info->tdm_active);
5402 if (ret) {
5403 pr_err("%s: TDM state select failed with %d\n",
5404 __func__, ret);
5405 ret = -EIO;
5406 goto err;
5407 }
5408 break;
5409 case STATE_DISABLE:
5410 if (curr_state == STATE_MI2S_ACTIVE) {
5411 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5412 pinctrl_info->mi2s_disable);
5413 } else {
5414 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5415 pinctrl_info->tdm_disable);
5416 }
5417 if (ret) {
5418 pr_err("%s: state disable failed with %d\n",
5419 __func__, ret);
5420 ret = -EIO;
5421 goto err;
5422 }
5423 break;
5424 default:
5425 pr_err("%s: TLMM pin state is invalid\n", __func__);
5426 return -EINVAL;
5427 }
5428
5429err:
5430 return ret;
5431}
5432
5433static int msm_get_pinctrl(struct platform_device *pdev)
5434{
5435 struct snd_soc_card *card = platform_get_drvdata(pdev);
5436 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5437 struct msm_pinctrl_info *pinctrl_info = NULL;
5438 struct pinctrl *pinctrl;
5439 int ret = 0;
5440
5441 pinctrl_info = &pdata->pinctrl_info;
5442
5443 if (pinctrl_info == NULL) {
5444 pr_err("%s: pinctrl_info is NULL\n", __func__);
5445 return -EINVAL;
5446 }
5447
5448 pinctrl = devm_pinctrl_get(&pdev->dev);
5449 if (IS_ERR_OR_NULL(pinctrl)) {
5450 pr_err("%s: Unable to get pinctrl handle\n", __func__);
5451 return -EINVAL;
5452 }
5453 pinctrl_info->pinctrl = pinctrl;
5454
5455 /* get all the states handles from Device Tree */
5456 pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
5457 "quat-mi2s-sleep");
5458 if (IS_ERR(pinctrl_info->mi2s_disable)) {
5459 pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
5460 goto err;
5461 }
5462 pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
5463 "quat-mi2s-active");
5464 if (IS_ERR(pinctrl_info->mi2s_active)) {
5465 pr_err("%s: could not get mi2s_active pinstate\n", __func__);
5466 goto err;
5467 }
5468 pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
5469 "quat-tdm-sleep");
5470 if (IS_ERR(pinctrl_info->tdm_disable)) {
5471 pr_err("%s: could not get tdm_disable pinstate\n", __func__);
5472 goto err;
5473 }
5474 pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
5475 "quat-tdm-active");
5476 if (IS_ERR(pinctrl_info->tdm_active)) {
5477 pr_err("%s: could not get tdm_active pinstate\n",
5478 __func__);
5479 goto err;
5480 }
5481 /* Reset the TLMM pins to a default state */
5482 ret = pinctrl_select_state(pinctrl_info->pinctrl,
5483 pinctrl_info->mi2s_disable);
5484 if (ret != 0) {
5485 pr_err("%s: Disable TLMM pins failed with %d\n",
5486 __func__, ret);
5487 ret = -EIO;
5488 goto err;
5489 }
5490 pinctrl_info->curr_state = STATE_DISABLE;
5491
5492 return 0;
5493
5494err:
5495 devm_pinctrl_put(pinctrl);
5496 pinctrl_info->pinctrl = NULL;
5497 return -EINVAL;
5498}
5499
5500static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
5501 struct snd_pcm_hw_params *params)
5502{
5503 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5504 struct snd_interval *rate = hw_param_interval(params,
5505 SNDRV_PCM_HW_PARAM_RATE);
5506 struct snd_interval *channels = hw_param_interval(params,
5507 SNDRV_PCM_HW_PARAM_CHANNELS);
5508
5509 if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
5510 channels->min = channels->max =
5511 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5512 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5513 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
5514 rate->min = rate->max =
5515 tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
5516 } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
5517 channels->min = channels->max =
5518 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5519 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5520 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
5521 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
5522 } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
5523 channels->min = channels->max =
5524 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5525 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
5526 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
5527 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
5528 } else {
5529 pr_err("%s: dai id 0x%x not supported\n",
5530 __func__, cpu_dai->id);
5531 return -EINVAL;
5532 }
5533
5534 pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
5535 __func__, cpu_dai->id, channels->max, rate->max,
5536 params_format(params));
5537
5538 return 0;
5539}
5540
5541static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
5542 struct snd_pcm_hw_params *params)
5543{
5544 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5545 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5546 int ret = 0;
5547 int slot_width = 32;
5548 int channels, slots;
5549 unsigned int slot_mask, rate, clk_freq;
5550 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
5551
5552 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
5553
5554 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5555 switch (cpu_dai->id) {
5556 case AFE_PORT_ID_PRIMARY_TDM_RX:
5557 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
5558 break;
5559 case AFE_PORT_ID_SECONDARY_TDM_RX:
5560 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
5561 break;
5562 case AFE_PORT_ID_TERTIARY_TDM_RX:
5563 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
5564 break;
5565 case AFE_PORT_ID_QUATERNARY_TDM_RX:
5566 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
5567 break;
5568 case AFE_PORT_ID_QUINARY_TDM_RX:
5569 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
5570 break;
5571 case AFE_PORT_ID_PRIMARY_TDM_TX:
5572 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
5573 break;
5574 case AFE_PORT_ID_SECONDARY_TDM_TX:
5575 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
5576 break;
5577 case AFE_PORT_ID_TERTIARY_TDM_TX:
5578 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
5579 break;
5580 case AFE_PORT_ID_QUATERNARY_TDM_TX:
5581 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
5582 break;
5583 case AFE_PORT_ID_QUINARY_TDM_TX:
5584 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
5585 break;
5586
5587 default:
5588 pr_err("%s: dai id 0x%x not supported\n",
5589 __func__, cpu_dai->id);
5590 return -EINVAL;
5591 }
5592
5593 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5594 /*2 slot config - bits 0 and 1 set for the first two slots */
5595 slot_mask = 0x0000FFFF >> (16-slots);
5596 channels = slots;
5597
5598 pr_debug("%s: tdm rx slot_width %d slots %d\n",
5599 __func__, slot_width, slots);
5600
5601 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
5602 slots, slot_width);
5603 if (ret < 0) {
5604 pr_err("%s: failed to set tdm rx slot, err:%d\n",
5605 __func__, ret);
5606 goto end;
5607 }
5608
5609 ret = snd_soc_dai_set_channel_map(cpu_dai,
5610 0, NULL, channels, slot_offset);
5611 if (ret < 0) {
5612 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
5613 __func__, ret);
5614 goto end;
5615 }
5616 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
5617 /*2 slot config - bits 0 and 1 set for the first two slots */
5618 slot_mask = 0x0000FFFF >> (16-slots);
5619 channels = slots;
5620
5621 pr_debug("%s: tdm tx slot_width %d slots %d\n",
5622 __func__, slot_width, slots);
5623
5624 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
5625 slots, slot_width);
5626 if (ret < 0) {
5627 pr_err("%s: failed to set tdm tx slot, err:%d\n",
5628 __func__, ret);
5629 goto end;
5630 }
5631
5632 ret = snd_soc_dai_set_channel_map(cpu_dai,
5633 channels, slot_offset, 0, NULL);
5634 if (ret < 0) {
5635 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
5636 __func__, ret);
5637 goto end;
5638 }
5639 } else {
5640 ret = -EINVAL;
5641 pr_err("%s: invalid use case, err:%d\n",
5642 __func__, ret);
5643 goto end;
5644 }
5645
5646 rate = params_rate(params);
5647 clk_freq = rate * slot_width * slots;
5648 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
5649 if (ret < 0)
5650 pr_err("%s: failed to set tdm clk, err:%d\n",
5651 __func__, ret);
5652
5653end:
5654 return ret;
5655}
5656
5657static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
5658{
5659 int ret = 0;
5660 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5661 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5662 struct snd_soc_card *card = rtd->card;
5663 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5664 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5665
5666 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5667 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5668 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5669 ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
5670 if (ret)
5671 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5672 __func__, ret);
5673 }
5674
5675 return ret;
5676}
5677
5678static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
5679{
5680 int ret = 0;
5681 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5682 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5683 struct snd_soc_card *card = rtd->card;
5684 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5685 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5686
5687 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
5688 if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
5689 (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
5690 ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
5691 if (ret)
5692 pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
5693 __func__, ret);
5694 }
5695}
5696
5697static struct snd_soc_ops sm6150_tdm_be_ops = {
5698 .hw_params = sm6150_tdm_snd_hw_params,
5699 .startup = sm6150_tdm_snd_startup,
5700 .shutdown = sm6150_tdm_snd_shutdown
5701};
5702
5703static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
5704{
5705 cpumask_t mask;
5706
5707 if (pm_qos_request_active(&substream->latency_pm_qos_req))
5708 pm_qos_remove_request(&substream->latency_pm_qos_req);
5709
5710 cpumask_clear(&mask);
5711 cpumask_set_cpu(1, &mask); /* affine to core 1 */
5712 cpumask_set_cpu(2, &mask); /* affine to core 2 */
5713 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
5714
5715 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
5716
5717 pm_qos_add_request(&substream->latency_pm_qos_req,
5718 PM_QOS_CPU_DMA_LATENCY,
5719 MSM_LL_QOS_VALUE);
5720 return 0;
5721}
5722
5723static struct snd_soc_ops msm_fe_qos_ops = {
5724 .prepare = msm_fe_qos_prepare,
5725};
5726
5727static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
5728{
5729 int ret = 0;
5730 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5731 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
5732 int index = cpu_dai->id;
5733 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
5734 struct snd_soc_card *card = rtd->card;
5735 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5736 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5737 int ret_pinctrl = 0;
5738
5739 dev_dbg(rtd->card->dev,
5740 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
5741 __func__, substream->name, substream->stream,
5742 cpu_dai->name, cpu_dai->id);
5743
5744 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5745 ret = -EINVAL;
5746 dev_err(rtd->card->dev,
5747 "%s: CPU DAI id (%d) out of range\n",
5748 __func__, cpu_dai->id);
5749 goto err;
5750 }
5751 /*
5752 * Mutex protection in case the same MI2S
5753 * interface using for both TX and RX so
5754 * that the same clock won't be enable twice.
5755 */
5756 mutex_lock(&mi2s_intf_conf[index].lock);
5757 if (++mi2s_intf_conf[index].ref_cnt == 1) {
5758 /* Check if msm needs to provide the clock to the interface */
5759 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
5760 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
5761 fmt = SND_SOC_DAIFMT_CBM_CFM;
5762 }
5763 ret = msm_mi2s_set_sclk(substream, true);
5764 if (ret < 0) {
5765 dev_err(rtd->card->dev,
5766 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
5767 __func__, ret);
5768 goto clean_up;
5769 }
5770
5771 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
5772 if (ret < 0) {
5773 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
5774 __func__, index, ret);
5775 goto clk_off;
5776 }
5777 if (index == QUAT_MI2S) {
5778 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5779 STATE_MI2S_ACTIVE);
5780 if (ret_pinctrl)
5781 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5782 __func__, ret_pinctrl);
5783 }
5784 }
5785clk_off:
5786 if (ret < 0)
5787 msm_mi2s_set_sclk(substream, false);
5788clean_up:
5789 if (ret < 0)
5790 mi2s_intf_conf[index].ref_cnt--;
5791 mutex_unlock(&mi2s_intf_conf[index].lock);
5792err:
5793 return ret;
5794}
5795
5796static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
5797{
5798 int ret;
5799 struct snd_soc_pcm_runtime *rtd = substream->private_data;
5800 int index = rtd->cpu_dai->id;
5801 struct snd_soc_card *card = rtd->card;
5802 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
5803 struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
5804 int ret_pinctrl = 0;
5805
5806 pr_debug("%s(): substream = %s stream = %d\n", __func__,
5807 substream->name, substream->stream);
5808 if (index < PRIM_MI2S || index >= MI2S_MAX) {
5809 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
5810 return;
5811 }
5812
5813 mutex_lock(&mi2s_intf_conf[index].lock);
5814 if (--mi2s_intf_conf[index].ref_cnt == 0) {
5815 ret = msm_mi2s_set_sclk(substream, false);
5816 if (ret < 0)
5817 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
5818 __func__, index, ret);
5819 if (index == QUAT_MI2S) {
5820 ret_pinctrl = msm_set_pinctrl(pinctrl_info,
5821 STATE_DISABLE);
5822 if (ret_pinctrl)
5823 pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
5824 __func__, ret_pinctrl);
5825 }
5826 }
5827 mutex_unlock(&mi2s_intf_conf[index].lock);
5828}
5829
5830static struct snd_soc_ops msm_mi2s_be_ops = {
5831 .startup = msm_mi2s_snd_startup,
5832 .shutdown = msm_mi2s_snd_shutdown,
5833};
5834
5835static struct snd_soc_ops msm_cdc_dma_be_ops = {
5836 .hw_params = msm_snd_cdc_dma_hw_params,
5837};
5838
5839static struct snd_soc_ops msm_be_ops = {
5840 .hw_params = msm_snd_hw_params,
5841};
5842
5843static struct snd_soc_ops msm_slimbus_2_be_ops = {
5844 .hw_params = msm_slimbus_2_hw_params,
5845};
5846
5847static struct snd_soc_ops msm_wcn_ops = {
5848 .hw_params = msm_wcn_hw_params,
5849};
5850
5851
5852/* Digital audio interface glue - connects codec <---> CPU */
5853static struct snd_soc_dai_link msm_common_dai_links[] = {
5854 /* FrontEnd DAI Links */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305855 {/* hw:x,0 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305856 .name = MSM_DAILINK_NAME(Media1),
5857 .stream_name = "MultiMedia1",
5858 .cpu_dai_name = "MultiMedia1",
5859 .platform_name = "msm-pcm-dsp.0",
5860 .dynamic = 1,
5861 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5862 .dpcm_playback = 1,
5863 .dpcm_capture = 1,
5864 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5865 SND_SOC_DPCM_TRIGGER_POST},
5866 .codec_dai_name = "snd-soc-dummy-dai",
5867 .codec_name = "snd-soc-dummy",
5868 .ignore_suspend = 1,
5869 /* this dainlink has playback support */
5870 .ignore_pmdown_time = 1,
5871 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5872 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305873 {/* hw:x,1 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305874 .name = MSM_DAILINK_NAME(Media2),
5875 .stream_name = "MultiMedia2",
5876 .cpu_dai_name = "MultiMedia2",
5877 .platform_name = "msm-pcm-dsp.0",
5878 .dynamic = 1,
5879 .dpcm_playback = 1,
5880 .dpcm_capture = 1,
5881 .codec_dai_name = "snd-soc-dummy-dai",
5882 .codec_name = "snd-soc-dummy",
5883 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5884 SND_SOC_DPCM_TRIGGER_POST},
5885 .ignore_suspend = 1,
5886 /* this dainlink has playback support */
5887 .ignore_pmdown_time = 1,
5888 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5889 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305890 {/* hw:x,2 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305891 .name = "VoiceMMode1",
5892 .stream_name = "VoiceMMode1",
5893 .cpu_dai_name = "VoiceMMode1",
5894 .platform_name = "msm-pcm-voice",
5895 .dynamic = 1,
5896 .dpcm_playback = 1,
5897 .dpcm_capture = 1,
5898 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5899 SND_SOC_DPCM_TRIGGER_POST},
5900 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5901 .ignore_suspend = 1,
5902 .ignore_pmdown_time = 1,
5903 .codec_dai_name = "snd-soc-dummy-dai",
5904 .codec_name = "snd-soc-dummy",
5905 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5906 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305907 {/* hw:x,3 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305908 .name = "MSM VoIP",
5909 .stream_name = "VoIP",
5910 .cpu_dai_name = "VoIP",
5911 .platform_name = "msm-voip-dsp",
5912 .dynamic = 1,
5913 .dpcm_playback = 1,
5914 .dpcm_capture = 1,
5915 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5916 SND_SOC_DPCM_TRIGGER_POST},
5917 .codec_dai_name = "snd-soc-dummy-dai",
5918 .codec_name = "snd-soc-dummy",
5919 .ignore_suspend = 1,
5920 /* this dainlink has playback support */
5921 .ignore_pmdown_time = 1,
5922 .id = MSM_FRONTEND_DAI_VOIP,
5923 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305924 {/* hw:x,4 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305925 .name = MSM_DAILINK_NAME(ULL),
5926 .stream_name = "MultiMedia3",
5927 .cpu_dai_name = "MultiMedia3",
5928 .platform_name = "msm-pcm-dsp.2",
5929 .dynamic = 1,
5930 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5931 .dpcm_playback = 1,
5932 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5933 SND_SOC_DPCM_TRIGGER_POST},
5934 .codec_dai_name = "snd-soc-dummy-dai",
5935 .codec_name = "snd-soc-dummy",
5936 .ignore_suspend = 1,
5937 /* this dainlink has playback support */
5938 .ignore_pmdown_time = 1,
5939 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5940 },
5941 /* Hostless PCM purpose */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305942 {/* hw:x,5 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305943 .name = "SLIMBUS_0 Hostless",
5944 .stream_name = "SLIMBUS_0 Hostless",
5945 .cpu_dai_name = "SLIMBUS0_HOSTLESS",
5946 .platform_name = "msm-pcm-hostless",
5947 .dynamic = 1,
5948 .dpcm_playback = 1,
5949 .dpcm_capture = 1,
5950 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5951 SND_SOC_DPCM_TRIGGER_POST},
5952 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5953 .ignore_suspend = 1,
5954 /* this dailink has playback support */
5955 .ignore_pmdown_time = 1,
5956 .codec_dai_name = "snd-soc-dummy-dai",
5957 .codec_name = "snd-soc-dummy",
5958 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305959 {/* hw:x,6 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305960 .name = "MSM AFE-PCM RX",
5961 .stream_name = "AFE-PROXY RX",
5962 .cpu_dai_name = "msm-dai-q6-dev.241",
5963 .codec_name = "msm-stub-codec.1",
5964 .codec_dai_name = "msm-stub-rx",
5965 .platform_name = "msm-pcm-afe",
5966 .dpcm_playback = 1,
5967 .ignore_suspend = 1,
5968 /* this dainlink has playback support */
5969 .ignore_pmdown_time = 1,
5970 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305971 {/* hw:x,7 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305972 .name = "MSM AFE-PCM TX",
5973 .stream_name = "AFE-PROXY TX",
5974 .cpu_dai_name = "msm-dai-q6-dev.240",
5975 .codec_name = "msm-stub-codec.1",
5976 .codec_dai_name = "msm-stub-tx",
5977 .platform_name = "msm-pcm-afe",
5978 .dpcm_capture = 1,
5979 .ignore_suspend = 1,
5980 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305981 {/* hw:x,8 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05305982 .name = MSM_DAILINK_NAME(Compress1),
5983 .stream_name = "Compress1",
5984 .cpu_dai_name = "MultiMedia4",
5985 .platform_name = "msm-compress-dsp",
5986 .dynamic = 1,
5987 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5988 .dpcm_playback = 1,
5989 .dpcm_capture = 1,
5990 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5991 SND_SOC_DPCM_TRIGGER_POST},
5992 .codec_dai_name = "snd-soc-dummy-dai",
5993 .codec_name = "snd-soc-dummy",
5994 .ignore_suspend = 1,
5995 .ignore_pmdown_time = 1,
5996 /* this dainlink has playback support */
5997 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5998 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05305999 {/* hw:x,9 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306000 .name = "AUXPCM Hostless",
6001 .stream_name = "AUXPCM Hostless",
6002 .cpu_dai_name = "AUXPCM_HOSTLESS",
6003 .platform_name = "msm-pcm-hostless",
6004 .dynamic = 1,
6005 .dpcm_playback = 1,
6006 .dpcm_capture = 1,
6007 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6008 SND_SOC_DPCM_TRIGGER_POST},
6009 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6010 .ignore_suspend = 1,
6011 /* this dainlink has playback support */
6012 .ignore_pmdown_time = 1,
6013 .codec_dai_name = "snd-soc-dummy-dai",
6014 .codec_name = "snd-soc-dummy",
6015 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306016 {/* hw:x,10 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306017 .name = "SLIMBUS_1 Hostless",
6018 .stream_name = "SLIMBUS_1 Hostless",
6019 .cpu_dai_name = "SLIMBUS1_HOSTLESS",
6020 .platform_name = "msm-pcm-hostless",
6021 .dynamic = 1,
6022 .dpcm_playback = 1,
6023 .dpcm_capture = 1,
6024 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6025 SND_SOC_DPCM_TRIGGER_POST},
6026 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6027 .ignore_suspend = 1,
6028 /* this dailink has playback support */
6029 .ignore_pmdown_time = 1,
6030 .codec_dai_name = "snd-soc-dummy-dai",
6031 .codec_name = "snd-soc-dummy",
6032 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306033 {/* hw:x,11 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306034 .name = "SLIMBUS_3 Hostless",
6035 .stream_name = "SLIMBUS_3 Hostless",
6036 .cpu_dai_name = "SLIMBUS3_HOSTLESS",
6037 .platform_name = "msm-pcm-hostless",
6038 .dynamic = 1,
6039 .dpcm_playback = 1,
6040 .dpcm_capture = 1,
6041 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6042 SND_SOC_DPCM_TRIGGER_POST},
6043 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6044 .ignore_suspend = 1,
6045 /* this dailink has playback support */
6046 .ignore_pmdown_time = 1,
6047 .codec_dai_name = "snd-soc-dummy-dai",
6048 .codec_name = "snd-soc-dummy",
6049 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306050 {/* hw:x,12 */
6051 .name = "SLIMBUS_7 Hostless",
6052 .stream_name = "SLIMBUS_7 Hostless",
6053 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306054 .platform_name = "msm-pcm-hostless",
6055 .dynamic = 1,
6056 .dpcm_playback = 1,
6057 .dpcm_capture = 1,
6058 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6059 SND_SOC_DPCM_TRIGGER_POST},
6060 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6061 .ignore_suspend = 1,
6062 /* this dailink has playback support */
6063 .ignore_pmdown_time = 1,
6064 .codec_dai_name = "snd-soc-dummy-dai",
6065 .codec_name = "snd-soc-dummy",
6066 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306067 {/* hw:x,13 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306068 .name = MSM_DAILINK_NAME(LowLatency),
6069 .stream_name = "MultiMedia5",
6070 .cpu_dai_name = "MultiMedia5",
6071 .platform_name = "msm-pcm-dsp.1",
6072 .dynamic = 1,
6073 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6074 .dpcm_playback = 1,
6075 .dpcm_capture = 1,
6076 .codec_dai_name = "snd-soc-dummy-dai",
6077 .codec_name = "snd-soc-dummy",
6078 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6079 SND_SOC_DPCM_TRIGGER_POST},
6080 .ignore_suspend = 1,
6081 /* this dainlink has playback support */
6082 .ignore_pmdown_time = 1,
6083 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
6084 .ops = &msm_fe_qos_ops,
6085 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306086 {/* hw:x,14 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306087 .name = "Listen 1 Audio Service",
6088 .stream_name = "Listen 1 Audio Service",
6089 .cpu_dai_name = "LSM1",
6090 .platform_name = "msm-lsm-client",
6091 .dynamic = 1,
6092 .dpcm_capture = 1,
6093 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6094 SND_SOC_DPCM_TRIGGER_POST },
6095 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6096 .ignore_suspend = 1,
6097 .codec_dai_name = "snd-soc-dummy-dai",
6098 .codec_name = "snd-soc-dummy",
6099 .id = MSM_FRONTEND_DAI_LSM1,
6100 },
6101 /* Multiple Tunnel instances */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306102 {/* hw:x,15 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306103 .name = MSM_DAILINK_NAME(Compress2),
6104 .stream_name = "Compress2",
6105 .cpu_dai_name = "MultiMedia7",
6106 .platform_name = "msm-compress-dsp",
6107 .dynamic = 1,
6108 .dpcm_playback = 1,
6109 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6110 SND_SOC_DPCM_TRIGGER_POST},
6111 .codec_dai_name = "snd-soc-dummy-dai",
6112 .codec_name = "snd-soc-dummy",
6113 .ignore_suspend = 1,
6114 .ignore_pmdown_time = 1,
6115 /* this dainlink has playback support */
6116 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
6117 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306118 {/* hw:x,16 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306119 .name = MSM_DAILINK_NAME(MultiMedia10),
6120 .stream_name = "MultiMedia10",
6121 .cpu_dai_name = "MultiMedia10",
6122 .platform_name = "msm-pcm-dsp.1",
6123 .dynamic = 1,
6124 .dpcm_playback = 1,
6125 .dpcm_capture = 1,
6126 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6127 SND_SOC_DPCM_TRIGGER_POST},
6128 .codec_dai_name = "snd-soc-dummy-dai",
6129 .codec_name = "snd-soc-dummy",
6130 .ignore_suspend = 1,
6131 .ignore_pmdown_time = 1,
6132 /* this dainlink has playback support */
6133 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
6134 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306135 {/* hw:x,17 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306136 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
6137 .stream_name = "MM_NOIRQ",
6138 .cpu_dai_name = "MultiMedia8",
6139 .platform_name = "msm-pcm-dsp-noirq",
6140 .dynamic = 1,
6141 .dpcm_playback = 1,
6142 .dpcm_capture = 1,
6143 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6144 SND_SOC_DPCM_TRIGGER_POST},
6145 .codec_dai_name = "snd-soc-dummy-dai",
6146 .codec_name = "snd-soc-dummy",
6147 .ignore_suspend = 1,
6148 .ignore_pmdown_time = 1,
6149 /* this dainlink has playback support */
6150 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
6151 .ops = &msm_fe_qos_ops,
6152 },
6153 /* HDMI Hostless */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306154 {/* hw:x,18 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306155 .name = "HDMI_RX_HOSTLESS",
6156 .stream_name = "HDMI_RX_HOSTLESS",
6157 .cpu_dai_name = "HDMI_HOSTLESS",
6158 .platform_name = "msm-pcm-hostless",
6159 .dynamic = 1,
6160 .dpcm_playback = 1,
6161 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6162 SND_SOC_DPCM_TRIGGER_POST},
6163 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6164 .ignore_suspend = 1,
6165 .ignore_pmdown_time = 1,
6166 .codec_dai_name = "snd-soc-dummy-dai",
6167 .codec_name = "snd-soc-dummy",
6168 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306169 {/* hw:x,19 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306170 .name = "VoiceMMode2",
6171 .stream_name = "VoiceMMode2",
6172 .cpu_dai_name = "VoiceMMode2",
6173 .platform_name = "msm-pcm-voice",
6174 .dynamic = 1,
6175 .dpcm_playback = 1,
6176 .dpcm_capture = 1,
6177 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6178 SND_SOC_DPCM_TRIGGER_POST},
6179 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6180 .ignore_suspend = 1,
6181 .ignore_pmdown_time = 1,
6182 .codec_dai_name = "snd-soc-dummy-dai",
6183 .codec_name = "snd-soc-dummy",
6184 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
6185 },
6186 /* LSM FE */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306187 {/* hw:x,20 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306188 .name = "Listen 2 Audio Service",
6189 .stream_name = "Listen 2 Audio Service",
6190 .cpu_dai_name = "LSM2",
6191 .platform_name = "msm-lsm-client",
6192 .dynamic = 1,
6193 .dpcm_capture = 1,
6194 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6195 SND_SOC_DPCM_TRIGGER_POST },
6196 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6197 .ignore_suspend = 1,
6198 .codec_dai_name = "snd-soc-dummy-dai",
6199 .codec_name = "snd-soc-dummy",
6200 .id = MSM_FRONTEND_DAI_LSM2,
6201 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306202 {/* hw:x,21 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306203 .name = "Listen 3 Audio Service",
6204 .stream_name = "Listen 3 Audio Service",
6205 .cpu_dai_name = "LSM3",
6206 .platform_name = "msm-lsm-client",
6207 .dynamic = 1,
6208 .dpcm_capture = 1,
6209 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6210 SND_SOC_DPCM_TRIGGER_POST },
6211 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6212 .ignore_suspend = 1,
6213 .codec_dai_name = "snd-soc-dummy-dai",
6214 .codec_name = "snd-soc-dummy",
6215 .id = MSM_FRONTEND_DAI_LSM3,
6216 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306217 {/* hw:x,22 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306218 .name = "Listen 4 Audio Service",
6219 .stream_name = "Listen 4 Audio Service",
6220 .cpu_dai_name = "LSM4",
6221 .platform_name = "msm-lsm-client",
6222 .dynamic = 1,
6223 .dpcm_capture = 1,
6224 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6225 SND_SOC_DPCM_TRIGGER_POST },
6226 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6227 .ignore_suspend = 1,
6228 .codec_dai_name = "snd-soc-dummy-dai",
6229 .codec_name = "snd-soc-dummy",
6230 .id = MSM_FRONTEND_DAI_LSM4,
6231 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306232 {/* hw:x,23 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306233 .name = "Listen 5 Audio Service",
6234 .stream_name = "Listen 5 Audio Service",
6235 .cpu_dai_name = "LSM5",
6236 .platform_name = "msm-lsm-client",
6237 .dynamic = 1,
6238 .dpcm_capture = 1,
6239 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6240 SND_SOC_DPCM_TRIGGER_POST },
6241 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6242 .ignore_suspend = 1,
6243 .codec_dai_name = "snd-soc-dummy-dai",
6244 .codec_name = "snd-soc-dummy",
6245 .id = MSM_FRONTEND_DAI_LSM5,
6246 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306247 {/* hw:x,24 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306248 .name = "Listen 6 Audio Service",
6249 .stream_name = "Listen 6 Audio Service",
6250 .cpu_dai_name = "LSM6",
6251 .platform_name = "msm-lsm-client",
6252 .dynamic = 1,
6253 .dpcm_capture = 1,
6254 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6255 SND_SOC_DPCM_TRIGGER_POST },
6256 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6257 .ignore_suspend = 1,
6258 .codec_dai_name = "snd-soc-dummy-dai",
6259 .codec_name = "snd-soc-dummy",
6260 .id = MSM_FRONTEND_DAI_LSM6,
6261 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306262 {/* hw:x,25 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306263 .name = "Listen 7 Audio Service",
6264 .stream_name = "Listen 7 Audio Service",
6265 .cpu_dai_name = "LSM7",
6266 .platform_name = "msm-lsm-client",
6267 .dynamic = 1,
6268 .dpcm_capture = 1,
6269 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6270 SND_SOC_DPCM_TRIGGER_POST },
6271 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6272 .ignore_suspend = 1,
6273 .codec_dai_name = "snd-soc-dummy-dai",
6274 .codec_name = "snd-soc-dummy",
6275 .id = MSM_FRONTEND_DAI_LSM7,
6276 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306277 {/* hw:x,26 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306278 .name = "Listen 8 Audio Service",
6279 .stream_name = "Listen 8 Audio Service",
6280 .cpu_dai_name = "LSM8",
6281 .platform_name = "msm-lsm-client",
6282 .dynamic = 1,
6283 .dpcm_capture = 1,
6284 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
6285 SND_SOC_DPCM_TRIGGER_POST },
6286 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6287 .ignore_suspend = 1,
6288 .codec_dai_name = "snd-soc-dummy-dai",
6289 .codec_name = "snd-soc-dummy",
6290 .id = MSM_FRONTEND_DAI_LSM8,
6291 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306292 {/* hw:x,27 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306293 .name = MSM_DAILINK_NAME(Media9),
6294 .stream_name = "MultiMedia9",
6295 .cpu_dai_name = "MultiMedia9",
6296 .platform_name = "msm-pcm-dsp.0",
6297 .dynamic = 1,
6298 .dpcm_playback = 1,
6299 .dpcm_capture = 1,
6300 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6301 SND_SOC_DPCM_TRIGGER_POST},
6302 .codec_dai_name = "snd-soc-dummy-dai",
6303 .codec_name = "snd-soc-dummy",
6304 .ignore_suspend = 1,
6305 /* this dainlink has playback support */
6306 .ignore_pmdown_time = 1,
6307 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
6308 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306309 {/* hw:x,28 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306310 .name = MSM_DAILINK_NAME(Compress4),
6311 .stream_name = "Compress4",
6312 .cpu_dai_name = "MultiMedia11",
6313 .platform_name = "msm-compress-dsp",
6314 .dynamic = 1,
6315 .dpcm_playback = 1,
6316 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6317 SND_SOC_DPCM_TRIGGER_POST},
6318 .codec_dai_name = "snd-soc-dummy-dai",
6319 .codec_name = "snd-soc-dummy",
6320 .ignore_suspend = 1,
6321 .ignore_pmdown_time = 1,
6322 /* this dainlink has playback support */
6323 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
6324 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306325 {/* hw:x,29 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306326 .name = MSM_DAILINK_NAME(Compress5),
6327 .stream_name = "Compress5",
6328 .cpu_dai_name = "MultiMedia12",
6329 .platform_name = "msm-compress-dsp",
6330 .dynamic = 1,
6331 .dpcm_playback = 1,
6332 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6333 SND_SOC_DPCM_TRIGGER_POST},
6334 .codec_dai_name = "snd-soc-dummy-dai",
6335 .codec_name = "snd-soc-dummy",
6336 .ignore_suspend = 1,
6337 .ignore_pmdown_time = 1,
6338 /* this dainlink has playback support */
6339 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
6340 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306341 {/* hw:x,30 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306342 .name = MSM_DAILINK_NAME(Compress6),
6343 .stream_name = "Compress6",
6344 .cpu_dai_name = "MultiMedia13",
6345 .platform_name = "msm-compress-dsp",
6346 .dynamic = 1,
6347 .dpcm_playback = 1,
6348 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6349 SND_SOC_DPCM_TRIGGER_POST},
6350 .codec_dai_name = "snd-soc-dummy-dai",
6351 .codec_name = "snd-soc-dummy",
6352 .ignore_suspend = 1,
6353 .ignore_pmdown_time = 1,
6354 /* this dainlink has playback support */
6355 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
6356 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306357 {/* hw:x,31 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306358 .name = MSM_DAILINK_NAME(Compress7),
6359 .stream_name = "Compress7",
6360 .cpu_dai_name = "MultiMedia14",
6361 .platform_name = "msm-compress-dsp",
6362 .dynamic = 1,
6363 .dpcm_playback = 1,
6364 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6365 SND_SOC_DPCM_TRIGGER_POST},
6366 .codec_dai_name = "snd-soc-dummy-dai",
6367 .codec_name = "snd-soc-dummy",
6368 .ignore_suspend = 1,
6369 .ignore_pmdown_time = 1,
6370 /* this dainlink has playback support */
6371 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
6372 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306373 {/* hw:x,32 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306374 .name = MSM_DAILINK_NAME(Compress8),
6375 .stream_name = "Compress8",
6376 .cpu_dai_name = "MultiMedia15",
6377 .platform_name = "msm-compress-dsp",
6378 .dynamic = 1,
6379 .dpcm_playback = 1,
6380 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6381 SND_SOC_DPCM_TRIGGER_POST},
6382 .codec_dai_name = "snd-soc-dummy-dai",
6383 .codec_name = "snd-soc-dummy",
6384 .ignore_suspend = 1,
6385 .ignore_pmdown_time = 1,
6386 /* this dainlink has playback support */
6387 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
6388 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306389 {/* hw:x,33 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306390 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
6391 .stream_name = "MM_NOIRQ_2",
6392 .cpu_dai_name = "MultiMedia16",
6393 .platform_name = "msm-pcm-dsp-noirq",
6394 .dynamic = 1,
6395 .dpcm_playback = 1,
6396 .dpcm_capture = 1,
6397 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6398 SND_SOC_DPCM_TRIGGER_POST},
6399 .codec_dai_name = "snd-soc-dummy-dai",
6400 .codec_name = "snd-soc-dummy",
6401 .ignore_suspend = 1,
6402 .ignore_pmdown_time = 1,
6403 /* this dainlink has playback support */
6404 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
6405 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306406 {/* hw:x,34 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306407 .name = "SLIMBUS_8 Hostless",
6408 .stream_name = "SLIMBUS8_HOSTLESS Capture",
6409 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
6410 .platform_name = "msm-pcm-hostless",
6411 .dynamic = 1,
6412 .dpcm_capture = 1,
6413 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6414 SND_SOC_DPCM_TRIGGER_POST},
6415 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6416 .ignore_suspend = 1,
6417 .codec_dai_name = "snd-soc-dummy-dai",
6418 .codec_name = "snd-soc-dummy",
6419 },
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306420 {/* hw:x,35 */
6421 .name = "CDC_DMA Hostless",
6422 .stream_name = "CDC_DMA Hostless",
6423 .cpu_dai_name = "CDC_DMA_HOSTLESS",
6424 .platform_name = "msm-pcm-hostless",
6425 .dynamic = 1,
6426 .dpcm_playback = 1,
6427 .dpcm_capture = 1,
6428 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6429 SND_SOC_DPCM_TRIGGER_POST},
6430 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6431 .ignore_suspend = 1,
6432 /* this dailink has playback support */
6433 .ignore_pmdown_time = 1,
6434 .codec_dai_name = "snd-soc-dummy-dai",
6435 .codec_name = "snd-soc-dummy",
6436 },
6437 {/* hw:x,36 */
6438 .name = "TX3_CDC_DMA Hostless",
6439 .stream_name = "TX3_CDC_DMA Hostless",
6440 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
6441 .platform_name = "msm-pcm-hostless",
6442 .dynamic = 1,
6443 .dpcm_capture = 1,
6444 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6445 SND_SOC_DPCM_TRIGGER_POST},
6446 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6447 .ignore_suspend = 1,
6448 .codec_dai_name = "snd-soc-dummy-dai",
6449 .codec_name = "snd-soc-dummy",
6450 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306451};
6452
6453
6454static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306455 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306456 .name = LPASS_BE_SLIMBUS_4_TX,
6457 .stream_name = "Slimbus4 Capture",
6458 .cpu_dai_name = "msm-dai-q6-dev.16393",
6459 .platform_name = "msm-pcm-hostless",
6460 .codec_name = "tavil_codec",
6461 .codec_dai_name = "tavil_vifeedback",
6462 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6463 .be_hw_params_fixup = msm_be_hw_params_fixup,
6464 .ops = &msm_be_ops,
6465 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6466 .ignore_suspend = 1,
6467 },
6468 /* Ultrasound RX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306469 {/* hw:x,38 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306470 .name = "SLIMBUS_2 Hostless Playback",
6471 .stream_name = "SLIMBUS_2 Hostless Playback",
6472 .cpu_dai_name = "msm-dai-q6-dev.16388",
6473 .platform_name = "msm-pcm-hostless",
6474 .codec_name = "tavil_codec",
6475 .codec_dai_name = "tavil_rx2",
6476 .ignore_suspend = 1,
6477 .ignore_pmdown_time = 1,
6478 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6479 .ops = &msm_slimbus_2_be_ops,
6480 },
6481 /* Ultrasound TX DAI Link */
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306482 {/* hw:x,39 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306483 .name = "SLIMBUS_2 Hostless Capture",
6484 .stream_name = "SLIMBUS_2 Hostless Capture",
6485 .cpu_dai_name = "msm-dai-q6-dev.16389",
6486 .platform_name = "msm-pcm-hostless",
6487 .codec_name = "tavil_codec",
6488 .codec_dai_name = "tavil_tx2",
6489 .ignore_suspend = 1,
6490 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6491 .ops = &msm_slimbus_2_be_ops,
6492 },
6493};
6494
6495static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Aditya Bavanaric65c7e42018-08-08 14:10:20 +05306496 {/* hw:x,37 */
Aditya Bavanari44eb8952018-05-09 19:01:50 +05306497 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
6498 .stream_name = "WSA CDC DMA0 Capture",
6499 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
6500 .platform_name = "msm-pcm-hostless",
6501 .codec_name = "bolero_codec",
6502 .codec_dai_name = "wsa_macro_vifeedback",
6503 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
6504 .be_hw_params_fixup = msm_be_hw_params_fixup,
6505 .ignore_suspend = 1,
6506 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6507 .ops = &msm_cdc_dma_be_ops,
6508 },
6509};
6510
6511static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
6512 {
6513 .name = MSM_DAILINK_NAME(ASM Loopback),
6514 .stream_name = "MultiMedia6",
6515 .cpu_dai_name = "MultiMedia6",
6516 .platform_name = "msm-pcm-loopback",
6517 .dynamic = 1,
6518 .dpcm_playback = 1,
6519 .dpcm_capture = 1,
6520 .codec_dai_name = "snd-soc-dummy-dai",
6521 .codec_name = "snd-soc-dummy",
6522 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6523 SND_SOC_DPCM_TRIGGER_POST},
6524 .ignore_suspend = 1,
6525 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6526 .ignore_pmdown_time = 1,
6527 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
6528 },
6529 {
6530 .name = "USB Audio Hostless",
6531 .stream_name = "USB Audio Hostless",
6532 .cpu_dai_name = "USBAUDIO_HOSTLESS",
6533 .platform_name = "msm-pcm-hostless",
6534 .dynamic = 1,
6535 .dpcm_playback = 1,
6536 .dpcm_capture = 1,
6537 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6538 SND_SOC_DPCM_TRIGGER_POST},
6539 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
6540 .ignore_suspend = 1,
6541 .ignore_pmdown_time = 1,
6542 .codec_dai_name = "snd-soc-dummy-dai",
6543 .codec_name = "snd-soc-dummy",
6544 },
6545};
6546
6547static struct snd_soc_dai_link msm_common_be_dai_links[] = {
6548 /* Backend AFE DAI Links */
6549 {
6550 .name = LPASS_BE_AFE_PCM_RX,
6551 .stream_name = "AFE Playback",
6552 .cpu_dai_name = "msm-dai-q6-dev.224",
6553 .platform_name = "msm-pcm-routing",
6554 .codec_name = "msm-stub-codec.1",
6555 .codec_dai_name = "msm-stub-rx",
6556 .no_pcm = 1,
6557 .dpcm_playback = 1,
6558 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
6559 .be_hw_params_fixup = msm_be_hw_params_fixup,
6560 /* this dainlink has playback support */
6561 .ignore_pmdown_time = 1,
6562 .ignore_suspend = 1,
6563 },
6564 {
6565 .name = LPASS_BE_AFE_PCM_TX,
6566 .stream_name = "AFE Capture",
6567 .cpu_dai_name = "msm-dai-q6-dev.225",
6568 .platform_name = "msm-pcm-routing",
6569 .codec_name = "msm-stub-codec.1",
6570 .codec_dai_name = "msm-stub-tx",
6571 .no_pcm = 1,
6572 .dpcm_capture = 1,
6573 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
6574 .be_hw_params_fixup = msm_be_hw_params_fixup,
6575 .ignore_suspend = 1,
6576 },
6577 /* Incall Record Uplink BACK END DAI Link */
6578 {
6579 .name = LPASS_BE_INCALL_RECORD_TX,
6580 .stream_name = "Voice Uplink Capture",
6581 .cpu_dai_name = "msm-dai-q6-dev.32772",
6582 .platform_name = "msm-pcm-routing",
6583 .codec_name = "msm-stub-codec.1",
6584 .codec_dai_name = "msm-stub-tx",
6585 .no_pcm = 1,
6586 .dpcm_capture = 1,
6587 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
6588 .be_hw_params_fixup = msm_be_hw_params_fixup,
6589 .ignore_suspend = 1,
6590 },
6591 /* Incall Record Downlink BACK END DAI Link */
6592 {
6593 .name = LPASS_BE_INCALL_RECORD_RX,
6594 .stream_name = "Voice Downlink Capture",
6595 .cpu_dai_name = "msm-dai-q6-dev.32771",
6596 .platform_name = "msm-pcm-routing",
6597 .codec_name = "msm-stub-codec.1",
6598 .codec_dai_name = "msm-stub-tx",
6599 .no_pcm = 1,
6600 .dpcm_capture = 1,
6601 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
6602 .be_hw_params_fixup = msm_be_hw_params_fixup,
6603 .ignore_suspend = 1,
6604 },
6605 /* Incall Music BACK END DAI Link */
6606 {
6607 .name = LPASS_BE_VOICE_PLAYBACK_TX,
6608 .stream_name = "Voice Farend Playback",
6609 .cpu_dai_name = "msm-dai-q6-dev.32773",
6610 .platform_name = "msm-pcm-routing",
6611 .codec_name = "msm-stub-codec.1",
6612 .codec_dai_name = "msm-stub-rx",
6613 .no_pcm = 1,
6614 .dpcm_playback = 1,
6615 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
6616 .be_hw_params_fixup = msm_be_hw_params_fixup,
6617 .ignore_suspend = 1,
6618 .ignore_pmdown_time = 1,
6619 },
6620 /* Incall Music 2 BACK END DAI Link */
6621 {
6622 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
6623 .stream_name = "Voice2 Farend Playback",
6624 .cpu_dai_name = "msm-dai-q6-dev.32770",
6625 .platform_name = "msm-pcm-routing",
6626 .codec_name = "msm-stub-codec.1",
6627 .codec_dai_name = "msm-stub-rx",
6628 .no_pcm = 1,
6629 .dpcm_playback = 1,
6630 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
6631 .be_hw_params_fixup = msm_be_hw_params_fixup,
6632 .ignore_suspend = 1,
6633 .ignore_pmdown_time = 1,
6634 },
6635 {
6636 .name = LPASS_BE_USB_AUDIO_RX,
6637 .stream_name = "USB Audio Playback",
6638 .cpu_dai_name = "msm-dai-q6-dev.28672",
6639 .platform_name = "msm-pcm-routing",
6640 .codec_name = "msm-stub-codec.1",
6641 .codec_dai_name = "msm-stub-rx",
6642 .no_pcm = 1,
6643 .dpcm_playback = 1,
6644 .id = MSM_BACKEND_DAI_USB_RX,
6645 .be_hw_params_fixup = msm_be_hw_params_fixup,
6646 .ignore_pmdown_time = 1,
6647 .ignore_suspend = 1,
6648 },
6649 {
6650 .name = LPASS_BE_USB_AUDIO_TX,
6651 .stream_name = "USB Audio Capture",
6652 .cpu_dai_name = "msm-dai-q6-dev.28673",
6653 .platform_name = "msm-pcm-routing",
6654 .codec_name = "msm-stub-codec.1",
6655 .codec_dai_name = "msm-stub-tx",
6656 .no_pcm = 1,
6657 .dpcm_capture = 1,
6658 .id = MSM_BACKEND_DAI_USB_TX,
6659 .be_hw_params_fixup = msm_be_hw_params_fixup,
6660 .ignore_suspend = 1,
6661 },
6662 {
6663 .name = LPASS_BE_PRI_TDM_RX_0,
6664 .stream_name = "Primary TDM0 Playback",
6665 .cpu_dai_name = "msm-dai-q6-tdm.36864",
6666 .platform_name = "msm-pcm-routing",
6667 .codec_name = "msm-stub-codec.1",
6668 .codec_dai_name = "msm-stub-rx",
6669 .no_pcm = 1,
6670 .dpcm_playback = 1,
6671 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
6672 .be_hw_params_fixup = msm_be_hw_params_fixup,
6673 .ops = &sm6150_tdm_be_ops,
6674 .ignore_suspend = 1,
6675 .ignore_pmdown_time = 1,
6676 },
6677 {
6678 .name = LPASS_BE_PRI_TDM_TX_0,
6679 .stream_name = "Primary TDM0 Capture",
6680 .cpu_dai_name = "msm-dai-q6-tdm.36865",
6681 .platform_name = "msm-pcm-routing",
6682 .codec_name = "msm-stub-codec.1",
6683 .codec_dai_name = "msm-stub-tx",
6684 .no_pcm = 1,
6685 .dpcm_capture = 1,
6686 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
6687 .be_hw_params_fixup = msm_be_hw_params_fixup,
6688 .ops = &sm6150_tdm_be_ops,
6689 .ignore_suspend = 1,
6690 },
6691 {
6692 .name = LPASS_BE_SEC_TDM_RX_0,
6693 .stream_name = "Secondary TDM0 Playback",
6694 .cpu_dai_name = "msm-dai-q6-tdm.36880",
6695 .platform_name = "msm-pcm-routing",
6696 .codec_name = "msm-stub-codec.1",
6697 .codec_dai_name = "msm-stub-rx",
6698 .no_pcm = 1,
6699 .dpcm_playback = 1,
6700 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
6701 .be_hw_params_fixup = msm_be_hw_params_fixup,
6702 .ops = &sm6150_tdm_be_ops,
6703 .ignore_suspend = 1,
6704 .ignore_pmdown_time = 1,
6705 },
6706 {
6707 .name = LPASS_BE_SEC_TDM_TX_0,
6708 .stream_name = "Secondary TDM0 Capture",
6709 .cpu_dai_name = "msm-dai-q6-tdm.36881",
6710 .platform_name = "msm-pcm-routing",
6711 .codec_name = "msm-stub-codec.1",
6712 .codec_dai_name = "msm-stub-tx",
6713 .no_pcm = 1,
6714 .dpcm_capture = 1,
6715 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
6716 .be_hw_params_fixup = msm_be_hw_params_fixup,
6717 .ops = &sm6150_tdm_be_ops,
6718 .ignore_suspend = 1,
6719 },
6720 {
6721 .name = LPASS_BE_TERT_TDM_RX_0,
6722 .stream_name = "Tertiary TDM0 Playback",
6723 .cpu_dai_name = "msm-dai-q6-tdm.36896",
6724 .platform_name = "msm-pcm-routing",
6725 .codec_name = "msm-stub-codec.1",
6726 .codec_dai_name = "msm-stub-rx",
6727 .no_pcm = 1,
6728 .dpcm_playback = 1,
6729 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
6730 .be_hw_params_fixup = msm_be_hw_params_fixup,
6731 .ops = &sm6150_tdm_be_ops,
6732 .ignore_suspend = 1,
6733 .ignore_pmdown_time = 1,
6734 },
6735 {
6736 .name = LPASS_BE_TERT_TDM_TX_0,
6737 .stream_name = "Tertiary TDM0 Capture",
6738 .cpu_dai_name = "msm-dai-q6-tdm.36897",
6739 .platform_name = "msm-pcm-routing",
6740 .codec_name = "msm-stub-codec.1",
6741 .codec_dai_name = "msm-stub-tx",
6742 .no_pcm = 1,
6743 .dpcm_capture = 1,
6744 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
6745 .be_hw_params_fixup = msm_be_hw_params_fixup,
6746 .ops = &sm6150_tdm_be_ops,
6747 .ignore_suspend = 1,
6748 },
6749 {
6750 .name = LPASS_BE_QUAT_TDM_RX_0,
6751 .stream_name = "Quaternary TDM0 Playback",
6752 .cpu_dai_name = "msm-dai-q6-tdm.36912",
6753 .platform_name = "msm-pcm-routing",
6754 .codec_name = "msm-stub-codec.1",
6755 .codec_dai_name = "msm-stub-rx",
6756 .no_pcm = 1,
6757 .dpcm_playback = 1,
6758 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
6759 .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
6760 .ops = &sm6150_tdm_be_ops,
6761 .ignore_suspend = 1,
6762 .ignore_pmdown_time = 1,
6763 },
6764 {
6765 .name = LPASS_BE_QUAT_TDM_TX_0,
6766 .stream_name = "Quaternary TDM0 Capture",
6767 .cpu_dai_name = "msm-dai-q6-tdm.36913",
6768 .platform_name = "msm-pcm-routing",
6769 .codec_name = "msm-stub-codec.1",
6770 .codec_dai_name = "msm-stub-tx",
6771 .no_pcm = 1,
6772 .dpcm_capture = 1,
6773 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
6774 .be_hw_params_fixup = msm_be_hw_params_fixup,
6775 .ops = &sm6150_tdm_be_ops,
6776 .ignore_suspend = 1,
6777 },
6778};
6779
6780static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
6781 {
6782 .name = LPASS_BE_SLIMBUS_0_RX,
6783 .stream_name = "Slimbus Playback",
6784 .cpu_dai_name = "msm-dai-q6-dev.16384",
6785 .platform_name = "msm-pcm-routing",
6786 .codec_name = "tavil_codec",
6787 .codec_dai_name = "tavil_rx1",
6788 .no_pcm = 1,
6789 .dpcm_playback = 1,
6790 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
6791 .init = &msm_audrx_tavil_init,
6792 .be_hw_params_fixup = msm_be_hw_params_fixup,
6793 /* this dainlink has playback support */
6794 .ignore_pmdown_time = 1,
6795 .ignore_suspend = 1,
6796 .ops = &msm_be_ops,
6797 },
6798 {
6799 .name = LPASS_BE_SLIMBUS_0_TX,
6800 .stream_name = "Slimbus Capture",
6801 .cpu_dai_name = "msm-dai-q6-dev.16385",
6802 .platform_name = "msm-pcm-routing",
6803 .codec_name = "tavil_codec",
6804 .codec_dai_name = "tavil_tx1",
6805 .no_pcm = 1,
6806 .dpcm_capture = 1,
6807 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
6808 .be_hw_params_fixup = msm_be_hw_params_fixup,
6809 .ignore_suspend = 1,
6810 .ops = &msm_be_ops,
6811 },
6812 {
6813 .name = LPASS_BE_SLIMBUS_1_RX,
6814 .stream_name = "Slimbus1 Playback",
6815 .cpu_dai_name = "msm-dai-q6-dev.16386",
6816 .platform_name = "msm-pcm-routing",
6817 .codec_name = "tavil_codec",
6818 .codec_dai_name = "tavil_rx1",
6819 .no_pcm = 1,
6820 .dpcm_playback = 1,
6821 .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
6822 .be_hw_params_fixup = msm_be_hw_params_fixup,
6823 .ops = &msm_be_ops,
6824 /* dai link has playback support */
6825 .ignore_pmdown_time = 1,
6826 .ignore_suspend = 1,
6827 },
6828 {
6829 .name = LPASS_BE_SLIMBUS_1_TX,
6830 .stream_name = "Slimbus1 Capture",
6831 .cpu_dai_name = "msm-dai-q6-dev.16387",
6832 .platform_name = "msm-pcm-routing",
6833 .codec_name = "tavil_codec",
6834 .codec_dai_name = "tavil_tx3",
6835 .no_pcm = 1,
6836 .dpcm_capture = 1,
6837 .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
6838 .be_hw_params_fixup = msm_be_hw_params_fixup,
6839 .ops = &msm_be_ops,
6840 .ignore_suspend = 1,
6841 },
6842 {
6843 .name = LPASS_BE_SLIMBUS_2_RX,
6844 .stream_name = "Slimbus2 Playback",
6845 .cpu_dai_name = "msm-dai-q6-dev.16388",
6846 .platform_name = "msm-pcm-routing",
6847 .codec_name = "tavil_codec",
6848 .codec_dai_name = "tavil_rx2",
6849 .no_pcm = 1,
6850 .dpcm_playback = 1,
6851 .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
6852 .be_hw_params_fixup = msm_be_hw_params_fixup,
6853 .ops = &msm_be_ops,
6854 .ignore_pmdown_time = 1,
6855 .ignore_suspend = 1,
6856 },
6857 {
6858 .name = LPASS_BE_SLIMBUS_3_RX,
6859 .stream_name = "Slimbus3 Playback",
6860 .cpu_dai_name = "msm-dai-q6-dev.16390",
6861 .platform_name = "msm-pcm-routing",
6862 .codec_name = "tavil_codec",
6863 .codec_dai_name = "tavil_rx1",
6864 .no_pcm = 1,
6865 .dpcm_playback = 1,
6866 .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
6867 .be_hw_params_fixup = msm_be_hw_params_fixup,
6868 .ops = &msm_be_ops,
6869 /* dai link has playback support */
6870 .ignore_pmdown_time = 1,
6871 .ignore_suspend = 1,
6872 },
6873 {
6874 .name = LPASS_BE_SLIMBUS_3_TX,
6875 .stream_name = "Slimbus3 Capture",
6876 .cpu_dai_name = "msm-dai-q6-dev.16391",
6877 .platform_name = "msm-pcm-routing",
6878 .codec_name = "tavil_codec",
6879 .codec_dai_name = "tavil_tx1",
6880 .no_pcm = 1,
6881 .dpcm_capture = 1,
6882 .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
6883 .be_hw_params_fixup = msm_be_hw_params_fixup,
6884 .ops = &msm_be_ops,
6885 .ignore_suspend = 1,
6886 },
6887 {
6888 .name = LPASS_BE_SLIMBUS_4_RX,
6889 .stream_name = "Slimbus4 Playback",
6890 .cpu_dai_name = "msm-dai-q6-dev.16392",
6891 .platform_name = "msm-pcm-routing",
6892 .codec_name = "tavil_codec",
6893 .codec_dai_name = "tavil_rx1",
6894 .no_pcm = 1,
6895 .dpcm_playback = 1,
6896 .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
6897 .be_hw_params_fixup = msm_be_hw_params_fixup,
6898 .ops = &msm_be_ops,
6899 /* dai link has playback support */
6900 .ignore_pmdown_time = 1,
6901 .ignore_suspend = 1,
6902 },
6903 {
6904 .name = LPASS_BE_SLIMBUS_5_RX,
6905 .stream_name = "Slimbus5 Playback",
6906 .cpu_dai_name = "msm-dai-q6-dev.16394",
6907 .platform_name = "msm-pcm-routing",
6908 .codec_name = "tavil_codec",
6909 .codec_dai_name = "tavil_rx3",
6910 .no_pcm = 1,
6911 .dpcm_playback = 1,
6912 .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
6913 .be_hw_params_fixup = msm_be_hw_params_fixup,
6914 .ops = &msm_be_ops,
6915 /* dai link has playback support */
6916 .ignore_pmdown_time = 1,
6917 .ignore_suspend = 1,
6918 },
6919 /* MAD BE */
6920 {
6921 .name = LPASS_BE_SLIMBUS_5_TX,
6922 .stream_name = "Slimbus5 Capture",
6923 .cpu_dai_name = "msm-dai-q6-dev.16395",
6924 .platform_name = "msm-pcm-routing",
6925 .codec_name = "tavil_codec",
6926 .codec_dai_name = "tavil_mad1",
6927 .no_pcm = 1,
6928 .dpcm_capture = 1,
6929 .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
6930 .be_hw_params_fixup = msm_be_hw_params_fixup,
6931 .ops = &msm_be_ops,
6932 .ignore_suspend = 1,
6933 },
6934 {
6935 .name = LPASS_BE_SLIMBUS_6_RX,
6936 .stream_name = "Slimbus6 Playback",
6937 .cpu_dai_name = "msm-dai-q6-dev.16396",
6938 .platform_name = "msm-pcm-routing",
6939 .codec_name = "tavil_codec",
6940 .codec_dai_name = "tavil_rx4",
6941 .no_pcm = 1,
6942 .dpcm_playback = 1,
6943 .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
6944 .be_hw_params_fixup = msm_be_hw_params_fixup,
6945 .ops = &msm_be_ops,
6946 /* dai link has playback support */
6947 .ignore_pmdown_time = 1,
6948 .ignore_suspend = 1,
6949 },
6950 /* Slimbus VI Recording */
6951 {
6952 .name = LPASS_BE_SLIMBUS_TX_VI,
6953 .stream_name = "Slimbus4 Capture",
6954 .cpu_dai_name = "msm-dai-q6-dev.16393",
6955 .platform_name = "msm-pcm-routing",
6956 .codec_name = "tavil_codec",
6957 .codec_dai_name = "tavil_vifeedback",
6958 .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
6959 .be_hw_params_fixup = msm_be_hw_params_fixup,
6960 .ops = &msm_be_ops,
6961 .ignore_suspend = 1,
6962 .no_pcm = 1,
6963 .dpcm_capture = 1,
6964 },
6965};
6966
6967static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6968 {
6969 .name = LPASS_BE_SLIMBUS_7_RX,
6970 .stream_name = "Slimbus7 Playback",
6971 .cpu_dai_name = "msm-dai-q6-dev.16398",
6972 .platform_name = "msm-pcm-routing",
6973 .codec_name = "btfmslim_slave",
6974 /* BT codec driver determines capabilities based on
6975 * dai name, bt codecdai name should always contains
6976 * supported usecase information
6977 */
6978 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6979 .no_pcm = 1,
6980 .dpcm_playback = 1,
6981 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6982 .be_hw_params_fixup = msm_be_hw_params_fixup,
6983 .ops = &msm_wcn_ops,
6984 /* dai link has playback support */
6985 .ignore_pmdown_time = 1,
6986 .ignore_suspend = 1,
6987 },
6988 {
6989 .name = LPASS_BE_SLIMBUS_7_TX,
6990 .stream_name = "Slimbus7 Capture",
6991 .cpu_dai_name = "msm-dai-q6-dev.16399",
6992 .platform_name = "msm-pcm-routing",
6993 .codec_name = "btfmslim_slave",
6994 .codec_dai_name = "btfm_bt_sco_slim_tx",
6995 .no_pcm = 1,
6996 .dpcm_capture = 1,
6997 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6998 .be_hw_params_fixup = msm_be_hw_params_fixup,
6999 .ops = &msm_wcn_ops,
7000 .ignore_suspend = 1,
7001 },
7002 {
7003 .name = LPASS_BE_SLIMBUS_8_TX,
7004 .stream_name = "Slimbus8 Capture",
7005 .cpu_dai_name = "msm-dai-q6-dev.16401",
7006 .platform_name = "msm-pcm-routing",
7007 .codec_name = "btfmslim_slave",
7008 .codec_dai_name = "btfm_fm_slim_tx",
7009 .no_pcm = 1,
7010 .dpcm_capture = 1,
7011 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
7012 .be_hw_params_fixup = msm_be_hw_params_fixup,
7013 .init = &msm_wcn_init,
7014 .ops = &msm_wcn_ops,
7015 .ignore_suspend = 1,
7016 },
7017};
7018
7019static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
7020 /* DISP PORT BACK END DAI Link */
7021 {
7022 .name = LPASS_BE_DISPLAY_PORT,
7023 .stream_name = "Display Port Playback",
7024 .cpu_dai_name = "msm-dai-q6-dp.24608",
7025 .platform_name = "msm-pcm-routing",
7026 .codec_name = "msm-ext-disp-audio-codec-rx",
7027 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
7028 .no_pcm = 1,
7029 .dpcm_playback = 1,
7030 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
7031 .be_hw_params_fixup = msm_be_hw_params_fixup,
7032 .ignore_pmdown_time = 1,
7033 .ignore_suspend = 1,
7034 },
7035};
7036
7037static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
7038 {
7039 .name = LPASS_BE_PRI_MI2S_RX,
7040 .stream_name = "Primary MI2S Playback",
7041 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7042 .platform_name = "msm-pcm-routing",
7043 .codec_name = "msm-stub-codec.1",
7044 .codec_dai_name = "msm-stub-rx",
7045 .no_pcm = 1,
7046 .dpcm_playback = 1,
7047 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
7048 .be_hw_params_fixup = msm_be_hw_params_fixup,
7049 .ops = &msm_mi2s_be_ops,
7050 .ignore_suspend = 1,
7051 .ignore_pmdown_time = 1,
7052 },
7053 {
7054 .name = LPASS_BE_PRI_MI2S_TX,
7055 .stream_name = "Primary MI2S Capture",
7056 .cpu_dai_name = "msm-dai-q6-mi2s.0",
7057 .platform_name = "msm-pcm-routing",
7058 .codec_name = "msm-stub-codec.1",
7059 .codec_dai_name = "msm-stub-tx",
7060 .no_pcm = 1,
7061 .dpcm_capture = 1,
7062 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
7063 .be_hw_params_fixup = msm_be_hw_params_fixup,
7064 .ops = &msm_mi2s_be_ops,
7065 .ignore_suspend = 1,
7066 },
7067 {
7068 .name = LPASS_BE_SEC_MI2S_RX,
7069 .stream_name = "Secondary MI2S Playback",
7070 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7071 .platform_name = "msm-pcm-routing",
7072 .codec_name = "msm-stub-codec.1",
7073 .codec_dai_name = "msm-stub-rx",
7074 .no_pcm = 1,
7075 .dpcm_playback = 1,
7076 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
7077 .be_hw_params_fixup = msm_be_hw_params_fixup,
7078 .ops = &msm_mi2s_be_ops,
7079 .ignore_suspend = 1,
7080 .ignore_pmdown_time = 1,
7081 },
7082 {
7083 .name = LPASS_BE_SEC_MI2S_TX,
7084 .stream_name = "Secondary MI2S Capture",
7085 .cpu_dai_name = "msm-dai-q6-mi2s.1",
7086 .platform_name = "msm-pcm-routing",
7087 .codec_name = "msm-stub-codec.1",
7088 .codec_dai_name = "msm-stub-tx",
7089 .no_pcm = 1,
7090 .dpcm_capture = 1,
7091 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
7092 .be_hw_params_fixup = msm_be_hw_params_fixup,
7093 .ops = &msm_mi2s_be_ops,
7094 .ignore_suspend = 1,
7095 },
7096 {
7097 .name = LPASS_BE_TERT_MI2S_RX,
7098 .stream_name = "Tertiary MI2S Playback",
7099 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7100 .platform_name = "msm-pcm-routing",
7101 .codec_name = "msm-stub-codec.1",
7102 .codec_dai_name = "msm-stub-rx",
7103 .no_pcm = 1,
7104 .dpcm_playback = 1,
7105 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
7106 .be_hw_params_fixup = msm_be_hw_params_fixup,
7107 .ops = &msm_mi2s_be_ops,
7108 .ignore_suspend = 1,
7109 .ignore_pmdown_time = 1,
7110 },
7111 {
7112 .name = LPASS_BE_TERT_MI2S_TX,
7113 .stream_name = "Tertiary MI2S Capture",
7114 .cpu_dai_name = "msm-dai-q6-mi2s.2",
7115 .platform_name = "msm-pcm-routing",
7116 .codec_name = "msm-stub-codec.1",
7117 .codec_dai_name = "msm-stub-tx",
7118 .no_pcm = 1,
7119 .dpcm_capture = 1,
7120 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
7121 .be_hw_params_fixup = msm_be_hw_params_fixup,
7122 .ops = &msm_mi2s_be_ops,
7123 .ignore_suspend = 1,
7124 },
7125 {
7126 .name = LPASS_BE_QUAT_MI2S_RX,
7127 .stream_name = "Quaternary MI2S Playback",
7128 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7129 .platform_name = "msm-pcm-routing",
7130 .codec_name = "msm-stub-codec.1",
7131 .codec_dai_name = "msm-stub-rx",
7132 .no_pcm = 1,
7133 .dpcm_playback = 1,
7134 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
7135 .be_hw_params_fixup = msm_be_hw_params_fixup,
7136 .ops = &msm_mi2s_be_ops,
7137 .ignore_suspend = 1,
7138 .ignore_pmdown_time = 1,
7139 },
7140 {
7141 .name = LPASS_BE_QUAT_MI2S_TX,
7142 .stream_name = "Quaternary MI2S Capture",
7143 .cpu_dai_name = "msm-dai-q6-mi2s.3",
7144 .platform_name = "msm-pcm-routing",
7145 .codec_name = "msm-stub-codec.1",
7146 .codec_dai_name = "msm-stub-tx",
7147 .no_pcm = 1,
7148 .dpcm_capture = 1,
7149 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
7150 .be_hw_params_fixup = msm_be_hw_params_fixup,
7151 .ops = &msm_mi2s_be_ops,
7152 .ignore_suspend = 1,
7153 },
7154 {
7155 .name = LPASS_BE_QUIN_MI2S_RX,
7156 .stream_name = "Quinary MI2S Playback",
7157 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7158 .platform_name = "msm-pcm-routing",
7159 .codec_name = "msm-stub-codec.1",
7160 .codec_dai_name = "msm-stub-rx",
7161 .no_pcm = 1,
7162 .dpcm_playback = 1,
7163 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
7164 .be_hw_params_fixup = msm_be_hw_params_fixup,
7165 .ops = &msm_mi2s_be_ops,
7166 .ignore_suspend = 1,
7167 .ignore_pmdown_time = 1,
7168 },
7169 {
7170 .name = LPASS_BE_QUIN_MI2S_TX,
7171 .stream_name = "Quinary MI2S Capture",
7172 .cpu_dai_name = "msm-dai-q6-mi2s.4",
7173 .platform_name = "msm-pcm-routing",
7174 .codec_name = "msm-stub-codec.1",
7175 .codec_dai_name = "msm-stub-tx",
7176 .no_pcm = 1,
7177 .dpcm_capture = 1,
7178 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
7179 .be_hw_params_fixup = msm_be_hw_params_fixup,
7180 .ops = &msm_mi2s_be_ops,
7181 .ignore_suspend = 1,
7182 },
7183
7184};
7185
7186static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
7187 /* Primary AUX PCM Backend DAI Links */
7188 {
7189 .name = LPASS_BE_AUXPCM_RX,
7190 .stream_name = "AUX PCM Playback",
7191 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7192 .platform_name = "msm-pcm-routing",
7193 .codec_name = "msm-stub-codec.1",
7194 .codec_dai_name = "msm-stub-rx",
7195 .no_pcm = 1,
7196 .dpcm_playback = 1,
7197 .id = MSM_BACKEND_DAI_AUXPCM_RX,
7198 .be_hw_params_fixup = msm_be_hw_params_fixup,
7199 .ignore_pmdown_time = 1,
7200 .ignore_suspend = 1,
7201 },
7202 {
7203 .name = LPASS_BE_AUXPCM_TX,
7204 .stream_name = "AUX PCM Capture",
7205 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
7206 .platform_name = "msm-pcm-routing",
7207 .codec_name = "msm-stub-codec.1",
7208 .codec_dai_name = "msm-stub-tx",
7209 .no_pcm = 1,
7210 .dpcm_capture = 1,
7211 .id = MSM_BACKEND_DAI_AUXPCM_TX,
7212 .be_hw_params_fixup = msm_be_hw_params_fixup,
7213 .ignore_suspend = 1,
7214 },
7215 /* Secondary AUX PCM Backend DAI Links */
7216 {
7217 .name = LPASS_BE_SEC_AUXPCM_RX,
7218 .stream_name = "Sec AUX PCM Playback",
7219 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7220 .platform_name = "msm-pcm-routing",
7221 .codec_name = "msm-stub-codec.1",
7222 .codec_dai_name = "msm-stub-rx",
7223 .no_pcm = 1,
7224 .dpcm_playback = 1,
7225 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
7226 .be_hw_params_fixup = msm_be_hw_params_fixup,
7227 .ignore_pmdown_time = 1,
7228 .ignore_suspend = 1,
7229 },
7230 {
7231 .name = LPASS_BE_SEC_AUXPCM_TX,
7232 .stream_name = "Sec AUX PCM Capture",
7233 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
7234 .platform_name = "msm-pcm-routing",
7235 .codec_name = "msm-stub-codec.1",
7236 .codec_dai_name = "msm-stub-tx",
7237 .no_pcm = 1,
7238 .dpcm_capture = 1,
7239 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
7240 .be_hw_params_fixup = msm_be_hw_params_fixup,
7241 .ignore_suspend = 1,
7242 },
7243 /* Tertiary AUX PCM Backend DAI Links */
7244 {
7245 .name = LPASS_BE_TERT_AUXPCM_RX,
7246 .stream_name = "Tert AUX PCM Playback",
7247 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7248 .platform_name = "msm-pcm-routing",
7249 .codec_name = "msm-stub-codec.1",
7250 .codec_dai_name = "msm-stub-rx",
7251 .no_pcm = 1,
7252 .dpcm_playback = 1,
7253 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
7254 .be_hw_params_fixup = msm_be_hw_params_fixup,
7255 .ignore_suspend = 1,
7256 },
7257 {
7258 .name = LPASS_BE_TERT_AUXPCM_TX,
7259 .stream_name = "Tert AUX PCM Capture",
7260 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
7261 .platform_name = "msm-pcm-routing",
7262 .codec_name = "msm-stub-codec.1",
7263 .codec_dai_name = "msm-stub-tx",
7264 .no_pcm = 1,
7265 .dpcm_capture = 1,
7266 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
7267 .be_hw_params_fixup = msm_be_hw_params_fixup,
7268 .ignore_suspend = 1,
7269 },
7270 /* Quaternary AUX PCM Backend DAI Links */
7271 {
7272 .name = LPASS_BE_QUAT_AUXPCM_RX,
7273 .stream_name = "Quat AUX PCM Playback",
7274 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7275 .platform_name = "msm-pcm-routing",
7276 .codec_name = "msm-stub-codec.1",
7277 .codec_dai_name = "msm-stub-rx",
7278 .no_pcm = 1,
7279 .dpcm_playback = 1,
7280 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
7281 .be_hw_params_fixup = msm_be_hw_params_fixup,
7282 .ignore_pmdown_time = 1,
7283 .ignore_suspend = 1,
7284 },
7285 {
7286 .name = LPASS_BE_QUAT_AUXPCM_TX,
7287 .stream_name = "Quat AUX PCM Capture",
7288 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
7289 .platform_name = "msm-pcm-routing",
7290 .codec_name = "msm-stub-codec.1",
7291 .codec_dai_name = "msm-stub-tx",
7292 .no_pcm = 1,
7293 .dpcm_capture = 1,
7294 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
7295 .be_hw_params_fixup = msm_be_hw_params_fixup,
7296 .ignore_suspend = 1,
7297 },
7298 /* Quinary AUX PCM Backend DAI Links */
7299 {
7300 .name = LPASS_BE_QUIN_AUXPCM_RX,
7301 .stream_name = "Quin AUX PCM Playback",
7302 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7303 .platform_name = "msm-pcm-routing",
7304 .codec_name = "msm-stub-codec.1",
7305 .codec_dai_name = "msm-stub-rx",
7306 .no_pcm = 1,
7307 .dpcm_playback = 1,
7308 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
7309 .be_hw_params_fixup = msm_be_hw_params_fixup,
7310 .ignore_pmdown_time = 1,
7311 .ignore_suspend = 1,
7312 },
7313 {
7314 .name = LPASS_BE_QUIN_AUXPCM_TX,
7315 .stream_name = "Quin AUX PCM Capture",
7316 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
7317 .platform_name = "msm-pcm-routing",
7318 .codec_name = "msm-stub-codec.1",
7319 .codec_dai_name = "msm-stub-tx",
7320 .no_pcm = 1,
7321 .dpcm_capture = 1,
7322 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
7323 .be_hw_params_fixup = msm_be_hw_params_fixup,
7324 .ignore_suspend = 1,
7325 },
7326};
7327
7328static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
7329 /* WSA CDC DMA Backend DAI Links */
7330 {
7331 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
7332 .stream_name = "WSA CDC DMA0 Playback",
7333 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
7334 .platform_name = "msm-pcm-routing",
7335 .codec_name = "bolero_codec",
7336 .codec_dai_name = "wsa_macro_rx1",
7337 .no_pcm = 1,
7338 .dpcm_playback = 1,
7339 .init = &msm_int_audrx_init,
7340 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
7341 .be_hw_params_fixup = msm_be_hw_params_fixup,
7342 .ignore_pmdown_time = 1,
7343 .ignore_suspend = 1,
7344 .ops = &msm_cdc_dma_be_ops,
7345 },
7346 {
7347 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
7348 .stream_name = "WSA CDC DMA1 Playback",
7349 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
7350 .platform_name = "msm-pcm-routing",
7351 .codec_name = "bolero_codec",
7352 .codec_dai_name = "wsa_macro_rx_mix",
7353 .no_pcm = 1,
7354 .dpcm_playback = 1,
7355 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
7356 .be_hw_params_fixup = msm_be_hw_params_fixup,
7357 .ignore_pmdown_time = 1,
7358 .ignore_suspend = 1,
7359 .ops = &msm_cdc_dma_be_ops,
7360 },
7361 {
7362 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
7363 .stream_name = "WSA CDC DMA1 Capture",
7364 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
7365 .platform_name = "msm-pcm-routing",
7366 .codec_name = "bolero_codec",
7367 .codec_dai_name = "wsa_macro_echo",
7368 .no_pcm = 1,
7369 .dpcm_capture = 1,
7370 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
7371 .be_hw_params_fixup = msm_be_hw_params_fixup,
7372 .ignore_suspend = 1,
7373 .ops = &msm_cdc_dma_be_ops,
7374 },
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307375};
7376
7377static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
7378 /* RX CDC DMA Backend DAI Links */
7379 {
7380 .name = LPASS_BE_RX_CDC_DMA_RX_0,
7381 .stream_name = "RX CDC DMA0 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307382 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307383 .platform_name = "msm-pcm-routing",
7384 .codec_name = "bolero_codec",
7385 .codec_dai_name = "rx_macro_rx1",
7386 .no_pcm = 1,
7387 .dpcm_playback = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307388 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
7389 .be_hw_params_fixup = msm_be_hw_params_fixup,
7390 .ignore_pmdown_time = 1,
7391 .ignore_suspend = 1,
7392 .ops = &msm_cdc_dma_be_ops,
7393 },
7394 {
7395 .name = LPASS_BE_RX_CDC_DMA_RX_1,
7396 .stream_name = "RX CDC DMA1 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307397 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307398 .platform_name = "msm-pcm-routing",
7399 .codec_name = "bolero_codec",
7400 .codec_dai_name = "rx_macro_rx2",
7401 .no_pcm = 1,
7402 .dpcm_playback = 1,
7403 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
7404 .be_hw_params_fixup = msm_be_hw_params_fixup,
7405 .ignore_pmdown_time = 1,
7406 .ignore_suspend = 1,
7407 .ops = &msm_cdc_dma_be_ops,
7408 },
7409 {
7410 .name = LPASS_BE_RX_CDC_DMA_RX_2,
7411 .stream_name = "RX CDC DMA2 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307412 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307413 .platform_name = "msm-pcm-routing",
7414 .codec_name = "bolero_codec",
7415 .codec_dai_name = "rx_macro_rx3",
7416 .no_pcm = 1,
7417 .dpcm_playback = 1,
7418 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
7419 .be_hw_params_fixup = msm_be_hw_params_fixup,
7420 .ignore_pmdown_time = 1,
7421 .ignore_suspend = 1,
7422 .ops = &msm_cdc_dma_be_ops,
7423 },
7424 {
7425 .name = LPASS_BE_RX_CDC_DMA_RX_3,
7426 .stream_name = "RX CDC DMA3 Playback",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307427 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307428 .platform_name = "msm-pcm-routing",
7429 .codec_name = "bolero_codec",
7430 .codec_dai_name = "rx_macro_rx4",
7431 .no_pcm = 1,
7432 .dpcm_playback = 1,
7433 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
7434 .be_hw_params_fixup = msm_be_hw_params_fixup,
7435 .ignore_pmdown_time = 1,
7436 .ignore_suspend = 1,
7437 .ops = &msm_cdc_dma_be_ops,
7438 },
7439 /* TX CDC DMA Backend DAI Links */
7440 {
7441 .name = LPASS_BE_TX_CDC_DMA_TX_3,
7442 .stream_name = "TX CDC DMA3 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307443 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307444 .platform_name = "msm-pcm-routing",
7445 .codec_name = "bolero_codec",
7446 .codec_dai_name = "tx_macro_tx1",
7447 .no_pcm = 1,
7448 .dpcm_capture = 1,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307449 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
7450 .be_hw_params_fixup = msm_be_hw_params_fixup,
7451 .ignore_suspend = 1,
7452 .ops = &msm_cdc_dma_be_ops,
7453 },
7454 {
7455 .name = LPASS_BE_TX_CDC_DMA_TX_4,
7456 .stream_name = "TX CDC DMA4 Capture",
Ramprasad Katkamf83acfb2018-08-11 23:28:57 +05307457 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307458 .platform_name = "msm-pcm-routing",
7459 .codec_name = "bolero_codec",
7460 .codec_dai_name = "tx_macro_tx2",
7461 .no_pcm = 1,
7462 .dpcm_capture = 1,
7463 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
7464 .be_hw_params_fixup = msm_be_hw_params_fixup,
7465 .ignore_suspend = 1,
7466 .ops = &msm_cdc_dma_be_ops,
7467 },
7468};
7469
7470static struct snd_soc_dai_link msm_sm6150_dai_links[
7471 ARRAY_SIZE(msm_common_dai_links) +
7472 ARRAY_SIZE(msm_tavil_fe_dai_links) +
7473 ARRAY_SIZE(msm_bolero_fe_dai_links) +
7474 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
7475 ARRAY_SIZE(msm_common_be_dai_links) +
7476 ARRAY_SIZE(msm_tavil_be_dai_links) +
7477 ARRAY_SIZE(msm_wcn_be_dai_links) +
7478 ARRAY_SIZE(ext_disp_be_dai_link) +
7479 ARRAY_SIZE(msm_mi2s_be_dai_links) +
7480 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
7481 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
7482 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
7483
7484static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
7485{
7486 const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
7487 struct snd_soc_pcm_runtime *rtd;
7488 int ret = 0;
7489 void *mbhc_calibration;
7490
7491 rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
7492 if (!rtd) {
7493 dev_err(card->dev,
7494 "%s: snd_soc_get_pcm_runtime for %s failed!\n",
7495 __func__, be_dl_name);
7496 ret = -EINVAL;
7497 goto err_pcm_runtime;
7498 }
7499
7500 mbhc_calibration = def_wcd_mbhc_cal();
7501 if (!mbhc_calibration) {
7502 ret = -ENOMEM;
7503 goto err_mbhc_cal;
7504 }
7505 wcd_mbhc_cfg.calibration = mbhc_calibration;
7506 ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
7507 if (ret) {
7508 dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
7509 __func__, ret);
7510 goto err_hs_detect;
7511 }
7512 return 0;
7513
7514err_hs_detect:
7515 kfree(mbhc_calibration);
7516err_mbhc_cal:
7517err_pcm_runtime:
7518 return ret;
7519}
7520
7521
7522static int msm_populate_dai_link_component_of_node(
7523 struct snd_soc_card *card)
7524{
7525 int i, index, ret = 0;
7526 struct device *cdev = card->dev;
7527 struct snd_soc_dai_link *dai_link = card->dai_link;
7528 struct device_node *np;
7529
7530 if (!cdev) {
7531 pr_err("%s: Sound card device memory NULL\n", __func__);
7532 return -ENODEV;
7533 }
7534
7535 for (i = 0; i < card->num_links; i++) {
7536 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
7537 continue;
7538
7539 /* populate platform_of_node for snd card dai links */
7540 if (dai_link[i].platform_name &&
7541 !dai_link[i].platform_of_node) {
7542 index = of_property_match_string(cdev->of_node,
7543 "asoc-platform-names",
7544 dai_link[i].platform_name);
7545 if (index < 0) {
7546 pr_err("%s: No match found for platform name: %s\n",
7547 __func__, dai_link[i].platform_name);
7548 ret = index;
7549 goto err;
7550 }
7551 np = of_parse_phandle(cdev->of_node, "asoc-platform",
7552 index);
7553 if (!np) {
7554 pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
7555 __func__, dai_link[i].platform_name,
7556 index);
7557 ret = -ENODEV;
7558 goto err;
7559 }
7560 dai_link[i].platform_of_node = np;
7561 dai_link[i].platform_name = NULL;
7562 }
7563
7564 /* populate cpu_of_node for snd card dai links */
7565 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
7566 index = of_property_match_string(cdev->of_node,
7567 "asoc-cpu-names",
7568 dai_link[i].cpu_dai_name);
7569 if (index >= 0) {
7570 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
7571 index);
7572 if (!np) {
7573 pr_err("%s: retrieving phandle for cpu dai %s failed\n",
7574 __func__,
7575 dai_link[i].cpu_dai_name);
7576 ret = -ENODEV;
7577 goto err;
7578 }
7579 dai_link[i].cpu_of_node = np;
7580 dai_link[i].cpu_dai_name = NULL;
7581 }
7582 }
7583
7584 /* populate codec_of_node for snd card dai links */
7585 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
7586 index = of_property_match_string(cdev->of_node,
7587 "asoc-codec-names",
7588 dai_link[i].codec_name);
7589 if (index < 0)
7590 continue;
7591 np = of_parse_phandle(cdev->of_node, "asoc-codec",
7592 index);
7593 if (!np) {
7594 pr_err("%s: retrieving phandle for codec %s failed\n",
7595 __func__, dai_link[i].codec_name);
7596 ret = -ENODEV;
7597 goto err;
7598 }
7599 dai_link[i].codec_of_node = np;
7600 dai_link[i].codec_name = NULL;
7601 }
7602 }
7603
7604err:
7605 return ret;
7606}
7607
7608static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
7609{
7610 int ret = 0;
7611 struct snd_soc_codec *codec = rtd->codec;
7612
7613 ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
7614 ARRAY_SIZE(msm_tavil_snd_controls));
7615 if (ret < 0) {
7616 dev_err(codec->dev,
7617 "%s: add_codec_controls failed, err = %d\n",
7618 __func__, ret);
7619 return ret;
7620 }
7621
7622 return 0;
7623}
7624
7625static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
7626 struct snd_pcm_hw_params *params)
7627{
7628 struct snd_soc_pcm_runtime *rtd = substream->private_data;
7629 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
7630
7631 int ret = 0;
7632 unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
7633 151};
7634 unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
7635 134, 135, 136, 137, 138, 139,
7636 140, 141, 142, 143};
7637
7638 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
7639 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
7640 slim_rx_cfg[SLIM_RX_0].channels,
7641 rx_ch);
7642 if (ret < 0)
7643 pr_err("%s: RX failed to set cpu chan map error %d\n",
7644 __func__, ret);
7645 } else {
7646 ret = snd_soc_dai_set_channel_map(cpu_dai,
7647 slim_tx_cfg[SLIM_TX_0].channels,
7648 tx_ch, 0, 0);
7649 if (ret < 0)
7650 pr_err("%s: TX failed to set cpu chan map error %d\n",
7651 __func__, ret);
7652 }
7653
7654 return ret;
7655}
7656
7657static struct snd_soc_ops msm_stub_be_ops = {
7658 .hw_params = msm_snd_stub_hw_params,
7659};
7660
7661static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
7662
7663 /* FrontEnd DAI Links */
7664 {
7665 .name = "MSMSTUB Media1",
7666 .stream_name = "MultiMedia1",
7667 .cpu_dai_name = "MultiMedia1",
7668 .platform_name = "msm-pcm-dsp.0",
7669 .dynamic = 1,
7670 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
7671 .dpcm_playback = 1,
7672 .dpcm_capture = 1,
7673 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
7674 SND_SOC_DPCM_TRIGGER_POST},
7675 .codec_dai_name = "snd-soc-dummy-dai",
7676 .codec_name = "snd-soc-dummy",
7677 .ignore_suspend = 1,
7678 /* this dainlink has playback support */
7679 .ignore_pmdown_time = 1,
7680 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
7681 },
7682};
7683
7684static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
7685
7686 /* Backend DAI Links */
7687 {
7688 .name = LPASS_BE_SLIMBUS_0_RX,
7689 .stream_name = "Slimbus Playback",
7690 .cpu_dai_name = "msm-dai-q6-dev.16384",
7691 .platform_name = "msm-pcm-routing",
7692 .codec_name = "msm-stub-codec.1",
7693 .codec_dai_name = "msm-stub-rx",
7694 .no_pcm = 1,
7695 .dpcm_playback = 1,
7696 .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
7697 .init = &msm_audrx_stub_init,
7698 .be_hw_params_fixup = msm_be_hw_params_fixup,
7699 .ignore_pmdown_time = 1, /* dai link has playback support */
7700 .ignore_suspend = 1,
7701 .ops = &msm_stub_be_ops,
7702 },
7703 {
7704 .name = LPASS_BE_SLIMBUS_0_TX,
7705 .stream_name = "Slimbus Capture",
7706 .cpu_dai_name = "msm-dai-q6-dev.16385",
7707 .platform_name = "msm-pcm-routing",
7708 .codec_name = "msm-stub-codec.1",
7709 .codec_dai_name = "msm-stub-tx",
7710 .no_pcm = 1,
7711 .dpcm_capture = 1,
7712 .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
7713 .be_hw_params_fixup = msm_be_hw_params_fixup,
7714 .ignore_suspend = 1,
7715 .ops = &msm_stub_be_ops,
7716 },
7717};
7718
7719static struct snd_soc_dai_link msm_stub_dai_links[
7720 ARRAY_SIZE(msm_stub_fe_dai_links) +
7721 ARRAY_SIZE(msm_stub_be_dai_links)];
7722
7723struct snd_soc_card snd_soc_card_stub_msm = {
7724 .name = "sm6150-stub-snd-card",
7725};
7726
7727static const struct of_device_id sm6150_asoc_machine_of_match[] = {
7728 { .compatible = "qcom,sm6150-asoc-snd",
7729 .data = "codec"},
7730 { .compatible = "qcom,sm6150-asoc-snd-stub",
7731 .data = "stub_codec"},
7732 {},
7733};
7734
7735static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
7736{
7737 struct snd_soc_card *card = NULL;
7738 struct snd_soc_dai_link *dailink;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307739 int total_links = 0, rc = 0;
7740 u32 tavil_codec = 0, auxpcm_audio_intf = 0;
7741 u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
7742 u32 wcn_btfm_intf = 0;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307743 const struct of_device_id *match;
7744
7745 match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
7746 if (!match) {
7747 dev_err(dev, "%s: No DT match found for sound card\n",
7748 __func__);
7749 return NULL;
7750 }
7751
7752 if (!strcmp(match->data, "codec")) {
7753 card = &snd_soc_card_sm6150_msm;
7754 memcpy(msm_sm6150_dai_links + total_links,
7755 msm_common_dai_links,
7756 sizeof(msm_common_dai_links));
7757
7758 total_links += ARRAY_SIZE(msm_common_dai_links);
7759
7760 memcpy(msm_sm6150_dai_links + total_links,
7761 msm_common_misc_fe_dai_links,
7762 sizeof(msm_common_misc_fe_dai_links));
7763
7764 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
7765
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307766 rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
7767 &tavil_codec);
7768 if (rc) {
7769 dev_dbg(dev, "%s: No DT match for tavil codec\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307770 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307771 } else {
7772 if (tavil_codec) {
7773 card->late_probe =
7774 msm_snd_card_tavil_late_probe;
7775 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307776 msm_tavil_fe_dai_links,
7777 sizeof(msm_tavil_fe_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307778 total_links +=
7779 ARRAY_SIZE(msm_tavil_fe_dai_links);
7780 }
7781 }
7782
7783 if (!tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307784 memcpy(msm_sm6150_dai_links + total_links,
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307785 msm_bolero_fe_dai_links,
7786 sizeof(msm_bolero_fe_dai_links));
7787 total_links +=
7788 ARRAY_SIZE(msm_bolero_fe_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307789 }
7790
7791 memcpy(msm_sm6150_dai_links + total_links,
7792 msm_common_be_dai_links,
7793 sizeof(msm_common_be_dai_links));
7794
7795 total_links += ARRAY_SIZE(msm_common_be_dai_links);
7796
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307797 if (tavil_codec) {
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307798 memcpy(msm_sm6150_dai_links + total_links,
7799 msm_tavil_be_dai_links,
7800 sizeof(msm_tavil_be_dai_links));
7801 total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
7802 } else {
7803 memcpy(msm_sm6150_dai_links + total_links,
7804 msm_wsa_cdc_dma_be_dai_links,
7805 sizeof(msm_wsa_cdc_dma_be_dai_links));
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307806 total_links +=
7807 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307808
7809 memcpy(msm_sm6150_dai_links + total_links,
7810 msm_rx_tx_cdc_dma_be_dai_links,
7811 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
7812 total_links +=
7813 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
7814 }
7815
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307816 rc = of_property_read_u32(dev->of_node,
7817 "qcom,ext-disp-audio-rx",
7818 &ext_disp_audio_intf);
7819 if (rc) {
7820 dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307821 __func__);
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307822 } else {
7823 if (auxpcm_audio_intf) {
7824 memcpy(msm_sm6150_dai_links + total_links,
7825 ext_disp_be_dai_link,
7826 sizeof(ext_disp_be_dai_link));
7827 total_links +=
7828 ARRAY_SIZE(ext_disp_be_dai_link);
7829 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307830 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307831
7832 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
7833 &mi2s_audio_intf);
7834 if (rc) {
7835 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
7836 __func__);
7837 } else {
7838 if (mi2s_audio_intf) {
7839 memcpy(msm_sm6150_dai_links + total_links,
7840 msm_mi2s_be_dai_links,
7841 sizeof(msm_mi2s_be_dai_links));
7842 total_links +=
7843 ARRAY_SIZE(msm_mi2s_be_dai_links);
7844 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307845 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307846
7847
7848 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7849 &wcn_btfm_intf);
7850 if (rc) {
7851 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7852 __func__);
7853 } else {
7854 if (wcn_btfm_intf) {
7855 memcpy(msm_sm6150_dai_links + total_links,
7856 msm_wcn_be_dai_links,
7857 sizeof(msm_wcn_be_dai_links));
7858 total_links +=
7859 ARRAY_SIZE(msm_wcn_be_dai_links);
7860 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307861 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307862
7863 rc = of_property_read_u32(dev->of_node,
7864 "qcom,auxpcm-audio-intf",
7865 &auxpcm_audio_intf);
7866 if (rc) {
7867 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
7868 __func__);
7869 } else {
7870 if (auxpcm_audio_intf) {
7871 memcpy(msm_sm6150_dai_links + total_links,
7872 msm_auxpcm_be_dai_links,
7873 sizeof(msm_auxpcm_be_dai_links));
7874 total_links +=
7875 ARRAY_SIZE(msm_auxpcm_be_dai_links);
7876 }
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307877 }
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307878
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307879 dailink = msm_sm6150_dai_links;
7880 } else if (!strcmp(match->data, "stub_codec")) {
7881 card = &snd_soc_card_stub_msm;
7882
7883 memcpy(msm_stub_dai_links + total_links,
7884 msm_stub_fe_dai_links,
7885 sizeof(msm_stub_fe_dai_links));
7886 total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
7887
7888 memcpy(msm_stub_dai_links + total_links,
7889 msm_stub_be_dai_links,
7890 sizeof(msm_stub_be_dai_links));
7891 total_links += ARRAY_SIZE(msm_stub_be_dai_links);
7892
7893 dailink = msm_stub_dai_links;
7894 }
7895
7896 if (card) {
7897 card->dai_link = dailink;
7898 card->num_links = total_links;
7899 }
7900
7901 return card;
7902}
7903
7904static int msm_wsa881x_init(struct snd_soc_component *component)
7905{
7906 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7907 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7908 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7909 SPKR_L_BOOST, SPKR_L_VI};
7910 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7911 SPKR_R_BOOST, SPKR_R_VI};
7912 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7913 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7914 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7915 struct msm_asoc_mach_data *pdata;
7916 struct snd_soc_dapm_context *dapm;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307917 struct snd_card *card = component->card->snd_card;
7918 struct snd_info_entry *entry;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307919 int ret = 0;
7920
7921 if (!codec) {
7922 pr_err("%s codec is NULL\n", __func__);
7923 return -EINVAL;
7924 }
7925
7926 dapm = snd_soc_codec_get_dapm(codec);
7927
7928 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7929 dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
7930 __func__, codec->component.name);
7931 wsa881x_set_channel_map(codec, &spkleft_ports[0],
7932 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7933 &ch_rate[0], &spkleft_port_types[0]);
7934 if (dapm->component) {
7935 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7936 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7937 }
7938 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7939 dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
7940 __func__, codec->component.name);
7941 wsa881x_set_channel_map(codec, &spkright_ports[0],
7942 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7943 &ch_rate[0], &spkright_port_types[0]);
7944 if (dapm->component) {
7945 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7946 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7947 }
7948 } else {
7949 dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
7950 codec->component.name);
7951 ret = -EINVAL;
7952 goto err;
7953 }
7954 pdata = snd_soc_card_get_drvdata(component->card);
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307955 if (!pdata->codec_root) {
7956 entry = snd_info_create_subdir(card->module, "codecs",
7957 card->proc_root);
7958 if (!entry) {
7959 pr_err("%s: Cannot create codecs module entry\n",
7960 __func__);
7961 ret = 0;
7962 goto err;
7963 }
7964 pdata->codec_root = entry;
7965 }
7966 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7967 codec);
Aditya Bavanari44eb8952018-05-09 19:01:50 +05307968err:
7969 return ret;
7970}
7971
7972static int msm_aux_codec_init(struct snd_soc_component *component)
7973{
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307974 struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
7975 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
Ramprasad Katkam997da402018-08-17 20:20:06 +05307976 int ret = 0;
7977 void *mbhc_calibration;
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307978 struct snd_info_entry *entry;
7979 struct snd_card *card = component->card->snd_card;
7980 struct msm_asoc_mach_data *pdata;
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05307981
7982 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7983 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7984 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7985 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7986 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7987 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7988 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7989 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7990 snd_soc_dapm_sync(dapm);
7991
Aditya Bavanari4ae32fc2018-08-13 13:08:34 +05307992 pdata = snd_soc_card_get_drvdata(component->card);
7993 if (!pdata->codec_root) {
7994 entry = snd_info_create_subdir(card->module, "codecs",
7995 card->proc_root);
7996 if (!entry) {
7997 pr_err("%s: Cannot create codecs module entry\n",
7998 __func__);
7999 ret = 0;
8000 goto codec_root_err;
8001 }
8002 pdata->codec_root = entry;
8003 }
8004 wcd937x_info_create_codec_entry(pdata->codec_root, codec);
8005codec_root_err:
Ramprasad Katkam997da402018-08-17 20:20:06 +05308006 mbhc_calibration = def_wcd_mbhc_cal();
8007 if (!mbhc_calibration) {
8008 return -ENOMEM;
8009 }
8010 wcd_mbhc_cfg.calibration = mbhc_calibration;
8011 ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
8012
8013 return ret;
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308014}
8015
8016static int msm_init_aux_dev(struct platform_device *pdev,
8017 struct snd_soc_card *card)
8018{
8019 struct device_node *wsa_of_node;
8020 struct device_node *aux_codec_of_node;
8021 u32 wsa_max_devs;
8022 u32 wsa_dev_cnt;
8023 u32 codec_aux_dev_cnt = 0;
8024 int i;
8025 struct msm_wsa881x_dev_info *wsa881x_dev_info;
8026 struct aux_codec_dev_info *aux_cdc_dev_info;
8027 const char *auxdev_name_prefix[1];
8028 char *dev_name_str = NULL;
8029 int found = 0;
8030 int codecs_found = 0;
8031 int ret = 0;
8032
8033 /* Get maximum WSA device count for this platform */
8034 ret = of_property_read_u32(pdev->dev.of_node,
8035 "qcom,wsa-max-devs", &wsa_max_devs);
8036 if (ret) {
8037 dev_info(&pdev->dev,
8038 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
8039 __func__, pdev->dev.of_node->full_name, ret);
8040 wsa_max_devs = 0;
8041 goto codec_aux_dev;
8042 }
8043 if (wsa_max_devs == 0) {
8044 dev_warn(&pdev->dev,
8045 "%s: Max WSA devices is 0 for this target?\n",
8046 __func__);
8047 goto codec_aux_dev;
8048 }
8049
8050 /* Get count of WSA device phandles for this platform */
8051 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
8052 "qcom,wsa-devs", NULL);
8053 if (wsa_dev_cnt == -ENOENT) {
8054 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
8055 __func__);
8056 goto err;
8057 } else if (wsa_dev_cnt <= 0) {
8058 dev_err(&pdev->dev,
8059 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
8060 __func__, wsa_dev_cnt);
8061 ret = -EINVAL;
8062 goto err;
8063 }
8064
8065 /*
8066 * Expect total phandles count to be NOT less than maximum possible
8067 * WSA count. However, if it is less, then assign same value to
8068 * max count as well.
8069 */
8070 if (wsa_dev_cnt < wsa_max_devs) {
8071 dev_dbg(&pdev->dev,
8072 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
8073 __func__, wsa_max_devs, wsa_dev_cnt);
8074 wsa_max_devs = wsa_dev_cnt;
8075 }
8076
8077 /* Make sure prefix string passed for each WSA device */
8078 ret = of_property_count_strings(pdev->dev.of_node,
8079 "qcom,wsa-aux-dev-prefix");
8080 if (ret != wsa_dev_cnt) {
8081 dev_err(&pdev->dev,
8082 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
8083 __func__, wsa_dev_cnt, ret);
8084 ret = -EINVAL;
8085 goto err;
8086 }
8087
8088 /*
8089 * Alloc mem to store phandle and index info of WSA device, if already
8090 * registered with ALSA core
8091 */
8092 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
8093 sizeof(struct msm_wsa881x_dev_info),
8094 GFP_KERNEL);
8095 if (!wsa881x_dev_info) {
8096 ret = -ENOMEM;
8097 goto err;
8098 }
8099
8100 /*
8101 * search and check whether all WSA devices are already
8102 * registered with ALSA core or not. If found a node, store
8103 * the node and the index in a local array of struct for later
8104 * use.
8105 */
8106 for (i = 0; i < wsa_dev_cnt; i++) {
8107 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
8108 "qcom,wsa-devs", i);
8109 if (unlikely(!wsa_of_node)) {
8110 /* we should not be here */
8111 dev_err(&pdev->dev,
8112 "%s: wsa dev node is not present\n",
8113 __func__);
8114 ret = -EINVAL;
8115 goto err;
8116 }
8117 if (soc_find_component(wsa_of_node, NULL)) {
8118 /* WSA device registered with ALSA core */
8119 wsa881x_dev_info[found].of_node = wsa_of_node;
8120 wsa881x_dev_info[found].index = i;
8121 found++;
8122 if (found == wsa_max_devs)
8123 break;
8124 }
8125 }
8126
8127 if (found < wsa_max_devs) {
8128 dev_dbg(&pdev->dev,
8129 "%s: failed to find %d components. Found only %d\n",
8130 __func__, wsa_max_devs, found);
8131 return -EPROBE_DEFER;
8132 }
8133 dev_info(&pdev->dev,
8134 "%s: found %d wsa881x devices registered with ALSA core\n",
8135 __func__, found);
8136
8137codec_aux_dev:
8138 if (strcmp(card->name, "sm6150-tavil-snd-card")) {
8139 /* Get count of aux codec device phandles for this platform */
8140 codec_aux_dev_cnt = of_count_phandle_with_args(
8141 pdev->dev.of_node,
8142 "qcom,codec-aux-devs", NULL);
8143 if (codec_aux_dev_cnt == -ENOENT) {
8144 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
8145 __func__);
8146 goto err;
8147 } else if (codec_aux_dev_cnt <= 0) {
8148 dev_err(&pdev->dev,
8149 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
8150 __func__, codec_aux_dev_cnt);
8151 ret = -EINVAL;
8152 goto err;
8153 }
8154
8155 /*
8156 * Alloc mem to store phandle and index info of aux codec
8157 * if already registered with ALSA core
8158 */
8159 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
8160 sizeof(struct aux_codec_dev_info),
8161 GFP_KERNEL);
8162 if (!aux_cdc_dev_info) {
8163 ret = -ENOMEM;
8164 goto err;
8165 }
8166
8167 /*
8168 * search and check whether all aux codecs are already
8169 * registered with ALSA core or not. If found a node, store
8170 * the node and the index in a local array of struct for later
8171 * use.
8172 */
8173 for (i = 0; i < codec_aux_dev_cnt; i++) {
8174 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
8175 "qcom,codec-aux-devs", i);
8176 if (unlikely(!aux_codec_of_node)) {
8177 /* we should not be here */
8178 dev_err(&pdev->dev,
8179 "%s: aux codec dev node is not present\n",
8180 __func__);
8181 ret = -EINVAL;
8182 goto err;
8183 }
8184 if (soc_find_component(aux_codec_of_node, NULL)) {
8185 /* AUX codec registered with ALSA core */
8186 aux_cdc_dev_info[codecs_found].of_node =
8187 aux_codec_of_node;
8188 aux_cdc_dev_info[codecs_found].index = i;
8189 codecs_found++;
8190 }
8191 }
8192
8193 if (codecs_found < codec_aux_dev_cnt) {
8194 dev_dbg(&pdev->dev,
8195 "%s: failed to find %d components. Found only %d\n",
8196 __func__, codec_aux_dev_cnt, codecs_found);
8197 return -EPROBE_DEFER;
8198 }
8199 dev_info(&pdev->dev,
8200 "%s: found %d AUX codecs registered with ALSA core\n",
8201 __func__, codecs_found);
8202
8203 }
8204
8205 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
8206 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
8207
8208 /* Alloc array of AUX devs struct */
8209 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
8210 sizeof(struct snd_soc_aux_dev),
8211 GFP_KERNEL);
8212 if (!msm_aux_dev) {
8213 ret = -ENOMEM;
8214 goto err;
8215 }
8216
8217 /* Alloc array of codec conf struct */
8218 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
8219 sizeof(struct snd_soc_codec_conf),
8220 GFP_KERNEL);
8221 if (!msm_codec_conf) {
8222 ret = -ENOMEM;
8223 goto err;
8224 }
8225
8226 for (i = 0; i < wsa_max_devs; i++) {
8227 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
8228 GFP_KERNEL);
8229 if (!dev_name_str) {
8230 ret = -ENOMEM;
8231 goto err;
8232 }
8233
8234 ret = of_property_read_string_index(pdev->dev.of_node,
8235 "qcom,wsa-aux-dev-prefix",
8236 wsa881x_dev_info[i].index,
8237 auxdev_name_prefix);
8238 if (ret) {
8239 dev_err(&pdev->dev,
8240 "%s: failed to read wsa aux dev prefix, ret = %d\n",
8241 __func__, ret);
8242 ret = -EINVAL;
8243 goto err;
8244 }
8245
8246 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
8247 msm_aux_dev[i].name = dev_name_str;
8248 msm_aux_dev[i].codec_name = NULL;
8249 msm_aux_dev[i].codec_of_node =
8250 wsa881x_dev_info[i].of_node;
8251 msm_aux_dev[i].init = msm_wsa881x_init;
8252 msm_codec_conf[i].dev_name = NULL;
8253 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
8254 msm_codec_conf[i].of_node =
8255 wsa881x_dev_info[i].of_node;
8256 }
8257
8258 for (i = 0; i < codec_aux_dev_cnt; i++) {
8259 msm_aux_dev[wsa_max_devs + i].name = NULL;
8260 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
8261 msm_aux_dev[wsa_max_devs + i].codec_of_node =
8262 aux_cdc_dev_info[i].of_node;
8263 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
8264 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
8265 msm_codec_conf[wsa_max_devs + i].name_prefix =
8266 NULL;
8267 msm_codec_conf[wsa_max_devs + i].of_node =
8268 aux_cdc_dev_info[i].of_node;
8269 }
8270
8271 card->codec_conf = msm_codec_conf;
8272 card->aux_dev = msm_aux_dev;
8273err:
8274 return ret;
8275}
8276
8277static void msm_i2s_auxpcm_init(struct platform_device *pdev)
8278{
8279 int count;
8280 u32 mi2s_master_slave[MI2S_MAX];
8281 int ret;
8282
8283 for (count = 0; count < MI2S_MAX; count++) {
8284 mutex_init(&mi2s_intf_conf[count].lock);
8285 mi2s_intf_conf[count].ref_cnt = 0;
8286 }
8287
8288 ret = of_property_read_u32_array(pdev->dev.of_node,
8289 "qcom,msm-mi2s-master",
8290 mi2s_master_slave, MI2S_MAX);
8291 if (ret) {
8292 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
8293 __func__);
8294 } else {
8295 for (count = 0; count < MI2S_MAX; count++) {
8296 mi2s_intf_conf[count].msm_is_mi2s_master =
8297 mi2s_master_slave[count];
8298 }
8299 }
8300}
8301
8302static void msm_i2s_auxpcm_deinit(void)
8303{
8304 int count;
8305
8306 for (count = 0; count < MI2S_MAX; count++) {
8307 mutex_destroy(&mi2s_intf_conf[count].lock);
8308 mi2s_intf_conf[count].ref_cnt = 0;
8309 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
8310 }
8311}
8312static int msm_asoc_machine_probe(struct platform_device *pdev)
8313{
8314 struct snd_soc_card *card;
8315 struct msm_asoc_mach_data *pdata;
8316 const char *mbhc_audio_jack_type = NULL;
8317 int ret;
8318
8319 if (!pdev->dev.of_node) {
8320 dev_err(&pdev->dev, "No platform supplied from device tree\n");
8321 return -EINVAL;
8322 }
8323
8324 pdata = devm_kzalloc(&pdev->dev,
8325 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
8326 if (!pdata)
8327 return -ENOMEM;
8328
8329 card = populate_snd_card_dailinks(&pdev->dev);
8330 if (!card) {
8331 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
8332 ret = -EINVAL;
8333 goto err;
8334 }
8335 card->dev = &pdev->dev;
8336 platform_set_drvdata(pdev, card);
8337 snd_soc_card_set_drvdata(card, pdata);
8338
8339 ret = snd_soc_of_parse_card_name(card, "qcom,model");
8340 if (ret) {
8341 dev_err(&pdev->dev, "parse card name failed, err:%d\n",
8342 ret);
8343 goto err;
8344 }
8345
8346 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
8347 if (ret) {
8348 dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
8349 ret);
8350 goto err;
8351 }
8352
8353 ret = msm_populate_dai_link_component_of_node(card);
8354 if (ret) {
8355 ret = -EPROBE_DEFER;
8356 goto err;
8357 }
8358
8359 ret = msm_init_aux_dev(pdev, card);
8360 if (ret)
8361 goto err;
8362
8363 ret = devm_snd_soc_register_card(&pdev->dev, card);
8364 if (ret == -EPROBE_DEFER) {
8365 if (codec_reg_done)
8366 ret = -EINVAL;
8367 goto err;
8368 } else if (ret) {
8369 dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
8370 ret);
8371 goto err;
8372 }
8373 dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
8374 spdev = pdev;
8375
8376 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
8377 "qcom,hph-en1-gpio", 0);
8378 if (!pdata->hph_en1_gpio_p) {
8379 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8380 "qcom,hph-en1-gpio",
8381 pdev->dev.of_node->full_name);
8382 }
8383
8384 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
8385 "qcom,hph-en0-gpio", 0);
8386 if (!pdata->hph_en0_gpio_p) {
8387 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
8388 "qcom,hph-en0-gpio",
8389 pdev->dev.of_node->full_name);
8390 }
8391
8392 ret = of_property_read_string(pdev->dev.of_node,
8393 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
8394 if (ret) {
8395 dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
8396 "qcom,mbhc-audio-jack-type",
8397 pdev->dev.of_node->full_name);
8398 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
8399 } else {
8400 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
8401 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8402 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
8403 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
8404 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8405 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
8406 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
8407 wcd_mbhc_cfg.enable_anc_mic_detect = true;
8408 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
8409 } else {
8410 wcd_mbhc_cfg.enable_anc_mic_detect = false;
8411 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
8412 }
8413 }
8414 /*
8415 * Parse US-Euro gpio info from DT. Report no error if us-euro
8416 * entry is not found in DT file as some targets do not support
8417 * US-Euro detection
8418 */
8419 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
8420 "qcom,us-euro-gpios", 0);
8421 if (!pdata->us_euro_gpio_p) {
8422 dev_dbg(&pdev->dev, "property %s not detected in node %s",
8423 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
8424 } else {
8425 dev_dbg(&pdev->dev, "%s detected\n",
8426 "qcom,us-euro-gpios");
8427 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
8428 }
8429 /* Parse pinctrl info from devicetree */
8430 ret = msm_get_pinctrl(pdev);
8431 if (!ret) {
8432 pr_debug("%s: pinctrl parsing successful\n", __func__);
8433 } else {
8434 dev_dbg(&pdev->dev,
8435 "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
8436 __func__, ret);
8437 ret = 0;
8438 }
8439
8440 msm_i2s_auxpcm_init(pdev);
8441 if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
8442 is_initial_boot = true;
8443 ret = audio_notifier_register("sm6150",
8444 AUDIO_NOTIFIER_ADSP_DOMAIN,
8445 &service_nb);
8446 if (ret < 0)
8447 pr_err("%s: Audio notifier register failed ret = %d\n",
8448 __func__, ret);
8449 } else {
8450 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
8451 "qcom,cdc-dmic01-gpios",
8452 0);
8453 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
8454 "qcom,cdc-dmic23-gpios",
8455 0);
8456 }
8457err:
8458 return ret;
8459}
8460
8461static int msm_asoc_machine_remove(struct platform_device *pdev)
8462{
8463 audio_notifier_deregister("sm6150");
8464 msm_i2s_auxpcm_deinit();
8465
8466 return 0;
8467}
8468
8469static struct platform_driver sm6150_asoc_machine_driver = {
8470 .driver = {
8471 .name = DRV_NAME,
8472 .owner = THIS_MODULE,
8473 .pm = &snd_soc_pm_ops,
8474 .of_match_table = sm6150_asoc_machine_of_match,
8475 },
8476 .probe = msm_asoc_machine_probe,
8477 .remove = msm_asoc_machine_remove,
8478};
8479module_platform_driver(sm6150_asoc_machine_driver);
8480
Aditya Bavanari0b26ab32018-08-03 23:53:01 +05308481MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
Aditya Bavanari44eb8952018-05-09 19:01:50 +05308482MODULE_LICENSE("GPL v2");
8483MODULE_ALIAS("platform:" DRV_NAME);
8484MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);