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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / 707bf359536dcaeeca6f42e9107205d65182fad5 / . / asoc / bengal.c
blob: 1ab7f9951b43ca27630038c43ae2476f961b102a [file] [log] [blame]
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
2/*
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3 * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
16#include <linux/soc/qcom/fsa4480-i2c.h>
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]17#include <linux/nvmem-consumer.h>
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]18#include <sound/core.h>
19#include <sound/soc.h>
20#include <sound/soc-dapm.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/info.h>
24#include <soc/snd_event.h>
25#include <dsp/audio_notifier.h>
26#include <soc/swr-common.h>
27#include <dsp/q6afe-v2.h>
28#include <dsp/q6core.h>
29#include "device_event.h"
30#include "msm-pcm-routing-v2.h"
31#include "asoc/msm-cdc-pinctrl.h"
32#include "asoc/wcd-mbhc-v2.h"
33#include "codecs/wcd937x/wcd937x-mbhc.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]34#include "codecs/rouleur/rouleur-mbhc.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]35#include "codecs/wsa881x-analog.h"
36#include "codecs/wcd937x/wcd937x.h"
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]37#include "codecs/rouleur/rouleur.h"
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]38#include "codecs/bolero/bolero-cdc.h"
39#include <dt-bindings/sound/audio-codec-port-types.h>
40#include "bengal-port-config.h"
41
42#define DRV_NAME "bengal-asoc-snd"
43#define __CHIPSET__ "BENGAL "
44#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
45
46#define SAMPLING_RATE_8KHZ 8000
47#define SAMPLING_RATE_11P025KHZ 11025
48#define SAMPLING_RATE_16KHZ 16000
49#define SAMPLING_RATE_22P05KHZ 22050
50#define SAMPLING_RATE_32KHZ 32000
51#define SAMPLING_RATE_44P1KHZ 44100
52#define SAMPLING_RATE_48KHZ 48000
53#define SAMPLING_RATE_88P2KHZ 88200
54#define SAMPLING_RATE_96KHZ 96000
55#define SAMPLING_RATE_176P4KHZ 176400
56#define SAMPLING_RATE_192KHZ 192000
57#define SAMPLING_RATE_352P8KHZ 352800
58#define SAMPLING_RATE_384KHZ 384000
59
60#define WCD9XXX_MBHC_DEF_RLOADS 5
61#define WCD9XXX_MBHC_DEF_BUTTONS 8
62#define CODEC_EXT_CLK_RATE 9600000
63#define ADSP_STATE_READY_TIMEOUT_MS 3000
64#define DEV_NAME_STR_LEN 32
65#define WCD_MBHC_HS_V_MAX 1600
66
67#define TDM_CHANNEL_MAX 8
68#define DEV_NAME_STR_LEN 32
69
70/* time in us to ensure LPM doesn't go in C3/C4 */
71#define MSM_LL_QOS_VALUE 300
72
73#define ADSP_STATE_READY_TIMEOUT_MS 3000
74
75#define WCN_CDC_SLIM_RX_CH_MAX 2
76#define WCN_CDC_SLIM_TX_CH_MAX 3
77
78enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
94 TDM_QUAT,
95 TDM_INTERFACE_MAX,
96};
97
98enum {
99 PRIM_AUX_PCM = 0,
100 SEC_AUX_PCM,
101 TERT_AUX_PCM,
102 QUAT_AUX_PCM,
103 AUX_PCM_MAX,
104};
105
106enum {
107 PRIM_MI2S = 0,
108 SEC_MI2S,
109 TERT_MI2S,
110 QUAT_MI2S,
111 MI2S_MAX,
112};
113
114enum {
115 RX_CDC_DMA_RX_0 = 0,
116 RX_CDC_DMA_RX_1,
117 RX_CDC_DMA_RX_2,
118 RX_CDC_DMA_RX_3,
119 RX_CDC_DMA_RX_5,
120 CDC_DMA_RX_MAX,
121};
122
123enum {
124 TX_CDC_DMA_TX_0 = 0,
125 TX_CDC_DMA_TX_3,
126 TX_CDC_DMA_TX_4,
127 VA_CDC_DMA_TX_0,
128 VA_CDC_DMA_TX_1,
129 VA_CDC_DMA_TX_2,
130 CDC_DMA_TX_MAX,
131};
132
133enum {
134 SLIM_RX_7 = 0,
135 SLIM_RX_MAX,
136};
137
138enum {
139 SLIM_TX_7 = 0,
140 SLIM_TX_8,
141 SLIM_TX_MAX,
142};
143
144enum {
145 AFE_LOOPBACK_TX_IDX = 0,
146 AFE_LOOPBACK_TX_IDX_MAX,
147};
148struct msm_asoc_mach_data {
149 struct snd_info_entry *codec_root;
150 int usbc_en2_gpio; /* used by gpio driver API */
151 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
152 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
153 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
154 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
155 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
156 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
157 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
158 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
159 bool is_afe_config_done;
160 struct device_node *fsa_handle;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]161 bool va_disable;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]162};
163
164struct tdm_port {
165 u32 mode;
166 u32 channel;
167};
168
169enum {
170 EXT_DISP_RX_IDX_DP = 0,
171 EXT_DISP_RX_IDX_DP1,
172 EXT_DISP_RX_IDX_MAX,
173};
174
175struct msm_wsa881x_dev_info {
176 struct device_node *of_node;
177 u32 index;
178};
179
180struct aux_codec_dev_info {
181 struct device_node *of_node;
182 u32 index;
183};
184
185struct dev_config {
186 u32 sample_rate;
187 u32 bit_format;
188 u32 channels;
189};
190
191/* Default configuration of slimbus channels */
192static struct dev_config slim_rx_cfg[] = {
193 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
194};
195
196static struct dev_config slim_tx_cfg[] = {
197 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
198 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
199};
200
201static struct dev_config usb_rx_cfg = {
202 .sample_rate = SAMPLING_RATE_48KHZ,
203 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
204 .channels = 2,
205};
206
207static struct dev_config usb_tx_cfg = {
208 .sample_rate = SAMPLING_RATE_48KHZ,
209 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
210 .channels = 1,
211};
212
213static struct dev_config proxy_rx_cfg = {
214 .sample_rate = SAMPLING_RATE_48KHZ,
215 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
216 .channels = 2,
217};
218
219static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
220 {
221 AFE_API_VERSION_I2S_CONFIG,
222 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
223 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
224 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
225 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
226 0,
227 },
228 {
229 AFE_API_VERSION_I2S_CONFIG,
230 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
231 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
232 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
233 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
234 0,
235 },
236 {
237 AFE_API_VERSION_I2S_CONFIG,
238 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
239 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
240 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
241 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
242 0,
243 },
244 {
245 AFE_API_VERSION_I2S_CONFIG,
246 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
247 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
248 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
249 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
250 0,
251 },
252};
253
254struct mi2s_conf {
255 struct mutex lock;
256 u32 ref_cnt;
257 u32 msm_is_mi2s_master;
258};
259
260static u32 mi2s_ebit_clk[MI2S_MAX] = {
261 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
262 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
263 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
264};
265
266static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
267
268/* Default configuration of TDM channels */
269static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
270 { /* PRI TDM */
271 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
272 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
273 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
274 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
275 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
276 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
277 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
278 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
279 },
280 { /* SEC TDM */
281 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
282 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
283 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
284 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
285 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
286 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
287 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
288 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
289 },
290 { /* TERT TDM */
291 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
292 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
293 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
294 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
295 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
296 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
297 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
298 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
299 },
300 { /* QUAT TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
309 },
310};
311
312static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
313 { /* PRI TDM */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
319 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
320 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
322 },
323 { /* SEC TDM */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
329 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
330 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
332 },
333 { /* TERT TDM */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
339 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
340 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
342 },
343 { /* QUAT TDM */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
349 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
350 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
352 },
353};
354
355/* Default configuration of AUX PCM channels */
356static struct dev_config aux_pcm_rx_cfg[] = {
357 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
358 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
359 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
360 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
361};
362
363static struct dev_config aux_pcm_tx_cfg[] = {
364 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
365 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
366 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
367 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
368};
369
370/* Default configuration of MI2S channels */
371static struct dev_config mi2s_rx_cfg[] = {
372 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
373 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
374 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
375 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
376};
377
378static struct dev_config mi2s_tx_cfg[] = {
379 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
380 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
381 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
382 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
383};
384
385/* Default configuration of Codec DMA Interface RX */
386static struct dev_config cdc_dma_rx_cfg[] = {
387 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
388 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
389 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
390 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
391 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
392};
393
394/* Default configuration of Codec DMA Interface TX */
395static struct dev_config cdc_dma_tx_cfg[] = {
396 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
397 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
398 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
399 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
400 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
401 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
402};
403
404static struct dev_config afe_loopback_tx_cfg[] = {
405 [AFE_LOOPBACK_TX_IDX] = {
406 SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
407};
408
409static int msm_vi_feed_tx_ch = 2;
410static const char *const vi_feed_ch_text[] = {"One", "Two"};
411static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
412 "S32_LE"};
413static char const *ch_text[] = {"Two", "Three", "Four", "Five",
414 "Six", "Seven", "Eight"};
415static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
416 "KHZ_16", "KHZ_22P05",
417 "KHZ_32", "KHZ_44P1", "KHZ_48",
418 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
419 "KHZ_192", "KHZ_352P8", "KHZ_384"};
420static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
421 "Five", "Six", "Seven",
422 "Eight"};
423static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
424 "KHZ_48", "KHZ_176P4",
425 "KHZ_352P8"};
426static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
427static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
428 "Five", "Six", "Seven", "Eight"};
429static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
430static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
431 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
432 "KHZ_48", "KHZ_96", "KHZ_192"};
433static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
434 "Five", "Six", "Seven",
435 "Eight"};
436
437static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
438static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
439 "Five", "Six", "Seven",
440 "Eight"};
441static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
442 "KHZ_16", "KHZ_22P05",
443 "KHZ_32", "KHZ_44P1", "KHZ_48",
444 "KHZ_88P2", "KHZ_96",
445 "KHZ_176P4", "KHZ_192",
446 "KHZ_352P8", "KHZ_384"};
447static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
448 "KHZ_44P1", "KHZ_48",
449 "KHZ_88P2", "KHZ_96"};
450static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
451 "KHZ_44P1", "KHZ_48",
452 "KHZ_88P2", "KHZ_96"};
453static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
454 "KHZ_44P1", "KHZ_48",
455 "KHZ_88P2", "KHZ_96"};
456static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
457
458static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
459static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
460static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
461static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
462static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
463static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
464static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
465static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
466static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
467static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
468static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
469static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
470static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
471static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
472static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
473static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
474static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
475static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
476static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
477static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
478static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
479static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
480static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
481static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
482static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
483static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
484static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
485static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
486static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
487static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
488static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
489static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
490static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
491static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
492static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
493static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
494static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
495static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
496static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
497static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
498static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
499static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
500static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
501static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
502static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
503static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
504static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
505static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
506static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
507static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
508static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
509static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
510static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
511static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
512static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
513static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
514static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
515static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
516static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
517static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
518static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
519static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
520static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
521static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
522static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
523 cdc_dma_sample_rate_text);
524static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
525 cdc_dma_sample_rate_text);
526static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
527 cdc_dma_sample_rate_text);
528static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
529 cdc_dma_sample_rate_text);
530static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
531 cdc_dma_sample_rate_text);
532static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
533 cdc_dma_sample_rate_text);
534static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
535 cdc_dma_sample_rate_text);
536static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
537 cdc_dma_sample_rate_text);
538static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
539 cdc_dma_sample_rate_text);
540static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
541 cdc_dma_sample_rate_text);
542static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
543 cdc_dma_sample_rate_text);
544static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
545static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
546static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
547static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
548
549static bool is_initial_boot;
550static bool codec_reg_done;
551static struct snd_soc_aux_dev *msm_aux_dev;
552static struct snd_soc_codec_conf *msm_codec_conf;
553static struct snd_soc_card snd_soc_card_bengal_msm;
554static int dmic_0_1_gpio_cnt;
555static int dmic_2_3_gpio_cnt;
556
557static void *def_wcd_mbhc_cal(void);
558
559/*
560 * Need to report LINEIN
561 * if R/L channel impedance is larger than 5K ohm
562 */
563static struct wcd_mbhc_config wcd_mbhc_cfg = {
564 .read_fw_bin = false,
565 .calibration = NULL,
566 .detect_extn_cable = true,
567 .mono_stero_detection = false,
568 .swap_gnd_mic = NULL,
569 .hs_ext_micbias = true,
570 .key_code[0] = KEY_MEDIA,
571 .key_code[1] = KEY_VOICECOMMAND,
572 .key_code[2] = KEY_VOLUMEUP,
573 .key_code[3] = KEY_VOLUMEDOWN,
574 .key_code[4] = 0,
575 .key_code[5] = 0,
576 .key_code[6] = 0,
577 .key_code[7] = 0,
578 .linein_th = 5000,
579 .moisture_en = false,
580 .mbhc_micbias = MIC_BIAS_2,
581 .anc_micbias = MIC_BIAS_2,
582 .enable_anc_mic_detect = false,
583 .moisture_duty_cycle_en = true,
584};
585
586static inline int param_is_mask(int p)
587{
588 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
589 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
590}
591
592static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
593 int n)
594{
595 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
596}
597
598static void param_set_mask(struct snd_pcm_hw_params *p, int n,
599 unsigned int bit)
600{
601 if (bit >= SNDRV_MASK_MAX)
602 return;
603 if (param_is_mask(n)) {
604 struct snd_mask *m = param_to_mask(p, n);
605
606 m->bits[0] = 0;
607 m->bits[1] = 0;
608 m->bits[bit >> 5] |= (1 << (bit & 31));
609 }
610}
611
612static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
613 struct snd_ctl_elem_value *ucontrol)
614{
615 int sample_rate_val = 0;
616
617 switch (usb_rx_cfg.sample_rate) {
618 case SAMPLING_RATE_384KHZ:
619 sample_rate_val = 12;
620 break;
621 case SAMPLING_RATE_352P8KHZ:
622 sample_rate_val = 11;
623 break;
624 case SAMPLING_RATE_192KHZ:
625 sample_rate_val = 10;
626 break;
627 case SAMPLING_RATE_176P4KHZ:
628 sample_rate_val = 9;
629 break;
630 case SAMPLING_RATE_96KHZ:
631 sample_rate_val = 8;
632 break;
633 case SAMPLING_RATE_88P2KHZ:
634 sample_rate_val = 7;
635 break;
636 case SAMPLING_RATE_48KHZ:
637 sample_rate_val = 6;
638 break;
639 case SAMPLING_RATE_44P1KHZ:
640 sample_rate_val = 5;
641 break;
642 case SAMPLING_RATE_32KHZ:
643 sample_rate_val = 4;
644 break;
645 case SAMPLING_RATE_22P05KHZ:
646 sample_rate_val = 3;
647 break;
648 case SAMPLING_RATE_16KHZ:
649 sample_rate_val = 2;
650 break;
651 case SAMPLING_RATE_11P025KHZ:
652 sample_rate_val = 1;
653 break;
654 case SAMPLING_RATE_8KHZ:
655 default:
656 sample_rate_val = 0;
657 break;
658 }
659
660 ucontrol->value.integer.value[0] = sample_rate_val;
661 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
662 usb_rx_cfg.sample_rate);
663 return 0;
664}
665
666static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
667 struct snd_ctl_elem_value *ucontrol)
668{
669 switch (ucontrol->value.integer.value[0]) {
670 case 12:
671 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
672 break;
673 case 11:
674 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
675 break;
676 case 10:
677 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
678 break;
679 case 9:
680 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
681 break;
682 case 8:
683 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
684 break;
685 case 7:
686 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
687 break;
688 case 6:
689 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
690 break;
691 case 5:
692 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
693 break;
694 case 4:
695 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
696 break;
697 case 3:
698 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
699 break;
700 case 2:
701 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
702 break;
703 case 1:
704 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
705 break;
706 case 0:
707 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
708 break;
709 default:
710 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
711 break;
712 }
713
714 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
715 __func__, ucontrol->value.integer.value[0],
716 usb_rx_cfg.sample_rate);
717 return 0;
718}
719
720static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
721 struct snd_ctl_elem_value *ucontrol)
722{
723 int sample_rate_val = 0;
724
725 switch (usb_tx_cfg.sample_rate) {
726 case SAMPLING_RATE_384KHZ:
727 sample_rate_val = 12;
728 break;
729 case SAMPLING_RATE_352P8KHZ:
730 sample_rate_val = 11;
731 break;
732 case SAMPLING_RATE_192KHZ:
733 sample_rate_val = 10;
734 break;
735 case SAMPLING_RATE_176P4KHZ:
736 sample_rate_val = 9;
737 break;
738 case SAMPLING_RATE_96KHZ:
739 sample_rate_val = 8;
740 break;
741 case SAMPLING_RATE_88P2KHZ:
742 sample_rate_val = 7;
743 break;
744 case SAMPLING_RATE_48KHZ:
745 sample_rate_val = 6;
746 break;
747 case SAMPLING_RATE_44P1KHZ:
748 sample_rate_val = 5;
749 break;
750 case SAMPLING_RATE_32KHZ:
751 sample_rate_val = 4;
752 break;
753 case SAMPLING_RATE_22P05KHZ:
754 sample_rate_val = 3;
755 break;
756 case SAMPLING_RATE_16KHZ:
757 sample_rate_val = 2;
758 break;
759 case SAMPLING_RATE_11P025KHZ:
760 sample_rate_val = 1;
761 break;
762 case SAMPLING_RATE_8KHZ:
763 sample_rate_val = 0;
764 break;
765 default:
766 sample_rate_val = 6;
767 break;
768 }
769
770 ucontrol->value.integer.value[0] = sample_rate_val;
771 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
772 usb_tx_cfg.sample_rate);
773 return 0;
774}
775
776static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
777 struct snd_ctl_elem_value *ucontrol)
778{
779 switch (ucontrol->value.integer.value[0]) {
780 case 12:
781 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
782 break;
783 case 11:
784 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
785 break;
786 case 10:
787 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
788 break;
789 case 9:
790 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
791 break;
792 case 8:
793 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
794 break;
795 case 7:
796 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
797 break;
798 case 6:
799 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
800 break;
801 case 5:
802 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
803 break;
804 case 4:
805 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
806 break;
807 case 3:
808 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
809 break;
810 case 2:
811 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
812 break;
813 case 1:
814 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
815 break;
816 case 0:
817 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
818 break;
819 default:
820 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
821 break;
822 }
823
824 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
825 __func__, ucontrol->value.integer.value[0],
826 usb_tx_cfg.sample_rate);
827 return 0;
828}
829static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
830 struct snd_ctl_elem_value *ucontrol)
831{
832 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
833 afe_loopback_tx_cfg[0].channels);
834 ucontrol->value.enumerated.item[0] =
835 afe_loopback_tx_cfg[0].channels - 1;
836
837 return 0;
838}
839
840static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
841 struct snd_ctl_elem_value *ucontrol)
842{
843 afe_loopback_tx_cfg[0].channels =
844 ucontrol->value.enumerated.item[0] + 1;
845 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
846 afe_loopback_tx_cfg[0].channels);
847
848 return 1;
849}
850
851static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
852 struct snd_ctl_elem_value *ucontrol)
853{
854 switch (usb_rx_cfg.bit_format) {
855 case SNDRV_PCM_FORMAT_S32_LE:
856 ucontrol->value.integer.value[0] = 3;
857 break;
858 case SNDRV_PCM_FORMAT_S24_3LE:
859 ucontrol->value.integer.value[0] = 2;
860 break;
861 case SNDRV_PCM_FORMAT_S24_LE:
862 ucontrol->value.integer.value[0] = 1;
863 break;
864 case SNDRV_PCM_FORMAT_S16_LE:
865 default:
866 ucontrol->value.integer.value[0] = 0;
867 break;
868 }
869
870 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
871 __func__, usb_rx_cfg.bit_format,
872 ucontrol->value.integer.value[0]);
873 return 0;
874}
875
876static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
877 struct snd_ctl_elem_value *ucontrol)
878{
879 int rc = 0;
880
881 switch (ucontrol->value.integer.value[0]) {
882 case 3:
883 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
884 break;
885 case 2:
886 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
887 break;
888 case 1:
889 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
890 break;
891 case 0:
892 default:
893 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
894 break;
895 }
896 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
897 __func__, usb_rx_cfg.bit_format,
898 ucontrol->value.integer.value[0]);
899
900 return rc;
901}
902
903static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
904 struct snd_ctl_elem_value *ucontrol)
905{
906 switch (usb_tx_cfg.bit_format) {
907 case SNDRV_PCM_FORMAT_S32_LE:
908 ucontrol->value.integer.value[0] = 3;
909 break;
910 case SNDRV_PCM_FORMAT_S24_3LE:
911 ucontrol->value.integer.value[0] = 2;
912 break;
913 case SNDRV_PCM_FORMAT_S24_LE:
914 ucontrol->value.integer.value[0] = 1;
915 break;
916 case SNDRV_PCM_FORMAT_S16_LE:
917 default:
918 ucontrol->value.integer.value[0] = 0;
919 break;
920 }
921
922 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
923 __func__, usb_tx_cfg.bit_format,
924 ucontrol->value.integer.value[0]);
925 return 0;
926}
927
928static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
929 struct snd_ctl_elem_value *ucontrol)
930{
931 int rc = 0;
932
933 switch (ucontrol->value.integer.value[0]) {
934 case 3:
935 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
936 break;
937 case 2:
938 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
939 break;
940 case 1:
941 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
942 break;
943 case 0:
944 default:
945 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
946 break;
947 }
948 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
949 __func__, usb_tx_cfg.bit_format,
950 ucontrol->value.integer.value[0]);
951
952 return rc;
953}
954
955static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
956 struct snd_ctl_elem_value *ucontrol)
957{
958 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
959 usb_rx_cfg.channels);
960 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
961 return 0;
962}
963
964static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
965 struct snd_ctl_elem_value *ucontrol)
966{
967 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
968
969 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
970 return 1;
971}
972
973static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
974 struct snd_ctl_elem_value *ucontrol)
975{
976 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
977 usb_tx_cfg.channels);
978 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
979 return 0;
980}
981
982static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
983 struct snd_ctl_elem_value *ucontrol)
984{
985 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
986
987 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
988 return 1;
989}
990
991static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
992 struct snd_ctl_elem_value *ucontrol)
993{
994 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
995 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
996 ucontrol->value.integer.value[0]);
997 return 0;
998}
999
1000static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1001 struct snd_ctl_elem_value *ucontrol)
1002{
1003 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1004 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1005 return 1;
1006}
1007
1008static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1009 struct snd_ctl_elem_value *ucontrol)
1010{
1011 pr_debug("%s: proxy_rx channels = %d\n",
1012 __func__, proxy_rx_cfg.channels);
1013 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1014
1015 return 0;
1016}
1017
1018static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1019 struct snd_ctl_elem_value *ucontrol)
1020{
1021 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1022 pr_debug("%s: proxy_rx channels = %d\n",
1023 __func__, proxy_rx_cfg.channels);
1024
1025 return 1;
1026}
1027
1028static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1029 struct tdm_port *port)
1030{
1031 if (port) {
1032 if (strnstr(kcontrol->id.name, "PRI",
1033 sizeof(kcontrol->id.name))) {
1034 port->mode = TDM_PRI;
1035 } else if (strnstr(kcontrol->id.name, "SEC",
1036 sizeof(kcontrol->id.name))) {
1037 port->mode = TDM_SEC;
1038 } else if (strnstr(kcontrol->id.name, "TERT",
1039 sizeof(kcontrol->id.name))) {
1040 port->mode = TDM_TERT;
1041 } else if (strnstr(kcontrol->id.name, "QUAT",
1042 sizeof(kcontrol->id.name))) {
1043 port->mode = TDM_QUAT;
1044 } else {
1045 pr_err("%s: unsupported mode in: %s\n",
1046 __func__, kcontrol->id.name);
1047 return -EINVAL;
1048 }
1049
1050 if (strnstr(kcontrol->id.name, "RX_0",
1051 sizeof(kcontrol->id.name)) ||
1052 strnstr(kcontrol->id.name, "TX_0",
1053 sizeof(kcontrol->id.name))) {
1054 port->channel = TDM_0;
1055 } else if (strnstr(kcontrol->id.name, "RX_1",
1056 sizeof(kcontrol->id.name)) ||
1057 strnstr(kcontrol->id.name, "TX_1",
1058 sizeof(kcontrol->id.name))) {
1059 port->channel = TDM_1;
1060 } else if (strnstr(kcontrol->id.name, "RX_2",
1061 sizeof(kcontrol->id.name)) ||
1062 strnstr(kcontrol->id.name, "TX_2",
1063 sizeof(kcontrol->id.name))) {
1064 port->channel = TDM_2;
1065 } else if (strnstr(kcontrol->id.name, "RX_3",
1066 sizeof(kcontrol->id.name)) ||
1067 strnstr(kcontrol->id.name, "TX_3",
1068 sizeof(kcontrol->id.name))) {
1069 port->channel = TDM_3;
1070 } else if (strnstr(kcontrol->id.name, "RX_4",
1071 sizeof(kcontrol->id.name)) ||
1072 strnstr(kcontrol->id.name, "TX_4",
1073 sizeof(kcontrol->id.name))) {
1074 port->channel = TDM_4;
1075 } else if (strnstr(kcontrol->id.name, "RX_5",
1076 sizeof(kcontrol->id.name)) ||
1077 strnstr(kcontrol->id.name, "TX_5",
1078 sizeof(kcontrol->id.name))) {
1079 port->channel = TDM_5;
1080 } else if (strnstr(kcontrol->id.name, "RX_6",
1081 sizeof(kcontrol->id.name)) ||
1082 strnstr(kcontrol->id.name, "TX_6",
1083 sizeof(kcontrol->id.name))) {
1084 port->channel = TDM_6;
1085 } else if (strnstr(kcontrol->id.name, "RX_7",
1086 sizeof(kcontrol->id.name)) ||
1087 strnstr(kcontrol->id.name, "TX_7",
1088 sizeof(kcontrol->id.name))) {
1089 port->channel = TDM_7;
1090 } else {
1091 pr_err("%s: unsupported channel in: %s\n",
1092 __func__, kcontrol->id.name);
1093 return -EINVAL;
1094 }
1095 } else {
1096 return -EINVAL;
1097 }
1098 return 0;
1099}
1100
1101static int tdm_get_sample_rate(int value)
1102{
1103 int sample_rate = 0;
1104
1105 switch (value) {
1106 case 0:
1107 sample_rate = SAMPLING_RATE_8KHZ;
1108 break;
1109 case 1:
1110 sample_rate = SAMPLING_RATE_16KHZ;
1111 break;
1112 case 2:
1113 sample_rate = SAMPLING_RATE_32KHZ;
1114 break;
1115 case 3:
1116 sample_rate = SAMPLING_RATE_48KHZ;
1117 break;
1118 case 4:
1119 sample_rate = SAMPLING_RATE_176P4KHZ;
1120 break;
1121 case 5:
1122 sample_rate = SAMPLING_RATE_352P8KHZ;
1123 break;
1124 default:
1125 sample_rate = SAMPLING_RATE_48KHZ;
1126 break;
1127 }
1128 return sample_rate;
1129}
1130
1131static int tdm_get_sample_rate_val(int sample_rate)
1132{
1133 int sample_rate_val = 0;
1134
1135 switch (sample_rate) {
1136 case SAMPLING_RATE_8KHZ:
1137 sample_rate_val = 0;
1138 break;
1139 case SAMPLING_RATE_16KHZ:
1140 sample_rate_val = 1;
1141 break;
1142 case SAMPLING_RATE_32KHZ:
1143 sample_rate_val = 2;
1144 break;
1145 case SAMPLING_RATE_48KHZ:
1146 sample_rate_val = 3;
1147 break;
1148 case SAMPLING_RATE_176P4KHZ:
1149 sample_rate_val = 4;
1150 break;
1151 case SAMPLING_RATE_352P8KHZ:
1152 sample_rate_val = 5;
1153 break;
1154 default:
1155 sample_rate_val = 3;
1156 break;
1157 }
1158 return sample_rate_val;
1159}
1160
1161static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1162 struct snd_ctl_elem_value *ucontrol)
1163{
1164 struct tdm_port port;
1165 int ret = tdm_get_port_idx(kcontrol, &port);
1166
1167 if (ret) {
1168 pr_err("%s: unsupported control: %s\n",
1169 __func__, kcontrol->id.name);
1170 } else {
1171 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1172 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1173
1174 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1175 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1176 ucontrol->value.enumerated.item[0]);
1177 }
1178 return ret;
1179}
1180
1181static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1182 struct snd_ctl_elem_value *ucontrol)
1183{
1184 struct tdm_port port;
1185 int ret = tdm_get_port_idx(kcontrol, &port);
1186
1187 if (ret) {
1188 pr_err("%s: unsupported control: %s\n",
1189 __func__, kcontrol->id.name);
1190 } else {
1191 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1192 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1193
1194 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1195 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1196 ucontrol->value.enumerated.item[0]);
1197 }
1198 return ret;
1199}
1200
1201static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1202 struct snd_ctl_elem_value *ucontrol)
1203{
1204 struct tdm_port port;
1205 int ret = tdm_get_port_idx(kcontrol, &port);
1206
1207 if (ret) {
1208 pr_err("%s: unsupported control: %s\n",
1209 __func__, kcontrol->id.name);
1210 } else {
1211 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1212 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1213
1214 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1215 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1216 ucontrol->value.enumerated.item[0]);
1217 }
1218 return ret;
1219}
1220
1221static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1222 struct snd_ctl_elem_value *ucontrol)
1223{
1224 struct tdm_port port;
1225 int ret = tdm_get_port_idx(kcontrol, &port);
1226
1227 if (ret) {
1228 pr_err("%s: unsupported control: %s\n",
1229 __func__, kcontrol->id.name);
1230 } else {
1231 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1232 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1233
1234 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1235 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1236 ucontrol->value.enumerated.item[0]);
1237 }
1238 return ret;
1239}
1240
1241static int tdm_get_format(int value)
1242{
1243 int format = 0;
1244
1245 switch (value) {
1246 case 0:
1247 format = SNDRV_PCM_FORMAT_S16_LE;
1248 break;
1249 case 1:
1250 format = SNDRV_PCM_FORMAT_S24_LE;
1251 break;
1252 case 2:
1253 format = SNDRV_PCM_FORMAT_S32_LE;
1254 break;
1255 default:
1256 format = SNDRV_PCM_FORMAT_S16_LE;
1257 break;
1258 }
1259 return format;
1260}
1261
1262static int tdm_get_format_val(int format)
1263{
1264 int value = 0;
1265
1266 switch (format) {
1267 case SNDRV_PCM_FORMAT_S16_LE:
1268 value = 0;
1269 break;
1270 case SNDRV_PCM_FORMAT_S24_LE:
1271 value = 1;
1272 break;
1273 case SNDRV_PCM_FORMAT_S32_LE:
1274 value = 2;
1275 break;
1276 default:
1277 value = 0;
1278 break;
1279 }
1280 return value;
1281}
1282
1283static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1284 struct snd_ctl_elem_value *ucontrol)
1285{
1286 struct tdm_port port;
1287 int ret = tdm_get_port_idx(kcontrol, &port);
1288
1289 if (ret) {
1290 pr_err("%s: unsupported control: %s\n",
1291 __func__, kcontrol->id.name);
1292 } else {
1293 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1294 tdm_rx_cfg[port.mode][port.channel].bit_format);
1295
1296 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1297 tdm_rx_cfg[port.mode][port.channel].bit_format,
1298 ucontrol->value.enumerated.item[0]);
1299 }
1300 return ret;
1301}
1302
1303static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1304 struct snd_ctl_elem_value *ucontrol)
1305{
1306 struct tdm_port port;
1307 int ret = tdm_get_port_idx(kcontrol, &port);
1308
1309 if (ret) {
1310 pr_err("%s: unsupported control: %s\n",
1311 __func__, kcontrol->id.name);
1312 } else {
1313 tdm_rx_cfg[port.mode][port.channel].bit_format =
1314 tdm_get_format(ucontrol->value.enumerated.item[0]);
1315
1316 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1317 tdm_rx_cfg[port.mode][port.channel].bit_format,
1318 ucontrol->value.enumerated.item[0]);
1319 }
1320 return ret;
1321}
1322
1323static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1324 struct snd_ctl_elem_value *ucontrol)
1325{
1326 struct tdm_port port;
1327 int ret = tdm_get_port_idx(kcontrol, &port);
1328
1329 if (ret) {
1330 pr_err("%s: unsupported control: %s\n",
1331 __func__, kcontrol->id.name);
1332 } else {
1333 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1334 tdm_tx_cfg[port.mode][port.channel].bit_format);
1335
1336 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1337 tdm_tx_cfg[port.mode][port.channel].bit_format,
1338 ucontrol->value.enumerated.item[0]);
1339 }
1340 return ret;
1341}
1342
1343static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1344 struct snd_ctl_elem_value *ucontrol)
1345{
1346 struct tdm_port port;
1347 int ret = tdm_get_port_idx(kcontrol, &port);
1348
1349 if (ret) {
1350 pr_err("%s: unsupported control: %s\n",
1351 __func__, kcontrol->id.name);
1352 } else {
1353 tdm_tx_cfg[port.mode][port.channel].bit_format =
1354 tdm_get_format(ucontrol->value.enumerated.item[0]);
1355
1356 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1357 tdm_tx_cfg[port.mode][port.channel].bit_format,
1358 ucontrol->value.enumerated.item[0]);
1359 }
1360 return ret;
1361}
1362
1363static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1364 struct snd_ctl_elem_value *ucontrol)
1365{
1366 struct tdm_port port;
1367 int ret = tdm_get_port_idx(kcontrol, &port);
1368
1369 if (ret) {
1370 pr_err("%s: unsupported control: %s\n",
1371 __func__, kcontrol->id.name);
1372 } else {
1373
1374 ucontrol->value.enumerated.item[0] =
1375 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1376
1377 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1378 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1379 ucontrol->value.enumerated.item[0]);
1380 }
1381 return ret;
1382}
1383
1384static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1385 struct snd_ctl_elem_value *ucontrol)
1386{
1387 struct tdm_port port;
1388 int ret = tdm_get_port_idx(kcontrol, &port);
1389
1390 if (ret) {
1391 pr_err("%s: unsupported control: %s\n",
1392 __func__, kcontrol->id.name);
1393 } else {
1394 tdm_rx_cfg[port.mode][port.channel].channels =
1395 ucontrol->value.enumerated.item[0] + 1;
1396
1397 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1398 tdm_rx_cfg[port.mode][port.channel].channels,
1399 ucontrol->value.enumerated.item[0] + 1);
1400 }
1401 return ret;
1402}
1403
1404static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1405 struct snd_ctl_elem_value *ucontrol)
1406{
1407 struct tdm_port port;
1408 int ret = tdm_get_port_idx(kcontrol, &port);
1409
1410 if (ret) {
1411 pr_err("%s: unsupported control: %s\n",
1412 __func__, kcontrol->id.name);
1413 } else {
1414 ucontrol->value.enumerated.item[0] =
1415 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1416
1417 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1418 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1419 ucontrol->value.enumerated.item[0]);
1420 }
1421 return ret;
1422}
1423
1424static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_value *ucontrol)
1426{
1427 struct tdm_port port;
1428 int ret = tdm_get_port_idx(kcontrol, &port);
1429
1430 if (ret) {
1431 pr_err("%s: unsupported control: %s\n",
1432 __func__, kcontrol->id.name);
1433 } else {
1434 tdm_tx_cfg[port.mode][port.channel].channels =
1435 ucontrol->value.enumerated.item[0] + 1;
1436
1437 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1438 tdm_tx_cfg[port.mode][port.channel].channels,
1439 ucontrol->value.enumerated.item[0] + 1);
1440 }
1441 return ret;
1442}
1443
1444static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1445{
1446 int idx = 0;
1447
1448 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1449 sizeof("PRIM_AUX_PCM"))) {
1450 idx = PRIM_AUX_PCM;
1451 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1452 sizeof("SEC_AUX_PCM"))) {
1453 idx = SEC_AUX_PCM;
1454 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1455 sizeof("TERT_AUX_PCM"))) {
1456 idx = TERT_AUX_PCM;
1457 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1458 sizeof("QUAT_AUX_PCM"))) {
1459 idx = QUAT_AUX_PCM;
1460 } else {
1461 pr_err("%s: unsupported port: %s\n",
1462 __func__, kcontrol->id.name);
1463 idx = -EINVAL;
1464 }
1465
1466 return idx;
1467}
1468
1469static int aux_pcm_get_sample_rate(int value)
1470{
1471 int sample_rate = 0;
1472
1473 switch (value) {
1474 case 1:
1475 sample_rate = SAMPLING_RATE_16KHZ;
1476 break;
1477 case 0:
1478 default:
1479 sample_rate = SAMPLING_RATE_8KHZ;
1480 break;
1481 }
1482 return sample_rate;
1483}
1484
1485static int aux_pcm_get_sample_rate_val(int sample_rate)
1486{
1487 int sample_rate_val = 0;
1488
1489 switch (sample_rate) {
1490 case SAMPLING_RATE_16KHZ:
1491 sample_rate_val = 1;
1492 break;
1493 case SAMPLING_RATE_8KHZ:
1494 default:
1495 sample_rate_val = 0;
1496 break;
1497 }
1498 return sample_rate_val;
1499}
1500
1501static int mi2s_auxpcm_get_format(int value)
1502{
1503 int format = 0;
1504
1505 switch (value) {
1506 case 0:
1507 format = SNDRV_PCM_FORMAT_S16_LE;
1508 break;
1509 case 1:
1510 format = SNDRV_PCM_FORMAT_S24_LE;
1511 break;
1512 case 2:
1513 format = SNDRV_PCM_FORMAT_S24_3LE;
1514 break;
1515 case 3:
1516 format = SNDRV_PCM_FORMAT_S32_LE;
1517 break;
1518 default:
1519 format = SNDRV_PCM_FORMAT_S16_LE;
1520 break;
1521 }
1522 return format;
1523}
1524
1525static int mi2s_auxpcm_get_format_value(int format)
1526{
1527 int value = 0;
1528
1529 switch (format) {
1530 case SNDRV_PCM_FORMAT_S16_LE:
1531 value = 0;
1532 break;
1533 case SNDRV_PCM_FORMAT_S24_LE:
1534 value = 1;
1535 break;
1536 case SNDRV_PCM_FORMAT_S24_3LE:
1537 value = 2;
1538 break;
1539 case SNDRV_PCM_FORMAT_S32_LE:
1540 value = 3;
1541 break;
1542 default:
1543 value = 0;
1544 break;
1545 }
1546 return value;
1547}
1548
1549static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1550 struct snd_ctl_elem_value *ucontrol)
1551{
1552 int idx = aux_pcm_get_port_idx(kcontrol);
1553
1554 if (idx < 0)
1555 return idx;
1556
1557 ucontrol->value.enumerated.item[0] =
1558 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1559
1560 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1561 idx, aux_pcm_rx_cfg[idx].sample_rate,
1562 ucontrol->value.enumerated.item[0]);
1563
1564 return 0;
1565}
1566
1567static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1568 struct snd_ctl_elem_value *ucontrol)
1569{
1570 int idx = aux_pcm_get_port_idx(kcontrol);
1571
1572 if (idx < 0)
1573 return idx;
1574
1575 aux_pcm_rx_cfg[idx].sample_rate =
1576 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1577
1578 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1579 idx, aux_pcm_rx_cfg[idx].sample_rate,
1580 ucontrol->value.enumerated.item[0]);
1581
1582 return 0;
1583}
1584
1585static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1586 struct snd_ctl_elem_value *ucontrol)
1587{
1588 int idx = aux_pcm_get_port_idx(kcontrol);
1589
1590 if (idx < 0)
1591 return idx;
1592
1593 ucontrol->value.enumerated.item[0] =
1594 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1595
1596 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1597 idx, aux_pcm_tx_cfg[idx].sample_rate,
1598 ucontrol->value.enumerated.item[0]);
1599
1600 return 0;
1601}
1602
1603static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1604 struct snd_ctl_elem_value *ucontrol)
1605{
1606 int idx = aux_pcm_get_port_idx(kcontrol);
1607
1608 if (idx < 0)
1609 return idx;
1610
1611 aux_pcm_tx_cfg[idx].sample_rate =
1612 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1613
1614 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1615 idx, aux_pcm_tx_cfg[idx].sample_rate,
1616 ucontrol->value.enumerated.item[0]);
1617
1618 return 0;
1619}
1620
1621static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1622 struct snd_ctl_elem_value *ucontrol)
1623{
1624 int idx = aux_pcm_get_port_idx(kcontrol);
1625
1626 if (idx < 0)
1627 return idx;
1628
1629 ucontrol->value.enumerated.item[0] =
1630 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1631
1632 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1633 idx, aux_pcm_rx_cfg[idx].bit_format,
1634 ucontrol->value.enumerated.item[0]);
1635
1636 return 0;
1637}
1638
1639static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1640 struct snd_ctl_elem_value *ucontrol)
1641{
1642 int idx = aux_pcm_get_port_idx(kcontrol);
1643
1644 if (idx < 0)
1645 return idx;
1646
1647 aux_pcm_rx_cfg[idx].bit_format =
1648 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1649
1650 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1651 idx, aux_pcm_rx_cfg[idx].bit_format,
1652 ucontrol->value.enumerated.item[0]);
1653
1654 return 0;
1655}
1656
1657static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1658 struct snd_ctl_elem_value *ucontrol)
1659{
1660 int idx = aux_pcm_get_port_idx(kcontrol);
1661
1662 if (idx < 0)
1663 return idx;
1664
1665 ucontrol->value.enumerated.item[0] =
1666 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1667
1668 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1669 idx, aux_pcm_tx_cfg[idx].bit_format,
1670 ucontrol->value.enumerated.item[0]);
1671
1672 return 0;
1673}
1674
1675static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
1676 struct snd_ctl_elem_value *ucontrol)
1677{
1678 int idx = aux_pcm_get_port_idx(kcontrol);
1679
1680 if (idx < 0)
1681 return idx;
1682
1683 aux_pcm_tx_cfg[idx].bit_format =
1684 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1685
1686 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1687 idx, aux_pcm_tx_cfg[idx].bit_format,
1688 ucontrol->value.enumerated.item[0]);
1689
1690 return 0;
1691}
1692
1693static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
1694{
1695 int idx = 0;
1696
1697 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
1698 sizeof("PRIM_MI2S_RX"))) {
1699 idx = PRIM_MI2S;
1700 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
1701 sizeof("SEC_MI2S_RX"))) {
1702 idx = SEC_MI2S;
1703 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
1704 sizeof("TERT_MI2S_RX"))) {
1705 idx = TERT_MI2S;
1706 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
1707 sizeof("QUAT_MI2S_RX"))) {
1708 idx = QUAT_MI2S;
1709 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
1710 sizeof("PRIM_MI2S_TX"))) {
1711 idx = PRIM_MI2S;
1712 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
1713 sizeof("SEC_MI2S_TX"))) {
1714 idx = SEC_MI2S;
1715 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
1716 sizeof("TERT_MI2S_TX"))) {
1717 idx = TERT_MI2S;
1718 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
1719 sizeof("QUAT_MI2S_TX"))) {
1720 idx = QUAT_MI2S;
1721 } else {
1722 pr_err("%s: unsupported channel: %s\n",
1723 __func__, kcontrol->id.name);
1724 idx = -EINVAL;
1725 }
1726
1727 return idx;
1728}
1729
1730static int mi2s_get_sample_rate(int value)
1731{
1732 int sample_rate = 0;
1733
1734 switch (value) {
1735 case 0:
1736 sample_rate = SAMPLING_RATE_8KHZ;
1737 break;
1738 case 1:
1739 sample_rate = SAMPLING_RATE_11P025KHZ;
1740 break;
1741 case 2:
1742 sample_rate = SAMPLING_RATE_16KHZ;
1743 break;
1744 case 3:
1745 sample_rate = SAMPLING_RATE_22P05KHZ;
1746 break;
1747 case 4:
1748 sample_rate = SAMPLING_RATE_32KHZ;
1749 break;
1750 case 5:
1751 sample_rate = SAMPLING_RATE_44P1KHZ;
1752 break;
1753 case 6:
1754 sample_rate = SAMPLING_RATE_48KHZ;
1755 break;
1756 case 7:
1757 sample_rate = SAMPLING_RATE_96KHZ;
1758 break;
1759 case 8:
1760 sample_rate = SAMPLING_RATE_192KHZ;
1761 break;
1762 default:
1763 sample_rate = SAMPLING_RATE_48KHZ;
1764 break;
1765 }
1766 return sample_rate;
1767}
1768
1769static int mi2s_get_sample_rate_val(int sample_rate)
1770{
1771 int sample_rate_val = 0;
1772
1773 switch (sample_rate) {
1774 case SAMPLING_RATE_8KHZ:
1775 sample_rate_val = 0;
1776 break;
1777 case SAMPLING_RATE_11P025KHZ:
1778 sample_rate_val = 1;
1779 break;
1780 case SAMPLING_RATE_16KHZ:
1781 sample_rate_val = 2;
1782 break;
1783 case SAMPLING_RATE_22P05KHZ:
1784 sample_rate_val = 3;
1785 break;
1786 case SAMPLING_RATE_32KHZ:
1787 sample_rate_val = 4;
1788 break;
1789 case SAMPLING_RATE_44P1KHZ:
1790 sample_rate_val = 5;
1791 break;
1792 case SAMPLING_RATE_48KHZ:
1793 sample_rate_val = 6;
1794 break;
1795 case SAMPLING_RATE_96KHZ:
1796 sample_rate_val = 7;
1797 break;
1798 case SAMPLING_RATE_192KHZ:
1799 sample_rate_val = 8;
1800 break;
1801 default:
1802 sample_rate_val = 6;
1803 break;
1804 }
1805 return sample_rate_val;
1806}
1807
1808static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1809 struct snd_ctl_elem_value *ucontrol)
1810{
1811 int idx = mi2s_get_port_idx(kcontrol);
1812
1813 if (idx < 0)
1814 return idx;
1815
1816 ucontrol->value.enumerated.item[0] =
1817 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
1818
1819 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1820 idx, mi2s_rx_cfg[idx].sample_rate,
1821 ucontrol->value.enumerated.item[0]);
1822
1823 return 0;
1824}
1825
1826static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1827 struct snd_ctl_elem_value *ucontrol)
1828{
1829 int idx = mi2s_get_port_idx(kcontrol);
1830
1831 if (idx < 0)
1832 return idx;
1833
1834 mi2s_rx_cfg[idx].sample_rate =
1835 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1836
1837 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1838 idx, mi2s_rx_cfg[idx].sample_rate,
1839 ucontrol->value.enumerated.item[0]);
1840
1841 return 0;
1842}
1843
1844static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1845 struct snd_ctl_elem_value *ucontrol)
1846{
1847 int idx = mi2s_get_port_idx(kcontrol);
1848
1849 if (idx < 0)
1850 return idx;
1851
1852 ucontrol->value.enumerated.item[0] =
1853 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
1854
1855 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1856 idx, mi2s_tx_cfg[idx].sample_rate,
1857 ucontrol->value.enumerated.item[0]);
1858
1859 return 0;
1860}
1861
1862static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1863 struct snd_ctl_elem_value *ucontrol)
1864{
1865 int idx = mi2s_get_port_idx(kcontrol);
1866
1867 if (idx < 0)
1868 return idx;
1869
1870 mi2s_tx_cfg[idx].sample_rate =
1871 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
1872
1873 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1874 idx, mi2s_tx_cfg[idx].sample_rate,
1875 ucontrol->value.enumerated.item[0]);
1876
1877 return 0;
1878}
1879
1880static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
1881 struct snd_ctl_elem_value *ucontrol)
1882{
1883 int idx = mi2s_get_port_idx(kcontrol);
1884
1885 if (idx < 0)
1886 return idx;
1887
1888 ucontrol->value.enumerated.item[0] =
1889 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
1890
1891 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1892 idx, mi2s_rx_cfg[idx].bit_format,
1893 ucontrol->value.enumerated.item[0]);
1894
1895 return 0;
1896}
1897
1898static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
1899 struct snd_ctl_elem_value *ucontrol)
1900{
1901 int idx = mi2s_get_port_idx(kcontrol);
1902
1903 if (idx < 0)
1904 return idx;
1905
1906 mi2s_rx_cfg[idx].bit_format =
1907 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1908
1909 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1910 idx, mi2s_rx_cfg[idx].bit_format,
1911 ucontrol->value.enumerated.item[0]);
1912
1913 return 0;
1914}
1915
1916static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
1917 struct snd_ctl_elem_value *ucontrol)
1918{
1919 int idx = mi2s_get_port_idx(kcontrol);
1920
1921 if (idx < 0)
1922 return idx;
1923
1924 ucontrol->value.enumerated.item[0] =
1925 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
1926
1927 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1928 idx, mi2s_tx_cfg[idx].bit_format,
1929 ucontrol->value.enumerated.item[0]);
1930
1931 return 0;
1932}
1933
1934static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
1935 struct snd_ctl_elem_value *ucontrol)
1936{
1937 int idx = mi2s_get_port_idx(kcontrol);
1938
1939 if (idx < 0)
1940 return idx;
1941
1942 mi2s_tx_cfg[idx].bit_format =
1943 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1944
1945 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1946 idx, mi2s_tx_cfg[idx].bit_format,
1947 ucontrol->value.enumerated.item[0]);
1948
1949 return 0;
1950}
1951static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
1952 struct snd_ctl_elem_value *ucontrol)
1953{
1954 int idx = mi2s_get_port_idx(kcontrol);
1955
1956 if (idx < 0)
1957 return idx;
1958
1959 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1960 idx, mi2s_rx_cfg[idx].channels);
1961 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
1962
1963 return 0;
1964}
1965
1966static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
1967 struct snd_ctl_elem_value *ucontrol)
1968{
1969 int idx = mi2s_get_port_idx(kcontrol);
1970
1971 if (idx < 0)
1972 return idx;
1973
1974 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
1975 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
1976 idx, mi2s_rx_cfg[idx].channels);
1977
1978 return 1;
1979}
1980
1981static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
1982 struct snd_ctl_elem_value *ucontrol)
1983{
1984 int idx = mi2s_get_port_idx(kcontrol);
1985
1986 if (idx < 0)
1987 return idx;
1988
1989 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
1990 idx, mi2s_tx_cfg[idx].channels);
1991 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
1992
1993 return 0;
1994}
1995
1996static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
1997 struct snd_ctl_elem_value *ucontrol)
1998{
1999 int idx = mi2s_get_port_idx(kcontrol);
2000
2001 if (idx < 0)
2002 return idx;
2003
2004 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2005 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2006 idx, mi2s_tx_cfg[idx].channels);
2007
2008 return 1;
2009}
2010
2011static int msm_get_port_id(int be_id)
2012{
2013 int afe_port_id = 0;
2014
2015 switch (be_id) {
2016 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2017 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2018 break;
2019 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2020 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2021 break;
2022 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2023 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2024 break;
2025 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2026 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2027 break;
2028 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2029 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2030 break;
2031 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2032 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2033 break;
2034 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2035 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2036 break;
2037 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2038 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2039 break;
2040 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2041 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2042 break;
2043 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2044 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2045 break;
2046 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2047 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2048 break;
2049 default:
2050 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2051 afe_port_id = -EINVAL;
2052 }
2053
2054 return afe_port_id;
2055}
2056
2057static u32 get_mi2s_bits_per_sample(u32 bit_format)
2058{
2059 u32 bit_per_sample = 0;
2060
2061 switch (bit_format) {
2062 case SNDRV_PCM_FORMAT_S32_LE:
2063 case SNDRV_PCM_FORMAT_S24_3LE:
2064 case SNDRV_PCM_FORMAT_S24_LE:
2065 bit_per_sample = 32;
2066 break;
2067 case SNDRV_PCM_FORMAT_S16_LE:
2068 default:
2069 bit_per_sample = 16;
2070 break;
2071 }
2072
2073 return bit_per_sample;
2074}
2075
2076static void update_mi2s_clk_val(int dai_id, int stream)
2077{
2078 u32 bit_per_sample = 0;
2079
2080 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2081 bit_per_sample =
2082 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2083 mi2s_clk[dai_id].clk_freq_in_hz =
2084 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2085 } else {
2086 bit_per_sample =
2087 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2088 mi2s_clk[dai_id].clk_freq_in_hz =
2089 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2090 }
2091}
2092
2093static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2094{
2095 int ret = 0;
2096 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2097 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2098 int port_id = 0;
2099 int index = cpu_dai->id;
2100
2101 port_id = msm_get_port_id(rtd->dai_link->id);
2102 if (port_id < 0) {
2103 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2104 ret = port_id;
2105 goto err;
2106 }
2107
2108 if (enable) {
2109 update_mi2s_clk_val(index, substream->stream);
2110 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2111 mi2s_clk[index].clk_freq_in_hz);
2112 }
2113
2114 mi2s_clk[index].enable = enable;
2115 ret = afe_set_lpass_clock_v2(port_id,
2116 &mi2s_clk[index]);
2117 if (ret < 0) {
2118 dev_err(rtd->card->dev,
2119 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2120 __func__, port_id, ret);
2121 goto err;
2122 }
2123
2124err:
2125 return ret;
2126}
2127
2128static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2129{
2130 int idx = 0;
2131
2132 if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2133 sizeof("RX_CDC_DMA_RX_0")))
2134 idx = RX_CDC_DMA_RX_0;
2135 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2136 sizeof("RX_CDC_DMA_RX_1")))
2137 idx = RX_CDC_DMA_RX_1;
2138 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2139 sizeof("RX_CDC_DMA_RX_2")))
2140 idx = RX_CDC_DMA_RX_2;
2141 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2142 sizeof("RX_CDC_DMA_RX_3")))
2143 idx = RX_CDC_DMA_RX_3;
2144 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2145 sizeof("RX_CDC_DMA_RX_5")))
2146 idx = RX_CDC_DMA_RX_5;
2147 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2148 sizeof("TX_CDC_DMA_TX_0")))
2149 idx = TX_CDC_DMA_TX_0;
2150 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2151 sizeof("TX_CDC_DMA_TX_3")))
2152 idx = TX_CDC_DMA_TX_3;
2153 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2154 sizeof("TX_CDC_DMA_TX_4")))
2155 idx = TX_CDC_DMA_TX_4;
2156 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2157 sizeof("VA_CDC_DMA_TX_0")))
2158 idx = VA_CDC_DMA_TX_0;
2159 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2160 sizeof("VA_CDC_DMA_TX_1")))
2161 idx = VA_CDC_DMA_TX_1;
2162 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2163 sizeof("VA_CDC_DMA_TX_2")))
2164 idx = VA_CDC_DMA_TX_2;
2165 else {
2166 pr_err("%s: unsupported channel: %s\n",
2167 __func__, kcontrol->id.name);
2168 return -EINVAL;
2169 }
2170
2171 return idx;
2172}
2173
2174static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2175 struct snd_ctl_elem_value *ucontrol)
2176{
2177 int ch_num = cdc_dma_get_port_idx(kcontrol);
2178
2179 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2180 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2181 return ch_num;
2182 }
2183
2184 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2185 cdc_dma_rx_cfg[ch_num].channels - 1);
2186 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2187 return 0;
2188}
2189
2190static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2191 struct snd_ctl_elem_value *ucontrol)
2192{
2193 int ch_num = cdc_dma_get_port_idx(kcontrol);
2194
2195 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2196 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2197 return ch_num;
2198 }
2199
2200 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2201
2202 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2203 cdc_dma_rx_cfg[ch_num].channels);
2204 return 1;
2205}
2206
2207static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2208 struct snd_ctl_elem_value *ucontrol)
2209{
2210 int ch_num = cdc_dma_get_port_idx(kcontrol);
2211
2212 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2213 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2214 return ch_num;
2215 }
2216
2217 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2218 case SNDRV_PCM_FORMAT_S32_LE:
2219 ucontrol->value.integer.value[0] = 3;
2220 break;
2221 case SNDRV_PCM_FORMAT_S24_3LE:
2222 ucontrol->value.integer.value[0] = 2;
2223 break;
2224 case SNDRV_PCM_FORMAT_S24_LE:
2225 ucontrol->value.integer.value[0] = 1;
2226 break;
2227 case SNDRV_PCM_FORMAT_S16_LE:
2228 default:
2229 ucontrol->value.integer.value[0] = 0;
2230 break;
2231 }
2232
2233 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2234 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2235 ucontrol->value.integer.value[0]);
2236 return 0;
2237}
2238
2239static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2240 struct snd_ctl_elem_value *ucontrol)
2241{
2242 int rc = 0;
2243 int ch_num = cdc_dma_get_port_idx(kcontrol);
2244
2245 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2246 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2247 return ch_num;
2248 }
2249
2250 switch (ucontrol->value.integer.value[0]) {
2251 case 3:
2252 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2253 break;
2254 case 2:
2255 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2256 break;
2257 case 1:
2258 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2259 break;
2260 case 0:
2261 default:
2262 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2263 break;
2264 }
2265 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2266 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2267 ucontrol->value.integer.value[0]);
2268
2269 return rc;
2270}
2271
2272
2273static int cdc_dma_get_sample_rate_val(int sample_rate)
2274{
2275 int sample_rate_val = 0;
2276
2277 switch (sample_rate) {
2278 case SAMPLING_RATE_8KHZ:
2279 sample_rate_val = 0;
2280 break;
2281 case SAMPLING_RATE_11P025KHZ:
2282 sample_rate_val = 1;
2283 break;
2284 case SAMPLING_RATE_16KHZ:
2285 sample_rate_val = 2;
2286 break;
2287 case SAMPLING_RATE_22P05KHZ:
2288 sample_rate_val = 3;
2289 break;
2290 case SAMPLING_RATE_32KHZ:
2291 sample_rate_val = 4;
2292 break;
2293 case SAMPLING_RATE_44P1KHZ:
2294 sample_rate_val = 5;
2295 break;
2296 case SAMPLING_RATE_48KHZ:
2297 sample_rate_val = 6;
2298 break;
2299 case SAMPLING_RATE_88P2KHZ:
2300 sample_rate_val = 7;
2301 break;
2302 case SAMPLING_RATE_96KHZ:
2303 sample_rate_val = 8;
2304 break;
2305 case SAMPLING_RATE_176P4KHZ:
2306 sample_rate_val = 9;
2307 break;
2308 case SAMPLING_RATE_192KHZ:
2309 sample_rate_val = 10;
2310 break;
2311 case SAMPLING_RATE_352P8KHZ:
2312 sample_rate_val = 11;
2313 break;
2314 case SAMPLING_RATE_384KHZ:
2315 sample_rate_val = 12;
2316 break;
2317 default:
2318 sample_rate_val = 6;
2319 break;
2320 }
2321 return sample_rate_val;
2322}
2323
2324static int cdc_dma_get_sample_rate(int value)
2325{
2326 int sample_rate = 0;
2327
2328 switch (value) {
2329 case 0:
2330 sample_rate = SAMPLING_RATE_8KHZ;
2331 break;
2332 case 1:
2333 sample_rate = SAMPLING_RATE_11P025KHZ;
2334 break;
2335 case 2:
2336 sample_rate = SAMPLING_RATE_16KHZ;
2337 break;
2338 case 3:
2339 sample_rate = SAMPLING_RATE_22P05KHZ;
2340 break;
2341 case 4:
2342 sample_rate = SAMPLING_RATE_32KHZ;
2343 break;
2344 case 5:
2345 sample_rate = SAMPLING_RATE_44P1KHZ;
2346 break;
2347 case 6:
2348 sample_rate = SAMPLING_RATE_48KHZ;
2349 break;
2350 case 7:
2351 sample_rate = SAMPLING_RATE_88P2KHZ;
2352 break;
2353 case 8:
2354 sample_rate = SAMPLING_RATE_96KHZ;
2355 break;
2356 case 9:
2357 sample_rate = SAMPLING_RATE_176P4KHZ;
2358 break;
2359 case 10:
2360 sample_rate = SAMPLING_RATE_192KHZ;
2361 break;
2362 case 11:
2363 sample_rate = SAMPLING_RATE_352P8KHZ;
2364 break;
2365 case 12:
2366 sample_rate = SAMPLING_RATE_384KHZ;
2367 break;
2368 default:
2369 sample_rate = SAMPLING_RATE_48KHZ;
2370 break;
2371 }
2372 return sample_rate;
2373}
2374
2375static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2376 struct snd_ctl_elem_value *ucontrol)
2377{
2378 int ch_num = cdc_dma_get_port_idx(kcontrol);
2379
2380 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2381 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2382 return ch_num;
2383 }
2384
2385 ucontrol->value.enumerated.item[0] =
2386 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2387
2388 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2389 cdc_dma_rx_cfg[ch_num].sample_rate);
2390 return 0;
2391}
2392
2393static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2394 struct snd_ctl_elem_value *ucontrol)
2395{
2396 int ch_num = cdc_dma_get_port_idx(kcontrol);
2397
2398 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
2399 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2400 return ch_num;
2401 }
2402
2403 cdc_dma_rx_cfg[ch_num].sample_rate =
2404 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2405
2406
2407 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2408 __func__, ucontrol->value.enumerated.item[0],
2409 cdc_dma_rx_cfg[ch_num].sample_rate);
2410 return 0;
2411}
2412
2413static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2414 struct snd_ctl_elem_value *ucontrol)
2415{
2416 int ch_num = cdc_dma_get_port_idx(kcontrol);
2417
2418 if (ch_num < 0) {
2419 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2420 return ch_num;
2421 }
2422
2423 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2424 cdc_dma_tx_cfg[ch_num].channels);
2425 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2426 return 0;
2427}
2428
2429static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2430 struct snd_ctl_elem_value *ucontrol)
2431{
2432 int ch_num = cdc_dma_get_port_idx(kcontrol);
2433
2434 if (ch_num < 0) {
2435 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2436 return ch_num;
2437 }
2438
2439 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2440
2441 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2442 cdc_dma_tx_cfg[ch_num].channels);
2443 return 1;
2444}
2445
2446static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2447 struct snd_ctl_elem_value *ucontrol)
2448{
2449 int sample_rate_val;
2450 int ch_num = cdc_dma_get_port_idx(kcontrol);
2451
2452 if (ch_num < 0) {
2453 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2454 return ch_num;
2455 }
2456
2457 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2458 case SAMPLING_RATE_384KHZ:
2459 sample_rate_val = 12;
2460 break;
2461 case SAMPLING_RATE_352P8KHZ:
2462 sample_rate_val = 11;
2463 break;
2464 case SAMPLING_RATE_192KHZ:
2465 sample_rate_val = 10;
2466 break;
2467 case SAMPLING_RATE_176P4KHZ:
2468 sample_rate_val = 9;
2469 break;
2470 case SAMPLING_RATE_96KHZ:
2471 sample_rate_val = 8;
2472 break;
2473 case SAMPLING_RATE_88P2KHZ:
2474 sample_rate_val = 7;
2475 break;
2476 case SAMPLING_RATE_48KHZ:
2477 sample_rate_val = 6;
2478 break;
2479 case SAMPLING_RATE_44P1KHZ:
2480 sample_rate_val = 5;
2481 break;
2482 case SAMPLING_RATE_32KHZ:
2483 sample_rate_val = 4;
2484 break;
2485 case SAMPLING_RATE_22P05KHZ:
2486 sample_rate_val = 3;
2487 break;
2488 case SAMPLING_RATE_16KHZ:
2489 sample_rate_val = 2;
2490 break;
2491 case SAMPLING_RATE_11P025KHZ:
2492 sample_rate_val = 1;
2493 break;
2494 case SAMPLING_RATE_8KHZ:
2495 sample_rate_val = 0;
2496 break;
2497 default:
2498 sample_rate_val = 6;
2499 break;
2500 }
2501
2502 ucontrol->value.integer.value[0] = sample_rate_val;
2503 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2504 cdc_dma_tx_cfg[ch_num].sample_rate);
2505 return 0;
2506}
2507
2508static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2509 struct snd_ctl_elem_value *ucontrol)
2510{
2511 int ch_num = cdc_dma_get_port_idx(kcontrol);
2512
2513 if (ch_num < 0) {
2514 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2515 return ch_num;
2516 }
2517
2518 switch (ucontrol->value.integer.value[0]) {
2519 case 12:
2520 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2521 break;
2522 case 11:
2523 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2524 break;
2525 case 10:
2526 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2527 break;
2528 case 9:
2529 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2530 break;
2531 case 8:
2532 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2533 break;
2534 case 7:
2535 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2536 break;
2537 case 6:
2538 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2539 break;
2540 case 5:
2541 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2542 break;
2543 case 4:
2544 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2545 break;
2546 case 3:
2547 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2548 break;
2549 case 2:
2550 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2551 break;
2552 case 1:
2553 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2554 break;
2555 case 0:
2556 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2557 break;
2558 default:
2559 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2560 break;
2561 }
2562
2563 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2564 __func__, ucontrol->value.integer.value[0],
2565 cdc_dma_tx_cfg[ch_num].sample_rate);
2566 return 0;
2567}
2568
2569static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2570 struct snd_ctl_elem_value *ucontrol)
2571{
2572 int ch_num = cdc_dma_get_port_idx(kcontrol);
2573
2574 if (ch_num < 0) {
2575 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2576 return ch_num;
2577 }
2578
2579 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2580 case SNDRV_PCM_FORMAT_S32_LE:
2581 ucontrol->value.integer.value[0] = 3;
2582 break;
2583 case SNDRV_PCM_FORMAT_S24_3LE:
2584 ucontrol->value.integer.value[0] = 2;
2585 break;
2586 case SNDRV_PCM_FORMAT_S24_LE:
2587 ucontrol->value.integer.value[0] = 1;
2588 break;
2589 case SNDRV_PCM_FORMAT_S16_LE:
2590 default:
2591 ucontrol->value.integer.value[0] = 0;
2592 break;
2593 }
2594
2595 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2596 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2597 ucontrol->value.integer.value[0]);
2598 return 0;
2599}
2600
2601static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2602 struct snd_ctl_elem_value *ucontrol)
2603{
2604 int rc = 0;
2605 int ch_num = cdc_dma_get_port_idx(kcontrol);
2606
2607 if (ch_num < 0) {
2608 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2609 return ch_num;
2610 }
2611
2612 switch (ucontrol->value.integer.value[0]) {
2613 case 3:
2614 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2615 break;
2616 case 2:
2617 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2618 break;
2619 case 1:
2620 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2621 break;
2622 case 0:
2623 default:
2624 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2625 break;
2626 }
2627 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2628 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2629 ucontrol->value.integer.value[0]);
2630
2631 return rc;
2632}
2633
2634static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2635{
2636 int idx = 0;
2637
2638 switch (be_id) {
2639 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
2640 idx = RX_CDC_DMA_RX_0;
2641 break;
2642 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
2643 idx = RX_CDC_DMA_RX_1;
2644 break;
2645 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
2646 idx = RX_CDC_DMA_RX_2;
2647 break;
2648 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
2649 idx = RX_CDC_DMA_RX_3;
2650 break;
2651 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
2652 idx = RX_CDC_DMA_RX_5;
2653 break;
2654 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
2655 idx = TX_CDC_DMA_TX_0;
2656 break;
2657 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
2658 idx = TX_CDC_DMA_TX_3;
2659 break;
2660 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
2661 idx = TX_CDC_DMA_TX_4;
2662 break;
2663 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2664 idx = VA_CDC_DMA_TX_0;
2665 break;
2666 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2667 idx = VA_CDC_DMA_TX_1;
2668 break;
2669 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2670 idx = VA_CDC_DMA_TX_2;
2671 break;
2672 default:
2673 idx = RX_CDC_DMA_RX_0;
2674 break;
2675 }
2676
2677 return idx;
2678}
2679
2680static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
2681 struct snd_ctl_elem_value *ucontrol)
2682{
2683 /*
2684 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
2685 * when used for BT_SCO use case. Return either Rx or Tx sample rate
2686 * value.
2687 */
2688 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2689 case SAMPLING_RATE_96KHZ:
2690 ucontrol->value.integer.value[0] = 5;
2691 break;
2692 case SAMPLING_RATE_88P2KHZ:
2693 ucontrol->value.integer.value[0] = 4;
2694 break;
2695 case SAMPLING_RATE_48KHZ:
2696 ucontrol->value.integer.value[0] = 3;
2697 break;
2698 case SAMPLING_RATE_44P1KHZ:
2699 ucontrol->value.integer.value[0] = 2;
2700 break;
2701 case SAMPLING_RATE_16KHZ:
2702 ucontrol->value.integer.value[0] = 1;
2703 break;
2704 case SAMPLING_RATE_8KHZ:
2705 default:
2706 ucontrol->value.integer.value[0] = 0;
2707 break;
2708 }
2709 pr_debug("%s: sample rate = %d\n", __func__,
2710 slim_rx_cfg[SLIM_RX_7].sample_rate);
2711
2712 return 0;
2713}
2714
2715static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
2716 struct snd_ctl_elem_value *ucontrol)
2717{
2718 switch (ucontrol->value.integer.value[0]) {
2719 case 1:
2720 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2721 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2722 break;
2723 case 2:
2724 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2725 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2726 break;
2727 case 3:
2728 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2729 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2730 break;
2731 case 4:
2732 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2733 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2734 break;
2735 case 5:
2736 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2737 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2738 break;
2739 case 0:
2740 default:
2741 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2742 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2743 break;
2744 }
2745 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
2746 __func__,
2747 slim_rx_cfg[SLIM_RX_7].sample_rate,
2748 slim_tx_cfg[SLIM_TX_7].sample_rate,
2749 ucontrol->value.enumerated.item[0]);
2750
2751 return 0;
2752}
2753
2754static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
2755 struct snd_ctl_elem_value *ucontrol)
2756{
2757 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
2758 case SAMPLING_RATE_96KHZ:
2759 ucontrol->value.integer.value[0] = 5;
2760 break;
2761 case SAMPLING_RATE_88P2KHZ:
2762 ucontrol->value.integer.value[0] = 4;
2763 break;
2764 case SAMPLING_RATE_48KHZ:
2765 ucontrol->value.integer.value[0] = 3;
2766 break;
2767 case SAMPLING_RATE_44P1KHZ:
2768 ucontrol->value.integer.value[0] = 2;
2769 break;
2770 case SAMPLING_RATE_16KHZ:
2771 ucontrol->value.integer.value[0] = 1;
2772 break;
2773 case SAMPLING_RATE_8KHZ:
2774 default:
2775 ucontrol->value.integer.value[0] = 0;
2776 break;
2777 }
2778 pr_debug("%s: sample rate rx = %d\n", __func__,
2779 slim_rx_cfg[SLIM_RX_7].sample_rate);
2780
2781 return 0;
2782}
2783
2784static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
2785 struct snd_ctl_elem_value *ucontrol)
2786{
2787 switch (ucontrol->value.integer.value[0]) {
2788 case 1:
2789 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
2790 break;
2791 case 2:
2792 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2793 break;
2794 case 3:
2795 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
2796 break;
2797 case 4:
2798 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2799 break;
2800 case 5:
2801 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
2802 break;
2803 case 0:
2804 default:
2805 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
2806 break;
2807 }
2808 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
2809 __func__,
2810 slim_rx_cfg[SLIM_RX_7].sample_rate,
2811 ucontrol->value.enumerated.item[0]);
2812
2813 return 0;
2814}
2815
2816static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
2817 struct snd_ctl_elem_value *ucontrol)
2818{
2819 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
2820 case SAMPLING_RATE_96KHZ:
2821 ucontrol->value.integer.value[0] = 5;
2822 break;
2823 case SAMPLING_RATE_88P2KHZ:
2824 ucontrol->value.integer.value[0] = 4;
2825 break;
2826 case SAMPLING_RATE_48KHZ:
2827 ucontrol->value.integer.value[0] = 3;
2828 break;
2829 case SAMPLING_RATE_44P1KHZ:
2830 ucontrol->value.integer.value[0] = 2;
2831 break;
2832 case SAMPLING_RATE_16KHZ:
2833 ucontrol->value.integer.value[0] = 1;
2834 break;
2835 case SAMPLING_RATE_8KHZ:
2836 default:
2837 ucontrol->value.integer.value[0] = 0;
2838 break;
2839 }
2840 pr_debug("%s: sample rate tx = %d\n", __func__,
2841 slim_tx_cfg[SLIM_TX_7].sample_rate);
2842
2843 return 0;
2844}
2845
2846static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
2847 struct snd_ctl_elem_value *ucontrol)
2848{
2849 switch (ucontrol->value.integer.value[0]) {
2850 case 1:
2851 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
2852 break;
2853 case 2:
2854 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
2855 break;
2856 case 3:
2857 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
2858 break;
2859 case 4:
2860 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
2861 break;
2862 case 5:
2863 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
2864 break;
2865 case 0:
2866 default:
2867 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
2868 break;
2869 }
2870 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
2871 __func__,
2872 slim_tx_cfg[SLIM_TX_7].sample_rate,
2873 ucontrol->value.enumerated.item[0]);
2874
2875 return 0;
2876}
2877
2878static const struct snd_kcontrol_new msm_int_snd_controls[] = {
2879 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
2880 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2881 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
2882 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2883 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
2884 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2885 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
2886 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2887 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
2888 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
2889 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
2890 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2891 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
2892 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2893 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
2894 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2895 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
2896 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2897 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
2898 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2899 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
2900 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
2901 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
2902 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2903 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
2904 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2905 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
2906 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2907 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
2908 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2909 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
2910 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
2911 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
2912 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2913 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
2914 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2915 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
2916 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2917 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
2918 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2919 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
2920 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2921 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
2922 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
2923 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
2924 rx_cdc_dma_rx_0_sample_rate,
2925 cdc_dma_rx_sample_rate_get,
2926 cdc_dma_rx_sample_rate_put),
2927 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
2928 rx_cdc_dma_rx_1_sample_rate,
2929 cdc_dma_rx_sample_rate_get,
2930 cdc_dma_rx_sample_rate_put),
2931 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
2932 rx_cdc_dma_rx_2_sample_rate,
2933 cdc_dma_rx_sample_rate_get,
2934 cdc_dma_rx_sample_rate_put),
2935 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
2936 rx_cdc_dma_rx_3_sample_rate,
2937 cdc_dma_rx_sample_rate_get,
2938 cdc_dma_rx_sample_rate_put),
2939 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
2940 rx_cdc_dma_rx_5_sample_rate,
2941 cdc_dma_rx_sample_rate_get,
2942 cdc_dma_rx_sample_rate_put),
2943 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
2944 tx_cdc_dma_tx_0_sample_rate,
2945 cdc_dma_tx_sample_rate_get,
2946 cdc_dma_tx_sample_rate_put),
2947 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
2948 tx_cdc_dma_tx_3_sample_rate,
2949 cdc_dma_tx_sample_rate_get,
2950 cdc_dma_tx_sample_rate_put),
2951 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
2952 tx_cdc_dma_tx_4_sample_rate,
2953 cdc_dma_tx_sample_rate_get,
2954 cdc_dma_tx_sample_rate_put),
2955 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
2956 va_cdc_dma_tx_0_sample_rate,
2957 cdc_dma_tx_sample_rate_get,
2958 cdc_dma_tx_sample_rate_put),
2959 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
2960 va_cdc_dma_tx_1_sample_rate,
2961 cdc_dma_tx_sample_rate_get,
2962 cdc_dma_tx_sample_rate_put),
2963 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
2964 va_cdc_dma_tx_2_sample_rate,
2965 cdc_dma_tx_sample_rate_get,
2966 cdc_dma_tx_sample_rate_put),
2967};
2968
2969static const struct snd_kcontrol_new msm_common_snd_controls[] = {
2970 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
2971 usb_audio_rx_sample_rate_get,
2972 usb_audio_rx_sample_rate_put),
2973 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
2974 usb_audio_tx_sample_rate_get,
2975 usb_audio_tx_sample_rate_put),
2976 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2977 tdm_rx_sample_rate_get,
2978 tdm_rx_sample_rate_put),
2979 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2980 tdm_rx_sample_rate_get,
2981 tdm_rx_sample_rate_put),
2982 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2983 tdm_rx_sample_rate_get,
2984 tdm_rx_sample_rate_put),
2985 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
2986 tdm_rx_sample_rate_get,
2987 tdm_rx_sample_rate_put),
2988 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2989 tdm_tx_sample_rate_get,
2990 tdm_tx_sample_rate_put),
2991 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2992 tdm_tx_sample_rate_get,
2993 tdm_tx_sample_rate_put),
2994 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2995 tdm_tx_sample_rate_get,
2996 tdm_tx_sample_rate_put),
2997 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
2998 tdm_tx_sample_rate_get,
2999 tdm_tx_sample_rate_put),
3000 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3001 aux_pcm_rx_sample_rate_get,
3002 aux_pcm_rx_sample_rate_put),
3003 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3004 aux_pcm_rx_sample_rate_get,
3005 aux_pcm_rx_sample_rate_put),
3006 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3007 aux_pcm_rx_sample_rate_get,
3008 aux_pcm_rx_sample_rate_put),
3009 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3010 aux_pcm_rx_sample_rate_get,
3011 aux_pcm_rx_sample_rate_put),
3012 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3013 aux_pcm_tx_sample_rate_get,
3014 aux_pcm_tx_sample_rate_put),
3015 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3016 aux_pcm_tx_sample_rate_get,
3017 aux_pcm_tx_sample_rate_put),
3018 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3019 aux_pcm_tx_sample_rate_get,
3020 aux_pcm_tx_sample_rate_put),
3021 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3022 aux_pcm_tx_sample_rate_get,
3023 aux_pcm_tx_sample_rate_put),
3024 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3025 mi2s_rx_sample_rate_get,
3026 mi2s_rx_sample_rate_put),
3027 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3028 mi2s_rx_sample_rate_get,
3029 mi2s_rx_sample_rate_put),
3030 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3031 mi2s_rx_sample_rate_get,
3032 mi2s_rx_sample_rate_put),
3033 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3034 mi2s_rx_sample_rate_get,
3035 mi2s_rx_sample_rate_put),
3036 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3037 mi2s_tx_sample_rate_get,
3038 mi2s_tx_sample_rate_put),
3039 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3040 mi2s_tx_sample_rate_get,
3041 mi2s_tx_sample_rate_put),
3042 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3043 mi2s_tx_sample_rate_get,
3044 mi2s_tx_sample_rate_put),
3045 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3046 mi2s_tx_sample_rate_get,
3047 mi2s_tx_sample_rate_put),
3048 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3049 usb_audio_rx_format_get, usb_audio_rx_format_put),
3050 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3051 usb_audio_tx_format_get, usb_audio_tx_format_put),
3052 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3053 tdm_rx_format_get,
3054 tdm_rx_format_put),
3055 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3056 tdm_rx_format_get,
3057 tdm_rx_format_put),
3058 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3059 tdm_rx_format_get,
3060 tdm_rx_format_put),
3061 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3062 tdm_rx_format_get,
3063 tdm_rx_format_put),
3064 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3065 tdm_tx_format_get,
3066 tdm_tx_format_put),
3067 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3068 tdm_tx_format_get,
3069 tdm_tx_format_put),
3070 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3071 tdm_tx_format_get,
3072 tdm_tx_format_put),
3073 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3074 tdm_tx_format_get,
3075 tdm_tx_format_put),
3076 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3077 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3078 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3079 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3080 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3081 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3082 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3083 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3084 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3085 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3086 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3087 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3088 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3089 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3090 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3091 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3092 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3093 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3094 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3095 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3096 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3097 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3098 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3099 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3100 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3101 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3102 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3103 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3104 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3105 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3106 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3107 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3108 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3109 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3110 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3111 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3112 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3113 proxy_rx_ch_get, proxy_rx_ch_put),
3114 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3115 tdm_rx_ch_get,
3116 tdm_rx_ch_put),
3117 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3118 tdm_rx_ch_get,
3119 tdm_rx_ch_put),
3120 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3121 tdm_rx_ch_get,
3122 tdm_rx_ch_put),
3123 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3124 tdm_rx_ch_get,
3125 tdm_rx_ch_put),
3126 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3127 tdm_tx_ch_get,
3128 tdm_tx_ch_put),
3129 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3130 tdm_tx_ch_get,
3131 tdm_tx_ch_put),
3132 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3133 tdm_tx_ch_get,
3134 tdm_tx_ch_put),
3135 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3136 tdm_tx_ch_get,
3137 tdm_tx_ch_put),
3138 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3139 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3140 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3141 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3142 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3143 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3144 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3145 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3146 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3147 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3148 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3149 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3150 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3151 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3152 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3153 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3154 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3155 msm_bt_sample_rate_get,
3156 msm_bt_sample_rate_put),
3157 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3158 msm_bt_sample_rate_rx_get,
3159 msm_bt_sample_rate_rx_put),
3160 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3161 msm_bt_sample_rate_tx_get,
3162 msm_bt_sample_rate_tx_put),
3163 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3164 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
3165 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3166 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
3167};
3168
3169static const struct snd_kcontrol_new msm_snd_controls[] = {
3170 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3171 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3172 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3173 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3174 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3175 aux_pcm_rx_sample_rate_get,
3176 aux_pcm_rx_sample_rate_put),
3177 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3178 aux_pcm_tx_sample_rate_get,
3179 aux_pcm_tx_sample_rate_put),
3180};
3181
3182static int bengal_send_island_va_config(int32_t be_id)
3183{
3184 int rc = 0;
3185 int port_id = 0xFFFF;
3186
3187 port_id = msm_get_port_id(be_id);
3188 if (port_id < 0) {
3189 pr_err("%s: Invalid island interface, be_id: %d\n",
3190 __func__, be_id);
3191 rc = -EINVAL;
3192 } else {
3193 /*
3194 * send island mode config
3195 * This should be the first configuration
3196 */
3197 rc = afe_send_port_island_mode(port_id);
3198 if (rc)
3199 pr_err("%s: afe send island mode failed %d\n",
3200 __func__, rc);
3201 }
3202
3203 return rc;
3204}
3205
3206static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3207 struct snd_pcm_hw_params *params)
3208{
3209 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3210 struct snd_interval *rate = hw_param_interval(params,
3211 SNDRV_PCM_HW_PARAM_RATE);
3212 struct snd_interval *channels = hw_param_interval(params,
3213 SNDRV_PCM_HW_PARAM_CHANNELS);
3214 int idx = 0;
3215
3216 pr_debug("%s: format = %d, rate = %d\n",
3217 __func__, params_format(params), params_rate(params));
3218
3219 switch (dai_link->id) {
3220 case MSM_BACKEND_DAI_USB_RX:
3221 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3222 usb_rx_cfg.bit_format);
3223 rate->min = rate->max = usb_rx_cfg.sample_rate;
3224 channels->min = channels->max = usb_rx_cfg.channels;
3225 break;
3226
3227 case MSM_BACKEND_DAI_USB_TX:
3228 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3229 usb_tx_cfg.bit_format);
3230 rate->min = rate->max = usb_tx_cfg.sample_rate;
3231 channels->min = channels->max = usb_tx_cfg.channels;
3232 break;
3233
3234 case MSM_BACKEND_DAI_AFE_PCM_RX:
3235 channels->min = channels->max = proxy_rx_cfg.channels;
3236 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3237 break;
3238
3239 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3240 channels->min = channels->max =
3241 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3242 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3243 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3244 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3245 break;
3246
3247 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3248 channels->min = channels->max =
3249 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3250 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3251 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3252 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3253 break;
3254
3255 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3256 channels->min = channels->max =
3257 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3258 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3259 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3260 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3261 break;
3262
3263 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3264 channels->min = channels->max =
3265 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3266 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3267 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3268 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3269 break;
3270
3271 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3272 channels->min = channels->max =
3273 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3274 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3275 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3276 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3277 break;
3278
3279 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3280 channels->min = channels->max =
3281 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3282 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3283 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3284 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3285 break;
3286
3287 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3288 channels->min = channels->max =
3289 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3290 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3291 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3292 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3293 break;
3294
3295 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3296 channels->min = channels->max =
3297 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3298 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3299 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3300 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3301 break;
3302
3303 case MSM_BACKEND_DAI_AUXPCM_RX:
3304 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3305 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3306 rate->min = rate->max =
3307 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3308 channels->min = channels->max =
3309 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3310 break;
3311
3312 case MSM_BACKEND_DAI_AUXPCM_TX:
3313 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3314 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3315 rate->min = rate->max =
3316 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3317 channels->min = channels->max =
3318 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3319 break;
3320
3321 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3322 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3323 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3324 rate->min = rate->max =
3325 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3326 channels->min = channels->max =
3327 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3328 break;
3329
3330 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3331 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3332 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3333 rate->min = rate->max =
3334 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3335 channels->min = channels->max =
3336 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3337 break;
3338
3339 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3340 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3341 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3342 rate->min = rate->max =
3343 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3344 channels->min = channels->max =
3345 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3346 break;
3347
3348 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3349 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3350 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3351 rate->min = rate->max =
3352 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3353 channels->min = channels->max =
3354 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3355 break;
3356
3357 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3358 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3359 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3360 rate->min = rate->max =
3361 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3362 channels->min = channels->max =
3363 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3364 break;
3365
3366 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3367 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3368 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3369 rate->min = rate->max =
3370 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3371 channels->min = channels->max =
3372 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3373 break;
3374
3375 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3376 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3377 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3378 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3379 channels->min = channels->max =
3380 mi2s_rx_cfg[PRIM_MI2S].channels;
3381 break;
3382
3383 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3384 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3385 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3386 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3387 channels->min = channels->max =
3388 mi2s_tx_cfg[PRIM_MI2S].channels;
3389 break;
3390
3391 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3392 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3393 mi2s_rx_cfg[SEC_MI2S].bit_format);
3394 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
3395 channels->min = channels->max =
3396 mi2s_rx_cfg[SEC_MI2S].channels;
3397 break;
3398
3399 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
3400 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3401 mi2s_tx_cfg[SEC_MI2S].bit_format);
3402 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
3403 channels->min = channels->max =
3404 mi2s_tx_cfg[SEC_MI2S].channels;
3405 break;
3406
3407 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
3408 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3409 mi2s_rx_cfg[TERT_MI2S].bit_format);
3410 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
3411 channels->min = channels->max =
3412 mi2s_rx_cfg[TERT_MI2S].channels;
3413 break;
3414
3415 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
3416 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3417 mi2s_tx_cfg[TERT_MI2S].bit_format);
3418 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
3419 channels->min = channels->max =
3420 mi2s_tx_cfg[TERT_MI2S].channels;
3421 break;
3422
3423 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
3424 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3425 mi2s_rx_cfg[QUAT_MI2S].bit_format);
3426 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
3427 channels->min = channels->max =
3428 mi2s_rx_cfg[QUAT_MI2S].channels;
3429 break;
3430
3431 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
3432 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3433 mi2s_tx_cfg[QUAT_MI2S].bit_format);
3434 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
3435 channels->min = channels->max =
3436 mi2s_tx_cfg[QUAT_MI2S].channels;
3437 break;
3438
3439 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3440 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3441 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3442 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3443 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3444 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3445 cdc_dma_rx_cfg[idx].bit_format);
3446 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
3447 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
3448 break;
3449
3450 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3451 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3452 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3453 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3454 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3455 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3456 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3457 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3458 cdc_dma_tx_cfg[idx].bit_format);
3459 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
3460 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
3461 break;
3462
3463 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
3464 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3465 slim_rx_cfg[SLIM_RX_7].bit_format);
3466 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
3467 channels->min = channels->max =
3468 slim_rx_cfg[SLIM_RX_7].channels;
3469 break;
3470
3471 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
Prasad Kumpatlaee5d0372019-12-06 16:08:14 +0530[diff] [blame]3472 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3473 slim_tx_cfg[SLIM_TX_7].bit_format);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3474 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
3475 channels->min = channels->max =
3476 slim_tx_cfg[SLIM_TX_7].channels;
3477 break;
3478
3479 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
3480 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
3481 channels->min = channels->max =
3482 slim_tx_cfg[SLIM_TX_8].channels;
3483 break;
3484
3485 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
3486 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3487 afe_loopback_tx_cfg[idx].bit_format);
3488 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
3489 channels->min = channels->max =
3490 afe_loopback_tx_cfg[idx].channels;
3491 break;
3492
3493 default:
3494 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3495 break;
3496 }
3497
3498 return 0;
3499}
3500
3501static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component,
3502 bool active)
3503{
3504 struct snd_soc_card *card = component->card;
3505 struct msm_asoc_mach_data *pdata =
3506 snd_soc_card_get_drvdata(card);
3507
3508 if (!pdata->fsa_handle)
3509 return false;
3510
3511 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
3512}
3513
3514static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
3515{
3516 int value = 0;
3517 bool ret = false;
3518 struct snd_soc_card *card;
3519 struct msm_asoc_mach_data *pdata;
3520
3521 if (!component) {
3522 pr_err("%s component is NULL\n", __func__);
3523 return false;
3524 }
3525 card = component->card;
3526 pdata = snd_soc_card_get_drvdata(card);
3527
3528 if (!pdata)
3529 return false;
3530
3531 if (wcd_mbhc_cfg.enable_usbc_analog)
3532 return msm_usbc_swap_gnd_mic(component, active);
3533
3534 /* if usbc is not defined, swap using us_euro_gpio_p */
3535 if (pdata->us_euro_gpio_p) {
3536 value = msm_cdc_pinctrl_get_state(
3537 pdata->us_euro_gpio_p);
3538 if (value)
3539 msm_cdc_pinctrl_select_sleep_state(
3540 pdata->us_euro_gpio_p);
3541 else
3542 msm_cdc_pinctrl_select_active_state(
3543 pdata->us_euro_gpio_p);
3544 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
3545 __func__, value, !value);
3546 ret = true;
3547 }
3548
3549 return ret;
3550}
3551
3552static int bengal_tdm_snd_hw_params(struct snd_pcm_substream *substream,
3553 struct snd_pcm_hw_params *params)
3554{
3555 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3556 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3557 int ret = 0;
3558 int slot_width = 32;
3559 int channels, slots;
3560 unsigned int slot_mask, rate, clk_freq;
3561 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
3562
3563 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
3564
3565 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
3566 switch (cpu_dai->id) {
3567 case AFE_PORT_ID_PRIMARY_TDM_RX:
3568 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3569 break;
3570 case AFE_PORT_ID_SECONDARY_TDM_RX:
3571 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3572 break;
3573 case AFE_PORT_ID_TERTIARY_TDM_RX:
3574 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3575 break;
3576 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3577 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3578 break;
3579 case AFE_PORT_ID_PRIMARY_TDM_TX:
3580 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3581 break;
3582 case AFE_PORT_ID_SECONDARY_TDM_TX:
3583 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3584 break;
3585 case AFE_PORT_ID_TERTIARY_TDM_TX:
3586 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3587 break;
3588 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3589 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3590 break;
3591
3592 default:
3593 pr_err("%s: dai id 0x%x not supported\n",
3594 __func__, cpu_dai->id);
3595 return -EINVAL;
3596 }
3597
3598 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3599 /*2 slot config - bits 0 and 1 set for the first two slots */
3600 slot_mask = 0x0000FFFF >> (16 - slots);
3601 channels = slots;
3602
3603 pr_debug("%s: tdm rx slot_width %d slots %d\n",
3604 __func__, slot_width, slots);
3605
3606 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
3607 slots, slot_width);
3608 if (ret < 0) {
3609 pr_err("%s: failed to set tdm rx slot, err:%d\n",
3610 __func__, ret);
3611 goto end;
3612 }
3613
3614 ret = snd_soc_dai_set_channel_map(cpu_dai,
3615 0, NULL, channels, slot_offset);
3616 if (ret < 0) {
3617 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
3618 __func__, ret);
3619 goto end;
3620 }
3621 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
3622 /*2 slot config - bits 0 and 1 set for the first two slots */
3623 slot_mask = 0x0000FFFF >> (16 - slots);
3624 channels = slots;
3625
3626 pr_debug("%s: tdm tx slot_width %d slots %d\n",
3627 __func__, slot_width, slots);
3628
3629 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
3630 slots, slot_width);
3631 if (ret < 0) {
3632 pr_err("%s: failed to set tdm tx slot, err:%d\n",
3633 __func__, ret);
3634 goto end;
3635 }
3636
3637 ret = snd_soc_dai_set_channel_map(cpu_dai,
3638 channels, slot_offset, 0, NULL);
3639 if (ret < 0) {
3640 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
3641 __func__, ret);
3642 goto end;
3643 }
3644 } else {
3645 ret = -EINVAL;
3646 pr_err("%s: invalid use case, err:%d\n",
3647 __func__, ret);
3648 goto end;
3649 }
3650
3651 rate = params_rate(params);
3652 clk_freq = rate * slot_width * slots;
3653 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
3654 if (ret < 0)
3655 pr_err("%s: failed to set tdm clk, err:%d\n",
3656 __func__, ret);
3657
3658end:
3659 return ret;
3660}
3661
3662static int msm_get_tdm_mode(u32 port_id)
3663{
3664 int tdm_mode;
3665
3666 switch (port_id) {
3667 case AFE_PORT_ID_PRIMARY_TDM_RX:
3668 case AFE_PORT_ID_PRIMARY_TDM_TX:
3669 tdm_mode = TDM_PRI;
3670 break;
3671 case AFE_PORT_ID_SECONDARY_TDM_RX:
3672 case AFE_PORT_ID_SECONDARY_TDM_TX:
3673 tdm_mode = TDM_SEC;
3674 break;
3675 case AFE_PORT_ID_TERTIARY_TDM_RX:
3676 case AFE_PORT_ID_TERTIARY_TDM_TX:
3677 tdm_mode = TDM_TERT;
3678 break;
3679 case AFE_PORT_ID_QUATERNARY_TDM_RX:
3680 case AFE_PORT_ID_QUATERNARY_TDM_TX:
3681 tdm_mode = TDM_QUAT;
3682 break;
3683 default:
3684 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
3685 tdm_mode = -EINVAL;
3686 }
3687 return tdm_mode;
3688}
3689
3690static int bengal_tdm_snd_startup(struct snd_pcm_substream *substream)
3691{
3692 int ret = 0;
3693 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3694 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3695 struct snd_soc_card *card = rtd->card;
3696 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3697 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3698
3699 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3700 ret = -EINVAL;
3701 pr_err("%s: Invalid TDM interface %d\n",
3702 __func__, ret);
3703 return ret;
3704 }
3705
3706 if (pdata->mi2s_gpio_p[tdm_mode]) {
3707 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3708 == 0) {
3709 ret = msm_cdc_pinctrl_select_active_state(
3710 pdata->mi2s_gpio_p[tdm_mode]);
3711 if (ret) {
3712 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
3713 __func__, ret);
3714 goto done;
3715 }
3716 }
3717 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3718 }
3719
3720done:
3721 return ret;
3722}
3723
3724static void bengal_tdm_snd_shutdown(struct snd_pcm_substream *substream)
3725{
3726 int ret = 0;
3727 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3728 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3729 struct snd_soc_card *card = rtd->card;
3730 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3731 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
3732
3733 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
3734 ret = -EINVAL;
3735 pr_err("%s: Invalid TDM interface %d\n",
3736 __func__, ret);
3737 return;
3738 }
3739
3740 if (pdata->mi2s_gpio_p[tdm_mode]) {
3741 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
3742 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
3743 == 0) {
3744 ret = msm_cdc_pinctrl_select_sleep_state(
3745 pdata->mi2s_gpio_p[tdm_mode]);
3746 if (ret)
3747 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
3748 __func__, ret);
3749 }
3750 }
3751}
3752
3753static int bengal_aux_snd_startup(struct snd_pcm_substream *substream)
3754{
3755 int ret = 0;
3756 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3757 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3758 struct snd_soc_card *card = rtd->card;
3759 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3760 u32 aux_mode = cpu_dai->id - 1;
3761
3762 if (aux_mode >= AUX_PCM_MAX) {
3763 ret = -EINVAL;
3764 pr_err("%s: Invalid AUX interface %d\n",
3765 __func__, ret);
3766 return ret;
3767 }
3768
3769 if (pdata->mi2s_gpio_p[aux_mode]) {
3770 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3771 == 0) {
3772 ret = msm_cdc_pinctrl_select_active_state(
3773 pdata->mi2s_gpio_p[aux_mode]);
3774 if (ret) {
3775 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
3776 __func__, ret);
3777 goto done;
3778 }
3779 }
3780 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3781 }
3782
3783done:
3784 return ret;
3785}
3786
3787static void bengal_aux_snd_shutdown(struct snd_pcm_substream *substream)
3788{
3789 int ret = 0;
3790 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3791 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3792 struct snd_soc_card *card = rtd->card;
3793 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3794 u32 aux_mode = cpu_dai->id - 1;
3795
3796 if (aux_mode >= AUX_PCM_MAX) {
3797 pr_err("%s: Invalid AUX interface %d\n",
3798 __func__, ret);
3799 return;
3800 }
3801
3802 if (pdata->mi2s_gpio_p[aux_mode]) {
3803 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
3804 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
3805 == 0) {
3806 ret = msm_cdc_pinctrl_select_sleep_state(
3807 pdata->mi2s_gpio_p[aux_mode]);
3808 if (ret)
3809 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
3810 __func__, ret);
3811 }
3812 }
3813}
3814
3815static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
3816{
3817 int ret = 0;
3818 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3819 struct snd_soc_dai_link *dai_link = rtd->dai_link;
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3820 struct snd_soc_card *card = rtd->card;
3821 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3822
3823 switch (dai_link->id) {
3824 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3825 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3826 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]3827 if (pdata->va_disable) {
3828 pr_debug("%s: SVA not supported\n", __func__);
3829 return -EINVAL;
3830 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]3831 ret = bengal_send_island_va_config(dai_link->id);
3832 if (ret)
3833 pr_err("%s: send island va cfg failed, err: %d\n",
3834 __func__, ret);
3835 break;
3836 }
3837
3838 return ret;
3839}
3840
3841static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
3842 struct snd_pcm_hw_params *params)
3843{
3844 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3845 struct snd_soc_dai *codec_dai = rtd->codec_dai;
3846 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3847 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3848
3849 int ret = 0;
3850 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
3851 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
3852 u32 user_set_tx_ch = 0;
3853 u32 user_set_rx_ch = 0;
3854 u32 ch_id;
3855
3856 ret = snd_soc_dai_get_channel_map(codec_dai,
3857 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
3858 &rx_ch_cdc_dma);
3859 if (ret < 0) {
3860 pr_err("%s: failed to get codec chan map, err:%d\n",
3861 __func__, ret);
3862 goto err;
3863 }
3864
3865 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3866 switch (dai_link->id) {
3867 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3868 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3869 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3870 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3871 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
3872 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3873 {
3874 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3875 pr_debug("%s: id %d rx_ch=%d\n", __func__,
3876 ch_id, cdc_dma_rx_cfg[ch_id].channels);
3877 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
3878 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
3879 user_set_rx_ch, &rx_ch_cdc_dma);
3880 if (ret < 0) {
3881 pr_err("%s: failed to set cpu chan map, err:%d\n",
3882 __func__, ret);
3883 goto err;
3884 }
3885
3886 }
3887 break;
3888 }
3889 } else {
3890 switch (dai_link->id) {
3891 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3892 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3893 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3894 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3895 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3896 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3897 {
3898 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
3899 pr_debug("%s: id %d tx_ch=%d\n", __func__,
3900 ch_id, cdc_dma_tx_cfg[ch_id].channels);
3901 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
3902 }
3903 break;
3904 }
3905
3906 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
3907 &tx_ch_cdc_dma, 0, 0);
3908 if (ret < 0) {
3909 pr_err("%s: failed to set cpu chan map, err:%d\n",
3910 __func__, ret);
3911 goto err;
3912 }
3913 }
3914
3915err:
3916 return ret;
3917}
3918
3919static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
3920{
3921 cpumask_t mask;
3922
3923 if (pm_qos_request_active(&substream->latency_pm_qos_req))
3924 pm_qos_remove_request(&substream->latency_pm_qos_req);
3925
3926 cpumask_clear(&mask);
3927 cpumask_set_cpu(1, &mask); /* affine to core 1 */
3928 cpumask_set_cpu(2, &mask); /* affine to core 2 */
3929 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
3930
3931 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
3932
3933 pm_qos_add_request(&substream->latency_pm_qos_req,
3934 PM_QOS_CPU_DMA_LATENCY,
3935 MSM_LL_QOS_VALUE);
3936 return 0;
3937}
3938
3939static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
3940{
3941 int ret = 0;
3942 struct snd_soc_pcm_runtime *rtd = substream->private_data;
3943 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
3944 int index = cpu_dai->id;
3945 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
3946 struct snd_soc_card *card = rtd->card;
3947 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
3948
3949 dev_dbg(rtd->card->dev,
3950 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
3951 __func__, substream->name, substream->stream,
3952 cpu_dai->name, cpu_dai->id);
3953
3954 if (index < PRIM_MI2S || index >= MI2S_MAX) {
3955 ret = -EINVAL;
3956 dev_err(rtd->card->dev,
3957 "%s: CPU DAI id (%d) out of range\n",
3958 __func__, cpu_dai->id);
3959 goto err;
3960 }
3961 /*
3962 * Mutex protection in case the same MI2S
3963 * interface using for both TX and RX so
3964 * that the same clock won't be enable twice.
3965 */
3966 mutex_lock(&mi2s_intf_conf[index].lock);
3967 if (++mi2s_intf_conf[index].ref_cnt == 1) {
3968 /* Check if msm needs to provide the clock to the interface */
3969 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
3970 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
3971 fmt = SND_SOC_DAIFMT_CBM_CFM;
3972 }
3973 ret = msm_mi2s_set_sclk(substream, true);
3974 if (ret < 0) {
3975 dev_err(rtd->card->dev,
3976 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
3977 __func__, ret);
3978 goto clean_up;
3979 }
3980
3981 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
3982 if (ret < 0) {
3983 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
3984 __func__, index, ret);
3985 goto clk_off;
3986 }
3987 if (pdata->mi2s_gpio_p[index]) {
3988 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
3989 == 0) {
3990 ret = msm_cdc_pinctrl_select_active_state(
3991 pdata->mi2s_gpio_p[index]);
3992 if (ret) {
3993 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
3994 __func__, ret);
3995 goto clk_off;
3996 }
3997 }
3998 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
3999 }
4000 }
4001clk_off:
4002 if (ret < 0)
4003 msm_mi2s_set_sclk(substream, false);
4004clean_up:
4005 if (ret < 0)
4006 mi2s_intf_conf[index].ref_cnt--;
4007 mutex_unlock(&mi2s_intf_conf[index].lock);
4008err:
4009 return ret;
4010}
4011
4012static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4013{
4014 int ret = 0;
4015 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4016 int index = rtd->cpu_dai->id;
4017 struct snd_soc_card *card = rtd->card;
4018 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4019
4020 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4021 substream->name, substream->stream);
4022 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4023 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4024 return;
4025 }
4026
4027 mutex_lock(&mi2s_intf_conf[index].lock);
4028 if (--mi2s_intf_conf[index].ref_cnt == 0) {
4029 if (pdata->mi2s_gpio_p[index]) {
4030 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4031 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4032 == 0) {
4033 ret = msm_cdc_pinctrl_select_sleep_state(
4034 pdata->mi2s_gpio_p[index]);
4035 if (ret)
4036 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4037 __func__, ret);
4038 }
4039 }
4040
4041 ret = msm_mi2s_set_sclk(substream, false);
4042 if (ret < 0)
4043 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4044 __func__, index, ret);
4045 }
4046 mutex_unlock(&mi2s_intf_conf[index].lock);
4047}
4048
4049static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4050 struct snd_pcm_hw_params *params)
4051{
4052 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4053 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4054 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4055 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4056 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4057 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4058 int ret = 0;
4059
4060 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4061 codec_dai->name, codec_dai->id);
4062 ret = snd_soc_dai_get_channel_map(codec_dai,
4063 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4064 if (ret) {
4065 dev_err(rtd->dev,
4066 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4067 __func__, ret);
4068 goto err;
4069 }
4070
4071 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4072 __func__, tx_ch_cnt, dai_link->id);
4073
4074 ret = snd_soc_dai_set_channel_map(cpu_dai,
4075 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4076 if (ret)
4077 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4078 __func__, ret);
4079
4080err:
4081 return ret;
4082}
4083
4084static struct snd_soc_ops bengal_aux_be_ops = {
4085 .startup = bengal_aux_snd_startup,
4086 .shutdown = bengal_aux_snd_shutdown
4087};
4088
4089static struct snd_soc_ops bengal_tdm_be_ops = {
4090 .hw_params = bengal_tdm_snd_hw_params,
4091 .startup = bengal_tdm_snd_startup,
4092 .shutdown = bengal_tdm_snd_shutdown
4093};
4094
4095static struct snd_soc_ops msm_mi2s_be_ops = {
4096 .startup = msm_mi2s_snd_startup,
4097 .shutdown = msm_mi2s_snd_shutdown,
4098};
4099
4100static struct snd_soc_ops msm_fe_qos_ops = {
4101 .prepare = msm_fe_qos_prepare,
4102};
4103
4104static struct snd_soc_ops msm_cdc_dma_be_ops = {
4105 .startup = msm_snd_cdc_dma_startup,
4106 .hw_params = msm_snd_cdc_dma_hw_params,
4107};
4108
4109static struct snd_soc_ops msm_wcn_ops = {
4110 .hw_params = msm_wcn_hw_params,
4111};
4112
4113static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4114 struct snd_kcontrol *kcontrol, int event)
4115{
4116 struct msm_asoc_mach_data *pdata = NULL;
4117 struct snd_soc_component *component =
4118 snd_soc_dapm_to_component(w->dapm);
4119 int ret = 0;
4120 u32 dmic_idx;
4121 int *dmic_gpio_cnt;
4122 struct device_node *dmic_gpio;
4123 char *wname;
4124
4125 wname = strpbrk(w->name, "0123");
4126 if (!wname) {
4127 dev_err(component->dev, "%s: widget not found\n", __func__);
4128 return -EINVAL;
4129 }
4130
4131 ret = kstrtouint(wname, 10, &dmic_idx);
4132 if (ret < 0) {
4133 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4134 __func__);
4135 return -EINVAL;
4136 }
4137
4138 pdata = snd_soc_card_get_drvdata(component->card);
4139
4140 switch (dmic_idx) {
4141 case 0:
4142 case 1:
4143 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4144 dmic_gpio = pdata->dmic01_gpio_p;
4145 break;
4146 case 2:
4147 case 3:
4148 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4149 dmic_gpio = pdata->dmic23_gpio_p;
4150 break;
4151 default:
4152 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4153 __func__);
4154 return -EINVAL;
4155 }
4156
4157 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4158 __func__, event, dmic_idx, *dmic_gpio_cnt);
4159
4160 switch (event) {
4161 case SND_SOC_DAPM_PRE_PMU:
4162 (*dmic_gpio_cnt)++;
4163 if (*dmic_gpio_cnt == 1) {
4164 ret = msm_cdc_pinctrl_select_active_state(
4165 dmic_gpio);
4166 if (ret < 0) {
4167 pr_err("%s: gpio set cannot be activated %sd",
4168 __func__, "dmic_gpio");
4169 return ret;
4170 }
4171 }
4172
4173 break;
4174 case SND_SOC_DAPM_POST_PMD:
4175 (*dmic_gpio_cnt)--;
4176 if (*dmic_gpio_cnt == 0) {
4177 ret = msm_cdc_pinctrl_select_sleep_state(
4178 dmic_gpio);
4179 if (ret < 0) {
4180 pr_err("%s: gpio set cannot be de-activated %sd",
4181 __func__, "dmic_gpio");
4182 return ret;
4183 }
4184 }
4185 break;
4186 default:
4187 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4188 return -EINVAL;
4189 }
4190 return 0;
4191}
4192
4193static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4194 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4195 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4196 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4197 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
4198 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4199 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4200 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4201 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4202};
4203
4204static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4205{
4206 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4207 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
4208 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4209
4210 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4211 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4212}
4213
4214static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4215{
4216 int ret = -EINVAL;
4217 struct snd_soc_component *component;
4218 struct snd_soc_dapm_context *dapm;
4219 struct snd_card *card;
4220 struct snd_info_entry *entry;
4221 struct msm_asoc_mach_data *pdata =
4222 snd_soc_card_get_drvdata(rtd->card);
4223
4224 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4225 if (!component) {
4226 pr_err("%s: could not find component for bolero_codec\n",
4227 __func__);
4228 return ret;
4229 }
4230
4231 dapm = snd_soc_component_get_dapm(component);
4232
4233 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4234 ARRAY_SIZE(msm_int_snd_controls));
4235 if (ret < 0) {
4236 pr_err("%s: add_component_controls failed: %d\n",
4237 __func__, ret);
4238 return ret;
4239 }
4240 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4241 ARRAY_SIZE(msm_common_snd_controls));
4242 if (ret < 0) {
4243 pr_err("%s: add common snd controls failed: %d\n",
4244 __func__, ret);
4245 return ret;
4246 }
4247
4248 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4249 ARRAY_SIZE(msm_int_dapm_widgets));
4250
4251 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4252 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4253 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4254 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
4255
4256 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4257 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4258 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4259 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
4260
4261 snd_soc_dapm_sync(dapm);
4262
4263 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
4264 sm_port_map);
4265 card = rtd->card->snd_card;
4266 if (!pdata->codec_root) {
4267 entry = snd_info_create_subdir(card->module, "codecs",
4268 card->proc_root);
4269 if (!entry) {
4270 pr_debug("%s: Cannot create codecs module entry\n",
4271 __func__);
4272 ret = 0;
4273 goto err;
4274 }
4275 pdata->codec_root = entry;
4276 }
4277 bolero_info_create_codec_entry(pdata->codec_root, component);
4278 bolero_register_wake_irq(component, false);
4279 codec_reg_done = true;
4280 return 0;
4281err:
4282 return ret;
4283}
4284
4285static void *def_wcd_mbhc_cal(void)
4286{
4287 void *wcd_mbhc_cal;
4288 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
4289 u16 *btn_high;
4290
4291 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
4292 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
4293 if (!wcd_mbhc_cal)
4294 return NULL;
4295
4296 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
4297 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
4298 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
4299 btn_high = ((void *)&btn_cfg->_v_btn_low) +
4300 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
4301
4302 btn_high[0] = 75;
4303 btn_high[1] = 150;
4304 btn_high[2] = 237;
4305 btn_high[3] = 500;
4306 btn_high[4] = 500;
4307 btn_high[5] = 500;
4308 btn_high[6] = 500;
4309 btn_high[7] = 500;
4310
4311 return wcd_mbhc_cal;
4312}
4313
4314/* Digital audio interface glue - connects codec <---> CPU */
4315static struct snd_soc_dai_link msm_common_dai_links[] = {
4316 /* FrontEnd DAI Links */
4317 {/* hw:x,0 */
4318 .name = MSM_DAILINK_NAME(Media1),
4319 .stream_name = "MultiMedia1",
4320 .cpu_dai_name = "MultiMedia1",
4321 .platform_name = "msm-pcm-dsp.0",
4322 .dynamic = 1,
4323 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4324 .dpcm_playback = 1,
4325 .dpcm_capture = 1,
4326 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4327 SND_SOC_DPCM_TRIGGER_POST},
4328 .codec_dai_name = "snd-soc-dummy-dai",
4329 .codec_name = "snd-soc-dummy",
4330 .ignore_suspend = 1,
4331 /* this dainlink has playback support */
4332 .ignore_pmdown_time = 1,
4333 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
4334 },
4335 {/* hw:x,1 */
4336 .name = MSM_DAILINK_NAME(Media2),
4337 .stream_name = "MultiMedia2",
4338 .cpu_dai_name = "MultiMedia2",
4339 .platform_name = "msm-pcm-dsp.0",
4340 .dynamic = 1,
4341 .dpcm_playback = 1,
4342 .dpcm_capture = 1,
4343 .codec_dai_name = "snd-soc-dummy-dai",
4344 .codec_name = "snd-soc-dummy",
4345 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4346 SND_SOC_DPCM_TRIGGER_POST},
4347 .ignore_suspend = 1,
4348 /* this dainlink has playback support */
4349 .ignore_pmdown_time = 1,
4350 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
4351 },
4352 {/* hw:x,2 */
4353 .name = "VoiceMMode1",
4354 .stream_name = "VoiceMMode1",
4355 .cpu_dai_name = "VoiceMMode1",
4356 .platform_name = "msm-pcm-voice",
4357 .dynamic = 1,
4358 .dpcm_playback = 1,
4359 .dpcm_capture = 1,
4360 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4361 SND_SOC_DPCM_TRIGGER_POST},
4362 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4363 .ignore_suspend = 1,
4364 .ignore_pmdown_time = 1,
4365 .codec_dai_name = "snd-soc-dummy-dai",
4366 .codec_name = "snd-soc-dummy",
4367 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
4368 },
4369 {/* hw:x,3 */
4370 .name = "MSM VoIP",
4371 .stream_name = "VoIP",
4372 .cpu_dai_name = "VoIP",
4373 .platform_name = "msm-voip-dsp",
4374 .dynamic = 1,
4375 .dpcm_playback = 1,
4376 .dpcm_capture = 1,
4377 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4378 SND_SOC_DPCM_TRIGGER_POST},
4379 .codec_dai_name = "snd-soc-dummy-dai",
4380 .codec_name = "snd-soc-dummy",
4381 .ignore_suspend = 1,
4382 /* this dainlink has playback support */
4383 .ignore_pmdown_time = 1,
4384 .id = MSM_FRONTEND_DAI_VOIP,
4385 },
4386 {/* hw:x,4 */
4387 .name = MSM_DAILINK_NAME(ULL),
4388 .stream_name = "MultiMedia3",
4389 .cpu_dai_name = "MultiMedia3",
4390 .platform_name = "msm-pcm-dsp.2",
4391 .dynamic = 1,
4392 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4393 .dpcm_playback = 1,
4394 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4395 SND_SOC_DPCM_TRIGGER_POST},
4396 .codec_dai_name = "snd-soc-dummy-dai",
4397 .codec_name = "snd-soc-dummy",
4398 .ignore_suspend = 1,
4399 /* this dainlink has playback support */
4400 .ignore_pmdown_time = 1,
4401 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
4402 },
4403 {/* hw:x,5 */
4404 .name = "MSM AFE-PCM RX",
4405 .stream_name = "AFE-PROXY RX",
4406 .cpu_dai_name = "msm-dai-q6-dev.241",
4407 .codec_name = "msm-stub-codec.1",
4408 .codec_dai_name = "msm-stub-rx",
4409 .platform_name = "msm-pcm-afe",
4410 .dpcm_playback = 1,
4411 .ignore_suspend = 1,
4412 /* this dainlink has playback support */
4413 .ignore_pmdown_time = 1,
4414 },
4415 {/* hw:x,6 */
4416 .name = "MSM AFE-PCM TX",
4417 .stream_name = "AFE-PROXY TX",
4418 .cpu_dai_name = "msm-dai-q6-dev.240",
4419 .codec_name = "msm-stub-codec.1",
4420 .codec_dai_name = "msm-stub-tx",
4421 .platform_name = "msm-pcm-afe",
4422 .dpcm_capture = 1,
4423 .ignore_suspend = 1,
4424 },
4425 {/* hw:x,7 */
4426 .name = MSM_DAILINK_NAME(Compress1),
4427 .stream_name = "Compress1",
4428 .cpu_dai_name = "MultiMedia4",
4429 .platform_name = "msm-compress-dsp",
4430 .dynamic = 1,
4431 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
4432 .dpcm_playback = 1,
4433 .dpcm_capture = 1,
4434 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4435 SND_SOC_DPCM_TRIGGER_POST},
4436 .codec_dai_name = "snd-soc-dummy-dai",
4437 .codec_name = "snd-soc-dummy",
4438 .ignore_suspend = 1,
4439 .ignore_pmdown_time = 1,
4440 /* this dainlink has playback support */
4441 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
4442 },
4443 /* Hostless PCM purpose */
4444 {/* hw:x,8 */
4445 .name = "AUXPCM Hostless",
4446 .stream_name = "AUXPCM Hostless",
4447 .cpu_dai_name = "AUXPCM_HOSTLESS",
4448 .platform_name = "msm-pcm-hostless",
4449 .dynamic = 1,
4450 .dpcm_playback = 1,
4451 .dpcm_capture = 1,
4452 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4453 SND_SOC_DPCM_TRIGGER_POST},
4454 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4455 .ignore_suspend = 1,
4456 /* this dainlink has playback support */
4457 .ignore_pmdown_time = 1,
4458 .codec_dai_name = "snd-soc-dummy-dai",
4459 .codec_name = "snd-soc-dummy",
4460 },
4461 {/* hw:x,9 */
4462 .name = MSM_DAILINK_NAME(LowLatency),
4463 .stream_name = "MultiMedia5",
4464 .cpu_dai_name = "MultiMedia5",
4465 .platform_name = "msm-pcm-dsp.1",
4466 .dynamic = 1,
4467 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
4468 .dpcm_playback = 1,
4469 .dpcm_capture = 1,
4470 .codec_dai_name = "snd-soc-dummy-dai",
4471 .codec_name = "snd-soc-dummy",
4472 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4473 SND_SOC_DPCM_TRIGGER_POST},
4474 .ignore_suspend = 1,
4475 /* this dainlink has playback support */
4476 .ignore_pmdown_time = 1,
4477 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
4478 .ops = &msm_fe_qos_ops,
4479 },
4480 {/* hw:x,10 */
4481 .name = "Listen 1 Audio Service",
4482 .stream_name = "Listen 1 Audio Service",
4483 .cpu_dai_name = "LSM1",
4484 .platform_name = "msm-lsm-client",
4485 .dynamic = 1,
4486 .dpcm_capture = 1,
4487 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4488 SND_SOC_DPCM_TRIGGER_POST },
4489 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4490 .ignore_suspend = 1,
4491 .codec_dai_name = "snd-soc-dummy-dai",
4492 .codec_name = "snd-soc-dummy",
4493 .id = MSM_FRONTEND_DAI_LSM1,
4494 },
4495 /* Multiple Tunnel instances */
4496 {/* hw:x,11 */
4497 .name = MSM_DAILINK_NAME(Compress2),
4498 .stream_name = "Compress2",
4499 .cpu_dai_name = "MultiMedia7",
4500 .platform_name = "msm-compress-dsp",
4501 .dynamic = 1,
4502 .dpcm_playback = 1,
4503 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4504 SND_SOC_DPCM_TRIGGER_POST},
4505 .codec_dai_name = "snd-soc-dummy-dai",
4506 .codec_name = "snd-soc-dummy",
4507 .ignore_suspend = 1,
4508 .ignore_pmdown_time = 1,
4509 /* this dainlink has playback support */
4510 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
4511 },
4512 {/* hw:x,12 */
4513 .name = MSM_DAILINK_NAME(MultiMedia10),
4514 .stream_name = "MultiMedia10",
4515 .cpu_dai_name = "MultiMedia10",
4516 .platform_name = "msm-pcm-dsp.1",
4517 .dynamic = 1,
4518 .dpcm_playback = 1,
4519 .dpcm_capture = 1,
4520 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4521 SND_SOC_DPCM_TRIGGER_POST},
4522 .codec_dai_name = "snd-soc-dummy-dai",
4523 .codec_name = "snd-soc-dummy",
4524 .ignore_suspend = 1,
4525 .ignore_pmdown_time = 1,
4526 /* this dainlink has playback support */
4527 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
4528 },
4529 {/* hw:x,13 */
4530 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
4531 .stream_name = "MM_NOIRQ",
4532 .cpu_dai_name = "MultiMedia8",
4533 .platform_name = "msm-pcm-dsp-noirq",
4534 .dynamic = 1,
4535 .dpcm_playback = 1,
4536 .dpcm_capture = 1,
4537 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4538 SND_SOC_DPCM_TRIGGER_POST},
4539 .codec_dai_name = "snd-soc-dummy-dai",
4540 .codec_name = "snd-soc-dummy",
4541 .ignore_suspend = 1,
4542 .ignore_pmdown_time = 1,
4543 /* this dainlink has playback support */
4544 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
4545 .ops = &msm_fe_qos_ops,
4546 },
4547 /* HDMI Hostless */
4548 {/* hw:x,14 */
4549 .name = "HDMI_RX_HOSTLESS",
4550 .stream_name = "HDMI_RX_HOSTLESS",
4551 .cpu_dai_name = "HDMI_HOSTLESS",
4552 .platform_name = "msm-pcm-hostless",
4553 .dynamic = 1,
4554 .dpcm_playback = 1,
4555 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4556 SND_SOC_DPCM_TRIGGER_POST},
4557 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4558 .ignore_suspend = 1,
4559 .ignore_pmdown_time = 1,
4560 .codec_dai_name = "snd-soc-dummy-dai",
4561 .codec_name = "snd-soc-dummy",
4562 },
4563 {/* hw:x,15 */
4564 .name = "VoiceMMode2",
4565 .stream_name = "VoiceMMode2",
4566 .cpu_dai_name = "VoiceMMode2",
4567 .platform_name = "msm-pcm-voice",
4568 .dynamic = 1,
4569 .dpcm_playback = 1,
4570 .dpcm_capture = 1,
4571 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4572 SND_SOC_DPCM_TRIGGER_POST},
4573 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4574 .ignore_suspend = 1,
4575 .ignore_pmdown_time = 1,
4576 .codec_dai_name = "snd-soc-dummy-dai",
4577 .codec_name = "snd-soc-dummy",
4578 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
4579 },
4580 /* LSM FE */
4581 {/* hw:x,16 */
4582 .name = "Listen 2 Audio Service",
4583 .stream_name = "Listen 2 Audio Service",
4584 .cpu_dai_name = "LSM2",
4585 .platform_name = "msm-lsm-client",
4586 .dynamic = 1,
4587 .dpcm_capture = 1,
4588 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4589 SND_SOC_DPCM_TRIGGER_POST },
4590 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4591 .ignore_suspend = 1,
4592 .codec_dai_name = "snd-soc-dummy-dai",
4593 .codec_name = "snd-soc-dummy",
4594 .id = MSM_FRONTEND_DAI_LSM2,
4595 },
4596 {/* hw:x,17 */
4597 .name = "Listen 3 Audio Service",
4598 .stream_name = "Listen 3 Audio Service",
4599 .cpu_dai_name = "LSM3",
4600 .platform_name = "msm-lsm-client",
4601 .dynamic = 1,
4602 .dpcm_capture = 1,
4603 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4604 SND_SOC_DPCM_TRIGGER_POST },
4605 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4606 .ignore_suspend = 1,
4607 .codec_dai_name = "snd-soc-dummy-dai",
4608 .codec_name = "snd-soc-dummy",
4609 .id = MSM_FRONTEND_DAI_LSM3,
4610 },
4611 {/* hw:x,18 */
4612 .name = "Listen 4 Audio Service",
4613 .stream_name = "Listen 4 Audio Service",
4614 .cpu_dai_name = "LSM4",
4615 .platform_name = "msm-lsm-client",
4616 .dynamic = 1,
4617 .dpcm_capture = 1,
4618 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4619 SND_SOC_DPCM_TRIGGER_POST },
4620 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4621 .ignore_suspend = 1,
4622 .codec_dai_name = "snd-soc-dummy-dai",
4623 .codec_name = "snd-soc-dummy",
4624 .id = MSM_FRONTEND_DAI_LSM4,
4625 },
4626 {/* hw:x,19 */
4627 .name = "Listen 5 Audio Service",
4628 .stream_name = "Listen 5 Audio Service",
4629 .cpu_dai_name = "LSM5",
4630 .platform_name = "msm-lsm-client",
4631 .dynamic = 1,
4632 .dpcm_capture = 1,
4633 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4634 SND_SOC_DPCM_TRIGGER_POST },
4635 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4636 .ignore_suspend = 1,
4637 .codec_dai_name = "snd-soc-dummy-dai",
4638 .codec_name = "snd-soc-dummy",
4639 .id = MSM_FRONTEND_DAI_LSM5,
4640 },
4641 {/* hw:x,20 */
4642 .name = "Listen 6 Audio Service",
4643 .stream_name = "Listen 6 Audio Service",
4644 .cpu_dai_name = "LSM6",
4645 .platform_name = "msm-lsm-client",
4646 .dynamic = 1,
4647 .dpcm_capture = 1,
4648 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4649 SND_SOC_DPCM_TRIGGER_POST },
4650 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4651 .ignore_suspend = 1,
4652 .codec_dai_name = "snd-soc-dummy-dai",
4653 .codec_name = "snd-soc-dummy",
4654 .id = MSM_FRONTEND_DAI_LSM6,
4655 },
4656 {/* hw:x,21 */
4657 .name = "Listen 7 Audio Service",
4658 .stream_name = "Listen 7 Audio Service",
4659 .cpu_dai_name = "LSM7",
4660 .platform_name = "msm-lsm-client",
4661 .dynamic = 1,
4662 .dpcm_capture = 1,
4663 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4664 SND_SOC_DPCM_TRIGGER_POST },
4665 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4666 .ignore_suspend = 1,
4667 .codec_dai_name = "snd-soc-dummy-dai",
4668 .codec_name = "snd-soc-dummy",
4669 .id = MSM_FRONTEND_DAI_LSM7,
4670 },
4671 {/* hw:x,22 */
4672 .name = "Listen 8 Audio Service",
4673 .stream_name = "Listen 8 Audio Service",
4674 .cpu_dai_name = "LSM8",
4675 .platform_name = "msm-lsm-client",
4676 .dynamic = 1,
4677 .dpcm_capture = 1,
4678 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
4679 SND_SOC_DPCM_TRIGGER_POST },
4680 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4681 .ignore_suspend = 1,
4682 .codec_dai_name = "snd-soc-dummy-dai",
4683 .codec_name = "snd-soc-dummy",
4684 .id = MSM_FRONTEND_DAI_LSM8,
4685 },
4686 {/* hw:x,23 */
4687 .name = MSM_DAILINK_NAME(Media9),
4688 .stream_name = "MultiMedia9",
4689 .cpu_dai_name = "MultiMedia9",
4690 .platform_name = "msm-pcm-dsp.0",
4691 .dynamic = 1,
4692 .dpcm_playback = 1,
4693 .dpcm_capture = 1,
4694 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4695 SND_SOC_DPCM_TRIGGER_POST},
4696 .codec_dai_name = "snd-soc-dummy-dai",
4697 .codec_name = "snd-soc-dummy",
4698 .ignore_suspend = 1,
4699 /* this dainlink has playback support */
4700 .ignore_pmdown_time = 1,
4701 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
4702 },
4703 {/* hw:x,24 */
4704 .name = MSM_DAILINK_NAME(Compress4),
4705 .stream_name = "Compress4",
4706 .cpu_dai_name = "MultiMedia11",
4707 .platform_name = "msm-compress-dsp",
4708 .dynamic = 1,
4709 .dpcm_playback = 1,
4710 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4711 SND_SOC_DPCM_TRIGGER_POST},
4712 .codec_dai_name = "snd-soc-dummy-dai",
4713 .codec_name = "snd-soc-dummy",
4714 .ignore_suspend = 1,
4715 .ignore_pmdown_time = 1,
4716 /* this dainlink has playback support */
4717 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
4718 },
4719 {/* hw:x,25 */
4720 .name = MSM_DAILINK_NAME(Compress5),
4721 .stream_name = "Compress5",
4722 .cpu_dai_name = "MultiMedia12",
4723 .platform_name = "msm-compress-dsp",
4724 .dynamic = 1,
4725 .dpcm_playback = 1,
4726 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4727 SND_SOC_DPCM_TRIGGER_POST},
4728 .codec_dai_name = "snd-soc-dummy-dai",
4729 .codec_name = "snd-soc-dummy",
4730 .ignore_suspend = 1,
4731 .ignore_pmdown_time = 1,
4732 /* this dainlink has playback support */
4733 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
4734 },
4735 {/* hw:x,26 */
4736 .name = MSM_DAILINK_NAME(Compress6),
4737 .stream_name = "Compress6",
4738 .cpu_dai_name = "MultiMedia13",
4739 .platform_name = "msm-compress-dsp",
4740 .dynamic = 1,
4741 .dpcm_playback = 1,
4742 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4743 SND_SOC_DPCM_TRIGGER_POST},
4744 .codec_dai_name = "snd-soc-dummy-dai",
4745 .codec_name = "snd-soc-dummy",
4746 .ignore_suspend = 1,
4747 .ignore_pmdown_time = 1,
4748 /* this dainlink has playback support */
4749 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
4750 },
4751 {/* hw:x,27 */
4752 .name = MSM_DAILINK_NAME(Compress7),
4753 .stream_name = "Compress7",
4754 .cpu_dai_name = "MultiMedia14",
4755 .platform_name = "msm-compress-dsp",
4756 .dynamic = 1,
4757 .dpcm_playback = 1,
4758 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4759 SND_SOC_DPCM_TRIGGER_POST},
4760 .codec_dai_name = "snd-soc-dummy-dai",
4761 .codec_name = "snd-soc-dummy",
4762 .ignore_suspend = 1,
4763 .ignore_pmdown_time = 1,
4764 /* this dainlink has playback support */
4765 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
4766 },
4767 {/* hw:x,28 */
4768 .name = MSM_DAILINK_NAME(Compress8),
4769 .stream_name = "Compress8",
4770 .cpu_dai_name = "MultiMedia15",
4771 .platform_name = "msm-compress-dsp",
4772 .dynamic = 1,
4773 .dpcm_playback = 1,
4774 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4775 SND_SOC_DPCM_TRIGGER_POST},
4776 .codec_dai_name = "snd-soc-dummy-dai",
4777 .codec_name = "snd-soc-dummy",
4778 .ignore_suspend = 1,
4779 .ignore_pmdown_time = 1,
4780 /* this dainlink has playback support */
4781 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
4782 },
4783 {/* hw:x,29 */
4784 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
4785 .stream_name = "MM_NOIRQ_2",
4786 .cpu_dai_name = "MultiMedia16",
4787 .platform_name = "msm-pcm-dsp-noirq",
4788 .dynamic = 1,
4789 .dpcm_playback = 1,
4790 .dpcm_capture = 1,
4791 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4792 SND_SOC_DPCM_TRIGGER_POST},
4793 .codec_dai_name = "snd-soc-dummy-dai",
4794 .codec_name = "snd-soc-dummy",
4795 .ignore_suspend = 1,
4796 .ignore_pmdown_time = 1,
4797 /* this dainlink has playback support */
4798 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
4799 .ops = &msm_fe_qos_ops,
4800 },
4801 {/* hw:x,30 */
4802 .name = "CDC_DMA Hostless",
4803 .stream_name = "CDC_DMA Hostless",
4804 .cpu_dai_name = "CDC_DMA_HOSTLESS",
4805 .platform_name = "msm-pcm-hostless",
4806 .dynamic = 1,
4807 .dpcm_playback = 1,
4808 .dpcm_capture = 1,
4809 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4810 SND_SOC_DPCM_TRIGGER_POST},
4811 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4812 .ignore_suspend = 1,
4813 /* this dailink has playback support */
4814 .ignore_pmdown_time = 1,
4815 .codec_dai_name = "snd-soc-dummy-dai",
4816 .codec_name = "snd-soc-dummy",
4817 },
4818 {/* hw:x,31 */
4819 .name = "TX3_CDC_DMA Hostless",
4820 .stream_name = "TX3_CDC_DMA Hostless",
4821 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
4822 .platform_name = "msm-pcm-hostless",
4823 .dynamic = 1,
4824 .dpcm_capture = 1,
4825 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4826 SND_SOC_DPCM_TRIGGER_POST},
4827 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4828 .ignore_suspend = 1,
4829 .codec_dai_name = "snd-soc-dummy-dai",
4830 .codec_name = "snd-soc-dummy",
4831 },
4832 {/* hw:x,32 */
4833 .name = "Tertiary MI2S TX_Hostless",
4834 .stream_name = "Tertiary MI2S_TX Hostless Capture",
4835 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
4836 .platform_name = "msm-pcm-hostless",
4837 .dynamic = 1,
4838 .dpcm_capture = 1,
4839 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4840 SND_SOC_DPCM_TRIGGER_POST},
4841 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4842 .ignore_suspend = 1,
4843 .ignore_pmdown_time = 1,
4844 .codec_dai_name = "snd-soc-dummy-dai",
4845 .codec_name = "snd-soc-dummy",
4846 },
4847};
4848
4849static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4850 {/* hw:x,33 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4851 .name = MSM_DAILINK_NAME(ASM Loopback),
4852 .stream_name = "MultiMedia6",
4853 .cpu_dai_name = "MultiMedia6",
4854 .platform_name = "msm-pcm-loopback",
4855 .dynamic = 1,
4856 .dpcm_playback = 1,
4857 .dpcm_capture = 1,
4858 .codec_dai_name = "snd-soc-dummy-dai",
4859 .codec_name = "snd-soc-dummy",
4860 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4861 SND_SOC_DPCM_TRIGGER_POST},
4862 .ignore_suspend = 1,
4863 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4864 .ignore_pmdown_time = 1,
4865 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
4866 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4867 {/* hw:x,34 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4868 .name = "USB Audio Hostless",
4869 .stream_name = "USB Audio Hostless",
4870 .cpu_dai_name = "USBAUDIO_HOSTLESS",
4871 .platform_name = "msm-pcm-hostless",
4872 .dynamic = 1,
4873 .dpcm_playback = 1,
4874 .dpcm_capture = 1,
4875 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4876 SND_SOC_DPCM_TRIGGER_POST},
4877 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4878 .ignore_suspend = 1,
4879 .ignore_pmdown_time = 1,
4880 .codec_dai_name = "snd-soc-dummy-dai",
4881 .codec_name = "snd-soc-dummy",
4882 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4883 {/* hw:x,35 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4884 .name = "SLIMBUS_7 Hostless",
4885 .stream_name = "SLIMBUS_7 Hostless",
4886 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
4887 .platform_name = "msm-pcm-hostless",
4888 .dynamic = 1,
4889 .dpcm_capture = 1,
4890 .dpcm_playback = 1,
4891 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4892 SND_SOC_DPCM_TRIGGER_POST},
4893 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4894 .ignore_suspend = 1,
4895 .ignore_pmdown_time = 1,
4896 .codec_dai_name = "snd-soc-dummy-dai",
4897 .codec_name = "snd-soc-dummy",
4898 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4899 {/* hw:x,36 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4900 .name = "Compress Capture",
4901 .stream_name = "Compress9",
4902 .cpu_dai_name = "MultiMedia17",
4903 .platform_name = "msm-compress-dsp",
4904 .dynamic = 1,
4905 .dpcm_capture = 1,
4906 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4907 SND_SOC_DPCM_TRIGGER_POST},
4908 .codec_dai_name = "snd-soc-dummy-dai",
4909 .codec_name = "snd-soc-dummy",
4910 .ignore_suspend = 1,
4911 .ignore_pmdown_time = 1,
4912 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
4913 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4914 {/* hw:x,37 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4915 .name = "SLIMBUS_8 Hostless",
4916 .stream_name = "SLIMBUS_8 Hostless",
4917 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
4918 .platform_name = "msm-pcm-hostless",
4919 .dynamic = 1,
4920 .dpcm_capture = 1,
4921 .dpcm_playback = 1,
4922 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
4923 SND_SOC_DPCM_TRIGGER_POST},
4924 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4925 .ignore_suspend = 1,
4926 .ignore_pmdown_time = 1,
4927 .codec_dai_name = "snd-soc-dummy-dai",
4928 .codec_name = "snd-soc-dummy",
4929 },
Laxminath Kasamc6974d02019-11-22 15:18:47 +0530[diff] [blame]4930 {/* hw:x,38 */
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]4931 .name = LPASS_BE_TX_CDC_DMA_TX_5,
4932 .stream_name = "TX CDC DMA5 Capture",
4933 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
4934 .platform_name = "msm-pcm-hostless",
4935 .codec_name = "bolero_codec",
4936 .codec_dai_name = "tx_macro_tx3",
4937 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
4938 .be_hw_params_fixup = msm_be_hw_params_fixup,
4939 .ignore_suspend = 1,
4940 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
4941 .ops = &msm_cdc_dma_be_ops,
4942 },
4943};
4944
4945static struct snd_soc_dai_link msm_common_be_dai_links[] = {
4946 /* Backend AFE DAI Links */
4947 {
4948 .name = LPASS_BE_AFE_PCM_RX,
4949 .stream_name = "AFE Playback",
4950 .cpu_dai_name = "msm-dai-q6-dev.224",
4951 .platform_name = "msm-pcm-routing",
4952 .codec_name = "msm-stub-codec.1",
4953 .codec_dai_name = "msm-stub-rx",
4954 .no_pcm = 1,
4955 .dpcm_playback = 1,
4956 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
4957 .be_hw_params_fixup = msm_be_hw_params_fixup,
4958 /* this dainlink has playback support */
4959 .ignore_pmdown_time = 1,
4960 .ignore_suspend = 1,
4961 },
4962 {
4963 .name = LPASS_BE_AFE_PCM_TX,
4964 .stream_name = "AFE Capture",
4965 .cpu_dai_name = "msm-dai-q6-dev.225",
4966 .platform_name = "msm-pcm-routing",
4967 .codec_name = "msm-stub-codec.1",
4968 .codec_dai_name = "msm-stub-tx",
4969 .no_pcm = 1,
4970 .dpcm_capture = 1,
4971 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
4972 .be_hw_params_fixup = msm_be_hw_params_fixup,
4973 .ignore_suspend = 1,
4974 },
4975 /* Incall Record Uplink BACK END DAI Link */
4976 {
4977 .name = LPASS_BE_INCALL_RECORD_TX,
4978 .stream_name = "Voice Uplink Capture",
4979 .cpu_dai_name = "msm-dai-q6-dev.32772",
4980 .platform_name = "msm-pcm-routing",
4981 .codec_name = "msm-stub-codec.1",
4982 .codec_dai_name = "msm-stub-tx",
4983 .no_pcm = 1,
4984 .dpcm_capture = 1,
4985 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
4986 .be_hw_params_fixup = msm_be_hw_params_fixup,
4987 .ignore_suspend = 1,
4988 },
4989 /* Incall Record Downlink BACK END DAI Link */
4990 {
4991 .name = LPASS_BE_INCALL_RECORD_RX,
4992 .stream_name = "Voice Downlink Capture",
4993 .cpu_dai_name = "msm-dai-q6-dev.32771",
4994 .platform_name = "msm-pcm-routing",
4995 .codec_name = "msm-stub-codec.1",
4996 .codec_dai_name = "msm-stub-tx",
4997 .no_pcm = 1,
4998 .dpcm_capture = 1,
4999 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5000 .be_hw_params_fixup = msm_be_hw_params_fixup,
5001 .ignore_suspend = 1,
5002 },
5003 /* Incall Music BACK END DAI Link */
5004 {
5005 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5006 .stream_name = "Voice Farend Playback",
5007 .cpu_dai_name = "msm-dai-q6-dev.32773",
5008 .platform_name = "msm-pcm-routing",
5009 .codec_name = "msm-stub-codec.1",
5010 .codec_dai_name = "msm-stub-rx",
5011 .no_pcm = 1,
5012 .dpcm_playback = 1,
5013 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5014 .be_hw_params_fixup = msm_be_hw_params_fixup,
5015 .ignore_suspend = 1,
5016 .ignore_pmdown_time = 1,
5017 },
5018 /* Incall Music 2 BACK END DAI Link */
5019 {
5020 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5021 .stream_name = "Voice2 Farend Playback",
5022 .cpu_dai_name = "msm-dai-q6-dev.32770",
5023 .platform_name = "msm-pcm-routing",
5024 .codec_name = "msm-stub-codec.1",
5025 .codec_dai_name = "msm-stub-rx",
5026 .no_pcm = 1,
5027 .dpcm_playback = 1,
5028 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5029 .be_hw_params_fixup = msm_be_hw_params_fixup,
5030 .ignore_suspend = 1,
5031 .ignore_pmdown_time = 1,
5032 },
5033 {
5034 .name = LPASS_BE_USB_AUDIO_RX,
5035 .stream_name = "USB Audio Playback",
5036 .cpu_dai_name = "msm-dai-q6-dev.28672",
5037 .platform_name = "msm-pcm-routing",
5038 .codec_name = "msm-stub-codec.1",
5039 .codec_dai_name = "msm-stub-rx",
5040 .dynamic_be = 1,
5041 .no_pcm = 1,
5042 .dpcm_playback = 1,
5043 .id = MSM_BACKEND_DAI_USB_RX,
5044 .be_hw_params_fixup = msm_be_hw_params_fixup,
5045 .ignore_pmdown_time = 1,
5046 .ignore_suspend = 1,
5047 },
5048 {
5049 .name = LPASS_BE_USB_AUDIO_TX,
5050 .stream_name = "USB Audio Capture",
5051 .cpu_dai_name = "msm-dai-q6-dev.28673",
5052 .platform_name = "msm-pcm-routing",
5053 .codec_name = "msm-stub-codec.1",
5054 .codec_dai_name = "msm-stub-tx",
5055 .no_pcm = 1,
5056 .dpcm_capture = 1,
5057 .id = MSM_BACKEND_DAI_USB_TX,
5058 .be_hw_params_fixup = msm_be_hw_params_fixup,
5059 .ignore_suspend = 1,
5060 },
5061 {
5062 .name = LPASS_BE_PRI_TDM_RX_0,
5063 .stream_name = "Primary TDM0 Playback",
5064 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5065 .platform_name = "msm-pcm-routing",
5066 .codec_name = "msm-stub-codec.1",
5067 .codec_dai_name = "msm-stub-rx",
5068 .no_pcm = 1,
5069 .dpcm_playback = 1,
5070 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5071 .be_hw_params_fixup = msm_be_hw_params_fixup,
5072 .ops = &bengal_tdm_be_ops,
5073 .ignore_suspend = 1,
5074 .ignore_pmdown_time = 1,
5075 },
5076 {
5077 .name = LPASS_BE_PRI_TDM_TX_0,
5078 .stream_name = "Primary TDM0 Capture",
5079 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5080 .platform_name = "msm-pcm-routing",
5081 .codec_name = "msm-stub-codec.1",
5082 .codec_dai_name = "msm-stub-tx",
5083 .no_pcm = 1,
5084 .dpcm_capture = 1,
5085 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5086 .be_hw_params_fixup = msm_be_hw_params_fixup,
5087 .ops = &bengal_tdm_be_ops,
5088 .ignore_suspend = 1,
5089 },
5090 {
5091 .name = LPASS_BE_SEC_TDM_RX_0,
5092 .stream_name = "Secondary TDM0 Playback",
5093 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5094 .platform_name = "msm-pcm-routing",
5095 .codec_name = "msm-stub-codec.1",
5096 .codec_dai_name = "msm-stub-rx",
5097 .no_pcm = 1,
5098 .dpcm_playback = 1,
5099 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5100 .be_hw_params_fixup = msm_be_hw_params_fixup,
5101 .ops = &bengal_tdm_be_ops,
5102 .ignore_suspend = 1,
5103 .ignore_pmdown_time = 1,
5104 },
5105 {
5106 .name = LPASS_BE_SEC_TDM_TX_0,
5107 .stream_name = "Secondary TDM0 Capture",
5108 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5109 .platform_name = "msm-pcm-routing",
5110 .codec_name = "msm-stub-codec.1",
5111 .codec_dai_name = "msm-stub-tx",
5112 .no_pcm = 1,
5113 .dpcm_capture = 1,
5114 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5115 .be_hw_params_fixup = msm_be_hw_params_fixup,
5116 .ops = &bengal_tdm_be_ops,
5117 .ignore_suspend = 1,
5118 },
5119 {
5120 .name = LPASS_BE_TERT_TDM_RX_0,
5121 .stream_name = "Tertiary TDM0 Playback",
5122 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5123 .platform_name = "msm-pcm-routing",
5124 .codec_name = "msm-stub-codec.1",
5125 .codec_dai_name = "msm-stub-rx",
5126 .no_pcm = 1,
5127 .dpcm_playback = 1,
5128 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5129 .be_hw_params_fixup = msm_be_hw_params_fixup,
5130 .ops = &bengal_tdm_be_ops,
5131 .ignore_suspend = 1,
5132 .ignore_pmdown_time = 1,
5133 },
5134 {
5135 .name = LPASS_BE_TERT_TDM_TX_0,
5136 .stream_name = "Tertiary TDM0 Capture",
5137 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5138 .platform_name = "msm-pcm-routing",
5139 .codec_name = "msm-stub-codec.1",
5140 .codec_dai_name = "msm-stub-tx",
5141 .no_pcm = 1,
5142 .dpcm_capture = 1,
5143 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5144 .be_hw_params_fixup = msm_be_hw_params_fixup,
5145 .ops = &bengal_tdm_be_ops,
5146 .ignore_suspend = 1,
5147 },
5148 {
5149 .name = LPASS_BE_QUAT_TDM_RX_0,
5150 .stream_name = "Quaternary TDM0 Playback",
5151 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5152 .platform_name = "msm-pcm-routing",
5153 .codec_name = "msm-stub-codec.1",
5154 .codec_dai_name = "msm-stub-rx",
5155 .no_pcm = 1,
5156 .dpcm_playback = 1,
5157 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5158 .be_hw_params_fixup = msm_be_hw_params_fixup,
5159 .ops = &bengal_tdm_be_ops,
5160 .ignore_suspend = 1,
5161 .ignore_pmdown_time = 1,
5162 },
5163 {
5164 .name = LPASS_BE_QUAT_TDM_TX_0,
5165 .stream_name = "Quaternary TDM0 Capture",
5166 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5167 .platform_name = "msm-pcm-routing",
5168 .codec_name = "msm-stub-codec.1",
5169 .codec_dai_name = "msm-stub-tx",
5170 .no_pcm = 1,
5171 .dpcm_capture = 1,
5172 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5173 .be_hw_params_fixup = msm_be_hw_params_fixup,
5174 .ops = &bengal_tdm_be_ops,
5175 .ignore_suspend = 1,
5176 },
5177};
5178
5179static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
5180 {
5181 .name = LPASS_BE_SLIMBUS_7_RX,
5182 .stream_name = "Slimbus7 Playback",
5183 .cpu_dai_name = "msm-dai-q6-dev.16398",
5184 .platform_name = "msm-pcm-routing",
5185 .codec_name = "btfmslim_slave",
5186 /* BT codec driver determines capabilities based on
5187 * dai name, bt codecdai name should always contains
5188 * supported usecase information
5189 */
5190 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
5191 .no_pcm = 1,
5192 .dpcm_playback = 1,
5193 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
5194 .be_hw_params_fixup = msm_be_hw_params_fixup,
5195 .init = &msm_wcn_init,
5196 .ops = &msm_wcn_ops,
5197 /* dai link has playback support */
5198 .ignore_pmdown_time = 1,
5199 .ignore_suspend = 1,
5200 },
5201 {
5202 .name = LPASS_BE_SLIMBUS_7_TX,
5203 .stream_name = "Slimbus7 Capture",
5204 .cpu_dai_name = "msm-dai-q6-dev.16399",
5205 .platform_name = "msm-pcm-routing",
5206 .codec_name = "btfmslim_slave",
5207 .codec_dai_name = "btfm_bt_sco_slim_tx",
5208 .no_pcm = 1,
5209 .dpcm_capture = 1,
5210 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
5211 .be_hw_params_fixup = msm_be_hw_params_fixup,
5212 .ops = &msm_wcn_ops,
5213 .ignore_suspend = 1,
5214 },
5215 {
5216 .name = LPASS_BE_SLIMBUS_8_TX,
5217 .stream_name = "Slimbus8 Capture",
5218 .cpu_dai_name = "msm-dai-q6-dev.16401",
5219 .platform_name = "msm-pcm-routing",
5220 .codec_name = "btfmslim_slave",
5221 .codec_dai_name = "btfm_fm_slim_tx",
5222 .no_pcm = 1,
5223 .dpcm_capture = 1,
5224 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
5225 .be_hw_params_fixup = msm_be_hw_params_fixup,
5226 .ops = &msm_wcn_ops,
5227 .ignore_suspend = 1,
5228 },
5229};
5230
5231static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
5232 {
5233 .name = LPASS_BE_PRI_MI2S_RX,
5234 .stream_name = "Primary MI2S Playback",
5235 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5236 .platform_name = "msm-pcm-routing",
5237 .codec_name = "msm-stub-codec.1",
5238 .codec_dai_name = "msm-stub-rx",
5239 .no_pcm = 1,
5240 .dpcm_playback = 1,
5241 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
5242 .be_hw_params_fixup = msm_be_hw_params_fixup,
5243 .ops = &msm_mi2s_be_ops,
5244 .ignore_suspend = 1,
5245 .ignore_pmdown_time = 1,
5246 },
5247 {
5248 .name = LPASS_BE_PRI_MI2S_TX,
5249 .stream_name = "Primary MI2S Capture",
5250 .cpu_dai_name = "msm-dai-q6-mi2s.0",
5251 .platform_name = "msm-pcm-routing",
5252 .codec_name = "msm-stub-codec.1",
5253 .codec_dai_name = "msm-stub-tx",
5254 .no_pcm = 1,
5255 .dpcm_capture = 1,
5256 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
5257 .be_hw_params_fixup = msm_be_hw_params_fixup,
5258 .ops = &msm_mi2s_be_ops,
5259 .ignore_suspend = 1,
5260 },
5261 {
5262 .name = LPASS_BE_SEC_MI2S_RX,
5263 .stream_name = "Secondary MI2S Playback",
5264 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5265 .platform_name = "msm-pcm-routing",
5266 .codec_name = "msm-stub-codec.1",
5267 .codec_dai_name = "msm-stub-rx",
5268 .no_pcm = 1,
5269 .dpcm_playback = 1,
5270 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
5271 .be_hw_params_fixup = msm_be_hw_params_fixup,
5272 .ops = &msm_mi2s_be_ops,
5273 .ignore_suspend = 1,
5274 .ignore_pmdown_time = 1,
5275 },
5276 {
5277 .name = LPASS_BE_SEC_MI2S_TX,
5278 .stream_name = "Secondary MI2S Capture",
5279 .cpu_dai_name = "msm-dai-q6-mi2s.1",
5280 .platform_name = "msm-pcm-routing",
5281 .codec_name = "msm-stub-codec.1",
5282 .codec_dai_name = "msm-stub-tx",
5283 .no_pcm = 1,
5284 .dpcm_capture = 1,
5285 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
5286 .be_hw_params_fixup = msm_be_hw_params_fixup,
5287 .ops = &msm_mi2s_be_ops,
5288 .ignore_suspend = 1,
5289 },
5290 {
5291 .name = LPASS_BE_TERT_MI2S_RX,
5292 .stream_name = "Tertiary MI2S Playback",
5293 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5294 .platform_name = "msm-pcm-routing",
5295 .codec_name = "msm-stub-codec.1",
5296 .codec_dai_name = "msm-stub-rx",
5297 .no_pcm = 1,
5298 .dpcm_playback = 1,
5299 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
5300 .be_hw_params_fixup = msm_be_hw_params_fixup,
5301 .ops = &msm_mi2s_be_ops,
5302 .ignore_suspend = 1,
5303 .ignore_pmdown_time = 1,
5304 },
5305 {
5306 .name = LPASS_BE_TERT_MI2S_TX,
5307 .stream_name = "Tertiary MI2S Capture",
5308 .cpu_dai_name = "msm-dai-q6-mi2s.2",
5309 .platform_name = "msm-pcm-routing",
5310 .codec_name = "msm-stub-codec.1",
5311 .codec_dai_name = "msm-stub-tx",
5312 .no_pcm = 1,
5313 .dpcm_capture = 1,
5314 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
5315 .be_hw_params_fixup = msm_be_hw_params_fixup,
5316 .ops = &msm_mi2s_be_ops,
5317 .ignore_suspend = 1,
5318 },
5319 {
5320 .name = LPASS_BE_QUAT_MI2S_RX,
5321 .stream_name = "Quaternary MI2S Playback",
5322 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5323 .platform_name = "msm-pcm-routing",
5324 .codec_name = "msm-stub-codec.1",
5325 .codec_dai_name = "msm-stub-rx",
5326 .no_pcm = 1,
5327 .dpcm_playback = 1,
5328 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
5329 .be_hw_params_fixup = msm_be_hw_params_fixup,
5330 .ops = &msm_mi2s_be_ops,
5331 .ignore_suspend = 1,
5332 .ignore_pmdown_time = 1,
5333 },
5334 {
5335 .name = LPASS_BE_QUAT_MI2S_TX,
5336 .stream_name = "Quaternary MI2S Capture",
5337 .cpu_dai_name = "msm-dai-q6-mi2s.3",
5338 .platform_name = "msm-pcm-routing",
5339 .codec_name = "msm-stub-codec.1",
5340 .codec_dai_name = "msm-stub-tx",
5341 .no_pcm = 1,
5342 .dpcm_capture = 1,
5343 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
5344 .be_hw_params_fixup = msm_be_hw_params_fixup,
5345 .ops = &msm_mi2s_be_ops,
5346 .ignore_suspend = 1,
5347 },
5348};
5349
5350static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
5351 /* Primary AUX PCM Backend DAI Links */
5352 {
5353 .name = LPASS_BE_AUXPCM_RX,
5354 .stream_name = "AUX PCM Playback",
5355 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5356 .platform_name = "msm-pcm-routing",
5357 .codec_name = "msm-stub-codec.1",
5358 .codec_dai_name = "msm-stub-rx",
5359 .no_pcm = 1,
5360 .dpcm_playback = 1,
5361 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5362 .be_hw_params_fixup = msm_be_hw_params_fixup,
5363 .ops = &bengal_aux_be_ops,
5364 .ignore_pmdown_time = 1,
5365 .ignore_suspend = 1,
5366 },
5367 {
5368 .name = LPASS_BE_AUXPCM_TX,
5369 .stream_name = "AUX PCM Capture",
5370 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5371 .platform_name = "msm-pcm-routing",
5372 .codec_name = "msm-stub-codec.1",
5373 .codec_dai_name = "msm-stub-tx",
5374 .no_pcm = 1,
5375 .dpcm_capture = 1,
5376 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5377 .be_hw_params_fixup = msm_be_hw_params_fixup,
5378 .ops = &bengal_aux_be_ops,
5379 .ignore_suspend = 1,
5380 },
5381 /* Secondary AUX PCM Backend DAI Links */
5382 {
5383 .name = LPASS_BE_SEC_AUXPCM_RX,
5384 .stream_name = "Sec AUX PCM Playback",
5385 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5386 .platform_name = "msm-pcm-routing",
5387 .codec_name = "msm-stub-codec.1",
5388 .codec_dai_name = "msm-stub-rx",
5389 .no_pcm = 1,
5390 .dpcm_playback = 1,
5391 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
5392 .be_hw_params_fixup = msm_be_hw_params_fixup,
5393 .ops = &bengal_aux_be_ops,
5394 .ignore_pmdown_time = 1,
5395 .ignore_suspend = 1,
5396 },
5397 {
5398 .name = LPASS_BE_SEC_AUXPCM_TX,
5399 .stream_name = "Sec AUX PCM Capture",
5400 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
5401 .platform_name = "msm-pcm-routing",
5402 .codec_name = "msm-stub-codec.1",
5403 .codec_dai_name = "msm-stub-tx",
5404 .no_pcm = 1,
5405 .dpcm_capture = 1,
5406 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
5407 .be_hw_params_fixup = msm_be_hw_params_fixup,
5408 .ops = &bengal_aux_be_ops,
5409 .ignore_suspend = 1,
5410 },
5411 /* Tertiary AUX PCM Backend DAI Links */
5412 {
5413 .name = LPASS_BE_TERT_AUXPCM_RX,
5414 .stream_name = "Tert AUX PCM Playback",
5415 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5416 .platform_name = "msm-pcm-routing",
5417 .codec_name = "msm-stub-codec.1",
5418 .codec_dai_name = "msm-stub-rx",
5419 .no_pcm = 1,
5420 .dpcm_playback = 1,
5421 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
5422 .be_hw_params_fixup = msm_be_hw_params_fixup,
5423 .ops = &bengal_aux_be_ops,
5424 .ignore_suspend = 1,
5425 },
5426 {
5427 .name = LPASS_BE_TERT_AUXPCM_TX,
5428 .stream_name = "Tert AUX PCM Capture",
5429 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
5430 .platform_name = "msm-pcm-routing",
5431 .codec_name = "msm-stub-codec.1",
5432 .codec_dai_name = "msm-stub-tx",
5433 .no_pcm = 1,
5434 .dpcm_capture = 1,
5435 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
5436 .be_hw_params_fixup = msm_be_hw_params_fixup,
5437 .ops = &bengal_aux_be_ops,
5438 .ignore_suspend = 1,
5439 },
5440 /* Quaternary AUX PCM Backend DAI Links */
5441 {
5442 .name = LPASS_BE_QUAT_AUXPCM_RX,
5443 .stream_name = "Quat AUX PCM Playback",
5444 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5445 .platform_name = "msm-pcm-routing",
5446 .codec_name = "msm-stub-codec.1",
5447 .codec_dai_name = "msm-stub-rx",
5448 .no_pcm = 1,
5449 .dpcm_playback = 1,
5450 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
5451 .be_hw_params_fixup = msm_be_hw_params_fixup,
5452 .ops = &bengal_aux_be_ops,
5453 .ignore_suspend = 1,
5454 },
5455 {
5456 .name = LPASS_BE_QUAT_AUXPCM_TX,
5457 .stream_name = "Quat AUX PCM Capture",
5458 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
5459 .platform_name = "msm-pcm-routing",
5460 .codec_name = "msm-stub-codec.1",
5461 .codec_dai_name = "msm-stub-tx",
5462 .no_pcm = 1,
5463 .dpcm_capture = 1,
5464 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
5465 .be_hw_params_fixup = msm_be_hw_params_fixup,
5466 .ops = &bengal_aux_be_ops,
5467 .ignore_suspend = 1,
5468 },
5469};
5470
5471static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
5472 /* RX CDC DMA Backend DAI Links */
5473 {
5474 .name = LPASS_BE_RX_CDC_DMA_RX_0,
5475 .stream_name = "RX CDC DMA0 Playback",
5476 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
5477 .platform_name = "msm-pcm-routing",
5478 .codec_name = "bolero_codec",
5479 .codec_dai_name = "rx_macro_rx1",
5480 .dynamic_be = 1,
5481 .no_pcm = 1,
5482 .dpcm_playback = 1,
5483 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
5484 .be_hw_params_fixup = msm_be_hw_params_fixup,
5485 .ignore_pmdown_time = 1,
5486 .ignore_suspend = 1,
5487 .ops = &msm_cdc_dma_be_ops,
5488 },
5489 {
5490 .name = LPASS_BE_RX_CDC_DMA_RX_1,
5491 .stream_name = "RX CDC DMA1 Playback",
5492 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
5493 .platform_name = "msm-pcm-routing",
5494 .codec_name = "bolero_codec",
5495 .codec_dai_name = "rx_macro_rx2",
5496 .dynamic_be = 1,
5497 .no_pcm = 1,
5498 .dpcm_playback = 1,
5499 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
5500 .be_hw_params_fixup = msm_be_hw_params_fixup,
5501 .ignore_pmdown_time = 1,
5502 .ignore_suspend = 1,
5503 .ops = &msm_cdc_dma_be_ops,
5504 },
5505 {
5506 .name = LPASS_BE_RX_CDC_DMA_RX_2,
5507 .stream_name = "RX CDC DMA2 Playback",
5508 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
5509 .platform_name = "msm-pcm-routing",
5510 .codec_name = "bolero_codec",
5511 .codec_dai_name = "rx_macro_rx3",
5512 .dynamic_be = 1,
5513 .no_pcm = 1,
5514 .dpcm_playback = 1,
5515 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
5516 .be_hw_params_fixup = msm_be_hw_params_fixup,
5517 .ignore_pmdown_time = 1,
5518 .ignore_suspend = 1,
5519 .ops = &msm_cdc_dma_be_ops,
5520 },
5521 {
5522 .name = LPASS_BE_RX_CDC_DMA_RX_3,
5523 .stream_name = "RX CDC DMA3 Playback",
5524 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
5525 .platform_name = "msm-pcm-routing",
5526 .codec_name = "bolero_codec",
5527 .codec_dai_name = "rx_macro_rx4",
5528 .dynamic_be = 1,
5529 .no_pcm = 1,
5530 .dpcm_playback = 1,
5531 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
5532 .be_hw_params_fixup = msm_be_hw_params_fixup,
5533 .ignore_pmdown_time = 1,
5534 .ignore_suspend = 1,
5535 .ops = &msm_cdc_dma_be_ops,
5536 },
5537 /* TX CDC DMA Backend DAI Links */
5538 {
5539 .name = LPASS_BE_TX_CDC_DMA_TX_3,
5540 .stream_name = "TX CDC DMA3 Capture",
5541 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
5542 .platform_name = "msm-pcm-routing",
5543 .codec_name = "bolero_codec",
5544 .codec_dai_name = "tx_macro_tx1",
5545 .no_pcm = 1,
5546 .dpcm_capture = 1,
5547 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
5548 .be_hw_params_fixup = msm_be_hw_params_fixup,
5549 .ignore_suspend = 1,
5550 .ops = &msm_cdc_dma_be_ops,
5551 },
5552 {
5553 .name = LPASS_BE_TX_CDC_DMA_TX_4,
5554 .stream_name = "TX CDC DMA4 Capture",
5555 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
5556 .platform_name = "msm-pcm-routing",
5557 .codec_name = "bolero_codec",
5558 .codec_dai_name = "tx_macro_tx2",
5559 .no_pcm = 1,
5560 .dpcm_capture = 1,
5561 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
5562 .be_hw_params_fixup = msm_be_hw_params_fixup,
5563 .ignore_suspend = 1,
5564 .ops = &msm_cdc_dma_be_ops,
5565 },
5566};
5567
5568static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
5569 {
5570 .name = LPASS_BE_VA_CDC_DMA_TX_0,
5571 .stream_name = "VA CDC DMA0 Capture",
5572 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
5573 .platform_name = "msm-pcm-routing",
5574 .codec_name = "bolero_codec",
5575 .codec_dai_name = "va_macro_tx1",
5576 .no_pcm = 1,
5577 .dpcm_capture = 1,
5578 .init = &msm_int_audrx_init,
5579 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
5580 .be_hw_params_fixup = msm_be_hw_params_fixup,
5581 .ignore_suspend = 1,
5582 .ops = &msm_cdc_dma_be_ops,
5583 },
5584 {
5585 .name = LPASS_BE_VA_CDC_DMA_TX_1,
5586 .stream_name = "VA CDC DMA1 Capture",
5587 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
5588 .platform_name = "msm-pcm-routing",
5589 .codec_name = "bolero_codec",
5590 .codec_dai_name = "va_macro_tx2",
5591 .no_pcm = 1,
5592 .dpcm_capture = 1,
5593 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
5594 .be_hw_params_fixup = msm_be_hw_params_fixup,
5595 .ignore_suspend = 1,
5596 .ops = &msm_cdc_dma_be_ops,
5597 },
5598 {
5599 .name = LPASS_BE_VA_CDC_DMA_TX_2,
5600 .stream_name = "VA CDC DMA2 Capture",
5601 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
5602 .platform_name = "msm-pcm-routing",
5603 .codec_name = "bolero_codec",
5604 .codec_dai_name = "va_macro_tx3",
5605 .no_pcm = 1,
5606 .dpcm_capture = 1,
5607 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
5608 .be_hw_params_fixup = msm_be_hw_params_fixup,
5609 .ignore_suspend = 1,
5610 .ops = &msm_cdc_dma_be_ops,
5611 },
5612};
5613
5614static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
5615 {
5616 .name = LPASS_BE_AFE_LOOPBACK_TX,
5617 .stream_name = "AFE Loopback Capture",
5618 .cpu_dai_name = "msm-dai-q6-dev.24577",
5619 .platform_name = "msm-pcm-routing",
5620 .codec_name = "msm-stub-codec.1",
5621 .codec_dai_name = "msm-stub-tx",
5622 .no_pcm = 1,
5623 .dpcm_capture = 1,
5624 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
5625 .be_hw_params_fixup = msm_be_hw_params_fixup,
5626 .ignore_pmdown_time = 1,
5627 .ignore_suspend = 1,
5628 },
5629};
5630
5631static struct snd_soc_dai_link msm_bengal_dai_links[
5632 ARRAY_SIZE(msm_common_dai_links) +
5633 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
5634 ARRAY_SIZE(msm_common_be_dai_links) +
5635 ARRAY_SIZE(msm_mi2s_be_dai_links) +
5636 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
5637 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
5638 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
5639 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
5640 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
5641
5642static int msm_populate_dai_link_component_of_node(
5643 struct snd_soc_card *card)
5644{
5645 int i, index, ret = 0;
5646 struct device *cdev = card->dev;
5647 struct snd_soc_dai_link *dai_link = card->dai_link;
5648 struct device_node *np;
5649
5650 if (!cdev) {
5651 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
5652 return -ENODEV;
5653 }
5654
5655 for (i = 0; i < card->num_links; i++) {
5656 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
5657 continue;
5658
5659 /* populate platform_of_node for snd card dai links */
5660 if (dai_link[i].platform_name &&
5661 !dai_link[i].platform_of_node) {
5662 index = of_property_match_string(cdev->of_node,
5663 "asoc-platform-names",
5664 dai_link[i].platform_name);
5665 if (index < 0) {
5666 dev_err(cdev,
5667 "%s: No match found for platform name: %s\n",
5668 __func__, dai_link[i].platform_name);
5669 ret = index;
5670 goto err;
5671 }
5672 np = of_parse_phandle(cdev->of_node, "asoc-platform",
5673 index);
5674 if (!np) {
5675 dev_err(cdev,
5676 "%s: retrieving phandle for platform %s, index %d failed\n",
5677 __func__, dai_link[i].platform_name,
5678 index);
5679 ret = -ENODEV;
5680 goto err;
5681 }
5682 dai_link[i].platform_of_node = np;
5683 dai_link[i].platform_name = NULL;
5684 }
5685
5686 /* populate cpu_of_node for snd card dai links */
5687 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
5688 index = of_property_match_string(cdev->of_node,
5689 "asoc-cpu-names",
5690 dai_link[i].cpu_dai_name);
5691 if (index >= 0) {
5692 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
5693 index);
5694 if (!np) {
5695 dev_err(cdev,
5696 "%s: retrieving phandle for cpu dai %s failed\n",
5697 __func__,
5698 dai_link[i].cpu_dai_name);
5699 ret = -ENODEV;
5700 goto err;
5701 }
5702 dai_link[i].cpu_of_node = np;
5703 dai_link[i].cpu_dai_name = NULL;
5704 }
5705 }
5706
5707 /* populate codec_of_node for snd card dai links */
5708 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
5709 index = of_property_match_string(cdev->of_node,
5710 "asoc-codec-names",
5711 dai_link[i].codec_name);
5712 if (index < 0)
5713 continue;
5714 np = of_parse_phandle(cdev->of_node, "asoc-codec",
5715 index);
5716 if (!np) {
5717 dev_err(cdev,
5718 "%s: retrieving phandle for codec %s failed\n",
5719 __func__, dai_link[i].codec_name);
5720 ret = -ENODEV;
5721 goto err;
5722 }
5723 dai_link[i].codec_of_node = np;
5724 dai_link[i].codec_name = NULL;
5725 }
5726 }
5727
5728err:
5729 return ret;
5730}
5731
5732static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
5733{
5734 int ret = -EINVAL;
5735 struct snd_soc_component *component =
5736 snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
5737
5738 if (!component) {
5739 pr_err("* %s: No match for msm-stub-codec component\n",
5740 __func__);
5741 return ret;
5742 }
5743
5744 ret = snd_soc_add_component_controls(component, msm_snd_controls,
5745 ARRAY_SIZE(msm_snd_controls));
5746 if (ret < 0) {
5747 dev_err(component->dev,
5748 "%s: add_codec_controls failed, err = %d\n",
5749 __func__, ret);
5750 return ret;
5751 }
5752
5753 return ret;
5754}
5755
5756static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
5757 struct snd_pcm_hw_params *params)
5758{
5759 return 0;
5760}
5761
5762static struct snd_soc_ops msm_stub_be_ops = {
5763 .hw_params = msm_snd_stub_hw_params,
5764};
5765
5766struct snd_soc_card snd_soc_card_stub_msm = {
5767 .name = "bengal-stub-snd-card",
5768};
5769
5770static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
5771 /* FrontEnd DAI Links */
5772 {
5773 .name = "MSMSTUB Media1",
5774 .stream_name = "MultiMedia1",
5775 .cpu_dai_name = "MultiMedia1",
5776 .platform_name = "msm-pcm-dsp.0",
5777 .dynamic = 1,
5778 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5779 .dpcm_playback = 1,
5780 .dpcm_capture = 1,
5781 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5782 SND_SOC_DPCM_TRIGGER_POST},
5783 .codec_dai_name = "snd-soc-dummy-dai",
5784 .codec_name = "snd-soc-dummy",
5785 .ignore_suspend = 1,
5786 /* this dainlink has playback support */
5787 .ignore_pmdown_time = 1,
5788 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5789 },
5790};
5791
5792static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
5793 /* Backend DAI Links */
5794 {
5795 .name = LPASS_BE_AUXPCM_RX,
5796 .stream_name = "AUX PCM Playback",
5797 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5798 .platform_name = "msm-pcm-routing",
5799 .codec_name = "msm-stub-codec.1",
5800 .codec_dai_name = "msm-stub-rx",
5801 .no_pcm = 1,
5802 .dpcm_playback = 1,
5803 .id = MSM_BACKEND_DAI_AUXPCM_RX,
5804 .init = &msm_audrx_stub_init,
5805 .be_hw_params_fixup = msm_be_hw_params_fixup,
5806 .ignore_pmdown_time = 1,
5807 .ignore_suspend = 1,
5808 .ops = &msm_stub_be_ops,
5809 },
5810 {
5811 .name = LPASS_BE_AUXPCM_TX,
5812 .stream_name = "AUX PCM Capture",
5813 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
5814 .platform_name = "msm-pcm-routing",
5815 .codec_name = "msm-stub-codec.1",
5816 .codec_dai_name = "msm-stub-tx",
5817 .no_pcm = 1,
5818 .dpcm_capture = 1,
5819 .id = MSM_BACKEND_DAI_AUXPCM_TX,
5820 .be_hw_params_fixup = msm_be_hw_params_fixup,
5821 .ignore_suspend = 1,
5822 .ops = &msm_stub_be_ops,
5823 },
5824};
5825
5826static struct snd_soc_dai_link msm_stub_dai_links[
5827 ARRAY_SIZE(msm_stub_fe_dai_links) +
5828 ARRAY_SIZE(msm_stub_be_dai_links)];
5829
5830static const struct of_device_id bengal_asoc_machine_of_match[] = {
5831 { .compatible = "qcom,bengal-asoc-snd",
5832 .data = "codec"},
5833 { .compatible = "qcom,bengal-asoc-snd-stub",
5834 .data = "stub_codec"},
5835 {},
5836};
5837
5838static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
5839{
5840 struct snd_soc_card *card = NULL;
5841 struct snd_soc_dai_link *dailink = NULL;
5842 int len_1 = 0;
5843 int len_2 = 0;
5844 int total_links = 0;
5845 int rc = 0;
5846 u32 mi2s_audio_intf = 0;
5847 u32 auxpcm_audio_intf = 0;
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5848 u32 rxtx_bolero_codec = 0;
5849 u32 va_bolero_codec = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5850 u32 val = 0;
5851 u32 wcn_btfm_intf = 0;
5852 const struct of_device_id *match;
5853
5854 match = of_match_node(bengal_asoc_machine_of_match, dev->of_node);
5855 if (!match) {
5856 dev_err(dev, "%s: No DT match found for sound card\n",
5857 __func__);
5858 return NULL;
5859 }
5860
5861 if (!strcmp(match->data, "codec")) {
5862 card = &snd_soc_card_bengal_msm;
5863
5864 memcpy(msm_bengal_dai_links + total_links,
5865 msm_common_dai_links,
5866 sizeof(msm_common_dai_links));
5867 total_links += ARRAY_SIZE(msm_common_dai_links);
5868
5869 memcpy(msm_bengal_dai_links + total_links,
5870 msm_common_misc_fe_dai_links,
5871 sizeof(msm_common_misc_fe_dai_links));
5872 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
5873
5874 memcpy(msm_bengal_dai_links + total_links,
5875 msm_common_be_dai_links,
5876 sizeof(msm_common_be_dai_links));
5877 total_links += ARRAY_SIZE(msm_common_be_dai_links);
5878
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5879 rc = of_property_read_u32(dev->of_node,
5880 "qcom,rxtx-bolero-codec",
5881 &rxtx_bolero_codec);
5882 if (rc) {
5883 dev_dbg(dev, "%s: No DT match RXTX Macro codec\n",
5884 __func__);
5885 } else {
5886 if (rxtx_bolero_codec) {
5887 memcpy(msm_bengal_dai_links + total_links,
5888 msm_rx_tx_cdc_dma_be_dai_links,
5889 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
5890 total_links +=
5891 ARRAY_SIZE(
5892 msm_rx_tx_cdc_dma_be_dai_links);
5893 }
5894 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5895
Laxminath Kasame1dc0d72019-11-05 21:19:45 +0530[diff] [blame]5896 rc = of_property_read_u32(dev->of_node, "qcom,va-bolero-codec",
5897 &va_bolero_codec);
5898 if (rc) {
5899 dev_dbg(dev, "%s: No DT match VA Macro codec\n",
5900 __func__);
5901 } else {
5902 if (va_bolero_codec) {
5903 memcpy(msm_bengal_dai_links + total_links,
5904 msm_va_cdc_dma_be_dai_links,
5905 sizeof(msm_va_cdc_dma_be_dai_links));
5906 total_links +=
5907 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
5908 }
5909 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]5910
5911 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
5912 &mi2s_audio_intf);
5913 if (rc) {
5914 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
5915 __func__);
5916 } else {
5917 if (mi2s_audio_intf) {
5918 memcpy(msm_bengal_dai_links + total_links,
5919 msm_mi2s_be_dai_links,
5920 sizeof(msm_mi2s_be_dai_links));
5921 total_links +=
5922 ARRAY_SIZE(msm_mi2s_be_dai_links);
5923 }
5924 }
5925
5926 rc = of_property_read_u32(dev->of_node,
5927 "qcom,auxpcm-audio-intf",
5928 &auxpcm_audio_intf);
5929 if (rc) {
5930 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
5931 __func__);
5932 } else {
5933 if (auxpcm_audio_intf) {
5934 memcpy(msm_bengal_dai_links + total_links,
5935 msm_auxpcm_be_dai_links,
5936 sizeof(msm_auxpcm_be_dai_links));
5937 total_links +=
5938 ARRAY_SIZE(msm_auxpcm_be_dai_links);
5939 }
5940 }
5941
5942 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
5943 &val);
5944 if (!rc && val) {
5945 memcpy(msm_bengal_dai_links + total_links,
5946 msm_afe_rxtx_lb_be_dai_link,
5947 sizeof(msm_afe_rxtx_lb_be_dai_link));
5948 total_links +=
5949 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
5950 }
5951
5952 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
5953 &wcn_btfm_intf);
5954 if (rc) {
5955 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
5956 __func__);
5957 } else {
5958 if (wcn_btfm_intf) {
5959 memcpy(msm_bengal_dai_links + total_links,
5960 msm_wcn_btfm_be_dai_links,
5961 sizeof(msm_wcn_btfm_be_dai_links));
5962 total_links +=
5963 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
5964 }
5965 }
5966 dailink = msm_bengal_dai_links;
5967 } else if (!strcmp(match->data, "stub_codec")) {
5968 card = &snd_soc_card_stub_msm;
5969 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
5970 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
5971
5972 memcpy(msm_stub_dai_links,
5973 msm_stub_fe_dai_links,
5974 sizeof(msm_stub_fe_dai_links));
5975 memcpy(msm_stub_dai_links + len_1,
5976 msm_stub_be_dai_links,
5977 sizeof(msm_stub_be_dai_links));
5978
5979 dailink = msm_stub_dai_links;
5980 total_links = len_2;
5981 }
5982
5983 if (card) {
5984 card->dai_link = dailink;
5985 card->num_links = total_links;
5986 }
5987
5988 return card;
5989}
5990
5991static int msm_aux_codec_init(struct snd_soc_component *component)
5992{
5993 struct snd_soc_dapm_context *dapm =
5994 snd_soc_component_get_dapm(component);
5995 int ret = 0;
5996 void *mbhc_calibration;
5997 struct snd_info_entry *entry;
5998 struct snd_card *card = component->card->snd_card;
5999 struct msm_asoc_mach_data *pdata;
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]6000 struct platform_device *pdev = NULL;
6001 char *data = NULL;
6002 int i = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6003
6004 snd_soc_dapm_ignore_suspend(dapm, "EAR");
6005 snd_soc_dapm_ignore_suspend(dapm, "AUX");
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]6006 snd_soc_dapm_ignore_suspend(dapm, "LO");
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6007 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
6008 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
6009 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
6010 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
6011 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
6012 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
6013 snd_soc_dapm_sync(dapm);
6014
6015 pdata = snd_soc_card_get_drvdata(component->card);
6016 if (!pdata->codec_root) {
6017 entry = snd_info_create_subdir(card->module, "codecs",
6018 card->proc_root);
6019 if (!entry) {
6020 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
6021 __func__);
6022 ret = 0;
6023 goto mbhc_cfg_cal;
6024 }
6025 pdata->codec_root = entry;
6026 }
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]6027
6028 for (i = 0; i < component->card->num_aux_devs; i++)
6029 {
6030 if (msm_aux_dev[i].name != NULL ) {
6031 if (strstr(msm_aux_dev[i].name, "wsa"))
6032 continue;
6033 }
6034
6035 if (msm_aux_dev[i].codec_of_node) {
6036 pdev = of_find_device_by_node(
6037 msm_aux_dev[i].codec_of_node);
6038 if (pdev)
6039 data = (char*) of_device_get_match_data(
6040 &pdev->dev);
6041
6042 if (data != NULL) {
6043 if (!strncmp(data, "wcd937x",
6044 sizeof("wcd937x"))) {
6045 wcd937x_info_create_codec_entry(
6046 pdata->codec_root, component);
6047 break;
6048 } else if (!strncmp(data, "rouleur",
6049 sizeof("rouleur"))) {
6050 rouleur_info_create_codec_entry(
6051 pdata->codec_root, component);
6052 break;
6053 }
6054 }
6055 }
6056 }
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6057
6058mbhc_cfg_cal:
6059 mbhc_calibration = def_wcd_mbhc_cal();
6060 if (!mbhc_calibration)
6061 return -ENOMEM;
6062 wcd_mbhc_cfg.calibration = mbhc_calibration;
Aditya Bavanari707bf352020-03-12 12:30:10 +0530[diff] [blame^]6063 if (data != NULL) {
6064 if (!strncmp(data, "wcd937x", sizeof("wcd937x")))
6065 ret = wcd937x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6066 else if (!strncmp( data, "rouleur", sizeof("rouleur")))
6067 ret = rouleur_mbhc_hs_detect(component, &wcd_mbhc_cfg);
6068 }
6069
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6070 if (ret) {
6071 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
6072 __func__, ret);
6073 goto err_hs_detect;
6074 }
6075 return 0;
6076
6077err_hs_detect:
6078 kfree(mbhc_calibration);
6079 return ret;
6080}
6081
6082static int msm_init_aux_dev(struct platform_device *pdev,
6083 struct snd_soc_card *card)
6084{
6085 struct device_node *wsa_of_node;
6086 struct device_node *aux_codec_of_node;
6087 u32 wsa_max_devs;
6088 u32 wsa_dev_cnt;
6089 u32 codec_max_aux_devs = 0;
6090 u32 codec_aux_dev_cnt = 0;
6091 int i;
6092 struct msm_wsa881x_dev_info *wsa881x_dev_info;
6093 struct aux_codec_dev_info *aux_cdc_dev_info;
6094 const char *auxdev_name_prefix[1];
6095 char *dev_name_str = NULL;
6096 int found = 0;
6097 int codecs_found = 0;
6098 int ret = 0;
6099
6100 /* Get maximum WSA device count for this platform */
6101 ret = of_property_read_u32(pdev->dev.of_node,
6102 "qcom,wsa-max-devs", &wsa_max_devs);
6103 if (ret) {
6104 dev_info(&pdev->dev,
6105 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
6106 __func__, pdev->dev.of_node->full_name, ret);
6107 wsa_max_devs = 0;
6108 goto codec_aux_dev;
6109 }
6110 if (wsa_max_devs == 0) {
6111 dev_warn(&pdev->dev,
6112 "%s: Max WSA devices is 0 for this target?\n",
6113 __func__);
6114 goto codec_aux_dev;
6115 }
6116
6117 /* Get count of WSA device phandles for this platform */
6118 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
6119 "qcom,wsa-devs", NULL);
6120 if (wsa_dev_cnt == -ENOENT) {
6121 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
6122 __func__);
6123 goto err;
6124 } else if (wsa_dev_cnt <= 0) {
6125 dev_err(&pdev->dev,
6126 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
6127 __func__, wsa_dev_cnt);
6128 ret = -EINVAL;
6129 goto err;
6130 }
6131
6132 /*
6133 * Expect total phandles count to be NOT less than maximum possible
6134 * WSA count. However, if it is less, then assign same value to
6135 * max count as well.
6136 */
6137 if (wsa_dev_cnt < wsa_max_devs) {
6138 dev_dbg(&pdev->dev,
6139 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
6140 __func__, wsa_max_devs, wsa_dev_cnt);
6141 wsa_max_devs = wsa_dev_cnt;
6142 }
6143
6144 /* Make sure prefix string passed for each WSA device */
6145 ret = of_property_count_strings(pdev->dev.of_node,
6146 "qcom,wsa-aux-dev-prefix");
6147 if (ret != wsa_dev_cnt) {
6148 dev_err(&pdev->dev,
6149 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
6150 __func__, wsa_dev_cnt, ret);
6151 ret = -EINVAL;
6152 goto err;
6153 }
6154
6155 /*
6156 * Alloc mem to store phandle and index info of WSA device, if already
6157 * registered with ALSA core
6158 */
6159 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
6160 sizeof(struct msm_wsa881x_dev_info),
6161 GFP_KERNEL);
6162 if (!wsa881x_dev_info) {
6163 ret = -ENOMEM;
6164 goto err;
6165 }
6166
6167 /*
6168 * search and check whether all WSA devices are already
6169 * registered with ALSA core or not. If found a node, store
6170 * the node and the index in a local array of struct for later
6171 * use.
6172 */
6173 for (i = 0; i < wsa_dev_cnt; i++) {
6174 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
6175 "qcom,wsa-devs", i);
6176 if (unlikely(!wsa_of_node)) {
6177 /* we should not be here */
6178 dev_err(&pdev->dev,
6179 "%s: wsa dev node is not present\n",
6180 __func__);
6181 ret = -EINVAL;
6182 goto err;
6183 }
6184 if (soc_find_component(wsa_of_node, NULL)) {
6185 /* WSA device registered with ALSA core */
6186 wsa881x_dev_info[found].of_node = wsa_of_node;
6187 wsa881x_dev_info[found].index = i;
6188 found++;
6189 if (found == wsa_max_devs)
6190 break;
6191 }
6192 }
6193
6194 if (found < wsa_max_devs) {
6195 dev_dbg(&pdev->dev,
6196 "%s: failed to find %d components. Found only %d\n",
6197 __func__, wsa_max_devs, found);
6198 return -EPROBE_DEFER;
6199 }
6200 dev_info(&pdev->dev,
6201 "%s: found %d wsa881x devices registered with ALSA core\n",
6202 __func__, found);
6203
6204codec_aux_dev:
6205 /* Get maximum aux codec device count for this platform */
6206 ret = of_property_read_u32(pdev->dev.of_node,
6207 "qcom,codec-max-aux-devs",
6208 &codec_max_aux_devs);
6209 if (ret) {
6210 dev_err(&pdev->dev,
6211 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
6212 __func__, pdev->dev.of_node->full_name, ret);
6213 codec_max_aux_devs = 0;
6214 goto aux_dev_register;
6215 }
6216 if (codec_max_aux_devs == 0) {
6217 dev_dbg(&pdev->dev,
6218 "%s: Max aux codec devices is 0 for this target?\n",
6219 __func__);
6220 goto aux_dev_register;
6221 }
6222
6223 /* Get count of aux codec device phandles for this platform */
6224 codec_aux_dev_cnt = of_count_phandle_with_args(
6225 pdev->dev.of_node,
6226 "qcom,codec-aux-devs", NULL);
6227 if (codec_aux_dev_cnt == -ENOENT) {
6228 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
6229 __func__);
6230 goto err;
6231 } else if (codec_aux_dev_cnt <= 0) {
6232 dev_err(&pdev->dev,
6233 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
6234 __func__, codec_aux_dev_cnt);
6235 ret = -EINVAL;
6236 goto err;
6237 }
6238
6239 /*
6240 * Expect total phandles count to be NOT less than maximum possible
6241 * AUX device count. However, if it is less, then assign same value to
6242 * max count as well.
6243 */
6244 if (codec_aux_dev_cnt < codec_max_aux_devs) {
6245 dev_dbg(&pdev->dev,
6246 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
6247 __func__, codec_max_aux_devs,
6248 codec_aux_dev_cnt);
6249 codec_max_aux_devs = codec_aux_dev_cnt;
6250 }
6251
6252 /*
6253 * Alloc mem to store phandle and index info of aux codec
6254 * if already registered with ALSA core
6255 */
6256 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
6257 sizeof(struct aux_codec_dev_info),
6258 GFP_KERNEL);
6259 if (!aux_cdc_dev_info) {
6260 ret = -ENOMEM;
6261 goto err;
6262 }
6263
6264 /*
6265 * search and check whether all aux codecs are already
6266 * registered with ALSA core or not. If found a node, store
6267 * the node and the index in a local array of struct for later
6268 * use.
6269 */
6270 for (i = 0; i < codec_aux_dev_cnt; i++) {
6271 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
6272 "qcom,codec-aux-devs", i);
6273 if (unlikely(!aux_codec_of_node)) {
6274 /* we should not be here */
6275 dev_err(&pdev->dev,
6276 "%s: aux codec dev node is not present\n",
6277 __func__);
6278 ret = -EINVAL;
6279 goto err;
6280 }
6281 if (soc_find_component(aux_codec_of_node, NULL)) {
6282 /* AUX codec registered with ALSA core */
6283 aux_cdc_dev_info[codecs_found].of_node =
6284 aux_codec_of_node;
6285 aux_cdc_dev_info[codecs_found].index = i;
6286 codecs_found++;
6287 }
6288 }
6289
6290 if (codecs_found < codec_aux_dev_cnt) {
6291 dev_dbg(&pdev->dev,
6292 "%s: failed to find %d components. Found only %d\n",
6293 __func__, codec_aux_dev_cnt, codecs_found);
6294 return -EPROBE_DEFER;
6295 }
6296 dev_info(&pdev->dev,
6297 "%s: found %d AUX codecs registered with ALSA core\n",
6298 __func__, codecs_found);
6299
6300aux_dev_register:
6301 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
6302 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
6303
6304 /* Alloc array of AUX devs struct */
6305 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
6306 sizeof(struct snd_soc_aux_dev),
6307 GFP_KERNEL);
6308 if (!msm_aux_dev) {
6309 ret = -ENOMEM;
6310 goto err;
6311 }
6312
6313 /* Alloc array of codec conf struct */
6314 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
6315 sizeof(struct snd_soc_codec_conf),
6316 GFP_KERNEL);
6317 if (!msm_codec_conf) {
6318 ret = -ENOMEM;
6319 goto err;
6320 }
6321
6322 for (i = 0; i < wsa_max_devs; i++) {
6323 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
6324 GFP_KERNEL);
6325 if (!dev_name_str) {
6326 ret = -ENOMEM;
6327 goto err;
6328 }
6329
6330 ret = of_property_read_string_index(pdev->dev.of_node,
6331 "qcom,wsa-aux-dev-prefix",
6332 wsa881x_dev_info[i].index,
6333 auxdev_name_prefix);
6334 if (ret) {
6335 dev_err(&pdev->dev,
6336 "%s: failed to read wsa aux dev prefix, ret = %d\n",
6337 __func__, ret);
6338 ret = -EINVAL;
6339 goto err;
6340 }
6341
6342 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
6343 msm_aux_dev[i].name = dev_name_str;
6344 msm_aux_dev[i].codec_name = NULL;
6345 msm_aux_dev[i].codec_of_node =
6346 wsa881x_dev_info[i].of_node;
6347 msm_aux_dev[i].init = NULL;
6348 msm_codec_conf[i].dev_name = NULL;
6349 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
6350 msm_codec_conf[i].of_node =
6351 wsa881x_dev_info[i].of_node;
6352 }
6353
6354 for (i = 0; i < codec_aux_dev_cnt; i++) {
6355 msm_aux_dev[wsa_max_devs + i].name = NULL;
6356 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
6357 msm_aux_dev[wsa_max_devs + i].codec_of_node =
6358 aux_cdc_dev_info[i].of_node;
6359 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
6360 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
6361 msm_codec_conf[wsa_max_devs + i].name_prefix =
6362 NULL;
6363 msm_codec_conf[wsa_max_devs + i].of_node =
6364 aux_cdc_dev_info[i].of_node;
6365 }
6366
6367 card->codec_conf = msm_codec_conf;
6368 card->aux_dev = msm_aux_dev;
6369err:
6370 return ret;
6371}
6372
6373static void msm_i2s_auxpcm_init(struct platform_device *pdev)
6374{
6375 int count = 0;
6376 u32 mi2s_master_slave[MI2S_MAX];
6377 int ret = 0;
6378
6379 for (count = 0; count < MI2S_MAX; count++) {
6380 mutex_init(&mi2s_intf_conf[count].lock);
6381 mi2s_intf_conf[count].ref_cnt = 0;
6382 }
6383
6384 ret = of_property_read_u32_array(pdev->dev.of_node,
6385 "qcom,msm-mi2s-master",
6386 mi2s_master_slave, MI2S_MAX);
6387 if (ret) {
6388 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
6389 __func__);
6390 } else {
6391 for (count = 0; count < MI2S_MAX; count++) {
6392 mi2s_intf_conf[count].msm_is_mi2s_master =
6393 mi2s_master_slave[count];
6394 }
6395 }
6396}
6397
6398static void msm_i2s_auxpcm_deinit(void)
6399{
6400 int count = 0;
6401
6402 for (count = 0; count < MI2S_MAX; count++) {
6403 mutex_destroy(&mi2s_intf_conf[count].lock);
6404 mi2s_intf_conf[count].ref_cnt = 0;
6405 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
6406 }
6407}
6408
6409static int bengal_ssr_enable(struct device *dev, void *data)
6410{
6411 struct platform_device *pdev = to_platform_device(dev);
6412 struct snd_soc_card *card = platform_get_drvdata(pdev);
6413 int ret = 0;
6414
6415 if (!card) {
6416 dev_err(dev, "%s: card is NULL\n", __func__);
6417 ret = -EINVAL;
6418 goto err;
6419 }
6420
6421 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6422 /* TODO */
6423 dev_dbg(dev, "%s: TODO\n", __func__);
6424 }
6425
6426 snd_soc_card_change_online_state(card, 1);
6427 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
6428
6429err:
6430 return ret;
6431}
6432
6433static void bengal_ssr_disable(struct device *dev, void *data)
6434{
6435 struct platform_device *pdev = to_platform_device(dev);
6436 struct snd_soc_card *card = platform_get_drvdata(pdev);
6437
6438 if (!card) {
6439 dev_err(dev, "%s: card is NULL\n", __func__);
6440 return;
6441 }
6442
6443 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
6444 snd_soc_card_change_online_state(card, 0);
6445
6446 if (!strcmp(card->name, "bengal-stub-snd-card")) {
6447 /* TODO */
6448 dev_dbg(dev, "%s: TODO\n", __func__);
6449 }
6450}
6451
6452static const struct snd_event_ops bengal_ssr_ops = {
6453 .enable = bengal_ssr_enable,
6454 .disable = bengal_ssr_disable,
6455};
6456
6457static int msm_audio_ssr_compare(struct device *dev, void *data)
6458{
6459 struct device_node *node = data;
6460
6461 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
6462 __func__, dev->of_node, node);
6463 return (dev->of_node && dev->of_node == node);
6464}
6465
6466static int msm_audio_ssr_register(struct device *dev)
6467{
6468 struct device_node *np = dev->of_node;
6469 struct snd_event_clients *ssr_clients = NULL;
6470 struct device_node *node = NULL;
6471 int ret = 0;
6472 int i = 0;
6473
6474 for (i = 0; ; i++) {
6475 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
6476 if (!node)
6477 break;
6478 snd_event_mstr_add_client(&ssr_clients,
6479 msm_audio_ssr_compare, node);
6480 }
6481
6482 ret = snd_event_master_register(dev, &bengal_ssr_ops,
6483 ssr_clients, NULL);
6484 if (!ret)
6485 snd_event_notify(dev, SND_EVENT_UP);
6486
6487 return ret;
6488}
6489
6490static int msm_asoc_machine_probe(struct platform_device *pdev)
6491{
6492 struct snd_soc_card *card = NULL;
6493 struct msm_asoc_mach_data *pdata = NULL;
6494 const char *mbhc_audio_jack_type = NULL;
6495 int ret = 0;
6496 uint index = 0;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6497 struct nvmem_cell *cell;
6498 size_t len;
6499 u32 *buf;
6500 u32 adsp_var_idx = 0;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6501
6502 if (!pdev->dev.of_node) {
6503 dev_err(&pdev->dev,
6504 "%s: No platform supplied from device tree\n",
6505 __func__);
6506 return -EINVAL;
6507 }
6508
6509 pdata = devm_kzalloc(&pdev->dev,
6510 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
6511 if (!pdata)
6512 return -ENOMEM;
6513
6514 card = populate_snd_card_dailinks(&pdev->dev);
6515 if (!card) {
6516 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
6517 ret = -EINVAL;
6518 goto err;
6519 }
6520
6521 card->dev = &pdev->dev;
6522 platform_set_drvdata(pdev, card);
6523 snd_soc_card_set_drvdata(card, pdata);
6524
6525 ret = snd_soc_of_parse_card_name(card, "qcom,model");
6526 if (ret) {
6527 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
6528 __func__, ret);
6529 goto err;
6530 }
6531
6532 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
6533 if (ret) {
6534 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
6535 __func__, ret);
6536 goto err;
6537 }
6538
6539 ret = msm_populate_dai_link_component_of_node(card);
6540 if (ret) {
6541 ret = -EPROBE_DEFER;
6542 goto err;
6543 }
6544
6545 ret = msm_init_aux_dev(pdev, card);
6546 if (ret)
6547 goto err;
6548
6549 ret = devm_snd_soc_register_card(&pdev->dev, card);
6550 if (ret == -EPROBE_DEFER) {
6551 if (codec_reg_done)
6552 ret = -EINVAL;
6553 goto err;
6554 } else if (ret) {
6555 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
6556 __func__, ret);
6557 goto err;
6558 }
6559 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
6560 __func__, card->name);
6561
6562 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
6563 "qcom,hph-en1-gpio", 0);
6564 if (!pdata->hph_en1_gpio_p) {
6565 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6566 __func__, "qcom,hph-en1-gpio",
6567 pdev->dev.of_node->full_name);
6568 }
6569
6570 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
6571 "qcom,hph-en0-gpio", 0);
6572 if (!pdata->hph_en0_gpio_p) {
6573 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
6574 __func__, "qcom,hph-en0-gpio",
6575 pdev->dev.of_node->full_name);
6576 }
6577
6578 ret = of_property_read_string(pdev->dev.of_node,
6579 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
6580 if (ret) {
6581 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
6582 __func__, "qcom,mbhc-audio-jack-type",
6583 pdev->dev.of_node->full_name);
6584 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
6585 } else {
6586 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
6587 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6588 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
6589 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
6590 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6591 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
6592 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
6593 wcd_mbhc_cfg.enable_anc_mic_detect = true;
6594 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
6595 } else {
6596 wcd_mbhc_cfg.enable_anc_mic_detect = false;
6597 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
6598 }
6599 }
6600 /*
6601 * Parse US-Euro gpio info from DT. Report no error if us-euro
6602 * entry is not found in DT file as some targets do not support
6603 * US-Euro detection
6604 */
6605 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
6606 "qcom,us-euro-gpios", 0);
6607 if (!pdata->us_euro_gpio_p) {
6608 dev_dbg(&pdev->dev, "property %s not detected in node %s",
6609 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
6610 } else {
6611 dev_dbg(&pdev->dev, "%s detected\n",
6612 "qcom,us-euro-gpios");
6613 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
6614 }
6615
6616 if (wcd_mbhc_cfg.enable_usbc_analog)
6617 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
6618
6619 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
6620 "fsa4480-i2c-handle", 0);
6621 if (!pdata->fsa_handle)
6622 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
6623 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
6624
6625 msm_i2s_auxpcm_init(pdev);
6626 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
6627 "qcom,cdc-dmic01-gpios",
6628 0);
6629 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
6630 "qcom,cdc-dmic23-gpios",
6631 0);
6632
6633 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
6634 "qcom,pri-mi2s-gpios", 0);
6635 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
6636 "qcom,sec-mi2s-gpios", 0);
6637 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6638 "qcom,tert-mi2s-gpios", 0);
6639 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
6640 "qcom,quat-mi2s-gpios", 0);
6641 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
6642 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
6643
6644 ret = msm_audio_ssr_register(&pdev->dev);
6645 if (ret)
6646 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
6647 __func__, ret);
6648
6649 is_initial_boot = true;
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6650 /* get adsp variant idx */
6651 cell = nvmem_cell_get(&pdev->dev, "adsp_variant");
6652 if (IS_ERR_OR_NULL(cell)) {
6653 dev_dbg(&pdev->dev, "%s: FAILED to get nvmem cell \n", __func__);
6654 goto ret;
6655 }
6656 buf = nvmem_cell_read(cell, &len);
6657 nvmem_cell_put(cell);
6658 if (IS_ERR_OR_NULL(buf) || len <= 0 || len > sizeof(32)) {
6659 dev_dbg(&pdev->dev, "%s: FAILED to read nvmem cell \n", __func__);
6660 goto ret;
6661 }
6662 memcpy(&adsp_var_idx, buf, len);
6663 kfree(buf);
Laxminath Kasam37a89062020-01-07 14:53:01 +0530[diff] [blame]6664 pdata->va_disable = adsp_var_idx;
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6665
Laxminath Kasam8d37df92019-11-22 15:46:11 +0530[diff] [blame]6666ret:
Laxminath Kasamae52c992019-08-26 15:01:15 +0530[diff] [blame]6667 return 0;
6668err:
6669 devm_kfree(&pdev->dev, pdata);
6670 return ret;
6671}
6672
6673static int msm_asoc_machine_remove(struct platform_device *pdev)
6674{
6675 struct snd_soc_card *card = platform_get_drvdata(pdev);
6676
6677 snd_event_master_deregister(&pdev->dev);
6678 snd_soc_unregister_card(card);
6679 msm_i2s_auxpcm_deinit();
6680
6681 return 0;
6682}
6683
6684static struct platform_driver bengal_asoc_machine_driver = {
6685 .driver = {
6686 .name = DRV_NAME,
6687 .owner = THIS_MODULE,
6688 .pm = &snd_soc_pm_ops,
6689 .of_match_table = bengal_asoc_machine_of_match,
6690 .suppress_bind_attrs = true,
6691 },
6692 .probe = msm_asoc_machine_probe,
6693 .remove = msm_asoc_machine_remove,
6694};
6695module_platform_driver(bengal_asoc_machine_driver);
6696
6697MODULE_DESCRIPTION("ALSA SoC msm");
6698MODULE_LICENSE("GPL v2");
6699MODULE_ALIAS("platform:" DRV_NAME);
6700MODULE_DEVICE_TABLE(of, bengal_asoc_machine_of_match);