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gerrit-public.fairphone.software / platform / vendor / opensource / audio-kernel / d6bd9f3acf8f156a0167d6a119788d32bbaef4bc / . / asoc / kona.c
blob: bd9dc28ab677c174052bc9b830f4140b94ac4b6a [file] [log] [blame]
Meng Wang688a8672019-01-29 13:43:33 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0-only
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]2/*
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]4 */
5
6#include <linux/clk.h>
7#include <linux/delay.h>
8#include <linux/gpio.h>
9#include <linux/of_gpio.h>
10#include <linux/platform_device.h>
11#include <linux/slab.h>
12#include <linux/io.h>
13#include <linux/module.h>
14#include <linux/input.h>
15#include <linux/of_device.h>
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]16#include <linux/soc/qcom/fsa4480-i2c.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]17#include <sound/core.h>
18#include <sound/soc.h>
19#include <sound/soc-dapm.h>
20#include <sound/pcm.h>
21#include <sound/pcm_params.h>
22#include <sound/info.h>
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]23#include <soc/snd_event.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]24#include <dsp/audio_notifier.h>
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]25#include <soc/swr-common.h>
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]26#include <dsp/q6afe-v2.h>
27#include <dsp/q6core.h>
28#include "device_event.h"
29#include "msm-pcm-routing-v2.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]30#include "asoc/msm-cdc-pinctrl.h"
31#include "asoc/wcd-mbhc-v2.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]32#include "codecs/wcd938x/wcd938x-mbhc.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]33#include "codecs/wsa881x.h"
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]34#include "codecs/wcd938x/wcd938x.h"
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]35#include "codecs/bolero/bolero-cdc.h"
36#include <dt-bindings/sound/audio-codec-port-types.h>
37#include "codecs/bolero/wsa-macro.h"
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]38#include "kona-port-config.h"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]39
40#define DRV_NAME "kona-asoc-snd"
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]41#define __CHIPSET__ "KONA "
42#define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
43
44#define SAMPLING_RATE_8KHZ 8000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]45#define SAMPLING_RATE_11P025KHZ 11025
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]46#define SAMPLING_RATE_16KHZ 16000
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]47#define SAMPLING_RATE_22P05KHZ 22050
48#define SAMPLING_RATE_32KHZ 32000
49#define SAMPLING_RATE_44P1KHZ 44100
50#define SAMPLING_RATE_48KHZ 48000
51#define SAMPLING_RATE_88P2KHZ 88200
52#define SAMPLING_RATE_96KHZ 96000
53#define SAMPLING_RATE_176P4KHZ 176400
54#define SAMPLING_RATE_192KHZ 192000
55#define SAMPLING_RATE_352P8KHZ 352800
56#define SAMPLING_RATE_384KHZ 384000
57
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]58#define WCD9XXX_MBHC_DEF_RLOADS 5
59#define WCD9XXX_MBHC_DEF_BUTTONS 8
60#define CODEC_EXT_CLK_RATE 9600000
61#define ADSP_STATE_READY_TIMEOUT_MS 3000
62#define DEV_NAME_STR_LEN 32
63#define WCD_MBHC_HS_V_MAX 1600
64
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]65#define TDM_CHANNEL_MAX 8
66#define DEV_NAME_STR_LEN 32
67
68#define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
69
70#define ADSP_STATE_READY_TIMEOUT_MS 3000
71
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]72#define WSA8810_NAME_1 "wsa881x.20170211"
73#define WSA8810_NAME_2 "wsa881x.20170212"
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]74#define WCN_CDC_SLIM_RX_CH_MAX 2
75#define WCN_CDC_SLIM_TX_CH_MAX 2
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]76#define WCN_CDC_SLIM_TX_CH_MAX_LITO 3
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]77
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]78enum {
79 TDM_0 = 0,
80 TDM_1,
81 TDM_2,
82 TDM_3,
83 TDM_4,
84 TDM_5,
85 TDM_6,
86 TDM_7,
87 TDM_PORT_MAX,
88};
89
90enum {
91 TDM_PRI = 0,
92 TDM_SEC,
93 TDM_TERT,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]94 TDM_QUAT,
95 TDM_QUIN,
96 TDM_SEN,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]97 TDM_INTERFACE_MAX,
98};
99
100enum {
101 PRIM_AUX_PCM = 0,
102 SEC_AUX_PCM,
103 TERT_AUX_PCM,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]104 QUAT_AUX_PCM,
105 QUIN_AUX_PCM,
106 SEN_AUX_PCM,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]107 AUX_PCM_MAX,
108};
109
110enum {
111 PRIM_MI2S = 0,
112 SEC_MI2S,
113 TERT_MI2S,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]114 QUAT_MI2S,
115 QUIN_MI2S,
116 SEN_MI2S,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]117 MI2S_MAX,
118};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]119
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]120enum {
121 WSA_CDC_DMA_RX_0 = 0,
122 WSA_CDC_DMA_RX_1,
123 RX_CDC_DMA_RX_0,
124 RX_CDC_DMA_RX_1,
125 RX_CDC_DMA_RX_2,
126 RX_CDC_DMA_RX_3,
127 RX_CDC_DMA_RX_5,
128 CDC_DMA_RX_MAX,
129};
130
131enum {
132 WSA_CDC_DMA_TX_0 = 0,
133 WSA_CDC_DMA_TX_1,
134 WSA_CDC_DMA_TX_2,
135 TX_CDC_DMA_TX_0,
136 TX_CDC_DMA_TX_3,
137 TX_CDC_DMA_TX_4,
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]138 VA_CDC_DMA_TX_0,
139 VA_CDC_DMA_TX_1,
140 VA_CDC_DMA_TX_2,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]141 CDC_DMA_TX_MAX,
142};
143
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]144enum {
145 SLIM_RX_7 = 0,
146 SLIM_RX_MAX,
147};
148enum {
149 SLIM_TX_7 = 0,
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]150 SLIM_TX_8,
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]151 SLIM_TX_MAX,
152};
153
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]154enum {
155 AFE_LOOPBACK_TX_IDX = 0,
156 AFE_LOOPBACK_TX_IDX_MAX,
157};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]158struct msm_asoc_mach_data {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]159 struct snd_info_entry *codec_root;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]160 int usbc_en2_gpio; /* used by gpio driver API */
161 struct device_node *dmic01_gpio_p; /* used by pinctrl API */
162 struct device_node *dmic23_gpio_p; /* used by pinctrl API */
163 struct device_node *dmic45_gpio_p; /* used by pinctrl API */
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]164 struct device_node *mi2s_gpio_p[MI2S_MAX]; /* used by pinctrl API */
165 atomic_t mi2s_gpio_ref_count[MI2S_MAX]; /* used by pinctrl API */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]166 struct device_node *us_euro_gpio_p; /* used by pinctrl API */
167 struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
168 struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
169 struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
170 bool is_afe_config_done;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]171 struct device_node *fsa_handle;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]172};
173
174struct tdm_port {
175 u32 mode;
176 u32 channel;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]177};
178
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]179enum {
180 EXT_DISP_RX_IDX_DP = 0,
181 EXT_DISP_RX_IDX_MAX,
182};
183
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]184struct msm_wsa881x_dev_info {
185 struct device_node *of_node;
186 u32 index;
187};
188
189struct aux_codec_dev_info {
190 struct device_node *of_node;
191 u32 index;
192};
193
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]194struct dev_config {
195 u32 sample_rate;
196 u32 bit_format;
197 u32 channels;
198};
199
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]200/* Default configuration of slimbus channels */
201static struct dev_config slim_rx_cfg[] = {
202 [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
203};
204
205static struct dev_config slim_tx_cfg[] = {
206 [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]207 [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]208};
209
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]210/* Default configuration of external display BE */
211static struct dev_config ext_disp_rx_cfg[] = {
212 [EXT_DISP_RX_IDX_DP] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
213};
214
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]215static struct dev_config usb_rx_cfg = {
216 .sample_rate = SAMPLING_RATE_48KHZ,
217 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
218 .channels = 2,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]219};
220
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]221static struct dev_config usb_tx_cfg = {
222 .sample_rate = SAMPLING_RATE_48KHZ,
223 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
224 .channels = 1,
225};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]226
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]227static struct dev_config proxy_rx_cfg = {
228 .sample_rate = SAMPLING_RATE_48KHZ,
229 .bit_format = SNDRV_PCM_FORMAT_S16_LE,
230 .channels = 2,
231};
232
233static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
234 {
235 AFE_API_VERSION_I2S_CONFIG,
236 Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
237 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
238 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
239 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
240 0,
241 },
242 {
243 AFE_API_VERSION_I2S_CONFIG,
244 Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
245 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
246 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
247 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
248 0,
249 },
250 {
251 AFE_API_VERSION_I2S_CONFIG,
252 Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
253 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
254 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
255 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
256 0,
257 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]258 {
259 AFE_API_VERSION_I2S_CONFIG,
260 Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
261 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
262 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
263 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
264 0,
265 },
266 {
267 AFE_API_VERSION_I2S_CONFIG,
268 Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
269 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
270 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
271 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
272 0,
273 },
274 {
275 AFE_API_VERSION_I2S_CONFIG,
276 Q6AFE_LPASS_CLK_ID_SEN_MI2S_IBIT,
277 Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
278 Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
279 Q6AFE_LPASS_CLK_ROOT_DEFAULT,
280 0,
281 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]282};
283
284struct mi2s_conf {
285 struct mutex lock;
286 u32 ref_cnt;
287 u32 msm_is_mi2s_master;
288};
289
290static u32 mi2s_ebit_clk[MI2S_MAX] = {
291 Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
292 Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
293 Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
294};
295
296static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
297
298/* Default configuration of TDM channels */
299static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
300 { /* PRI TDM */
301 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
302 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
303 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
304 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
305 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
306 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
307 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
308 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
309 },
310 { /* SEC TDM */
311 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
312 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
313 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
314 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
315 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
316 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
317 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
318 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
319 },
320 { /* TERT TDM */
321 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
322 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
323 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
324 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
325 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
326 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
327 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
328 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
329 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]330 { /* QUAT TDM */
331 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
332 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
333 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
334 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
335 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
336 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
337 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
338 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
339 },
340 { /* QUIN TDM */
341 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
342 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
343 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
344 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
345 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
346 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
347 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
348 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
349 },
350 { /* SEN TDM */
351 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
352 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
353 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
354 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
355 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
356 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
357 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
358 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
359 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]360};
361
362static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
363 { /* PRI TDM */
364 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
365 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
366 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
367 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
368 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
369 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
370 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
371 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
372 },
373 { /* SEC TDM */
374 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
375 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
376 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
377 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
378 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
379 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
380 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
381 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
382 },
383 { /* TERT TDM */
384 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
385 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
386 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
387 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
388 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
389 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
390 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
391 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
392 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]393 { /* QUAT TDM */
394 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
395 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
396 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
397 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
398 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
399 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
400 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
401 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
402 },
403 { /* QUIN TDM */
404 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
405 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
406 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
407 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
408 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
409 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
410 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
411 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
412 },
413 { /* SEN TDM */
414 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
415 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
416 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
417 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
418 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
419 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
420 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
421 {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
422 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]423};
424
425/* Default configuration of AUX PCM channels */
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]426static struct dev_config aux_pcm_rx_cfg[] = {
427 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]428 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
429 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]430 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
431 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
432 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]433};
434
435static struct dev_config aux_pcm_tx_cfg[] = {
436 [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]437 [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
438 [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]439 [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
440 [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
441 [SEN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]442};
443
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]444/* Default configuration of MI2S channels */
445static struct dev_config mi2s_rx_cfg[] = {
446 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
447 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
448 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]449 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
450 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
451 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]452};
453
454static struct dev_config mi2s_tx_cfg[] = {
455 [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
456 [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
457 [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]458 [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
459 [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
460 [SEN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]461};
462
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]463/* Default configuration of Codec DMA Interface RX */
464static struct dev_config cdc_dma_rx_cfg[] = {
465 [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
466 [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
467 [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
468 [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
469 [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
470 [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
471 [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
472};
473
474/* Default configuration of Codec DMA Interface TX */
475static struct dev_config cdc_dma_tx_cfg[] = {
476 [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
477 [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
478 [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
479 [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
480 [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
481 [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]482 [VA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
483 [VA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
484 [VA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 8},
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]485};
486
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]487static struct dev_config afe_loopback_tx_cfg[] = {
488 [AFE_LOOPBACK_TX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
489};
490
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]491static int msm_vi_feed_tx_ch = 2;
492static const char *const vi_feed_ch_text[] = {"One", "Two"};
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]493static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
494 "S32_LE"};
495static char const *ch_text[] = {"Two", "Three", "Four", "Five",
496 "Six", "Seven", "Eight"};
497static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
498 "KHZ_16", "KHZ_22P05",
499 "KHZ_32", "KHZ_44P1", "KHZ_48",
500 "KHZ_88P2", "KHZ_96", "KHZ_176P4",
501 "KHZ_192", "KHZ_352P8", "KHZ_384"};
502static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
503 "Five", "Six", "Seven",
504 "Eight"};
505static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
506 "KHZ_48", "KHZ_176P4",
507 "KHZ_352P8"};
508static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
509static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
510 "Five", "Six", "Seven", "Eight"};
511static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
512static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
513 "KHZ_22P05", "KHZ_32", "KHZ_44P1",
514 "KHZ_48", "KHZ_96", "KHZ_192"};
515static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
516 "Five", "Six", "Seven",
517 "Eight"};
518
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]519static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
520static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
521 "Five", "Six", "Seven",
522 "Eight"};
523static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
524 "KHZ_16", "KHZ_22P05",
525 "KHZ_32", "KHZ_44P1", "KHZ_48",
526 "KHZ_88P2", "KHZ_96",
527 "KHZ_176P4", "KHZ_192",
528 "KHZ_352P8", "KHZ_384"};
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]529static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
530 "S24_3LE"};
531static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
532 "KHZ_192", "KHZ_32", "KHZ_44P1",
533 "KHZ_88P2", "KHZ_176P4"};
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]534static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
535 "KHZ_44P1", "KHZ_48",
536 "KHZ_88P2", "KHZ_96"};
537static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
538 "KHZ_44P1", "KHZ_48",
539 "KHZ_88P2", "KHZ_96"};
540static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
541 "KHZ_44P1", "KHZ_48",
542 "KHZ_88P2", "KHZ_96"};
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]543static const char *const afe_loopback_tx_ch_text[] = {"One", "Two"};
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]544
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]545static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
546static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
547static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
548static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
549static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
550static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]551static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]552static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
553static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
554static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
555static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
556static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
557static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
558static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]559static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]560static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
561static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]562static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
563static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
564static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_rx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]565static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]566static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
567static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]568static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
569static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
570static SOC_ENUM_SINGLE_EXT_DECL(sen_aux_pcm_tx_sample_rate, auxpcm_rate_text);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]571static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
572static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]573static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
574static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
575static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]576static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
577static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
578static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]579static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
580static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
581static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]582static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
583static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
584static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_sample_rate, mi2s_rate_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]585static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
586static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
587static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
588static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
589static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]590static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
591static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
592static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_rx_chs, mi2s_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]593static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
594static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
595static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]596static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
597static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
598static SOC_ENUM_SINGLE_EXT_DECL(sen_mi2s_tx_chs, mi2s_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]599static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
600static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
601static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
602static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
603static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
604static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
605static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
606static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
607static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
608static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
609static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
610static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
611static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]612static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
613static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
614static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]615static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
616static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
617static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
618static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
619static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
620static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
621static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
622static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
623static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
624static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
625static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
626static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]627static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_format, bit_format_text);
628static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_format, bit_format_text);
629static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_format, bit_format_text);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]630static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
631 cdc_dma_sample_rate_text);
632static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
633 cdc_dma_sample_rate_text);
634static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
635 cdc_dma_sample_rate_text);
636static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
637 cdc_dma_sample_rate_text);
638static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
639 cdc_dma_sample_rate_text);
640static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
641 cdc_dma_sample_rate_text);
642static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
643 cdc_dma_sample_rate_text);
644static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
645 cdc_dma_sample_rate_text);
646static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
647 cdc_dma_sample_rate_text);
648static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
649 cdc_dma_sample_rate_text);
650static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
651 cdc_dma_sample_rate_text);
652static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
653 cdc_dma_sample_rate_text);
654static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
655 cdc_dma_sample_rate_text);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]656static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_0_sample_rate,
657 cdc_dma_sample_rate_text);
658static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_1_sample_rate,
659 cdc_dma_sample_rate_text);
660static SOC_ENUM_SINGLE_EXT_DECL(va_cdc_dma_tx_2_sample_rate,
661 cdc_dma_sample_rate_text);
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]662static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
663static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
664static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
665 ext_disp_sample_rate_text);
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]666static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
667static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
668static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]669static SOC_ENUM_SINGLE_EXT_DECL(afe_loopback_tx_chs, afe_loopback_tx_ch_text);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]670
671static bool is_initial_boot;
672static bool codec_reg_done;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]673static struct snd_soc_aux_dev *msm_aux_dev;
674static struct snd_soc_codec_conf *msm_codec_conf;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]675static struct snd_soc_card snd_soc_card_kona_msm;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]676static int dmic_0_1_gpio_cnt;
677static int dmic_2_3_gpio_cnt;
678static int dmic_4_5_gpio_cnt;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]679
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]680static void *def_wcd_mbhc_cal(void);
681
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]682/*
683 * Need to report LINEIN
684 * if R/L channel impedance is larger than 5K ohm
685 */
686static struct wcd_mbhc_config wcd_mbhc_cfg = {
687 .read_fw_bin = false,
688 .calibration = NULL,
689 .detect_extn_cable = true,
690 .mono_stero_detection = false,
691 .swap_gnd_mic = NULL,
692 .hs_ext_micbias = true,
693 .key_code[0] = KEY_MEDIA,
694 .key_code[1] = KEY_VOICECOMMAND,
695 .key_code[2] = KEY_VOLUMEUP,
696 .key_code[3] = KEY_VOLUMEDOWN,
697 .key_code[4] = 0,
698 .key_code[5] = 0,
699 .key_code[6] = 0,
700 .key_code[7] = 0,
701 .linein_th = 5000,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]702 .moisture_en = false,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]703 .mbhc_micbias = MIC_BIAS_2,
704 .anc_micbias = MIC_BIAS_2,
705 .enable_anc_mic_detect = false,
Sudheer Papothib2bfcfc2019-07-10 21:59:02 +0530[diff] [blame]706 .moisture_duty_cycle_en = true,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]707};
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]708
709static inline int param_is_mask(int p)
710{
711 return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
712 (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
713}
714
715static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
716 int n)
717{
718 return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
719}
720
721static void param_set_mask(struct snd_pcm_hw_params *p, int n,
722 unsigned int bit)
723{
724 if (bit >= SNDRV_MASK_MAX)
725 return;
726 if (param_is_mask(n)) {
727 struct snd_mask *m = param_to_mask(p, n);
728
729 m->bits[0] = 0;
730 m->bits[1] = 0;
731 m->bits[bit >> 5] |= (1 << (bit & 31));
732 }
733}
734
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]735static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
736 struct snd_ctl_elem_value *ucontrol)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]737{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]738 int sample_rate_val = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]739
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]740 switch (usb_rx_cfg.sample_rate) {
741 case SAMPLING_RATE_384KHZ:
742 sample_rate_val = 12;
743 break;
744 case SAMPLING_RATE_352P8KHZ:
745 sample_rate_val = 11;
746 break;
747 case SAMPLING_RATE_192KHZ:
748 sample_rate_val = 10;
749 break;
750 case SAMPLING_RATE_176P4KHZ:
751 sample_rate_val = 9;
752 break;
753 case SAMPLING_RATE_96KHZ:
754 sample_rate_val = 8;
755 break;
756 case SAMPLING_RATE_88P2KHZ:
757 sample_rate_val = 7;
758 break;
759 case SAMPLING_RATE_48KHZ:
760 sample_rate_val = 6;
761 break;
762 case SAMPLING_RATE_44P1KHZ:
763 sample_rate_val = 5;
764 break;
765 case SAMPLING_RATE_32KHZ:
766 sample_rate_val = 4;
767 break;
768 case SAMPLING_RATE_22P05KHZ:
769 sample_rate_val = 3;
770 break;
771 case SAMPLING_RATE_16KHZ:
772 sample_rate_val = 2;
773 break;
774 case SAMPLING_RATE_11P025KHZ:
775 sample_rate_val = 1;
776 break;
777 case SAMPLING_RATE_8KHZ:
778 default:
779 sample_rate_val = 0;
780 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]781 }
782
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]783 ucontrol->value.integer.value[0] = sample_rate_val;
784 pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
785 usb_rx_cfg.sample_rate);
786 return 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]787}
788
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]789static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
790 struct snd_ctl_elem_value *ucontrol)
791{
792 switch (ucontrol->value.integer.value[0]) {
793 case 12:
794 usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
795 break;
796 case 11:
797 usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
798 break;
799 case 10:
800 usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
801 break;
802 case 9:
803 usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
804 break;
805 case 8:
806 usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
807 break;
808 case 7:
809 usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
810 break;
811 case 6:
812 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
813 break;
814 case 5:
815 usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
816 break;
817 case 4:
818 usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
819 break;
820 case 3:
821 usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
822 break;
823 case 2:
824 usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
825 break;
826 case 1:
827 usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
828 break;
829 case 0:
830 usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
831 break;
832 default:
833 usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
834 break;
835 }
836
837 pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
838 __func__, ucontrol->value.integer.value[0],
839 usb_rx_cfg.sample_rate);
840 return 0;
841}
842
843static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
844 struct snd_ctl_elem_value *ucontrol)
845{
846 int sample_rate_val = 0;
847
848 switch (usb_tx_cfg.sample_rate) {
849 case SAMPLING_RATE_384KHZ:
850 sample_rate_val = 12;
851 break;
852 case SAMPLING_RATE_352P8KHZ:
853 sample_rate_val = 11;
854 break;
855 case SAMPLING_RATE_192KHZ:
856 sample_rate_val = 10;
857 break;
858 case SAMPLING_RATE_176P4KHZ:
859 sample_rate_val = 9;
860 break;
861 case SAMPLING_RATE_96KHZ:
862 sample_rate_val = 8;
863 break;
864 case SAMPLING_RATE_88P2KHZ:
865 sample_rate_val = 7;
866 break;
867 case SAMPLING_RATE_48KHZ:
868 sample_rate_val = 6;
869 break;
870 case SAMPLING_RATE_44P1KHZ:
871 sample_rate_val = 5;
872 break;
873 case SAMPLING_RATE_32KHZ:
874 sample_rate_val = 4;
875 break;
876 case SAMPLING_RATE_22P05KHZ:
877 sample_rate_val = 3;
878 break;
879 case SAMPLING_RATE_16KHZ:
880 sample_rate_val = 2;
881 break;
882 case SAMPLING_RATE_11P025KHZ:
883 sample_rate_val = 1;
884 break;
885 case SAMPLING_RATE_8KHZ:
886 sample_rate_val = 0;
887 break;
888 default:
889 sample_rate_val = 6;
890 break;
891 }
892
893 ucontrol->value.integer.value[0] = sample_rate_val;
894 pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
895 usb_tx_cfg.sample_rate);
896 return 0;
897}
898
899static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
900 struct snd_ctl_elem_value *ucontrol)
901{
902 switch (ucontrol->value.integer.value[0]) {
903 case 12:
904 usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
905 break;
906 case 11:
907 usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
908 break;
909 case 10:
910 usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
911 break;
912 case 9:
913 usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
914 break;
915 case 8:
916 usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
917 break;
918 case 7:
919 usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
920 break;
921 case 6:
922 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
923 break;
924 case 5:
925 usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
926 break;
927 case 4:
928 usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
929 break;
930 case 3:
931 usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
932 break;
933 case 2:
934 usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
935 break;
936 case 1:
937 usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
938 break;
939 case 0:
940 usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
941 break;
942 default:
943 usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
944 break;
945 }
946
947 pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
948 __func__, ucontrol->value.integer.value[0],
949 usb_tx_cfg.sample_rate);
950 return 0;
951}
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]952static int afe_loopback_tx_ch_get(struct snd_kcontrol *kcontrol,
953 struct snd_ctl_elem_value *ucontrol)
954{
955 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
956 afe_loopback_tx_cfg[0].channels);
957 ucontrol->value.enumerated.item[0] =
958 afe_loopback_tx_cfg[0].channels - 1;
959
960 return 0;
961}
962
963static int afe_loopback_tx_ch_put(struct snd_kcontrol *kcontrol,
964 struct snd_ctl_elem_value *ucontrol)
965{
966 afe_loopback_tx_cfg[0].channels =
967 ucontrol->value.enumerated.item[0] + 1;
968 pr_debug("%s: afe_loopback_tx_ch = %d\n", __func__,
969 afe_loopback_tx_cfg[0].channels);
970
971 return 1;
972}
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]973
974static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
975 struct snd_ctl_elem_value *ucontrol)
976{
977 switch (usb_rx_cfg.bit_format) {
978 case SNDRV_PCM_FORMAT_S32_LE:
979 ucontrol->value.integer.value[0] = 3;
980 break;
981 case SNDRV_PCM_FORMAT_S24_3LE:
982 ucontrol->value.integer.value[0] = 2;
983 break;
984 case SNDRV_PCM_FORMAT_S24_LE:
985 ucontrol->value.integer.value[0] = 1;
986 break;
987 case SNDRV_PCM_FORMAT_S16_LE:
988 default:
989 ucontrol->value.integer.value[0] = 0;
990 break;
991 }
992
993 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
994 __func__, usb_rx_cfg.bit_format,
995 ucontrol->value.integer.value[0]);
996 return 0;
997}
998
999static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
1000 struct snd_ctl_elem_value *ucontrol)
1001{
1002 int rc = 0;
1003
1004 switch (ucontrol->value.integer.value[0]) {
1005 case 3:
1006 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1007 break;
1008 case 2:
1009 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1010 break;
1011 case 1:
1012 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1013 break;
1014 case 0:
1015 default:
1016 usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1017 break;
1018 }
1019 pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
1020 __func__, usb_rx_cfg.bit_format,
1021 ucontrol->value.integer.value[0]);
1022
1023 return rc;
1024}
1025
1026static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
1027 struct snd_ctl_elem_value *ucontrol)
1028{
1029 switch (usb_tx_cfg.bit_format) {
1030 case SNDRV_PCM_FORMAT_S32_LE:
1031 ucontrol->value.integer.value[0] = 3;
1032 break;
1033 case SNDRV_PCM_FORMAT_S24_3LE:
1034 ucontrol->value.integer.value[0] = 2;
1035 break;
1036 case SNDRV_PCM_FORMAT_S24_LE:
1037 ucontrol->value.integer.value[0] = 1;
1038 break;
1039 case SNDRV_PCM_FORMAT_S16_LE:
1040 default:
1041 ucontrol->value.integer.value[0] = 0;
1042 break;
1043 }
1044
1045 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1046 __func__, usb_tx_cfg.bit_format,
1047 ucontrol->value.integer.value[0]);
1048 return 0;
1049}
1050
1051static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
1052 struct snd_ctl_elem_value *ucontrol)
1053{
1054 int rc = 0;
1055
1056 switch (ucontrol->value.integer.value[0]) {
1057 case 3:
1058 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
1059 break;
1060 case 2:
1061 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1062 break;
1063 case 1:
1064 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
1065 break;
1066 case 0:
1067 default:
1068 usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
1069 break;
1070 }
1071 pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
1072 __func__, usb_tx_cfg.bit_format,
1073 ucontrol->value.integer.value[0]);
1074
1075 return rc;
1076}
1077
1078static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
1079 struct snd_ctl_elem_value *ucontrol)
1080{
1081 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
1082 usb_rx_cfg.channels);
1083 ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
1084 return 0;
1085}
1086
1087static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
1088 struct snd_ctl_elem_value *ucontrol)
1089{
1090 usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1091
1092 pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
1093 return 1;
1094}
1095
1096static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
1097 struct snd_ctl_elem_value *ucontrol)
1098{
1099 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
1100 usb_tx_cfg.channels);
1101 ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
1102 return 0;
1103}
1104
1105static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
1106 struct snd_ctl_elem_value *ucontrol)
1107{
1108 usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
1109
1110 pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
1111 return 1;
1112}
1113
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]1114static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
1115 struct snd_ctl_elem_value *ucontrol)
1116{
1117 ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
1118 pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
1119 ucontrol->value.integer.value[0]);
1120 return 0;
1121}
1122
1123static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
1124 struct snd_ctl_elem_value *ucontrol)
1125{
1126 msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
1127 pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
1128 return 1;
1129}
1130
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]1131static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
1132{
1133 int idx = 0;
1134
1135 if (strnstr(kcontrol->id.name, "Display Port RX",
1136 sizeof("Display Port RX"))) {
1137 idx = EXT_DISP_RX_IDX_DP;
1138 } else {
1139 pr_err("%s: unsupported BE: %s\n",
1140 __func__, kcontrol->id.name);
1141 idx = -EINVAL;
1142 }
1143
1144 return idx;
1145}
1146
1147static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
1148 struct snd_ctl_elem_value *ucontrol)
1149{
1150 int idx = ext_disp_get_port_idx(kcontrol);
1151
1152 if (idx < 0)
1153 return idx;
1154
1155 switch (ext_disp_rx_cfg[idx].bit_format) {
1156 case SNDRV_PCM_FORMAT_S24_3LE:
1157 ucontrol->value.integer.value[0] = 2;
1158 break;
1159 case SNDRV_PCM_FORMAT_S24_LE:
1160 ucontrol->value.integer.value[0] = 1;
1161 break;
1162 case SNDRV_PCM_FORMAT_S16_LE:
1163 default:
1164 ucontrol->value.integer.value[0] = 0;
1165 break;
1166 }
1167
1168 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1169 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1170 ucontrol->value.integer.value[0]);
1171 return 0;
1172}
1173
1174static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
1175 struct snd_ctl_elem_value *ucontrol)
1176{
1177 int idx = ext_disp_get_port_idx(kcontrol);
1178
1179 if (idx < 0)
1180 return idx;
1181
1182 switch (ucontrol->value.integer.value[0]) {
1183 case 2:
1184 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
1185 break;
1186 case 1:
1187 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
1188 break;
1189 case 0:
1190 default:
1191 ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
1192 break;
1193 }
1194 pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
1195 __func__, idx, ext_disp_rx_cfg[idx].bit_format,
1196 ucontrol->value.integer.value[0]);
1197
1198 return 0;
1199}
1200
1201static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
1202 struct snd_ctl_elem_value *ucontrol)
1203{
1204 int idx = ext_disp_get_port_idx(kcontrol);
1205
1206 if (idx < 0)
1207 return idx;
1208
1209 ucontrol->value.integer.value[0] =
1210 ext_disp_rx_cfg[idx].channels - 2;
1211
1212 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1213 idx, ext_disp_rx_cfg[idx].channels);
1214
1215 return 0;
1216}
1217
1218static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
1219 struct snd_ctl_elem_value *ucontrol)
1220{
1221 int idx = ext_disp_get_port_idx(kcontrol);
1222
1223 if (idx < 0)
1224 return idx;
1225
1226 ext_disp_rx_cfg[idx].channels =
1227 ucontrol->value.integer.value[0] + 2;
1228
1229 pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
1230 idx, ext_disp_rx_cfg[idx].channels);
1231 return 1;
1232}
1233
1234static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1235 struct snd_ctl_elem_value *ucontrol)
1236{
1237 int sample_rate_val;
1238 int idx = ext_disp_get_port_idx(kcontrol);
1239
1240 if (idx < 0)
1241 return idx;
1242
1243 switch (ext_disp_rx_cfg[idx].sample_rate) {
1244 case SAMPLING_RATE_176P4KHZ:
1245 sample_rate_val = 6;
1246 break;
1247
1248 case SAMPLING_RATE_88P2KHZ:
1249 sample_rate_val = 5;
1250 break;
1251
1252 case SAMPLING_RATE_44P1KHZ:
1253 sample_rate_val = 4;
1254 break;
1255
1256 case SAMPLING_RATE_32KHZ:
1257 sample_rate_val = 3;
1258 break;
1259
1260 case SAMPLING_RATE_192KHZ:
1261 sample_rate_val = 2;
1262 break;
1263
1264 case SAMPLING_RATE_96KHZ:
1265 sample_rate_val = 1;
1266 break;
1267
1268 case SAMPLING_RATE_48KHZ:
1269 default:
1270 sample_rate_val = 0;
1271 break;
1272 }
1273
1274 ucontrol->value.integer.value[0] = sample_rate_val;
1275 pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
1276 idx, ext_disp_rx_cfg[idx].sample_rate);
1277
1278 return 0;
1279}
1280
1281static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1282 struct snd_ctl_elem_value *ucontrol)
1283{
1284 int idx = ext_disp_get_port_idx(kcontrol);
1285
1286 if (idx < 0)
1287 return idx;
1288
1289 switch (ucontrol->value.integer.value[0]) {
1290 case 6:
1291 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
1292 break;
1293 case 5:
1294 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
1295 break;
1296 case 4:
1297 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
1298 break;
1299 case 3:
1300 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
1301 break;
1302 case 2:
1303 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
1304 break;
1305 case 1:
1306 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
1307 break;
1308 case 0:
1309 default:
1310 ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
1311 break;
1312 }
1313
1314 pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
1315 __func__, ucontrol->value.integer.value[0], idx,
1316 ext_disp_rx_cfg[idx].sample_rate);
1317 return 0;
1318}
1319
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1320static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
1321 struct snd_ctl_elem_value *ucontrol)
1322{
1323 pr_debug("%s: proxy_rx channels = %d\n",
1324 __func__, proxy_rx_cfg.channels);
1325 ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
1326
1327 return 0;
1328}
1329
1330static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
1331 struct snd_ctl_elem_value *ucontrol)
1332{
1333 proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
1334 pr_debug("%s: proxy_rx channels = %d\n",
1335 __func__, proxy_rx_cfg.channels);
1336
1337 return 1;
1338}
1339
1340static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
1341 struct tdm_port *port)
1342{
1343 if (port) {
1344 if (strnstr(kcontrol->id.name, "PRI",
1345 sizeof(kcontrol->id.name))) {
1346 port->mode = TDM_PRI;
1347 } else if (strnstr(kcontrol->id.name, "SEC",
1348 sizeof(kcontrol->id.name))) {
1349 port->mode = TDM_SEC;
1350 } else if (strnstr(kcontrol->id.name, "TERT",
1351 sizeof(kcontrol->id.name))) {
1352 port->mode = TDM_TERT;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1353 } else if (strnstr(kcontrol->id.name, "QUAT",
1354 sizeof(kcontrol->id.name))) {
1355 port->mode = TDM_QUAT;
1356 } else if (strnstr(kcontrol->id.name, "QUIN",
1357 sizeof(kcontrol->id.name))) {
1358 port->mode = TDM_QUIN;
1359 } else if (strnstr(kcontrol->id.name, "SEN",
1360 sizeof(kcontrol->id.name))) {
1361 port->mode = TDM_SEN;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1362 } else {
1363 pr_err("%s: unsupported mode in: %s\n",
1364 __func__, kcontrol->id.name);
1365 return -EINVAL;
1366 }
1367
1368 if (strnstr(kcontrol->id.name, "RX_0",
1369 sizeof(kcontrol->id.name)) ||
1370 strnstr(kcontrol->id.name, "TX_0",
1371 sizeof(kcontrol->id.name))) {
1372 port->channel = TDM_0;
1373 } else if (strnstr(kcontrol->id.name, "RX_1",
1374 sizeof(kcontrol->id.name)) ||
1375 strnstr(kcontrol->id.name, "TX_1",
1376 sizeof(kcontrol->id.name))) {
1377 port->channel = TDM_1;
1378 } else if (strnstr(kcontrol->id.name, "RX_2",
1379 sizeof(kcontrol->id.name)) ||
1380 strnstr(kcontrol->id.name, "TX_2",
1381 sizeof(kcontrol->id.name))) {
1382 port->channel = TDM_2;
1383 } else if (strnstr(kcontrol->id.name, "RX_3",
1384 sizeof(kcontrol->id.name)) ||
1385 strnstr(kcontrol->id.name, "TX_3",
1386 sizeof(kcontrol->id.name))) {
1387 port->channel = TDM_3;
1388 } else if (strnstr(kcontrol->id.name, "RX_4",
1389 sizeof(kcontrol->id.name)) ||
1390 strnstr(kcontrol->id.name, "TX_4",
1391 sizeof(kcontrol->id.name))) {
1392 port->channel = TDM_4;
1393 } else if (strnstr(kcontrol->id.name, "RX_5",
1394 sizeof(kcontrol->id.name)) ||
1395 strnstr(kcontrol->id.name, "TX_5",
1396 sizeof(kcontrol->id.name))) {
1397 port->channel = TDM_5;
1398 } else if (strnstr(kcontrol->id.name, "RX_6",
1399 sizeof(kcontrol->id.name)) ||
1400 strnstr(kcontrol->id.name, "TX_6",
1401 sizeof(kcontrol->id.name))) {
1402 port->channel = TDM_6;
1403 } else if (strnstr(kcontrol->id.name, "RX_7",
1404 sizeof(kcontrol->id.name)) ||
1405 strnstr(kcontrol->id.name, "TX_7",
1406 sizeof(kcontrol->id.name))) {
1407 port->channel = TDM_7;
1408 } else {
1409 pr_err("%s: unsupported channel in: %s\n",
1410 __func__, kcontrol->id.name);
1411 return -EINVAL;
1412 }
1413 } else {
1414 return -EINVAL;
1415 }
1416 return 0;
1417}
1418
1419static int tdm_get_sample_rate(int value)
1420{
1421 int sample_rate = 0;
1422
1423 switch (value) {
1424 case 0:
1425 sample_rate = SAMPLING_RATE_8KHZ;
1426 break;
1427 case 1:
1428 sample_rate = SAMPLING_RATE_16KHZ;
1429 break;
1430 case 2:
1431 sample_rate = SAMPLING_RATE_32KHZ;
1432 break;
1433 case 3:
1434 sample_rate = SAMPLING_RATE_48KHZ;
1435 break;
1436 case 4:
1437 sample_rate = SAMPLING_RATE_176P4KHZ;
1438 break;
1439 case 5:
1440 sample_rate = SAMPLING_RATE_352P8KHZ;
1441 break;
1442 default:
1443 sample_rate = SAMPLING_RATE_48KHZ;
1444 break;
1445 }
1446 return sample_rate;
1447}
1448
1449static int tdm_get_sample_rate_val(int sample_rate)
1450{
1451 int sample_rate_val = 0;
1452
1453 switch (sample_rate) {
1454 case SAMPLING_RATE_8KHZ:
1455 sample_rate_val = 0;
1456 break;
1457 case SAMPLING_RATE_16KHZ:
1458 sample_rate_val = 1;
1459 break;
1460 case SAMPLING_RATE_32KHZ:
1461 sample_rate_val = 2;
1462 break;
1463 case SAMPLING_RATE_48KHZ:
1464 sample_rate_val = 3;
1465 break;
1466 case SAMPLING_RATE_176P4KHZ:
1467 sample_rate_val = 4;
1468 break;
1469 case SAMPLING_RATE_352P8KHZ:
1470 sample_rate_val = 5;
1471 break;
1472 default:
1473 sample_rate_val = 3;
1474 break;
1475 }
1476 return sample_rate_val;
1477}
1478
1479static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1480 struct snd_ctl_elem_value *ucontrol)
1481{
1482 struct tdm_port port;
1483 int ret = tdm_get_port_idx(kcontrol, &port);
1484
1485 if (ret) {
1486 pr_err("%s: unsupported control: %s\n",
1487 __func__, kcontrol->id.name);
1488 } else {
1489 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1490 tdm_rx_cfg[port.mode][port.channel].sample_rate);
1491
1492 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1493 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1494 ucontrol->value.enumerated.item[0]);
1495 }
1496 return ret;
1497}
1498
1499static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
1500 struct snd_ctl_elem_value *ucontrol)
1501{
1502 struct tdm_port port;
1503 int ret = tdm_get_port_idx(kcontrol, &port);
1504
1505 if (ret) {
1506 pr_err("%s: unsupported control: %s\n",
1507 __func__, kcontrol->id.name);
1508 } else {
1509 tdm_rx_cfg[port.mode][port.channel].sample_rate =
1510 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1511
1512 pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
1513 tdm_rx_cfg[port.mode][port.channel].sample_rate,
1514 ucontrol->value.enumerated.item[0]);
1515 }
1516 return ret;
1517}
1518
1519static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1520 struct snd_ctl_elem_value *ucontrol)
1521{
1522 struct tdm_port port;
1523 int ret = tdm_get_port_idx(kcontrol, &port);
1524
1525 if (ret) {
1526 pr_err("%s: unsupported control: %s\n",
1527 __func__, kcontrol->id.name);
1528 } else {
1529 ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
1530 tdm_tx_cfg[port.mode][port.channel].sample_rate);
1531
1532 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1533 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1534 ucontrol->value.enumerated.item[0]);
1535 }
1536 return ret;
1537}
1538
1539static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1540 struct snd_ctl_elem_value *ucontrol)
1541{
1542 struct tdm_port port;
1543 int ret = tdm_get_port_idx(kcontrol, &port);
1544
1545 if (ret) {
1546 pr_err("%s: unsupported control: %s\n",
1547 __func__, kcontrol->id.name);
1548 } else {
1549 tdm_tx_cfg[port.mode][port.channel].sample_rate =
1550 tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1551
1552 pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
1553 tdm_tx_cfg[port.mode][port.channel].sample_rate,
1554 ucontrol->value.enumerated.item[0]);
1555 }
1556 return ret;
1557}
1558
1559static int tdm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1560{
1561 int format = 0;
1562
1563 switch (value) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1564 case 0:
1565 format = SNDRV_PCM_FORMAT_S16_LE;
1566 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1567 case 1:
1568 format = SNDRV_PCM_FORMAT_S24_LE;
1569 break;
1570 case 2:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1571 format = SNDRV_PCM_FORMAT_S32_LE;
1572 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1573 default:
1574 format = SNDRV_PCM_FORMAT_S16_LE;
1575 break;
1576 }
1577 return format;
1578}
1579
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1580static int tdm_get_format_val(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1581{
1582 int value = 0;
1583
1584 switch (format) {
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1585 case SNDRV_PCM_FORMAT_S16_LE:
1586 value = 0;
1587 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1588 case SNDRV_PCM_FORMAT_S24_LE:
1589 value = 1;
1590 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1591 case SNDRV_PCM_FORMAT_S32_LE:
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1592 value = 2;
1593 break;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1594 default:
1595 value = 0;
1596 break;
1597 }
1598 return value;
1599}
1600
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1601static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
1602 struct snd_ctl_elem_value *ucontrol)
1603{
1604 struct tdm_port port;
1605 int ret = tdm_get_port_idx(kcontrol, &port);
1606
1607 if (ret) {
1608 pr_err("%s: unsupported control: %s\n",
1609 __func__, kcontrol->id.name);
1610 } else {
1611 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1612 tdm_rx_cfg[port.mode][port.channel].bit_format);
1613
1614 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1615 tdm_rx_cfg[port.mode][port.channel].bit_format,
1616 ucontrol->value.enumerated.item[0]);
1617 }
1618 return ret;
1619}
1620
1621static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
1622 struct snd_ctl_elem_value *ucontrol)
1623{
1624 struct tdm_port port;
1625 int ret = tdm_get_port_idx(kcontrol, &port);
1626
1627 if (ret) {
1628 pr_err("%s: unsupported control: %s\n",
1629 __func__, kcontrol->id.name);
1630 } else {
1631 tdm_rx_cfg[port.mode][port.channel].bit_format =
1632 tdm_get_format(ucontrol->value.enumerated.item[0]);
1633
1634 pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
1635 tdm_rx_cfg[port.mode][port.channel].bit_format,
1636 ucontrol->value.enumerated.item[0]);
1637 }
1638 return ret;
1639}
1640
1641static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
1642 struct snd_ctl_elem_value *ucontrol)
1643{
1644 struct tdm_port port;
1645 int ret = tdm_get_port_idx(kcontrol, &port);
1646
1647 if (ret) {
1648 pr_err("%s: unsupported control: %s\n",
1649 __func__, kcontrol->id.name);
1650 } else {
1651 ucontrol->value.enumerated.item[0] = tdm_get_format_val(
1652 tdm_tx_cfg[port.mode][port.channel].bit_format);
1653
1654 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1655 tdm_tx_cfg[port.mode][port.channel].bit_format,
1656 ucontrol->value.enumerated.item[0]);
1657 }
1658 return ret;
1659}
1660
1661static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
1662 struct snd_ctl_elem_value *ucontrol)
1663{
1664 struct tdm_port port;
1665 int ret = tdm_get_port_idx(kcontrol, &port);
1666
1667 if (ret) {
1668 pr_err("%s: unsupported control: %s\n",
1669 __func__, kcontrol->id.name);
1670 } else {
1671 tdm_tx_cfg[port.mode][port.channel].bit_format =
1672 tdm_get_format(ucontrol->value.enumerated.item[0]);
1673
1674 pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
1675 tdm_tx_cfg[port.mode][port.channel].bit_format,
1676 ucontrol->value.enumerated.item[0]);
1677 }
1678 return ret;
1679}
1680
1681static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
1682 struct snd_ctl_elem_value *ucontrol)
1683{
1684 struct tdm_port port;
1685 int ret = tdm_get_port_idx(kcontrol, &port);
1686
1687 if (ret) {
1688 pr_err("%s: unsupported control: %s\n",
1689 __func__, kcontrol->id.name);
1690 } else {
1691
1692 ucontrol->value.enumerated.item[0] =
1693 tdm_rx_cfg[port.mode][port.channel].channels - 1;
1694
1695 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1696 tdm_rx_cfg[port.mode][port.channel].channels - 1,
1697 ucontrol->value.enumerated.item[0]);
1698 }
1699 return ret;
1700}
1701
1702static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
1703 struct snd_ctl_elem_value *ucontrol)
1704{
1705 struct tdm_port port;
1706 int ret = tdm_get_port_idx(kcontrol, &port);
1707
1708 if (ret) {
1709 pr_err("%s: unsupported control: %s\n",
1710 __func__, kcontrol->id.name);
1711 } else {
1712 tdm_rx_cfg[port.mode][port.channel].channels =
1713 ucontrol->value.enumerated.item[0] + 1;
1714
1715 pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
1716 tdm_rx_cfg[port.mode][port.channel].channels,
1717 ucontrol->value.enumerated.item[0] + 1);
1718 }
1719 return ret;
1720}
1721
1722static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
1723 struct snd_ctl_elem_value *ucontrol)
1724{
1725 struct tdm_port port;
1726 int ret = tdm_get_port_idx(kcontrol, &port);
1727
1728 if (ret) {
1729 pr_err("%s: unsupported control: %s\n",
1730 __func__, kcontrol->id.name);
1731 } else {
1732 ucontrol->value.enumerated.item[0] =
1733 tdm_tx_cfg[port.mode][port.channel].channels - 1;
1734
1735 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1736 tdm_tx_cfg[port.mode][port.channel].channels - 1,
1737 ucontrol->value.enumerated.item[0]);
1738 }
1739 return ret;
1740}
1741
1742static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
1743 struct snd_ctl_elem_value *ucontrol)
1744{
1745 struct tdm_port port;
1746 int ret = tdm_get_port_idx(kcontrol, &port);
1747
1748 if (ret) {
1749 pr_err("%s: unsupported control: %s\n",
1750 __func__, kcontrol->id.name);
1751 } else {
1752 tdm_tx_cfg[port.mode][port.channel].channels =
1753 ucontrol->value.enumerated.item[0] + 1;
1754
1755 pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
1756 tdm_tx_cfg[port.mode][port.channel].channels,
1757 ucontrol->value.enumerated.item[0] + 1);
1758 }
1759 return ret;
1760}
1761
1762static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
1763{
1764 int idx = 0;
1765
1766 if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
1767 sizeof("PRIM_AUX_PCM"))) {
1768 idx = PRIM_AUX_PCM;
1769 } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
1770 sizeof("SEC_AUX_PCM"))) {
1771 idx = SEC_AUX_PCM;
1772 } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
1773 sizeof("TERT_AUX_PCM"))) {
1774 idx = TERT_AUX_PCM;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]1775 } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
1776 sizeof("QUAT_AUX_PCM"))) {
1777 idx = QUAT_AUX_PCM;
1778 } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
1779 sizeof("QUIN_AUX_PCM"))) {
1780 idx = QUIN_AUX_PCM;
1781 } else if (strnstr(kcontrol->id.name, "SEN_AUX_PCM",
1782 sizeof("SEN_AUX_PCM"))) {
1783 idx = SEN_AUX_PCM;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1784 } else {
1785 pr_err("%s: unsupported port: %s\n",
1786 __func__, kcontrol->id.name);
1787 idx = -EINVAL;
1788 }
1789
1790 return idx;
1791}
1792
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1793static int aux_pcm_get_sample_rate(int value)
1794{
1795 int sample_rate = 0;
1796
1797 switch (value) {
1798 case 1:
1799 sample_rate = SAMPLING_RATE_16KHZ;
1800 break;
1801 case 0:
1802 default:
1803 sample_rate = SAMPLING_RATE_8KHZ;
1804 break;
1805 }
1806 return sample_rate;
1807}
1808
1809static int aux_pcm_get_sample_rate_val(int sample_rate)
1810{
1811 int sample_rate_val = 0;
1812
1813 switch (sample_rate) {
1814 case SAMPLING_RATE_16KHZ:
1815 sample_rate_val = 1;
1816 break;
1817 case SAMPLING_RATE_8KHZ:
1818 default:
1819 sample_rate_val = 0;
1820 break;
1821 }
1822 return sample_rate_val;
1823}
1824
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1825static int mi2s_auxpcm_get_format(int value)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1826{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1827 int format = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1828
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1829 switch (value) {
1830 case 0:
1831 format = SNDRV_PCM_FORMAT_S16_LE;
1832 break;
1833 case 1:
1834 format = SNDRV_PCM_FORMAT_S24_LE;
1835 break;
1836 case 2:
1837 format = SNDRV_PCM_FORMAT_S24_3LE;
1838 break;
1839 case 3:
1840 format = SNDRV_PCM_FORMAT_S32_LE;
1841 break;
1842 default:
1843 format = SNDRV_PCM_FORMAT_S16_LE;
1844 break;
1845 }
1846 return format;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1847}
1848
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1849static int mi2s_auxpcm_get_format_value(int format)
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1850{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1851 int value = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1852
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1853 switch (format) {
1854 case SNDRV_PCM_FORMAT_S16_LE:
1855 value = 0;
1856 break;
1857 case SNDRV_PCM_FORMAT_S24_LE:
1858 value = 1;
1859 break;
1860 case SNDRV_PCM_FORMAT_S24_3LE:
1861 value = 2;
1862 break;
1863 case SNDRV_PCM_FORMAT_S32_LE:
1864 value = 3;
1865 break;
1866 default:
1867 value = 0;
1868 break;
1869 }
1870 return value;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1871}
1872
1873static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
1874 struct snd_ctl_elem_value *ucontrol)
1875{
1876 int idx = aux_pcm_get_port_idx(kcontrol);
1877
1878 if (idx < 0)
1879 return idx;
1880
1881 ucontrol->value.enumerated.item[0] =
1882 aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
1883
1884 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1885 idx, aux_pcm_rx_cfg[idx].sample_rate,
1886 ucontrol->value.enumerated.item[0]);
1887
1888 return 0;
1889}
1890
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1891static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1892 struct snd_ctl_elem_value *ucontrol)
1893{
1894 int idx = aux_pcm_get_port_idx(kcontrol);
1895
1896 if (idx < 0)
1897 return idx;
1898
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1899 aux_pcm_rx_cfg[idx].sample_rate =
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1900 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1901
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1902 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
1903 idx, aux_pcm_rx_cfg[idx].sample_rate,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]1904 ucontrol->value.enumerated.item[0]);
1905
1906 return 0;
1907}
1908
1909static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
1910 struct snd_ctl_elem_value *ucontrol)
1911{
1912 int idx = aux_pcm_get_port_idx(kcontrol);
1913
1914 if (idx < 0)
1915 return idx;
1916
1917 ucontrol->value.enumerated.item[0] =
1918 aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
1919
1920 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1921 idx, aux_pcm_tx_cfg[idx].sample_rate,
1922 ucontrol->value.enumerated.item[0]);
1923
1924 return 0;
1925}
1926
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]1927static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
1928 struct snd_ctl_elem_value *ucontrol)
1929{
1930 int idx = aux_pcm_get_port_idx(kcontrol);
1931
1932 if (idx < 0)
1933 return idx;
1934
1935 aux_pcm_tx_cfg[idx].sample_rate =
1936 aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
1937
1938 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
1939 idx, aux_pcm_tx_cfg[idx].sample_rate,
1940 ucontrol->value.enumerated.item[0]);
1941
1942 return 0;
1943}
1944
1945static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
1946 struct snd_ctl_elem_value *ucontrol)
1947{
1948 int idx = aux_pcm_get_port_idx(kcontrol);
1949
1950 if (idx < 0)
1951 return idx;
1952
1953 ucontrol->value.enumerated.item[0] =
1954 mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
1955
1956 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1957 idx, aux_pcm_rx_cfg[idx].bit_format,
1958 ucontrol->value.enumerated.item[0]);
1959
1960 return 0;
1961}
1962
1963static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
1964 struct snd_ctl_elem_value *ucontrol)
1965{
1966 int idx = aux_pcm_get_port_idx(kcontrol);
1967
1968 if (idx < 0)
1969 return idx;
1970
1971 aux_pcm_rx_cfg[idx].bit_format =
1972 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
1973
1974 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
1975 idx, aux_pcm_rx_cfg[idx].bit_format,
1976 ucontrol->value.enumerated.item[0]);
1977
1978 return 0;
1979}
1980
1981static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
1982 struct snd_ctl_elem_value *ucontrol)
1983{
1984 int idx = aux_pcm_get_port_idx(kcontrol);
1985
1986 if (idx < 0)
1987 return idx;
1988
1989 ucontrol->value.enumerated.item[0] =
1990 mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
1991
1992 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
1993 idx, aux_pcm_tx_cfg[idx].bit_format,
1994 ucontrol->value.enumerated.item[0]);
1995
1996 return 0;
1997}
1998
1999static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
2000 struct snd_ctl_elem_value *ucontrol)
2001{
2002 int idx = aux_pcm_get_port_idx(kcontrol);
2003
2004 if (idx < 0)
2005 return idx;
2006
2007 aux_pcm_tx_cfg[idx].bit_format =
2008 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2009
2010 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2011 idx, aux_pcm_tx_cfg[idx].bit_format,
2012 ucontrol->value.enumerated.item[0]);
2013
2014 return 0;
2015}
2016
2017static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
2018{
2019 int idx = 0;
2020
2021 if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
2022 sizeof("PRIM_MI2S_RX"))) {
2023 idx = PRIM_MI2S;
2024 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
2025 sizeof("SEC_MI2S_RX"))) {
2026 idx = SEC_MI2S;
2027 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
2028 sizeof("TERT_MI2S_RX"))) {
2029 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2030 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
2031 sizeof("QUAT_MI2S_RX"))) {
2032 idx = QUAT_MI2S;
2033 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
2034 sizeof("QUIN_MI2S_RX"))) {
2035 idx = QUIN_MI2S;
2036 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_RX",
2037 sizeof("SEN_MI2S_RX"))) {
2038 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2039 } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
2040 sizeof("PRIM_MI2S_TX"))) {
2041 idx = PRIM_MI2S;
2042 } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
2043 sizeof("SEC_MI2S_TX"))) {
2044 idx = SEC_MI2S;
2045 } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
2046 sizeof("TERT_MI2S_TX"))) {
2047 idx = TERT_MI2S;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2048 } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
2049 sizeof("QUAT_MI2S_TX"))) {
2050 idx = QUAT_MI2S;
2051 } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
2052 sizeof("QUIN_MI2S_TX"))) {
2053 idx = QUIN_MI2S;
2054 } else if (strnstr(kcontrol->id.name, "SEN_MI2S_TX",
2055 sizeof("SEN_MI2S_TX"))) {
2056 idx = SEN_MI2S;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2057 } else {
2058 pr_err("%s: unsupported channel: %s\n",
2059 __func__, kcontrol->id.name);
2060 idx = -EINVAL;
2061 }
2062
2063 return idx;
2064}
2065
2066static int mi2s_get_sample_rate(int value)
2067{
2068 int sample_rate = 0;
2069
2070 switch (value) {
2071 case 0:
2072 sample_rate = SAMPLING_RATE_8KHZ;
2073 break;
2074 case 1:
2075 sample_rate = SAMPLING_RATE_11P025KHZ;
2076 break;
2077 case 2:
2078 sample_rate = SAMPLING_RATE_16KHZ;
2079 break;
2080 case 3:
2081 sample_rate = SAMPLING_RATE_22P05KHZ;
2082 break;
2083 case 4:
2084 sample_rate = SAMPLING_RATE_32KHZ;
2085 break;
2086 case 5:
2087 sample_rate = SAMPLING_RATE_44P1KHZ;
2088 break;
2089 case 6:
2090 sample_rate = SAMPLING_RATE_48KHZ;
2091 break;
2092 case 7:
2093 sample_rate = SAMPLING_RATE_96KHZ;
2094 break;
2095 case 8:
2096 sample_rate = SAMPLING_RATE_192KHZ;
2097 break;
2098 default:
2099 sample_rate = SAMPLING_RATE_48KHZ;
2100 break;
2101 }
2102 return sample_rate;
2103}
2104
2105static int mi2s_get_sample_rate_val(int sample_rate)
2106{
2107 int sample_rate_val = 0;
2108
2109 switch (sample_rate) {
2110 case SAMPLING_RATE_8KHZ:
2111 sample_rate_val = 0;
2112 break;
2113 case SAMPLING_RATE_11P025KHZ:
2114 sample_rate_val = 1;
2115 break;
2116 case SAMPLING_RATE_16KHZ:
2117 sample_rate_val = 2;
2118 break;
2119 case SAMPLING_RATE_22P05KHZ:
2120 sample_rate_val = 3;
2121 break;
2122 case SAMPLING_RATE_32KHZ:
2123 sample_rate_val = 4;
2124 break;
2125 case SAMPLING_RATE_44P1KHZ:
2126 sample_rate_val = 5;
2127 break;
2128 case SAMPLING_RATE_48KHZ:
2129 sample_rate_val = 6;
2130 break;
2131 case SAMPLING_RATE_96KHZ:
2132 sample_rate_val = 7;
2133 break;
2134 case SAMPLING_RATE_192KHZ:
2135 sample_rate_val = 8;
2136 break;
2137 default:
2138 sample_rate_val = 6;
2139 break;
2140 }
2141 return sample_rate_val;
2142}
2143
2144static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2145 struct snd_ctl_elem_value *ucontrol)
2146{
2147 int idx = mi2s_get_port_idx(kcontrol);
2148
2149 if (idx < 0)
2150 return idx;
2151
2152 ucontrol->value.enumerated.item[0] =
2153 mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
2154
2155 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2156 idx, mi2s_rx_cfg[idx].sample_rate,
2157 ucontrol->value.enumerated.item[0]);
2158
2159 return 0;
2160}
2161
2162static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
2164{
2165 int idx = mi2s_get_port_idx(kcontrol);
2166
2167 if (idx < 0)
2168 return idx;
2169
2170 mi2s_rx_cfg[idx].sample_rate =
2171 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2172
2173 pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
2174 idx, mi2s_rx_cfg[idx].sample_rate,
2175 ucontrol->value.enumerated.item[0]);
2176
2177 return 0;
2178}
2179
2180static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2181 struct snd_ctl_elem_value *ucontrol)
2182{
2183 int idx = mi2s_get_port_idx(kcontrol);
2184
2185 if (idx < 0)
2186 return idx;
2187
2188 ucontrol->value.enumerated.item[0] =
2189 mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
2190
2191 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2192 idx, mi2s_tx_cfg[idx].sample_rate,
2193 ucontrol->value.enumerated.item[0]);
2194
2195 return 0;
2196}
2197
2198static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2199 struct snd_ctl_elem_value *ucontrol)
2200{
2201 int idx = mi2s_get_port_idx(kcontrol);
2202
2203 if (idx < 0)
2204 return idx;
2205
2206 mi2s_tx_cfg[idx].sample_rate =
2207 mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
2208
2209 pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
2210 idx, mi2s_tx_cfg[idx].sample_rate,
2211 ucontrol->value.enumerated.item[0]);
2212
2213 return 0;
2214}
2215
2216static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
2217 struct snd_ctl_elem_value *ucontrol)
2218{
2219 int idx = mi2s_get_port_idx(kcontrol);
2220
2221 if (idx < 0)
2222 return idx;
2223
2224 ucontrol->value.enumerated.item[0] =
2225 mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
2226
2227 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2228 idx, mi2s_rx_cfg[idx].bit_format,
2229 ucontrol->value.enumerated.item[0]);
2230
2231 return 0;
2232}
2233
2234static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
2235 struct snd_ctl_elem_value *ucontrol)
2236{
2237 int idx = mi2s_get_port_idx(kcontrol);
2238
2239 if (idx < 0)
2240 return idx;
2241
2242 mi2s_rx_cfg[idx].bit_format =
2243 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2244
2245 pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
2246 idx, mi2s_rx_cfg[idx].bit_format,
2247 ucontrol->value.enumerated.item[0]);
2248
2249 return 0;
2250}
2251
2252static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
2253 struct snd_ctl_elem_value *ucontrol)
2254{
2255 int idx = mi2s_get_port_idx(kcontrol);
2256
2257 if (idx < 0)
2258 return idx;
2259
2260 ucontrol->value.enumerated.item[0] =
2261 mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
2262
2263 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2264 idx, mi2s_tx_cfg[idx].bit_format,
2265 ucontrol->value.enumerated.item[0]);
2266
2267 return 0;
2268}
2269
2270static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
2271 struct snd_ctl_elem_value *ucontrol)
2272{
2273 int idx = mi2s_get_port_idx(kcontrol);
2274
2275 if (idx < 0)
2276 return idx;
2277
2278 mi2s_tx_cfg[idx].bit_format =
2279 mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
2280
2281 pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
2282 idx, mi2s_tx_cfg[idx].bit_format,
2283 ucontrol->value.enumerated.item[0]);
2284
2285 return 0;
2286}
2287static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
2288 struct snd_ctl_elem_value *ucontrol)
2289{
2290 int idx = mi2s_get_port_idx(kcontrol);
2291
2292 if (idx < 0)
2293 return idx;
2294
2295 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2296 idx, mi2s_rx_cfg[idx].channels);
2297 ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
2298
2299 return 0;
2300}
2301
2302static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
2303 struct snd_ctl_elem_value *ucontrol)
2304{
2305 int idx = mi2s_get_port_idx(kcontrol);
2306
2307 if (idx < 0)
2308 return idx;
2309
2310 mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2311 pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
2312 idx, mi2s_rx_cfg[idx].channels);
2313
2314 return 1;
2315}
2316
2317static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
2318 struct snd_ctl_elem_value *ucontrol)
2319{
2320 int idx = mi2s_get_port_idx(kcontrol);
2321
2322 if (idx < 0)
2323 return idx;
2324
2325 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2326 idx, mi2s_tx_cfg[idx].channels);
2327 ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
2328
2329 return 0;
2330}
2331
2332static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
2333 struct snd_ctl_elem_value *ucontrol)
2334{
2335 int idx = mi2s_get_port_idx(kcontrol);
2336
2337 if (idx < 0)
2338 return idx;
2339
2340 mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
2341 pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
2342 idx, mi2s_tx_cfg[idx].channels);
2343
2344 return 1;
2345}
2346
2347static int msm_get_port_id(int be_id)
2348{
2349 int afe_port_id = 0;
2350
2351 switch (be_id) {
2352 case MSM_BACKEND_DAI_PRI_MI2S_RX:
2353 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
2354 break;
2355 case MSM_BACKEND_DAI_PRI_MI2S_TX:
2356 afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
2357 break;
2358 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
2359 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
2360 break;
2361 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
2362 afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
2363 break;
2364 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
2365 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
2366 break;
2367 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
2368 afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
2369 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]2370 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
2371 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
2372 break;
2373 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
2374 afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
2375 break;
2376 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
2377 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
2378 break;
2379 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
2380 afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
2381 break;
2382 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
2383 afe_port_id = AFE_PORT_ID_SENARY_MI2S_RX;
2384 break;
2385 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
2386 afe_port_id = AFE_PORT_ID_SENARY_MI2S_TX;
2387 break;
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]2388 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
2389 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_0;
2390 break;
2391 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
2392 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_1;
2393 break;
2394 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
2395 afe_port_id = AFE_PORT_ID_VA_CODEC_DMA_TX_2;
2396 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]2397 default:
2398 pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
2399 afe_port_id = -EINVAL;
2400 }
2401
2402 return afe_port_id;
2403}
2404
2405static u32 get_mi2s_bits_per_sample(u32 bit_format)
2406{
2407 u32 bit_per_sample = 0;
2408
2409 switch (bit_format) {
2410 case SNDRV_PCM_FORMAT_S32_LE:
2411 case SNDRV_PCM_FORMAT_S24_3LE:
2412 case SNDRV_PCM_FORMAT_S24_LE:
2413 bit_per_sample = 32;
2414 break;
2415 case SNDRV_PCM_FORMAT_S16_LE:
2416 default:
2417 bit_per_sample = 16;
2418 break;
2419 }
2420
2421 return bit_per_sample;
2422}
2423
2424static void update_mi2s_clk_val(int dai_id, int stream)
2425{
2426 u32 bit_per_sample = 0;
2427
2428 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
2429 bit_per_sample =
2430 get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
2431 mi2s_clk[dai_id].clk_freq_in_hz =
2432 mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2433 } else {
2434 bit_per_sample =
2435 get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
2436 mi2s_clk[dai_id].clk_freq_in_hz =
2437 mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
2438 }
2439}
2440
2441static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
2442{
2443 int ret = 0;
2444 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2445 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
2446 int port_id = 0;
2447 int index = cpu_dai->id;
2448
2449 port_id = msm_get_port_id(rtd->dai_link->id);
2450 if (port_id < 0) {
2451 dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
2452 ret = port_id;
2453 goto err;
2454 }
2455
2456 if (enable) {
2457 update_mi2s_clk_val(index, substream->stream);
2458 dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
2459 mi2s_clk[index].clk_freq_in_hz);
2460 }
2461
2462 mi2s_clk[index].enable = enable;
2463 ret = afe_set_lpass_clock_v2(port_id,
2464 &mi2s_clk[index]);
2465 if (ret < 0) {
2466 dev_err(rtd->card->dev,
2467 "%s: afe lpass clock failed for port 0x%x , err:%d\n",
2468 __func__, port_id, ret);
2469 goto err;
2470 }
2471
2472err:
2473 return ret;
2474}
2475
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2476static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
2477{
2478 int idx = 0;
2479
2480 if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
2481 sizeof("WSA_CDC_DMA_RX_0")))
2482 idx = WSA_CDC_DMA_RX_0;
2483 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
2484 sizeof("WSA_CDC_DMA_RX_0")))
2485 idx = WSA_CDC_DMA_RX_1;
2486 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
2487 sizeof("RX_CDC_DMA_RX_0")))
2488 idx = RX_CDC_DMA_RX_0;
2489 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
2490 sizeof("RX_CDC_DMA_RX_1")))
2491 idx = RX_CDC_DMA_RX_1;
2492 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
2493 sizeof("RX_CDC_DMA_RX_2")))
2494 idx = RX_CDC_DMA_RX_2;
2495 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
2496 sizeof("RX_CDC_DMA_RX_3")))
2497 idx = RX_CDC_DMA_RX_3;
2498 else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
2499 sizeof("RX_CDC_DMA_RX_5")))
2500 idx = RX_CDC_DMA_RX_5;
2501 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
2502 sizeof("WSA_CDC_DMA_TX_0")))
2503 idx = WSA_CDC_DMA_TX_0;
2504 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
2505 sizeof("WSA_CDC_DMA_TX_1")))
2506 idx = WSA_CDC_DMA_TX_1;
2507 else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
2508 sizeof("WSA_CDC_DMA_TX_2")))
2509 idx = WSA_CDC_DMA_TX_2;
2510 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
2511 sizeof("TX_CDC_DMA_TX_0")))
2512 idx = TX_CDC_DMA_TX_0;
2513 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
2514 sizeof("TX_CDC_DMA_TX_3")))
2515 idx = TX_CDC_DMA_TX_3;
2516 else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
2517 sizeof("TX_CDC_DMA_TX_4")))
2518 idx = TX_CDC_DMA_TX_4;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]2519 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_0",
2520 sizeof("VA_CDC_DMA_TX_0")))
2521 idx = VA_CDC_DMA_TX_0;
2522 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_1",
2523 sizeof("VA_CDC_DMA_TX_1")))
2524 idx = VA_CDC_DMA_TX_1;
2525 else if (strnstr(kcontrol->id.name, "VA_CDC_DMA_TX_2",
2526 sizeof("VA_CDC_DMA_TX_2")))
2527 idx = VA_CDC_DMA_TX_2;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2528 else {
2529 pr_err("%s: unsupported channel: %s\n",
2530 __func__, kcontrol->id.name);
2531 return -EINVAL;
2532 }
2533
2534 return idx;
2535}
2536
2537static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
2538 struct snd_ctl_elem_value *ucontrol)
2539{
2540 int ch_num = cdc_dma_get_port_idx(kcontrol);
2541
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2542 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2543 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2544 return ch_num;
2545 }
2546
2547 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2548 cdc_dma_rx_cfg[ch_num].channels - 1);
2549 ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
2550 return 0;
2551}
2552
2553static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
2554 struct snd_ctl_elem_value *ucontrol)
2555{
2556 int ch_num = cdc_dma_get_port_idx(kcontrol);
2557
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2558 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2559 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2560 return ch_num;
2561 }
2562
2563 cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2564
2565 pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
2566 cdc_dma_rx_cfg[ch_num].channels);
2567 return 1;
2568}
2569
2570static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
2571 struct snd_ctl_elem_value *ucontrol)
2572{
2573 int ch_num = cdc_dma_get_port_idx(kcontrol);
2574
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2575 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2576 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2577 return ch_num;
2578 }
2579
2580 switch (cdc_dma_rx_cfg[ch_num].bit_format) {
2581 case SNDRV_PCM_FORMAT_S32_LE:
2582 ucontrol->value.integer.value[0] = 3;
2583 break;
2584 case SNDRV_PCM_FORMAT_S24_3LE:
2585 ucontrol->value.integer.value[0] = 2;
2586 break;
2587 case SNDRV_PCM_FORMAT_S24_LE:
2588 ucontrol->value.integer.value[0] = 1;
2589 break;
2590 case SNDRV_PCM_FORMAT_S16_LE:
2591 default:
2592 ucontrol->value.integer.value[0] = 0;
2593 break;
2594 }
2595
2596 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2597 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2598 ucontrol->value.integer.value[0]);
2599 return 0;
2600}
2601
2602static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
2603 struct snd_ctl_elem_value *ucontrol)
2604{
2605 int rc = 0;
2606 int ch_num = cdc_dma_get_port_idx(kcontrol);
2607
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2608 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2609 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2610 return ch_num;
2611 }
2612
2613 switch (ucontrol->value.integer.value[0]) {
2614 case 3:
2615 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2616 break;
2617 case 2:
2618 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2619 break;
2620 case 1:
2621 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2622 break;
2623 case 0:
2624 default:
2625 cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2626 break;
2627 }
2628 pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
2629 __func__, cdc_dma_rx_cfg[ch_num].bit_format,
2630 ucontrol->value.integer.value[0]);
2631
2632 return rc;
2633}
2634
2635
2636static int cdc_dma_get_sample_rate_val(int sample_rate)
2637{
2638 int sample_rate_val = 0;
2639
2640 switch (sample_rate) {
2641 case SAMPLING_RATE_8KHZ:
2642 sample_rate_val = 0;
2643 break;
2644 case SAMPLING_RATE_11P025KHZ:
2645 sample_rate_val = 1;
2646 break;
2647 case SAMPLING_RATE_16KHZ:
2648 sample_rate_val = 2;
2649 break;
2650 case SAMPLING_RATE_22P05KHZ:
2651 sample_rate_val = 3;
2652 break;
2653 case SAMPLING_RATE_32KHZ:
2654 sample_rate_val = 4;
2655 break;
2656 case SAMPLING_RATE_44P1KHZ:
2657 sample_rate_val = 5;
2658 break;
2659 case SAMPLING_RATE_48KHZ:
2660 sample_rate_val = 6;
2661 break;
2662 case SAMPLING_RATE_88P2KHZ:
2663 sample_rate_val = 7;
2664 break;
2665 case SAMPLING_RATE_96KHZ:
2666 sample_rate_val = 8;
2667 break;
2668 case SAMPLING_RATE_176P4KHZ:
2669 sample_rate_val = 9;
2670 break;
2671 case SAMPLING_RATE_192KHZ:
2672 sample_rate_val = 10;
2673 break;
2674 case SAMPLING_RATE_352P8KHZ:
2675 sample_rate_val = 11;
2676 break;
2677 case SAMPLING_RATE_384KHZ:
2678 sample_rate_val = 12;
2679 break;
2680 default:
2681 sample_rate_val = 6;
2682 break;
2683 }
2684 return sample_rate_val;
2685}
2686
2687static int cdc_dma_get_sample_rate(int value)
2688{
2689 int sample_rate = 0;
2690
2691 switch (value) {
2692 case 0:
2693 sample_rate = SAMPLING_RATE_8KHZ;
2694 break;
2695 case 1:
2696 sample_rate = SAMPLING_RATE_11P025KHZ;
2697 break;
2698 case 2:
2699 sample_rate = SAMPLING_RATE_16KHZ;
2700 break;
2701 case 3:
2702 sample_rate = SAMPLING_RATE_22P05KHZ;
2703 break;
2704 case 4:
2705 sample_rate = SAMPLING_RATE_32KHZ;
2706 break;
2707 case 5:
2708 sample_rate = SAMPLING_RATE_44P1KHZ;
2709 break;
2710 case 6:
2711 sample_rate = SAMPLING_RATE_48KHZ;
2712 break;
2713 case 7:
2714 sample_rate = SAMPLING_RATE_88P2KHZ;
2715 break;
2716 case 8:
2717 sample_rate = SAMPLING_RATE_96KHZ;
2718 break;
2719 case 9:
2720 sample_rate = SAMPLING_RATE_176P4KHZ;
2721 break;
2722 case 10:
2723 sample_rate = SAMPLING_RATE_192KHZ;
2724 break;
2725 case 11:
2726 sample_rate = SAMPLING_RATE_352P8KHZ;
2727 break;
2728 case 12:
2729 sample_rate = SAMPLING_RATE_384KHZ;
2730 break;
2731 default:
2732 sample_rate = SAMPLING_RATE_48KHZ;
2733 break;
2734 }
2735 return sample_rate;
2736}
2737
2738static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
2739 struct snd_ctl_elem_value *ucontrol)
2740{
2741 int ch_num = cdc_dma_get_port_idx(kcontrol);
2742
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2743 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2744 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2745 return ch_num;
2746 }
2747
2748 ucontrol->value.enumerated.item[0] =
2749 cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
2750
2751 pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
2752 cdc_dma_rx_cfg[ch_num].sample_rate);
2753 return 0;
2754}
2755
2756static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
2757 struct snd_ctl_elem_value *ucontrol)
2758{
2759 int ch_num = cdc_dma_get_port_idx(kcontrol);
2760
Vignesh Kulothungan9e17da02019-03-21 12:15:59 -0700[diff] [blame]2761 if (ch_num < 0 || ch_num >= CDC_DMA_RX_MAX) {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]2762 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2763 return ch_num;
2764 }
2765
2766 cdc_dma_rx_cfg[ch_num].sample_rate =
2767 cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
2768
2769
2770 pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
2771 __func__, ucontrol->value.enumerated.item[0],
2772 cdc_dma_rx_cfg[ch_num].sample_rate);
2773 return 0;
2774}
2775
2776static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
2777 struct snd_ctl_elem_value *ucontrol)
2778{
2779 int ch_num = cdc_dma_get_port_idx(kcontrol);
2780
2781 if (ch_num < 0) {
2782 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2783 return ch_num;
2784 }
2785
2786 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2787 cdc_dma_tx_cfg[ch_num].channels);
2788 ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
2789 return 0;
2790}
2791
2792static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
2793 struct snd_ctl_elem_value *ucontrol)
2794{
2795 int ch_num = cdc_dma_get_port_idx(kcontrol);
2796
2797 if (ch_num < 0) {
2798 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2799 return ch_num;
2800 }
2801
2802 cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
2803
2804 pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
2805 cdc_dma_tx_cfg[ch_num].channels);
2806 return 1;
2807}
2808
2809static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
2810 struct snd_ctl_elem_value *ucontrol)
2811{
2812 int sample_rate_val;
2813 int ch_num = cdc_dma_get_port_idx(kcontrol);
2814
2815 if (ch_num < 0) {
2816 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2817 return ch_num;
2818 }
2819
2820 switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
2821 case SAMPLING_RATE_384KHZ:
2822 sample_rate_val = 12;
2823 break;
2824 case SAMPLING_RATE_352P8KHZ:
2825 sample_rate_val = 11;
2826 break;
2827 case SAMPLING_RATE_192KHZ:
2828 sample_rate_val = 10;
2829 break;
2830 case SAMPLING_RATE_176P4KHZ:
2831 sample_rate_val = 9;
2832 break;
2833 case SAMPLING_RATE_96KHZ:
2834 sample_rate_val = 8;
2835 break;
2836 case SAMPLING_RATE_88P2KHZ:
2837 sample_rate_val = 7;
2838 break;
2839 case SAMPLING_RATE_48KHZ:
2840 sample_rate_val = 6;
2841 break;
2842 case SAMPLING_RATE_44P1KHZ:
2843 sample_rate_val = 5;
2844 break;
2845 case SAMPLING_RATE_32KHZ:
2846 sample_rate_val = 4;
2847 break;
2848 case SAMPLING_RATE_22P05KHZ:
2849 sample_rate_val = 3;
2850 break;
2851 case SAMPLING_RATE_16KHZ:
2852 sample_rate_val = 2;
2853 break;
2854 case SAMPLING_RATE_11P025KHZ:
2855 sample_rate_val = 1;
2856 break;
2857 case SAMPLING_RATE_8KHZ:
2858 sample_rate_val = 0;
2859 break;
2860 default:
2861 sample_rate_val = 6;
2862 break;
2863 }
2864
2865 ucontrol->value.integer.value[0] = sample_rate_val;
2866 pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
2867 cdc_dma_tx_cfg[ch_num].sample_rate);
2868 return 0;
2869}
2870
2871static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
2872 struct snd_ctl_elem_value *ucontrol)
2873{
2874 int ch_num = cdc_dma_get_port_idx(kcontrol);
2875
2876 if (ch_num < 0) {
2877 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2878 return ch_num;
2879 }
2880
2881 switch (ucontrol->value.integer.value[0]) {
2882 case 12:
2883 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
2884 break;
2885 case 11:
2886 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
2887 break;
2888 case 10:
2889 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
2890 break;
2891 case 9:
2892 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
2893 break;
2894 case 8:
2895 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
2896 break;
2897 case 7:
2898 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
2899 break;
2900 case 6:
2901 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2902 break;
2903 case 5:
2904 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
2905 break;
2906 case 4:
2907 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
2908 break;
2909 case 3:
2910 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
2911 break;
2912 case 2:
2913 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
2914 break;
2915 case 1:
2916 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
2917 break;
2918 case 0:
2919 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
2920 break;
2921 default:
2922 cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
2923 break;
2924 }
2925
2926 pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
2927 __func__, ucontrol->value.integer.value[0],
2928 cdc_dma_tx_cfg[ch_num].sample_rate);
2929 return 0;
2930}
2931
2932static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
2933 struct snd_ctl_elem_value *ucontrol)
2934{
2935 int ch_num = cdc_dma_get_port_idx(kcontrol);
2936
2937 if (ch_num < 0) {
2938 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2939 return ch_num;
2940 }
2941
2942 switch (cdc_dma_tx_cfg[ch_num].bit_format) {
2943 case SNDRV_PCM_FORMAT_S32_LE:
2944 ucontrol->value.integer.value[0] = 3;
2945 break;
2946 case SNDRV_PCM_FORMAT_S24_3LE:
2947 ucontrol->value.integer.value[0] = 2;
2948 break;
2949 case SNDRV_PCM_FORMAT_S24_LE:
2950 ucontrol->value.integer.value[0] = 1;
2951 break;
2952 case SNDRV_PCM_FORMAT_S16_LE:
2953 default:
2954 ucontrol->value.integer.value[0] = 0;
2955 break;
2956 }
2957
2958 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2959 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2960 ucontrol->value.integer.value[0]);
2961 return 0;
2962}
2963
2964static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
2965 struct snd_ctl_elem_value *ucontrol)
2966{
2967 int rc = 0;
2968 int ch_num = cdc_dma_get_port_idx(kcontrol);
2969
2970 if (ch_num < 0) {
2971 pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
2972 return ch_num;
2973 }
2974
2975 switch (ucontrol->value.integer.value[0]) {
2976 case 3:
2977 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
2978 break;
2979 case 2:
2980 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
2981 break;
2982 case 1:
2983 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
2984 break;
2985 case 0:
2986 default:
2987 cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
2988 break;
2989 }
2990 pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
2991 __func__, cdc_dma_tx_cfg[ch_num].bit_format,
2992 ucontrol->value.integer.value[0]);
2993
2994 return rc;
2995}
2996
2997static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
2998{
2999 int idx = 0;
3000
3001 switch (be_id) {
3002 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
3003 idx = WSA_CDC_DMA_RX_0;
3004 break;
3005 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
3006 idx = WSA_CDC_DMA_TX_0;
3007 break;
3008 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
3009 idx = WSA_CDC_DMA_RX_1;
3010 break;
3011 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
3012 idx = WSA_CDC_DMA_TX_1;
3013 break;
3014 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
3015 idx = WSA_CDC_DMA_TX_2;
3016 break;
3017 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
3018 idx = RX_CDC_DMA_RX_0;
3019 break;
3020 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
3021 idx = RX_CDC_DMA_RX_1;
3022 break;
3023 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
3024 idx = RX_CDC_DMA_RX_2;
3025 break;
3026 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
3027 idx = RX_CDC_DMA_RX_3;
3028 break;
3029 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
3030 idx = RX_CDC_DMA_RX_5;
3031 break;
3032 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
3033 idx = TX_CDC_DMA_TX_0;
3034 break;
3035 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
3036 idx = TX_CDC_DMA_TX_3;
3037 break;
3038 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
3039 idx = TX_CDC_DMA_TX_4;
3040 break;
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3041 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
3042 idx = VA_CDC_DMA_TX_0;
3043 break;
3044 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
3045 idx = VA_CDC_DMA_TX_1;
3046 break;
3047 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
3048 idx = VA_CDC_DMA_TX_2;
3049 break;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3050 default:
3051 idx = RX_CDC_DMA_RX_0;
3052 break;
3053 }
3054
3055 return idx;
3056}
3057
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3058static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
3059 struct snd_ctl_elem_value *ucontrol)
3060{
3061 /*
3062 * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
3063 * when used for BT_SCO use case. Return either Rx or Tx sample rate
3064 * value.
3065 */
3066 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3067 case SAMPLING_RATE_96KHZ:
3068 ucontrol->value.integer.value[0] = 5;
3069 break;
3070 case SAMPLING_RATE_88P2KHZ:
3071 ucontrol->value.integer.value[0] = 4;
3072 break;
3073 case SAMPLING_RATE_48KHZ:
3074 ucontrol->value.integer.value[0] = 3;
3075 break;
3076 case SAMPLING_RATE_44P1KHZ:
3077 ucontrol->value.integer.value[0] = 2;
3078 break;
3079 case SAMPLING_RATE_16KHZ:
3080 ucontrol->value.integer.value[0] = 1;
3081 break;
3082 case SAMPLING_RATE_8KHZ:
3083 default:
3084 ucontrol->value.integer.value[0] = 0;
3085 break;
3086 }
3087 pr_debug("%s: sample rate = %d\n", __func__,
3088 slim_rx_cfg[SLIM_RX_7].sample_rate);
3089
3090 return 0;
3091}
3092
3093static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
3094 struct snd_ctl_elem_value *ucontrol)
3095{
3096 switch (ucontrol->value.integer.value[0]) {
3097 case 1:
3098 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3099 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3100 break;
3101 case 2:
3102 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3103 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3104 break;
3105 case 3:
3106 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3107 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3108 break;
3109 case 4:
3110 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3111 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3112 break;
3113 case 5:
3114 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3115 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3116 break;
3117 case 0:
3118 default:
3119 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3120 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3121 break;
3122 }
3123 pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
3124 __func__,
3125 slim_rx_cfg[SLIM_RX_7].sample_rate,
3126 slim_tx_cfg[SLIM_TX_7].sample_rate,
3127 ucontrol->value.enumerated.item[0]);
3128
3129 return 0;
3130}
3131
3132static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
3133 struct snd_ctl_elem_value *ucontrol)
3134{
3135 switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
3136 case SAMPLING_RATE_96KHZ:
3137 ucontrol->value.integer.value[0] = 5;
3138 break;
3139 case SAMPLING_RATE_88P2KHZ:
3140 ucontrol->value.integer.value[0] = 4;
3141 break;
3142 case SAMPLING_RATE_48KHZ:
3143 ucontrol->value.integer.value[0] = 3;
3144 break;
3145 case SAMPLING_RATE_44P1KHZ:
3146 ucontrol->value.integer.value[0] = 2;
3147 break;
3148 case SAMPLING_RATE_16KHZ:
3149 ucontrol->value.integer.value[0] = 1;
3150 break;
3151 case SAMPLING_RATE_8KHZ:
3152 default:
3153 ucontrol->value.integer.value[0] = 0;
3154 break;
3155 }
3156 pr_debug("%s: sample rate rx = %d\n", __func__,
3157 slim_rx_cfg[SLIM_RX_7].sample_rate);
3158
3159 return 0;
3160}
3161
3162static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
3163 struct snd_ctl_elem_value *ucontrol)
3164{
3165 switch (ucontrol->value.integer.value[0]) {
3166 case 1:
3167 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
3168 break;
3169 case 2:
3170 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3171 break;
3172 case 3:
3173 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
3174 break;
3175 case 4:
3176 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3177 break;
3178 case 5:
3179 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
3180 break;
3181 case 0:
3182 default:
3183 slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
3184 break;
3185 }
3186 pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
3187 __func__,
3188 slim_rx_cfg[SLIM_RX_7].sample_rate,
3189 ucontrol->value.enumerated.item[0]);
3190
3191 return 0;
3192}
3193
3194static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
3195 struct snd_ctl_elem_value *ucontrol)
3196{
3197 switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
3198 case SAMPLING_RATE_96KHZ:
3199 ucontrol->value.integer.value[0] = 5;
3200 break;
3201 case SAMPLING_RATE_88P2KHZ:
3202 ucontrol->value.integer.value[0] = 4;
3203 break;
3204 case SAMPLING_RATE_48KHZ:
3205 ucontrol->value.integer.value[0] = 3;
3206 break;
3207 case SAMPLING_RATE_44P1KHZ:
3208 ucontrol->value.integer.value[0] = 2;
3209 break;
3210 case SAMPLING_RATE_16KHZ:
3211 ucontrol->value.integer.value[0] = 1;
3212 break;
3213 case SAMPLING_RATE_8KHZ:
3214 default:
3215 ucontrol->value.integer.value[0] = 0;
3216 break;
3217 }
3218 pr_debug("%s: sample rate tx = %d\n", __func__,
3219 slim_tx_cfg[SLIM_TX_7].sample_rate);
3220
3221 return 0;
3222}
3223
3224static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
3225 struct snd_ctl_elem_value *ucontrol)
3226{
3227 switch (ucontrol->value.integer.value[0]) {
3228 case 1:
3229 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
3230 break;
3231 case 2:
3232 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
3233 break;
3234 case 3:
3235 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
3236 break;
3237 case 4:
3238 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
3239 break;
3240 case 5:
3241 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
3242 break;
3243 case 0:
3244 default:
3245 slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
3246 break;
3247 }
3248 pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
3249 __func__,
3250 slim_tx_cfg[SLIM_TX_7].sample_rate,
3251 ucontrol->value.enumerated.item[0]);
3252
3253 return 0;
3254}
3255
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3256static const struct snd_kcontrol_new msm_int_snd_controls[] = {
3257 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
3258 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3259 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
3260 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3261 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
3262 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3263 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
3264 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3265 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
3266 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3267 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
3268 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3269 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
3270 cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
3271 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
3272 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3273 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
3274 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3275 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
3276 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3277 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
3278 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3279 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
3280 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3281 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
3282 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3283 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Channels", va_cdc_dma_tx_0_chs,
3284 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3285 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Channels", va_cdc_dma_tx_1_chs,
3286 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
3287 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Channels", va_cdc_dma_tx_2_chs,
3288 cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3289 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
3290 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3291 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
3292 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3293 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
3294 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3295 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
3296 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3297 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
3298 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3299 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
3300 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3301 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
3302 cdc_dma_rx_format_get, cdc_dma_rx_format_put),
3303 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
3304 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3305 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
3306 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3307 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
3308 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3309 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
3310 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3311 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
3312 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3313 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 Format", va_cdc_dma_tx_0_format,
3314 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3315 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 Format", va_cdc_dma_tx_1_format,
3316 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
3317 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 Format", va_cdc_dma_tx_2_format,
3318 cdc_dma_tx_format_get, cdc_dma_tx_format_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3319 SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
3320 wsa_cdc_dma_rx_0_sample_rate,
3321 cdc_dma_rx_sample_rate_get,
3322 cdc_dma_rx_sample_rate_put),
3323 SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
3324 wsa_cdc_dma_rx_1_sample_rate,
3325 cdc_dma_rx_sample_rate_get,
3326 cdc_dma_rx_sample_rate_put),
3327 SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
3328 rx_cdc_dma_rx_0_sample_rate,
3329 cdc_dma_rx_sample_rate_get,
3330 cdc_dma_rx_sample_rate_put),
3331 SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
3332 rx_cdc_dma_rx_1_sample_rate,
3333 cdc_dma_rx_sample_rate_get,
3334 cdc_dma_rx_sample_rate_put),
3335 SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
3336 rx_cdc_dma_rx_2_sample_rate,
3337 cdc_dma_rx_sample_rate_get,
3338 cdc_dma_rx_sample_rate_put),
3339 SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
3340 rx_cdc_dma_rx_3_sample_rate,
3341 cdc_dma_rx_sample_rate_get,
3342 cdc_dma_rx_sample_rate_put),
3343 SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
3344 rx_cdc_dma_rx_5_sample_rate,
3345 cdc_dma_rx_sample_rate_get,
3346 cdc_dma_rx_sample_rate_put),
3347 SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
3348 wsa_cdc_dma_tx_0_sample_rate,
3349 cdc_dma_tx_sample_rate_get,
3350 cdc_dma_tx_sample_rate_put),
3351 SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
3352 wsa_cdc_dma_tx_1_sample_rate,
3353 cdc_dma_tx_sample_rate_get,
3354 cdc_dma_tx_sample_rate_put),
3355 SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
3356 wsa_cdc_dma_tx_2_sample_rate,
3357 cdc_dma_tx_sample_rate_get,
3358 cdc_dma_tx_sample_rate_put),
3359 SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
3360 tx_cdc_dma_tx_0_sample_rate,
3361 cdc_dma_tx_sample_rate_get,
3362 cdc_dma_tx_sample_rate_put),
3363 SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
3364 tx_cdc_dma_tx_3_sample_rate,
3365 cdc_dma_tx_sample_rate_get,
3366 cdc_dma_tx_sample_rate_put),
3367 SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
3368 tx_cdc_dma_tx_4_sample_rate,
3369 cdc_dma_tx_sample_rate_get,
3370 cdc_dma_tx_sample_rate_put),
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]3371 SOC_ENUM_EXT("VA_CDC_DMA_TX_0 SampleRate",
3372 va_cdc_dma_tx_0_sample_rate,
3373 cdc_dma_tx_sample_rate_get,
3374 cdc_dma_tx_sample_rate_put),
3375 SOC_ENUM_EXT("VA_CDC_DMA_TX_1 SampleRate",
3376 va_cdc_dma_tx_1_sample_rate,
3377 cdc_dma_tx_sample_rate_get,
3378 cdc_dma_tx_sample_rate_put),
3379 SOC_ENUM_EXT("VA_CDC_DMA_TX_2 SampleRate",
3380 va_cdc_dma_tx_2_sample_rate,
3381 cdc_dma_tx_sample_rate_get,
3382 cdc_dma_tx_sample_rate_put),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]3383};
3384
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3385static const struct snd_kcontrol_new msm_common_snd_controls[] = {
3386 SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
3387 usb_audio_rx_sample_rate_get,
3388 usb_audio_rx_sample_rate_put),
3389 SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
3390 usb_audio_tx_sample_rate_get,
3391 usb_audio_tx_sample_rate_put),
3392 SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3393 tdm_rx_sample_rate_get,
3394 tdm_rx_sample_rate_put),
3395 SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3396 tdm_rx_sample_rate_get,
3397 tdm_rx_sample_rate_put),
3398 SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3399 tdm_rx_sample_rate_get,
3400 tdm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3401 SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3402 tdm_rx_sample_rate_get,
3403 tdm_rx_sample_rate_put),
3404 SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3405 tdm_rx_sample_rate_get,
3406 tdm_rx_sample_rate_put),
3407 SOC_ENUM_EXT("SEN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
3408 tdm_rx_sample_rate_get,
3409 tdm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3410 SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3411 tdm_tx_sample_rate_get,
3412 tdm_tx_sample_rate_put),
3413 SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3414 tdm_tx_sample_rate_get,
3415 tdm_tx_sample_rate_put),
3416 SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3417 tdm_tx_sample_rate_get,
3418 tdm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3419 SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3420 tdm_tx_sample_rate_get,
3421 tdm_tx_sample_rate_put),
3422 SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3423 tdm_tx_sample_rate_get,
3424 tdm_tx_sample_rate_put),
3425 SOC_ENUM_EXT("SEN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
3426 tdm_tx_sample_rate_get,
3427 tdm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3428 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3429 aux_pcm_rx_sample_rate_get,
3430 aux_pcm_rx_sample_rate_put),
3431 SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
3432 aux_pcm_rx_sample_rate_get,
3433 aux_pcm_rx_sample_rate_put),
3434 SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
3435 aux_pcm_rx_sample_rate_get,
3436 aux_pcm_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3437 SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
3438 aux_pcm_rx_sample_rate_get,
3439 aux_pcm_rx_sample_rate_put),
3440 SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
3441 aux_pcm_rx_sample_rate_get,
3442 aux_pcm_rx_sample_rate_put),
3443 SOC_ENUM_EXT("SEN_AUX_PCM_RX SampleRate", sen_aux_pcm_rx_sample_rate,
3444 aux_pcm_rx_sample_rate_get,
3445 aux_pcm_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3446 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3447 aux_pcm_tx_sample_rate_get,
3448 aux_pcm_tx_sample_rate_put),
3449 SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
3450 aux_pcm_tx_sample_rate_get,
3451 aux_pcm_tx_sample_rate_put),
3452 SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
3453 aux_pcm_tx_sample_rate_get,
3454 aux_pcm_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3455 SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
3456 aux_pcm_tx_sample_rate_get,
3457 aux_pcm_tx_sample_rate_put),
3458 SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
3459 aux_pcm_tx_sample_rate_get,
3460 aux_pcm_tx_sample_rate_put),
3461 SOC_ENUM_EXT("SEN_AUX_PCM_TX SampleRate", sen_aux_pcm_tx_sample_rate,
3462 aux_pcm_tx_sample_rate_get,
3463 aux_pcm_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3464 SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
3465 mi2s_rx_sample_rate_get,
3466 mi2s_rx_sample_rate_put),
3467 SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
3468 mi2s_rx_sample_rate_get,
3469 mi2s_rx_sample_rate_put),
3470 SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
3471 mi2s_rx_sample_rate_get,
3472 mi2s_rx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3473 SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
3474 mi2s_rx_sample_rate_get,
3475 mi2s_rx_sample_rate_put),
3476 SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
3477 mi2s_rx_sample_rate_get,
3478 mi2s_rx_sample_rate_put),
3479 SOC_ENUM_EXT("SEN_MI2S_RX SampleRate", sen_mi2s_rx_sample_rate,
3480 mi2s_rx_sample_rate_get,
3481 mi2s_rx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3482 SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
3483 mi2s_tx_sample_rate_get,
3484 mi2s_tx_sample_rate_put),
3485 SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
3486 mi2s_tx_sample_rate_get,
3487 mi2s_tx_sample_rate_put),
3488 SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
3489 mi2s_tx_sample_rate_get,
3490 mi2s_tx_sample_rate_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3491 SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
3492 mi2s_tx_sample_rate_get,
3493 mi2s_tx_sample_rate_put),
3494 SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
3495 mi2s_tx_sample_rate_get,
3496 mi2s_tx_sample_rate_put),
3497 SOC_ENUM_EXT("SEN_MI2S_TX SampleRate", sen_mi2s_tx_sample_rate,
3498 mi2s_tx_sample_rate_get,
3499 mi2s_tx_sample_rate_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3500 SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
3501 usb_audio_rx_format_get, usb_audio_rx_format_put),
3502 SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
3503 usb_audio_tx_format_get, usb_audio_tx_format_put),
3504 SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
3505 tdm_rx_format_get,
3506 tdm_rx_format_put),
3507 SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
3508 tdm_rx_format_get,
3509 tdm_rx_format_put),
3510 SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
3511 tdm_rx_format_get,
3512 tdm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3513 SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
3514 tdm_rx_format_get,
3515 tdm_rx_format_put),
3516 SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
3517 tdm_rx_format_get,
3518 tdm_rx_format_put),
3519 SOC_ENUM_EXT("SEN_TDM_RX_0 Format", tdm_rx_format,
3520 tdm_rx_format_get,
3521 tdm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3522 SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
3523 tdm_tx_format_get,
3524 tdm_tx_format_put),
3525 SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
3526 tdm_tx_format_get,
3527 tdm_tx_format_put),
3528 SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
3529 tdm_tx_format_get,
3530 tdm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3531 SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
3532 tdm_tx_format_get,
3533 tdm_tx_format_put),
3534 SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
3535 tdm_tx_format_get,
3536 tdm_tx_format_put),
3537 SOC_ENUM_EXT("SEN_TDM_TX_0 Format", tdm_tx_format,
3538 tdm_tx_format_get,
3539 tdm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3540 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3541 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3542 SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
3543 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3544 SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
3545 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3546 SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
3547 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3548 SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
3549 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3550 SOC_ENUM_EXT("SEN_AUX_PCM_RX Format", aux_pcm_rx_format,
3551 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3552 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3553 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3554 SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
3555 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3556 SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
3557 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3558 SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
3559 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3560 SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
3561 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3562 SOC_ENUM_EXT("SEN_AUX_PCM_TX Format", aux_pcm_tx_format,
3563 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3564 SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
3565 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3566 SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
3567 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3568 SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
3569 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3570 SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
3571 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3572 SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
3573 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
3574 SOC_ENUM_EXT("SEN_MI2S_RX Format", mi2s_rx_format,
3575 msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3576 SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
3577 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3578 SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
3579 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3580 SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
3581 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3582 SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
3583 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3584 SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
3585 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
3586 SOC_ENUM_EXT("SEN_MI2S_TX Format", mi2s_tx_format,
3587 msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3588 SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
3589 usb_audio_rx_ch_get, usb_audio_rx_ch_put),
3590 SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
3591 usb_audio_tx_ch_get, usb_audio_tx_ch_put),
3592 SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
3593 proxy_rx_ch_get, proxy_rx_ch_put),
3594 SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
3595 tdm_rx_ch_get,
3596 tdm_rx_ch_put),
3597 SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
3598 tdm_rx_ch_get,
3599 tdm_rx_ch_put),
3600 SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
3601 tdm_rx_ch_get,
3602 tdm_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3603 SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
3604 tdm_rx_ch_get,
3605 tdm_rx_ch_put),
3606 SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
3607 tdm_rx_ch_get,
3608 tdm_rx_ch_put),
3609 SOC_ENUM_EXT("SEN_TDM_RX_0 Channels", tdm_rx_chs,
3610 tdm_rx_ch_get,
3611 tdm_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3612 SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
3613 tdm_tx_ch_get,
3614 tdm_tx_ch_put),
3615 SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
3616 tdm_tx_ch_get,
3617 tdm_tx_ch_put),
3618 SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
3619 tdm_tx_ch_get,
3620 tdm_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3621 SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
3622 tdm_tx_ch_get,
3623 tdm_tx_ch_put),
3624 SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
3625 tdm_tx_ch_get,
3626 tdm_tx_ch_put),
3627 SOC_ENUM_EXT("SEN_TDM_TX_0 Channels", tdm_tx_chs,
3628 tdm_tx_ch_get,
3629 tdm_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3630 SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
3631 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3632 SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
3633 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3634 SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
3635 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3636 SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
3637 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3638 SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
3639 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
3640 SOC_ENUM_EXT("SEN_MI2S_RX Channels", sen_mi2s_rx_chs,
3641 msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3642 SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
3643 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3644 SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
3645 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3646 SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
3647 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3648 SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
3649 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3650 SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
3651 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
3652 SOC_ENUM_EXT("SEN_MI2S_TX Channels", sen_mi2s_tx_chs,
3653 msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
Banajit Goswamib4347d52019-02-28 20:11:49 -0800[diff] [blame]3654 SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
3655 ext_disp_rx_ch_get, ext_disp_rx_ch_put),
3656 SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
3657 ext_disp_rx_format_get, ext_disp_rx_format_put),
3658 SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
3659 ext_disp_rx_sample_rate_get,
3660 ext_disp_rx_sample_rate_put),
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]3661 SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
3662 msm_bt_sample_rate_get,
3663 msm_bt_sample_rate_put),
3664 SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
3665 msm_bt_sample_rate_rx_get,
3666 msm_bt_sample_rate_rx_put),
3667 SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
3668 msm_bt_sample_rate_tx_get,
3669 msm_bt_sample_rate_tx_put),
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3670 SOC_ENUM_EXT("AFE_LOOPBACK_TX Channels", afe_loopback_tx_chs,
3671 afe_loopback_tx_ch_get, afe_loopback_tx_ch_put),
Meng Wangd1db67c2019-04-17 12:41:34 +0800[diff] [blame]3672 SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
3673 msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3674};
3675
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]3676static const struct snd_kcontrol_new msm_snd_controls[] = {
3677 SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
3678 msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
3679 SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
3680 msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
3681 SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
3682 aux_pcm_rx_sample_rate_get,
3683 aux_pcm_rx_sample_rate_put),
3684 SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
3685 aux_pcm_tx_sample_rate_get,
3686 aux_pcm_tx_sample_rate_put),
3687};
3688
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3689static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
3690{
3691 int idx;
3692
3693 switch (be_id) {
3694 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3695 idx = EXT_DISP_RX_IDX_DP;
3696 break;
3697 default:
3698 pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
3699 idx = -EINVAL;
3700 break;
3701 }
3702
3703 return idx;
3704}
3705
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]3706static int kona_send_island_va_config(int32_t be_id)
3707{
3708 int rc = 0;
3709 int port_id = 0xFFFF;
3710
3711 port_id = msm_get_port_id(be_id);
3712 if (port_id < 0) {
3713 pr_err("%s: Invalid island interface, be_id: %d\n",
3714 __func__, be_id);
3715 rc = -EINVAL;
3716 } else {
3717 /*
3718 * send island mode config
3719 * This should be the first configuration
3720 */
3721 rc = afe_send_port_island_mode(port_id);
3722 if (rc)
3723 pr_err("%s: afe send island mode failed %d\n",
3724 __func__, rc);
3725 }
3726
3727 return rc;
3728}
3729
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3730static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
3731 struct snd_pcm_hw_params *params)
3732{
3733 struct snd_soc_dai_link *dai_link = rtd->dai_link;
3734 struct snd_interval *rate = hw_param_interval(params,
3735 SNDRV_PCM_HW_PARAM_RATE);
3736 struct snd_interval *channels = hw_param_interval(params,
3737 SNDRV_PCM_HW_PARAM_CHANNELS);
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]3738 int idx = 0, rc = 0;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3739
3740 pr_debug("%s: format = %d, rate = %d\n",
3741 __func__, params_format(params), params_rate(params));
3742
3743 switch (dai_link->id) {
3744 case MSM_BACKEND_DAI_USB_RX:
3745 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3746 usb_rx_cfg.bit_format);
3747 rate->min = rate->max = usb_rx_cfg.sample_rate;
3748 channels->min = channels->max = usb_rx_cfg.channels;
3749 break;
3750
3751 case MSM_BACKEND_DAI_USB_TX:
3752 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3753 usb_tx_cfg.bit_format);
3754 rate->min = rate->max = usb_tx_cfg.sample_rate;
3755 channels->min = channels->max = usb_tx_cfg.channels;
3756 break;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]3757
3758 case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
3759 idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
3760 if (idx < 0) {
3761 pr_err("%s: Incorrect ext disp idx %d\n",
3762 __func__, idx);
3763 rc = idx;
3764 goto done;
3765 }
3766
3767 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3768 ext_disp_rx_cfg[idx].bit_format);
3769 rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
3770 channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
3771 break;
3772
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3773 case MSM_BACKEND_DAI_AFE_PCM_RX:
3774 channels->min = channels->max = proxy_rx_cfg.channels;
3775 rate->min = rate->max = SAMPLING_RATE_48KHZ;
3776 break;
3777
3778 case MSM_BACKEND_DAI_PRI_TDM_RX_0:
3779 channels->min = channels->max =
3780 tdm_rx_cfg[TDM_PRI][TDM_0].channels;
3781 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3782 tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
3783 rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
3784 break;
3785
3786 case MSM_BACKEND_DAI_PRI_TDM_TX_0:
3787 channels->min = channels->max =
3788 tdm_tx_cfg[TDM_PRI][TDM_0].channels;
3789 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3790 tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
3791 rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
3792 break;
3793
3794 case MSM_BACKEND_DAI_SEC_TDM_RX_0:
3795 channels->min = channels->max =
3796 tdm_rx_cfg[TDM_SEC][TDM_0].channels;
3797 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3798 tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
3799 rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
3800 break;
3801
3802 case MSM_BACKEND_DAI_SEC_TDM_TX_0:
3803 channels->min = channels->max =
3804 tdm_tx_cfg[TDM_SEC][TDM_0].channels;
3805 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3806 tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
3807 rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
3808 break;
3809
3810 case MSM_BACKEND_DAI_TERT_TDM_RX_0:
3811 channels->min = channels->max =
3812 tdm_rx_cfg[TDM_TERT][TDM_0].channels;
3813 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3814 tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
3815 rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
3816 break;
3817
3818 case MSM_BACKEND_DAI_TERT_TDM_TX_0:
3819 channels->min = channels->max =
3820 tdm_tx_cfg[TDM_TERT][TDM_0].channels;
3821 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3822 tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
3823 rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
3824 break;
3825
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3826 case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
3827 channels->min = channels->max =
3828 tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
3829 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3830 tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
3831 rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
3832 break;
3833
3834 case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
3835 channels->min = channels->max =
3836 tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
3837 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3838 tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
3839 rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
3840 break;
3841
3842 case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
3843 channels->min = channels->max =
3844 tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
3845 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3846 tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
3847 rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
3848 break;
3849
3850 case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
3851 channels->min = channels->max =
3852 tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
3853 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3854 tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
3855 rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
3856 break;
3857
3858 case MSM_BACKEND_DAI_SEN_TDM_RX_0:
3859 channels->min = channels->max =
3860 tdm_rx_cfg[TDM_SEN][TDM_0].channels;
3861 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3862 tdm_rx_cfg[TDM_SEN][TDM_0].bit_format);
3863 rate->min = rate->max = tdm_rx_cfg[TDM_SEN][TDM_0].sample_rate;
3864 break;
3865
3866 case MSM_BACKEND_DAI_SEN_TDM_TX_0:
3867 channels->min = channels->max =
3868 tdm_tx_cfg[TDM_SEN][TDM_0].channels;
3869 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3870 tdm_tx_cfg[TDM_SEN][TDM_0].bit_format);
3871 rate->min = rate->max = tdm_tx_cfg[TDM_SEN][TDM_0].sample_rate;
3872 break;
3873
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3874 case MSM_BACKEND_DAI_AUXPCM_RX:
3875 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3876 aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
3877 rate->min = rate->max =
3878 aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
3879 channels->min = channels->max =
3880 aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
3881 break;
3882
3883 case MSM_BACKEND_DAI_AUXPCM_TX:
3884 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3885 aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
3886 rate->min = rate->max =
3887 aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
3888 channels->min = channels->max =
3889 aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
3890 break;
3891
3892 case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
3893 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3894 aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
3895 rate->min = rate->max =
3896 aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
3897 channels->min = channels->max =
3898 aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
3899 break;
3900
3901 case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
3902 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3903 aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
3904 rate->min = rate->max =
3905 aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
3906 channels->min = channels->max =
3907 aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
3908 break;
3909
3910 case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
3911 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3912 aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
3913 rate->min = rate->max =
3914 aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
3915 channels->min = channels->max =
3916 aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
3917 break;
3918
3919 case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
3920 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3921 aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
3922 rate->min = rate->max =
3923 aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
3924 channels->min = channels->max =
3925 aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
3926 break;
3927
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]3928 case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
3929 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3930 aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
3931 rate->min = rate->max =
3932 aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
3933 channels->min = channels->max =
3934 aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
3935 break;
3936
3937 case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
3938 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3939 aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
3940 rate->min = rate->max =
3941 aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
3942 channels->min = channels->max =
3943 aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
3944 break;
3945
3946 case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
3947 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3948 aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
3949 rate->min = rate->max =
3950 aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
3951 channels->min = channels->max =
3952 aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
3953 break;
3954
3955 case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
3956 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3957 aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
3958 rate->min = rate->max =
3959 aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
3960 channels->min = channels->max =
3961 aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
3962 break;
3963
3964 case MSM_BACKEND_DAI_SEN_AUXPCM_RX:
3965 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3966 aux_pcm_rx_cfg[SEN_AUX_PCM].bit_format);
3967 rate->min = rate->max =
3968 aux_pcm_rx_cfg[SEN_AUX_PCM].sample_rate;
3969 channels->min = channels->max =
3970 aux_pcm_rx_cfg[SEN_AUX_PCM].channels;
3971 break;
3972
3973 case MSM_BACKEND_DAI_SEN_AUXPCM_TX:
3974 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3975 aux_pcm_tx_cfg[SEN_AUX_PCM].bit_format);
3976 rate->min = rate->max =
3977 aux_pcm_tx_cfg[SEN_AUX_PCM].sample_rate;
3978 channels->min = channels->max =
3979 aux_pcm_tx_cfg[SEN_AUX_PCM].channels;
3980 break;
3981
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]3982 case MSM_BACKEND_DAI_PRI_MI2S_RX:
3983 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3984 mi2s_rx_cfg[PRIM_MI2S].bit_format);
3985 rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
3986 channels->min = channels->max =
3987 mi2s_rx_cfg[PRIM_MI2S].channels;
3988 break;
3989
3990 case MSM_BACKEND_DAI_PRI_MI2S_TX:
3991 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
3992 mi2s_tx_cfg[PRIM_MI2S].bit_format);
3993 rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
3994 channels->min = channels->max =
3995 mi2s_tx_cfg[PRIM_MI2S].channels;
3996 break;
3997
3998 case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
3999 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4000 mi2s_rx_cfg[SEC_MI2S].bit_format);
4001 rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
4002 channels->min = channels->max =
4003 mi2s_rx_cfg[SEC_MI2S].channels;
4004 break;
4005
4006 case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
4007 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4008 mi2s_tx_cfg[SEC_MI2S].bit_format);
4009 rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
4010 channels->min = channels->max =
4011 mi2s_tx_cfg[SEC_MI2S].channels;
4012 break;
4013
4014 case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
4015 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4016 mi2s_rx_cfg[TERT_MI2S].bit_format);
4017 rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
4018 channels->min = channels->max =
4019 mi2s_rx_cfg[TERT_MI2S].channels;
4020 break;
4021
4022 case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
4023 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4024 mi2s_tx_cfg[TERT_MI2S].bit_format);
4025 rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
4026 channels->min = channels->max =
4027 mi2s_tx_cfg[TERT_MI2S].channels;
4028 break;
4029
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4030 case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
4031 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4032 mi2s_rx_cfg[QUAT_MI2S].bit_format);
4033 rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
4034 channels->min = channels->max =
4035 mi2s_rx_cfg[QUAT_MI2S].channels;
4036 break;
4037
4038 case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
4039 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4040 mi2s_tx_cfg[QUAT_MI2S].bit_format);
4041 rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
4042 channels->min = channels->max =
4043 mi2s_tx_cfg[QUAT_MI2S].channels;
4044 break;
4045
4046 case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
4047 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4048 mi2s_rx_cfg[QUIN_MI2S].bit_format);
4049 rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
4050 channels->min = channels->max =
4051 mi2s_rx_cfg[QUIN_MI2S].channels;
4052 break;
4053
4054 case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
4055 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4056 mi2s_tx_cfg[QUIN_MI2S].bit_format);
4057 rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
4058 channels->min = channels->max =
4059 mi2s_tx_cfg[QUIN_MI2S].channels;
4060 break;
4061
4062 case MSM_BACKEND_DAI_SENARY_MI2S_RX:
4063 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4064 mi2s_rx_cfg[SEN_MI2S].bit_format);
4065 rate->min = rate->max = mi2s_rx_cfg[SEN_MI2S].sample_rate;
4066 channels->min = channels->max =
4067 mi2s_rx_cfg[SEN_MI2S].channels;
4068 break;
4069
4070 case MSM_BACKEND_DAI_SENARY_MI2S_TX:
4071 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4072 mi2s_tx_cfg[SEN_MI2S].bit_format);
4073 rate->min = rate->max = mi2s_tx_cfg[SEN_MI2S].sample_rate;
4074 channels->min = channels->max =
4075 mi2s_tx_cfg[SEN_MI2S].channels;
4076 break;
4077
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4078 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4079 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4080 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4081 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4082 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4083 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4084 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4085 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4086 cdc_dma_rx_cfg[idx].bit_format);
4087 rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
4088 channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
4089 break;
4090
4091 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4092 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4093 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4094 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4095 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4096 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4097 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4098 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4099 idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4100 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4101 cdc_dma_tx_cfg[idx].bit_format);
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4102 rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
4103 channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
4104 break;
4105
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4106 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4107 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4108 SNDRV_PCM_FORMAT_S32_LE);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4109 rate->min = rate->max = SAMPLING_RATE_8KHZ;
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4110 channels->min = channels->max = msm_vi_feed_tx_ch;
4111 break;
4112
Banajit Goswami83a370d2019-03-05 16:15:21 -0800[diff] [blame]4113 case MSM_BACKEND_DAI_SLIMBUS_7_RX:
4114 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4115 slim_rx_cfg[SLIM_RX_7].bit_format);
4116 rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
4117 channels->min = channels->max =
4118 slim_rx_cfg[SLIM_RX_7].channels;
4119 break;
4120
4121 case MSM_BACKEND_DAI_SLIMBUS_7_TX:
4122 rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
4123 channels->min = channels->max =
4124 slim_tx_cfg[SLIM_TX_7].channels;
4125 break;
4126
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4127 case MSM_BACKEND_DAI_SLIMBUS_8_TX:
4128 rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
4129 channels->min = channels->max =
4130 slim_tx_cfg[SLIM_TX_8].channels;
4131 break;
4132
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]4133 case MSM_BACKEND_DAI_AFE_LOOPBACK_TX:
4134 param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
4135 afe_loopback_tx_cfg[idx].bit_format);
4136 rate->min = rate->max = afe_loopback_tx_cfg[idx].sample_rate;
4137 channels->min = channels->max =
4138 afe_loopback_tx_cfg[idx].channels;
4139 break;
4140
Meng Wang574f4942019-02-18 12:59:41 +0800[diff] [blame]4141 default:
4142 rate->min = rate->max = SAMPLING_RATE_48KHZ;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4143 break;
4144 }
4145
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4146done:
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4147 return rc;
4148}
4149
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]4150static bool msm_usbc_swap_gnd_mic(struct snd_soc_component *component, bool active)
4151{
4152 struct snd_soc_card *card = component->card;
4153 struct msm_asoc_mach_data *pdata =
4154 snd_soc_card_get_drvdata(card);
4155
4156 if (!pdata->fsa_handle)
4157 return false;
4158
4159 return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
4160}
4161
4162static bool msm_swap_gnd_mic(struct snd_soc_component *component, bool active)
4163{
4164 int value = 0;
4165 bool ret = false;
4166 struct snd_soc_card *card;
4167 struct msm_asoc_mach_data *pdata;
4168
4169 if (!component) {
4170 pr_err("%s component is NULL\n", __func__);
4171 return false;
4172 }
4173 card = component->card;
4174 pdata = snd_soc_card_get_drvdata(card);
4175
4176 if (!pdata)
4177 return false;
4178
4179 if (wcd_mbhc_cfg.enable_usbc_analog)
4180 return msm_usbc_swap_gnd_mic(component, active);
4181
4182 /* if usbc is not defined, swap using us_euro_gpio_p */
4183 if (pdata->us_euro_gpio_p) {
4184 value = msm_cdc_pinctrl_get_state(
4185 pdata->us_euro_gpio_p);
4186 if (value)
4187 msm_cdc_pinctrl_select_sleep_state(
4188 pdata->us_euro_gpio_p);
4189 else
4190 msm_cdc_pinctrl_select_active_state(
4191 pdata->us_euro_gpio_p);
4192 dev_dbg(component->dev, "%s: swap select switch %d to %d\n",
4193 __func__, value, !value);
4194 ret = true;
4195 }
4196
4197 return ret;
4198}
4199
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4200static int kona_tdm_snd_hw_params(struct snd_pcm_substream *substream,
4201 struct snd_pcm_hw_params *params)
4202{
4203 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4204 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4205 int ret = 0;
4206 int slot_width = 32;
4207 int channels, slots;
4208 unsigned int slot_mask, rate, clk_freq;
4209 unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
4210
4211 pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
4212
4213 /* currently only supporting TDM_RX_0 and TDM_TX_0 */
4214 switch (cpu_dai->id) {
4215 case AFE_PORT_ID_PRIMARY_TDM_RX:
4216 slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
4217 break;
4218 case AFE_PORT_ID_SECONDARY_TDM_RX:
4219 slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
4220 break;
4221 case AFE_PORT_ID_TERTIARY_TDM_RX:
4222 slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
4223 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4224 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4225 slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
4226 break;
4227 case AFE_PORT_ID_QUINARY_TDM_RX:
4228 slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
4229 break;
4230 case AFE_PORT_ID_SENARY_TDM_RX:
4231 slots = tdm_rx_cfg[TDM_SEN][TDM_0].channels;
4232 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4233 case AFE_PORT_ID_PRIMARY_TDM_TX:
4234 slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
4235 break;
4236 case AFE_PORT_ID_SECONDARY_TDM_TX:
4237 slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
4238 break;
4239 case AFE_PORT_ID_TERTIARY_TDM_TX:
4240 slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
4241 break;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4242 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4243 slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
4244 break;
4245 case AFE_PORT_ID_QUINARY_TDM_TX:
4246 slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
4247 break;
4248 case AFE_PORT_ID_SENARY_TDM_TX:
4249 slots = tdm_tx_cfg[TDM_SEN][TDM_0].channels;
4250 break;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4251
4252 default:
4253 pr_err("%s: dai id 0x%x not supported\n",
4254 __func__, cpu_dai->id);
4255 return -EINVAL;
4256 }
4257
4258 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4259 /*2 slot config - bits 0 and 1 set for the first two slots */
4260 slot_mask = 0x0000FFFF >> (16 - slots);
4261 channels = slots;
4262
4263 pr_debug("%s: tdm rx slot_width %d slots %d\n",
4264 __func__, slot_width, slots);
4265
4266 ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
4267 slots, slot_width);
4268 if (ret < 0) {
4269 pr_err("%s: failed to set tdm rx slot, err:%d\n",
4270 __func__, ret);
4271 goto end;
4272 }
4273
4274 ret = snd_soc_dai_set_channel_map(cpu_dai,
4275 0, NULL, channels, slot_offset);
4276 if (ret < 0) {
4277 pr_err("%s: failed to set tdm rx channel map, err:%d\n",
4278 __func__, ret);
4279 goto end;
4280 }
4281 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
4282 /*2 slot config - bits 0 and 1 set for the first two slots */
4283 slot_mask = 0x0000FFFF >> (16 - slots);
4284 channels = slots;
4285
4286 pr_debug("%s: tdm tx slot_width %d slots %d\n",
4287 __func__, slot_width, slots);
4288
4289 ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
4290 slots, slot_width);
4291 if (ret < 0) {
4292 pr_err("%s: failed to set tdm tx slot, err:%d\n",
4293 __func__, ret);
4294 goto end;
4295 }
4296
4297 ret = snd_soc_dai_set_channel_map(cpu_dai,
4298 channels, slot_offset, 0, NULL);
4299 if (ret < 0) {
4300 pr_err("%s: failed to set tdm tx channel map, err:%d\n",
4301 __func__, ret);
4302 goto end;
4303 }
4304 } else {
4305 ret = -EINVAL;
4306 pr_err("%s: invalid use case, err:%d\n",
4307 __func__, ret);
4308 goto end;
4309 }
4310
4311 rate = params_rate(params);
4312 clk_freq = rate * slot_width * slots;
4313 ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
4314 if (ret < 0)
4315 pr_err("%s: failed to set tdm clk, err:%d\n",
4316 __func__, ret);
4317
4318end:
4319 return ret;
4320}
4321
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4322static int msm_get_tdm_mode(u32 port_id)
4323{
4324 int tdm_mode;
4325
4326 switch (port_id) {
4327 case AFE_PORT_ID_PRIMARY_TDM_RX:
4328 case AFE_PORT_ID_PRIMARY_TDM_TX:
4329 tdm_mode = TDM_PRI;
4330 break;
4331 case AFE_PORT_ID_SECONDARY_TDM_RX:
4332 case AFE_PORT_ID_SECONDARY_TDM_TX:
4333 tdm_mode = TDM_SEC;
4334 break;
4335 case AFE_PORT_ID_TERTIARY_TDM_RX:
4336 case AFE_PORT_ID_TERTIARY_TDM_TX:
4337 tdm_mode = TDM_TERT;
4338 break;
4339 case AFE_PORT_ID_QUATERNARY_TDM_RX:
4340 case AFE_PORT_ID_QUATERNARY_TDM_TX:
4341 tdm_mode = TDM_QUAT;
4342 break;
4343 case AFE_PORT_ID_QUINARY_TDM_RX:
4344 case AFE_PORT_ID_QUINARY_TDM_TX:
4345 tdm_mode = TDM_QUIN;
4346 break;
4347 case AFE_PORT_ID_SENARY_TDM_RX:
4348 case AFE_PORT_ID_SENARY_TDM_TX:
4349 tdm_mode = TDM_SEN;
4350 break;
4351 default:
4352 pr_err("%s: Invalid port id: %d\n", __func__, port_id);
4353 tdm_mode = -EINVAL;
4354 }
4355 return tdm_mode;
4356}
4357
4358static int kona_tdm_snd_startup(struct snd_pcm_substream *substream)
4359{
4360 int ret = 0;
4361 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4362 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4363 struct snd_soc_card *card = rtd->card;
4364 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4365 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4366
4367 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4368 ret = -EINVAL;
4369 pr_err("%s: Invalid TDM interface %d\n",
4370 __func__, ret);
4371 return ret;
4372 }
4373
4374 if (pdata->mi2s_gpio_p[tdm_mode]) {
4375 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4376 == 0) {
4377 ret = msm_cdc_pinctrl_select_active_state(
4378 pdata->mi2s_gpio_p[tdm_mode]);
4379 if (ret) {
4380 pr_err("%s: TDM GPIO pinctrl set active failed with %d\n",
4381 __func__, ret);
4382 goto done;
4383 }
4384 }
4385 atomic_inc(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4386 }
4387
4388done:
4389 return ret;
4390}
4391
4392static void kona_tdm_snd_shutdown(struct snd_pcm_substream *substream)
4393{
4394 int ret = 0;
4395 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4396 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4397 struct snd_soc_card *card = rtd->card;
4398 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4399 int tdm_mode = msm_get_tdm_mode(cpu_dai->id);
4400
4401 if (tdm_mode >= TDM_INTERFACE_MAX || tdm_mode < 0) {
4402 ret = -EINVAL;
4403 pr_err("%s: Invalid TDM interface %d\n",
4404 __func__, ret);
4405 return;
4406 }
4407
4408 if (pdata->mi2s_gpio_p[tdm_mode]) {
4409 atomic_dec(&(pdata->mi2s_gpio_ref_count[tdm_mode]));
4410 if (atomic_read(&(pdata->mi2s_gpio_ref_count[tdm_mode]))
4411 == 0) {
4412 ret = msm_cdc_pinctrl_select_sleep_state(
4413 pdata->mi2s_gpio_p[tdm_mode]);
4414 if (ret)
4415 pr_err("%s: TDM GPIO pinctrl set sleep failed with %d\n",
4416 __func__, ret);
4417 }
4418 }
4419}
4420
4421static int kona_aux_snd_startup(struct snd_pcm_substream *substream)
4422{
4423 int ret = 0;
4424 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4425 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4426 struct snd_soc_card *card = rtd->card;
4427 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4428 u32 aux_mode = cpu_dai->id - 1;
4429
4430 if (aux_mode >= AUX_PCM_MAX) {
4431 ret = -EINVAL;
4432 pr_err("%s: Invalid AUX interface %d\n",
4433 __func__, ret);
4434 return ret;
4435 }
4436
4437 if (pdata->mi2s_gpio_p[aux_mode]) {
4438 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4439 == 0) {
4440 ret = msm_cdc_pinctrl_select_active_state(
4441 pdata->mi2s_gpio_p[aux_mode]);
4442 if (ret) {
4443 pr_err("%s: AUX GPIO pinctrl set active failed with %d\n",
4444 __func__, ret);
4445 goto done;
4446 }
4447 }
4448 atomic_inc(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4449 }
4450
4451done:
4452 return ret;
4453}
4454
4455static void kona_aux_snd_shutdown(struct snd_pcm_substream *substream)
4456{
4457 int ret = 0;
4458 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4459 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4460 struct snd_soc_card *card = rtd->card;
4461 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
4462 u32 aux_mode = cpu_dai->id - 1;
4463
4464 if (aux_mode >= AUX_PCM_MAX) {
4465 pr_err("%s: Invalid AUX interface %d\n",
4466 __func__, ret);
4467 return;
4468 }
4469
4470 if (pdata->mi2s_gpio_p[aux_mode]) {
4471 atomic_dec(&(pdata->mi2s_gpio_ref_count[aux_mode]));
4472 if (atomic_read(&(pdata->mi2s_gpio_ref_count[aux_mode]))
4473 == 0) {
4474 ret = msm_cdc_pinctrl_select_sleep_state(
4475 pdata->mi2s_gpio_p[aux_mode]);
4476 if (ret)
4477 pr_err("%s: AUX GPIO pinctrl set sleep failed with %d\n",
4478 __func__, ret);
4479 }
4480 }
4481}
4482
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4483static int msm_snd_cdc_dma_startup(struct snd_pcm_substream *substream)
4484{
4485 int ret = 0;
4486 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4487 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4488
4489 switch (dai_link->id) {
4490 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4491 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4492 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
4493 ret = kona_send_island_va_config(dai_link->id);
4494 if (ret)
4495 pr_err("%s: send island va cfg failed, err: %d\n",
4496 __func__, ret);
4497 break;
4498 }
4499
4500 return ret;
4501}
4502
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4503static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
4504 struct snd_pcm_hw_params *params)
4505{
4506 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4507 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4508 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4509 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4510
4511 int ret = 0;
4512 u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
4513 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4514 u32 user_set_tx_ch = 0;
4515 u32 user_set_rx_ch = 0;
4516 u32 ch_id;
4517
4518 ret = snd_soc_dai_get_channel_map(codec_dai,
4519 &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
4520 &rx_ch_cdc_dma);
4521 if (ret < 0) {
4522 pr_err("%s: failed to get codec chan map, err:%d\n",
4523 __func__, ret);
4524 goto err;
4525 }
4526
4527 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4528 switch (dai_link->id) {
4529 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
4530 case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
4531 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
4532 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
4533 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
4534 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
4535 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
4536 case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
4537 {
4538 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4539 pr_debug("%s: id %d rx_ch=%d\n", __func__,
4540 ch_id, cdc_dma_rx_cfg[ch_id].channels);
4541 user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
4542 ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
4543 user_set_rx_ch, &rx_ch_cdc_dma);
4544 if (ret < 0) {
4545 pr_err("%s: failed to set cpu chan map, err:%d\n",
4546 __func__, ret);
4547 goto err;
4548 }
4549
4550 }
4551 break;
4552 }
4553 } else {
4554 switch (dai_link->id) {
4555 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
4556 {
4557 user_set_tx_ch = msm_vi_feed_tx_ch;
4558 }
4559 break;
4560 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
4561 case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
4562 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
4563 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
4564 case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]4565 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
4566 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
4567 case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4568 {
4569 ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
4570 pr_debug("%s: id %d tx_ch=%d\n", __func__,
4571 ch_id, cdc_dma_tx_cfg[ch_id].channels);
4572 user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
4573 }
4574 break;
4575 }
4576
4577 ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
4578 &tx_ch_cdc_dma, 0, 0);
4579 if (ret < 0) {
4580 pr_err("%s: failed to set cpu chan map, err:%d\n",
4581 __func__, ret);
4582 goto err;
4583 }
4584 }
4585
4586err:
4587 return ret;
4588}
4589
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4590static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
4591{
4592 cpumask_t mask;
4593
4594 if (pm_qos_request_active(&substream->latency_pm_qos_req))
4595 pm_qos_remove_request(&substream->latency_pm_qos_req);
4596
4597 cpumask_clear(&mask);
4598 cpumask_set_cpu(1, &mask); /* affine to core 1 */
4599 cpumask_set_cpu(2, &mask); /* affine to core 2 */
4600 cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
4601
4602 substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
4603
4604 pm_qos_add_request(&substream->latency_pm_qos_req,
4605 PM_QOS_CPU_DMA_LATENCY,
4606 MSM_LL_QOS_VALUE);
4607 return 0;
4608}
4609
4610static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
4611{
4612 int ret = 0;
4613 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4614 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4615 int index = cpu_dai->id;
4616 unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4617 struct snd_soc_card *card = rtd->card;
4618 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4619
4620 dev_dbg(rtd->card->dev,
4621 "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
4622 __func__, substream->name, substream->stream,
4623 cpu_dai->name, cpu_dai->id);
4624
4625 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4626 ret = -EINVAL;
4627 dev_err(rtd->card->dev,
4628 "%s: CPU DAI id (%d) out of range\n",
4629 __func__, cpu_dai->id);
4630 goto err;
4631 }
4632 /*
4633 * Mutex protection in case the same MI2S
4634 * interface using for both TX and RX so
4635 * that the same clock won't be enable twice.
4636 */
4637 mutex_lock(&mi2s_intf_conf[index].lock);
4638 if (++mi2s_intf_conf[index].ref_cnt == 1) {
4639 /* Check if msm needs to provide the clock to the interface */
4640 if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
4641 mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
4642 fmt = SND_SOC_DAIFMT_CBM_CFM;
4643 }
4644 ret = msm_mi2s_set_sclk(substream, true);
4645 if (ret < 0) {
4646 dev_err(rtd->card->dev,
4647 "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
4648 __func__, ret);
4649 goto clean_up;
4650 }
4651
4652 ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
4653 if (ret < 0) {
4654 pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
4655 __func__, index, ret);
4656 goto clk_off;
4657 }
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4658 if (pdata->mi2s_gpio_p[index]) {
4659 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4660 == 0) {
4661 ret = msm_cdc_pinctrl_select_active_state(
4662 pdata->mi2s_gpio_p[index]);
4663 if (ret) {
4664 pr_err("%s: MI2S GPIO pinctrl set active failed with %d\n",
4665 __func__, ret);
4666 goto clk_off;
4667 }
4668 }
4669 atomic_inc(&(pdata->mi2s_gpio_ref_count[index]));
4670 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4671 }
4672clk_off:
4673 if (ret < 0)
4674 msm_mi2s_set_sclk(substream, false);
4675clean_up:
4676 if (ret < 0)
4677 mi2s_intf_conf[index].ref_cnt--;
4678 mutex_unlock(&mi2s_intf_conf[index].lock);
4679err:
4680 return ret;
4681}
4682
4683static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
4684{
4685 int ret = 0;
4686 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4687 int index = rtd->cpu_dai->id;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4688 struct snd_soc_card *card = rtd->card;
4689 struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4690
4691 pr_debug("%s(): substream = %s stream = %d\n", __func__,
4692 substream->name, substream->stream);
4693 if (index < PRIM_MI2S || index >= MI2S_MAX) {
4694 pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
4695 return;
4696 }
4697
4698 mutex_lock(&mi2s_intf_conf[index].lock);
4699 if (--mi2s_intf_conf[index].ref_cnt == 0) {
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4700 if (pdata->mi2s_gpio_p[index]) {
4701 atomic_dec(&(pdata->mi2s_gpio_ref_count[index]));
4702 if (atomic_read(&(pdata->mi2s_gpio_ref_count[index]))
4703 == 0) {
4704 ret = msm_cdc_pinctrl_select_sleep_state(
4705 pdata->mi2s_gpio_p[index]);
4706 if (ret)
4707 pr_err("%s: MI2S GPIO pinctrl set sleep failed with %d\n",
4708 __func__, ret);
4709 }
4710 }
4711
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4712 ret = msm_mi2s_set_sclk(substream, false);
4713 if (ret < 0)
4714 pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
4715 __func__, index, ret);
4716 }
4717 mutex_unlock(&mi2s_intf_conf[index].lock);
4718}
4719
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4720static int msm_wcn_hw_params_lito(struct snd_pcm_substream *substream,
4721 struct snd_pcm_hw_params *params)
4722{
4723 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4724 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4725 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4726 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4727 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO];
4728 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4729 int ret = 0;
4730
4731 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4732 codec_dai->name, codec_dai->id);
4733 ret = snd_soc_dai_get_channel_map(codec_dai,
4734 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4735 if (ret) {
4736 dev_err(rtd->dev,
4737 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4738 __func__, ret);
4739 goto err;
4740 }
4741
4742 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4743 __func__, tx_ch_cnt, dai_link->id);
4744
4745 ret = snd_soc_dai_set_channel_map(cpu_dai,
4746 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4747 if (ret)
4748 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4749 __func__, ret);
4750
4751err:
4752 return ret;
4753}
4754
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4755static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
4756 struct snd_pcm_hw_params *params)
4757{
4758 struct snd_soc_pcm_runtime *rtd = substream->private_data;
4759 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4760 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
4761 struct snd_soc_dai_link *dai_link = rtd->dai_link;
4762 u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
4763 u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
4764 int ret = 0;
4765
4766 dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
4767 codec_dai->name, codec_dai->id);
4768 ret = snd_soc_dai_get_channel_map(codec_dai,
4769 &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
4770 if (ret) {
4771 dev_err(rtd->dev,
4772 "%s: failed to get BTFM codec chan map\n, err:%d\n",
4773 __func__, ret);
4774 goto err;
4775 }
4776
4777 dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
4778 __func__, tx_ch_cnt, dai_link->id);
4779
4780 ret = snd_soc_dai_set_channel_map(cpu_dai,
4781 tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
4782 if (ret)
4783 dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
4784 __func__, ret);
4785
4786err:
4787 return ret;
4788}
4789
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4790static struct snd_soc_ops kona_aux_be_ops = {
4791 .startup = kona_aux_snd_startup,
4792 .shutdown = kona_aux_snd_shutdown
4793};
4794
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4795static struct snd_soc_ops kona_tdm_be_ops = {
4796 .hw_params = kona_tdm_snd_hw_params,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]4797 .startup = kona_tdm_snd_startup,
4798 .shutdown = kona_tdm_snd_shutdown
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]4799};
4800
4801static struct snd_soc_ops msm_mi2s_be_ops = {
4802 .startup = msm_mi2s_snd_startup,
4803 .shutdown = msm_mi2s_snd_shutdown,
4804};
4805
4806static struct snd_soc_ops msm_fe_qos_ops = {
4807 .prepare = msm_fe_qos_prepare,
4808};
4809
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4810static struct snd_soc_ops msm_cdc_dma_be_ops = {
Xiaoyu Yeffbdc9f2019-05-17 15:02:39 -0700[diff] [blame]4811 .startup = msm_snd_cdc_dma_startup,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4812 .hw_params = msm_snd_cdc_dma_hw_params,
4813};
4814
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4815static struct snd_soc_ops msm_wcn_ops = {
4816 .hw_params = msm_wcn_hw_params,
4817};
4818
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4819static struct snd_soc_ops msm_wcn_ops_lito = {
4820 .hw_params = msm_wcn_hw_params_lito,
4821};
4822
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4823static int msm_dmic_event(struct snd_soc_dapm_widget *w,
4824 struct snd_kcontrol *kcontrol, int event)
4825{
4826 struct msm_asoc_mach_data *pdata = NULL;
4827 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
4828 int ret = 0;
4829 u32 dmic_idx;
4830 int *dmic_gpio_cnt;
4831 struct device_node *dmic_gpio;
4832 char *wname;
4833
4834 wname = strpbrk(w->name, "012345");
4835 if (!wname) {
4836 dev_err(component->dev, "%s: widget not found\n", __func__);
4837 return -EINVAL;
4838 }
4839
4840 ret = kstrtouint(wname, 10, &dmic_idx);
4841 if (ret < 0) {
4842 dev_err(component->dev, "%s: Invalid DMIC line on the codec\n",
4843 __func__);
4844 return -EINVAL;
4845 }
4846
4847 pdata = snd_soc_card_get_drvdata(component->card);
4848
4849 switch (dmic_idx) {
4850 case 0:
4851 case 1:
4852 dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
4853 dmic_gpio = pdata->dmic01_gpio_p;
4854 break;
4855 case 2:
4856 case 3:
4857 dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
4858 dmic_gpio = pdata->dmic23_gpio_p;
4859 break;
4860 case 4:
4861 case 5:
4862 dmic_gpio_cnt = &dmic_4_5_gpio_cnt;
4863 dmic_gpio = pdata->dmic45_gpio_p;
4864 break;
4865 default:
4866 dev_err(component->dev, "%s: Invalid DMIC Selection\n",
4867 __func__);
4868 return -EINVAL;
4869 }
4870
4871 dev_dbg(component->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
4872 __func__, event, dmic_idx, *dmic_gpio_cnt);
4873
4874 switch (event) {
4875 case SND_SOC_DAPM_PRE_PMU:
4876 (*dmic_gpio_cnt)++;
4877 if (*dmic_gpio_cnt == 1) {
4878 ret = msm_cdc_pinctrl_select_active_state(
4879 dmic_gpio);
4880 if (ret < 0) {
4881 pr_err("%s: gpio set cannot be activated %sd",
4882 __func__, "dmic_gpio");
4883 return ret;
4884 }
4885 }
4886
4887 break;
4888 case SND_SOC_DAPM_POST_PMD:
4889 (*dmic_gpio_cnt)--;
4890 if (*dmic_gpio_cnt == 0) {
4891 ret = msm_cdc_pinctrl_select_sleep_state(
4892 dmic_gpio);
4893 if (ret < 0) {
4894 pr_err("%s: gpio set cannot be de-activated %sd",
4895 __func__, "dmic_gpio");
4896 return ret;
4897 }
4898 }
4899 break;
4900 default:
4901 pr_err("%s: invalid DAPM event %d\n", __func__, event);
4902 return -EINVAL;
4903 }
4904 return 0;
4905}
4906
4907static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
4908 SND_SOC_DAPM_MIC("Analog Mic1", NULL),
4909 SND_SOC_DAPM_MIC("Analog Mic2", NULL),
4910 SND_SOC_DAPM_MIC("Analog Mic3", NULL),
4911 SND_SOC_DAPM_MIC("Analog Mic4", NULL),
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4912 SND_SOC_DAPM_MIC("Analog Mic5", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4913 SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
4914 SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
4915 SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
4916 SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
4917 SND_SOC_DAPM_MIC("Digital Mic4", msm_dmic_event),
4918 SND_SOC_DAPM_MIC("Digital Mic5", msm_dmic_event),
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]4919 SND_SOC_DAPM_MIC("Digital Mic6", NULL),
4920 SND_SOC_DAPM_MIC("Digital Mic7", NULL),
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4921};
4922
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]4923static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
4924{
4925 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4926 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160};
4927 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4928
4929 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4930 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4931}
4932
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]4933static int msm_wcn_init_lito(struct snd_soc_pcm_runtime *rtd)
4934{
4935 unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
4936 unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX_LITO] = {159, 160, 161};
4937 struct snd_soc_dai *codec_dai = rtd->codec_dai;
4938
4939 return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
4940 tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
4941}
4942
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4943static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
4944{
4945 int ret = -EINVAL;
4946 struct snd_soc_component *component;
4947 struct snd_soc_dapm_context *dapm;
4948 struct snd_card *card;
4949 struct snd_info_entry *entry;
4950 struct snd_soc_component *aux_comp;
4951 struct msm_asoc_mach_data *pdata =
4952 snd_soc_card_get_drvdata(rtd->card);
4953
4954 component = snd_soc_rtdcom_lookup(rtd, "bolero_codec");
4955 if (!component) {
4956 pr_err("%s: could not find component for bolero_codec\n",
4957 __func__);
4958 return ret;
4959 }
4960
4961 dapm = snd_soc_component_get_dapm(component);
4962
4963 ret = snd_soc_add_component_controls(component, msm_int_snd_controls,
4964 ARRAY_SIZE(msm_int_snd_controls));
4965 if (ret < 0) {
4966 pr_err("%s: add_component_controls failed: %d\n",
4967 __func__, ret);
4968 return ret;
4969 }
4970 ret = snd_soc_add_component_controls(component, msm_common_snd_controls,
4971 ARRAY_SIZE(msm_common_snd_controls));
4972 if (ret < 0) {
4973 pr_err("%s: add common snd controls failed: %d\n",
4974 __func__, ret);
4975 return ret;
4976 }
4977
4978 snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
4979 ARRAY_SIZE(msm_int_dapm_widgets));
4980
4981 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
4982 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
4983 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
4984 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
Sudheer Papothi3fc2d772019-05-11 14:11:29 +0530[diff] [blame]4985 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
4986 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
Laxminath Kasamdb79e5f2019-07-18 13:47:57 +0530[diff] [blame]4987 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic6");
4988 snd_soc_dapm_ignore_suspend(dapm, "Digital Mic7");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4989
4990 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
4991 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
4992 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
4993 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]4994 snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]4995
4996 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
4997 snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
4998 snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
4999 snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
5000
5001 snd_soc_dapm_sync(dapm);
5002
5003 /*
5004 * Send speaker configuration only for WSA8810.
5005 * Default configuration is for WSA8815.
5006 */
5007 dev_dbg(component->dev, "%s: Number of aux devices: %d\n",
5008 __func__, rtd->card->num_aux_devs);
5009 if (rtd->card->num_aux_devs &&
5010 !list_empty(&rtd->card->component_dev_list)) {
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5011 list_for_each_entry(aux_comp,
5012 &rtd->card->aux_comp_list,
5013 card_aux_list) {
5014 if (aux_comp->name != NULL && (
5015 !strcmp(aux_comp->name, WSA8810_NAME_1) ||
5016 !strcmp(aux_comp->name, WSA8810_NAME_2))) {
5017 wsa_macro_set_spkr_mode(component,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5018 WSA_MACRO_SPKR_MODE_1);
Meng Wangbb5e0e92019-06-05 15:24:39 +0800[diff] [blame]5019 wsa_macro_set_spkr_gain_offset(component,
5020 WSA_MACRO_GAIN_OFFSET_M1P5_DB);
5021 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5022 }
Karthikeyan Mani7eef68e2018-12-13 17:45:02 -0800[diff] [blame]5023 bolero_set_port_map(component, ARRAY_SIZE(sm_port_map),
5024 sm_port_map);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5025 }
5026 card = rtd->card->snd_card;
5027 if (!pdata->codec_root) {
5028 entry = snd_info_create_subdir(card->module, "codecs",
5029 card->proc_root);
5030 if (!entry) {
5031 pr_debug("%s: Cannot create codecs module entry\n",
5032 __func__);
5033 ret = 0;
5034 goto err;
5035 }
5036 pdata->codec_root = entry;
5037 }
5038 bolero_info_create_codec_entry(pdata->codec_root, component);
Karthikeyan Mani664bd4a2019-02-21 13:30:34 -0800[diff] [blame]5039 bolero_register_wake_irq(component, false);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5040 codec_reg_done = true;
5041 return 0;
5042err:
5043 return ret;
5044}
5045
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]5046static void *def_wcd_mbhc_cal(void)
5047{
5048 void *wcd_mbhc_cal;
5049 struct wcd_mbhc_btn_detect_cfg *btn_cfg;
5050 u16 *btn_high;
5051
5052 wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
5053 WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
5054 if (!wcd_mbhc_cal)
5055 return NULL;
5056
5057 WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->v_hs_max = WCD_MBHC_HS_V_MAX;
5058 WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->num_btn = WCD_MBHC_DEF_BUTTONS;
5059 btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
5060 btn_high = ((void *)&btn_cfg->_v_btn_low) +
5061 (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
5062
5063 btn_high[0] = 75;
5064 btn_high[1] = 150;
5065 btn_high[2] = 237;
5066 btn_high[3] = 500;
5067 btn_high[4] = 500;
5068 btn_high[5] = 500;
5069 btn_high[6] = 500;
5070 btn_high[7] = 500;
5071
5072 return wcd_mbhc_cal;
5073}
5074
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5075/* Digital audio interface glue - connects codec <---> CPU */
5076static struct snd_soc_dai_link msm_common_dai_links[] = {
5077 /* FrontEnd DAI Links */
5078 {/* hw:x,0 */
5079 .name = MSM_DAILINK_NAME(Media1),
5080 .stream_name = "MultiMedia1",
5081 .cpu_dai_name = "MultiMedia1",
5082 .platform_name = "msm-pcm-dsp.0",
5083 .dynamic = 1,
5084 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5085 .dpcm_playback = 1,
5086 .dpcm_capture = 1,
5087 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5088 SND_SOC_DPCM_TRIGGER_POST},
5089 .codec_dai_name = "snd-soc-dummy-dai",
5090 .codec_name = "snd-soc-dummy",
5091 .ignore_suspend = 1,
5092 /* this dainlink has playback support */
5093 .ignore_pmdown_time = 1,
5094 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
5095 },
5096 {/* hw:x,1 */
5097 .name = MSM_DAILINK_NAME(Media2),
5098 .stream_name = "MultiMedia2",
5099 .cpu_dai_name = "MultiMedia2",
5100 .platform_name = "msm-pcm-dsp.0",
5101 .dynamic = 1,
5102 .dpcm_playback = 1,
5103 .dpcm_capture = 1,
5104 .codec_dai_name = "snd-soc-dummy-dai",
5105 .codec_name = "snd-soc-dummy",
5106 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5107 SND_SOC_DPCM_TRIGGER_POST},
5108 .ignore_suspend = 1,
5109 /* this dainlink has playback support */
5110 .ignore_pmdown_time = 1,
5111 .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
5112 },
5113 {/* hw:x,2 */
5114 .name = "VoiceMMode1",
5115 .stream_name = "VoiceMMode1",
5116 .cpu_dai_name = "VoiceMMode1",
5117 .platform_name = "msm-pcm-voice",
5118 .dynamic = 1,
5119 .dpcm_playback = 1,
5120 .dpcm_capture = 1,
5121 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5122 SND_SOC_DPCM_TRIGGER_POST},
5123 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5124 .ignore_suspend = 1,
5125 .ignore_pmdown_time = 1,
5126 .codec_dai_name = "snd-soc-dummy-dai",
5127 .codec_name = "snd-soc-dummy",
5128 .id = MSM_FRONTEND_DAI_VOICEMMODE1,
5129 },
5130 {/* hw:x,3 */
5131 .name = "MSM VoIP",
5132 .stream_name = "VoIP",
5133 .cpu_dai_name = "VoIP",
5134 .platform_name = "msm-voip-dsp",
5135 .dynamic = 1,
5136 .dpcm_playback = 1,
5137 .dpcm_capture = 1,
5138 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5139 SND_SOC_DPCM_TRIGGER_POST},
5140 .codec_dai_name = "snd-soc-dummy-dai",
5141 .codec_name = "snd-soc-dummy",
5142 .ignore_suspend = 1,
5143 /* this dainlink has playback support */
5144 .ignore_pmdown_time = 1,
5145 .id = MSM_FRONTEND_DAI_VOIP,
5146 },
5147 {/* hw:x,4 */
5148 .name = MSM_DAILINK_NAME(ULL),
5149 .stream_name = "MultiMedia3",
5150 .cpu_dai_name = "MultiMedia3",
5151 .platform_name = "msm-pcm-dsp.2",
5152 .dynamic = 1,
5153 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5154 .dpcm_playback = 1,
5155 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5156 SND_SOC_DPCM_TRIGGER_POST},
5157 .codec_dai_name = "snd-soc-dummy-dai",
5158 .codec_name = "snd-soc-dummy",
5159 .ignore_suspend = 1,
5160 /* this dainlink has playback support */
5161 .ignore_pmdown_time = 1,
5162 .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
5163 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5164 {/* hw:x,5 */
5165 .name = "MSM AFE-PCM RX",
5166 .stream_name = "AFE-PROXY RX",
5167 .cpu_dai_name = "msm-dai-q6-dev.241",
5168 .codec_name = "msm-stub-codec.1",
5169 .codec_dai_name = "msm-stub-rx",
5170 .platform_name = "msm-pcm-afe",
5171 .dpcm_playback = 1,
5172 .ignore_suspend = 1,
5173 /* this dainlink has playback support */
5174 .ignore_pmdown_time = 1,
5175 },
5176 {/* hw:x,6 */
5177 .name = "MSM AFE-PCM TX",
5178 .stream_name = "AFE-PROXY TX",
5179 .cpu_dai_name = "msm-dai-q6-dev.240",
5180 .codec_name = "msm-stub-codec.1",
5181 .codec_dai_name = "msm-stub-tx",
5182 .platform_name = "msm-pcm-afe",
5183 .dpcm_capture = 1,
5184 .ignore_suspend = 1,
5185 },
5186 {/* hw:x,7 */
5187 .name = MSM_DAILINK_NAME(Compress1),
5188 .stream_name = "Compress1",
5189 .cpu_dai_name = "MultiMedia4",
5190 .platform_name = "msm-compress-dsp",
5191 .dynamic = 1,
5192 .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
5193 .dpcm_playback = 1,
5194 .dpcm_capture = 1,
5195 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5196 SND_SOC_DPCM_TRIGGER_POST},
5197 .codec_dai_name = "snd-soc-dummy-dai",
5198 .codec_name = "snd-soc-dummy",
5199 .ignore_suspend = 1,
5200 .ignore_pmdown_time = 1,
5201 /* this dainlink has playback support */
5202 .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
5203 },
Meng Wang197cb302019-03-01 13:54:38 +0800[diff] [blame]5204 /* Hostless PCM purpose */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5205 {/* hw:x,8 */
5206 .name = "AUXPCM Hostless",
5207 .stream_name = "AUXPCM Hostless",
5208 .cpu_dai_name = "AUXPCM_HOSTLESS",
5209 .platform_name = "msm-pcm-hostless",
5210 .dynamic = 1,
5211 .dpcm_playback = 1,
5212 .dpcm_capture = 1,
5213 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5214 SND_SOC_DPCM_TRIGGER_POST},
5215 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5216 .ignore_suspend = 1,
5217 /* this dainlink has playback support */
5218 .ignore_pmdown_time = 1,
5219 .codec_dai_name = "snd-soc-dummy-dai",
5220 .codec_name = "snd-soc-dummy",
5221 },
5222 {/* hw:x,9 */
5223 .name = MSM_DAILINK_NAME(LowLatency),
5224 .stream_name = "MultiMedia5",
5225 .cpu_dai_name = "MultiMedia5",
5226 .platform_name = "msm-pcm-dsp.1",
5227 .dynamic = 1,
5228 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
5229 .dpcm_playback = 1,
5230 .dpcm_capture = 1,
5231 .codec_dai_name = "snd-soc-dummy-dai",
5232 .codec_name = "snd-soc-dummy",
5233 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5234 SND_SOC_DPCM_TRIGGER_POST},
5235 .ignore_suspend = 1,
5236 /* this dainlink has playback support */
5237 .ignore_pmdown_time = 1,
5238 .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
5239 .ops = &msm_fe_qos_ops,
5240 },
5241 {/* hw:x,10 */
5242 .name = "Listen 1 Audio Service",
5243 .stream_name = "Listen 1 Audio Service",
5244 .cpu_dai_name = "LSM1",
5245 .platform_name = "msm-lsm-client",
5246 .dynamic = 1,
5247 .dpcm_capture = 1,
5248 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5249 SND_SOC_DPCM_TRIGGER_POST },
5250 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5251 .ignore_suspend = 1,
5252 .codec_dai_name = "snd-soc-dummy-dai",
5253 .codec_name = "snd-soc-dummy",
5254 .id = MSM_FRONTEND_DAI_LSM1,
5255 },
5256 /* Multiple Tunnel instances */
5257 {/* hw:x,11 */
5258 .name = MSM_DAILINK_NAME(Compress2),
5259 .stream_name = "Compress2",
5260 .cpu_dai_name = "MultiMedia7",
5261 .platform_name = "msm-compress-dsp",
5262 .dynamic = 1,
5263 .dpcm_playback = 1,
5264 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5265 SND_SOC_DPCM_TRIGGER_POST},
5266 .codec_dai_name = "snd-soc-dummy-dai",
5267 .codec_name = "snd-soc-dummy",
5268 .ignore_suspend = 1,
5269 .ignore_pmdown_time = 1,
5270 /* this dainlink has playback support */
5271 .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
5272 },
5273 {/* hw:x,12 */
5274 .name = MSM_DAILINK_NAME(MultiMedia10),
5275 .stream_name = "MultiMedia10",
5276 .cpu_dai_name = "MultiMedia10",
5277 .platform_name = "msm-pcm-dsp.1",
5278 .dynamic = 1,
5279 .dpcm_playback = 1,
5280 .dpcm_capture = 1,
5281 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5282 SND_SOC_DPCM_TRIGGER_POST},
5283 .codec_dai_name = "snd-soc-dummy-dai",
5284 .codec_name = "snd-soc-dummy",
5285 .ignore_suspend = 1,
5286 .ignore_pmdown_time = 1,
5287 /* this dainlink has playback support */
5288 .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
5289 },
5290 {/* hw:x,13 */
5291 .name = MSM_DAILINK_NAME(ULL_NOIRQ),
5292 .stream_name = "MM_NOIRQ",
5293 .cpu_dai_name = "MultiMedia8",
5294 .platform_name = "msm-pcm-dsp-noirq",
5295 .dynamic = 1,
5296 .dpcm_playback = 1,
5297 .dpcm_capture = 1,
5298 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5299 SND_SOC_DPCM_TRIGGER_POST},
5300 .codec_dai_name = "snd-soc-dummy-dai",
5301 .codec_name = "snd-soc-dummy",
5302 .ignore_suspend = 1,
5303 .ignore_pmdown_time = 1,
5304 /* this dainlink has playback support */
5305 .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
5306 .ops = &msm_fe_qos_ops,
5307 },
5308 /* HDMI Hostless */
5309 {/* hw:x,14 */
5310 .name = "HDMI_RX_HOSTLESS",
5311 .stream_name = "HDMI_RX_HOSTLESS",
5312 .cpu_dai_name = "HDMI_HOSTLESS",
5313 .platform_name = "msm-pcm-hostless",
5314 .dynamic = 1,
5315 .dpcm_playback = 1,
5316 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5317 SND_SOC_DPCM_TRIGGER_POST},
5318 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5319 .ignore_suspend = 1,
5320 .ignore_pmdown_time = 1,
5321 .codec_dai_name = "snd-soc-dummy-dai",
5322 .codec_name = "snd-soc-dummy",
5323 },
5324 {/* hw:x,15 */
5325 .name = "VoiceMMode2",
5326 .stream_name = "VoiceMMode2",
5327 .cpu_dai_name = "VoiceMMode2",
5328 .platform_name = "msm-pcm-voice",
5329 .dynamic = 1,
5330 .dpcm_playback = 1,
5331 .dpcm_capture = 1,
5332 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5333 SND_SOC_DPCM_TRIGGER_POST},
5334 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5335 .ignore_suspend = 1,
5336 .ignore_pmdown_time = 1,
5337 .codec_dai_name = "snd-soc-dummy-dai",
5338 .codec_name = "snd-soc-dummy",
5339 .id = MSM_FRONTEND_DAI_VOICEMMODE2,
5340 },
5341 /* LSM FE */
5342 {/* hw:x,16 */
5343 .name = "Listen 2 Audio Service",
5344 .stream_name = "Listen 2 Audio Service",
5345 .cpu_dai_name = "LSM2",
5346 .platform_name = "msm-lsm-client",
5347 .dynamic = 1,
5348 .dpcm_capture = 1,
5349 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5350 SND_SOC_DPCM_TRIGGER_POST },
5351 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5352 .ignore_suspend = 1,
5353 .codec_dai_name = "snd-soc-dummy-dai",
5354 .codec_name = "snd-soc-dummy",
5355 .id = MSM_FRONTEND_DAI_LSM2,
5356 },
5357 {/* hw:x,17 */
5358 .name = "Listen 3 Audio Service",
5359 .stream_name = "Listen 3 Audio Service",
5360 .cpu_dai_name = "LSM3",
5361 .platform_name = "msm-lsm-client",
5362 .dynamic = 1,
5363 .dpcm_capture = 1,
5364 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5365 SND_SOC_DPCM_TRIGGER_POST },
5366 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5367 .ignore_suspend = 1,
5368 .codec_dai_name = "snd-soc-dummy-dai",
5369 .codec_name = "snd-soc-dummy",
5370 .id = MSM_FRONTEND_DAI_LSM3,
5371 },
5372 {/* hw:x,18 */
5373 .name = "Listen 4 Audio Service",
5374 .stream_name = "Listen 4 Audio Service",
5375 .cpu_dai_name = "LSM4",
5376 .platform_name = "msm-lsm-client",
5377 .dynamic = 1,
5378 .dpcm_capture = 1,
5379 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5380 SND_SOC_DPCM_TRIGGER_POST },
5381 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5382 .ignore_suspend = 1,
5383 .codec_dai_name = "snd-soc-dummy-dai",
5384 .codec_name = "snd-soc-dummy",
5385 .id = MSM_FRONTEND_DAI_LSM4,
5386 },
5387 {/* hw:x,19 */
5388 .name = "Listen 5 Audio Service",
5389 .stream_name = "Listen 5 Audio Service",
5390 .cpu_dai_name = "LSM5",
5391 .platform_name = "msm-lsm-client",
5392 .dynamic = 1,
5393 .dpcm_capture = 1,
5394 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5395 SND_SOC_DPCM_TRIGGER_POST },
5396 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5397 .ignore_suspend = 1,
5398 .codec_dai_name = "snd-soc-dummy-dai",
5399 .codec_name = "snd-soc-dummy",
5400 .id = MSM_FRONTEND_DAI_LSM5,
5401 },
5402 {/* hw:x,20 */
5403 .name = "Listen 6 Audio Service",
5404 .stream_name = "Listen 6 Audio Service",
5405 .cpu_dai_name = "LSM6",
5406 .platform_name = "msm-lsm-client",
5407 .dynamic = 1,
5408 .dpcm_capture = 1,
5409 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5410 SND_SOC_DPCM_TRIGGER_POST },
5411 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5412 .ignore_suspend = 1,
5413 .codec_dai_name = "snd-soc-dummy-dai",
5414 .codec_name = "snd-soc-dummy",
5415 .id = MSM_FRONTEND_DAI_LSM6,
5416 },
5417 {/* hw:x,21 */
5418 .name = "Listen 7 Audio Service",
5419 .stream_name = "Listen 7 Audio Service",
5420 .cpu_dai_name = "LSM7",
5421 .platform_name = "msm-lsm-client",
5422 .dynamic = 1,
5423 .dpcm_capture = 1,
5424 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5425 SND_SOC_DPCM_TRIGGER_POST },
5426 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5427 .ignore_suspend = 1,
5428 .codec_dai_name = "snd-soc-dummy-dai",
5429 .codec_name = "snd-soc-dummy",
5430 .id = MSM_FRONTEND_DAI_LSM7,
5431 },
5432 {/* hw:x,22 */
5433 .name = "Listen 8 Audio Service",
5434 .stream_name = "Listen 8 Audio Service",
5435 .cpu_dai_name = "LSM8",
5436 .platform_name = "msm-lsm-client",
5437 .dynamic = 1,
5438 .dpcm_capture = 1,
5439 .trigger = { SND_SOC_DPCM_TRIGGER_POST,
5440 SND_SOC_DPCM_TRIGGER_POST },
5441 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5442 .ignore_suspend = 1,
5443 .codec_dai_name = "snd-soc-dummy-dai",
5444 .codec_name = "snd-soc-dummy",
5445 .id = MSM_FRONTEND_DAI_LSM8,
5446 },
5447 {/* hw:x,23 */
5448 .name = MSM_DAILINK_NAME(Media9),
5449 .stream_name = "MultiMedia9",
5450 .cpu_dai_name = "MultiMedia9",
5451 .platform_name = "msm-pcm-dsp.0",
5452 .dynamic = 1,
5453 .dpcm_playback = 1,
5454 .dpcm_capture = 1,
5455 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5456 SND_SOC_DPCM_TRIGGER_POST},
5457 .codec_dai_name = "snd-soc-dummy-dai",
5458 .codec_name = "snd-soc-dummy",
5459 .ignore_suspend = 1,
5460 /* this dainlink has playback support */
5461 .ignore_pmdown_time = 1,
5462 .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
5463 },
5464 {/* hw:x,24 */
5465 .name = MSM_DAILINK_NAME(Compress4),
5466 .stream_name = "Compress4",
5467 .cpu_dai_name = "MultiMedia11",
5468 .platform_name = "msm-compress-dsp",
5469 .dynamic = 1,
5470 .dpcm_playback = 1,
5471 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5472 SND_SOC_DPCM_TRIGGER_POST},
5473 .codec_dai_name = "snd-soc-dummy-dai",
5474 .codec_name = "snd-soc-dummy",
5475 .ignore_suspend = 1,
5476 .ignore_pmdown_time = 1,
5477 /* this dainlink has playback support */
5478 .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
5479 },
5480 {/* hw:x,25 */
5481 .name = MSM_DAILINK_NAME(Compress5),
5482 .stream_name = "Compress5",
5483 .cpu_dai_name = "MultiMedia12",
5484 .platform_name = "msm-compress-dsp",
5485 .dynamic = 1,
5486 .dpcm_playback = 1,
5487 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5488 SND_SOC_DPCM_TRIGGER_POST},
5489 .codec_dai_name = "snd-soc-dummy-dai",
5490 .codec_name = "snd-soc-dummy",
5491 .ignore_suspend = 1,
5492 .ignore_pmdown_time = 1,
5493 /* this dainlink has playback support */
5494 .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
5495 },
5496 {/* hw:x,26 */
5497 .name = MSM_DAILINK_NAME(Compress6),
5498 .stream_name = "Compress6",
5499 .cpu_dai_name = "MultiMedia13",
5500 .platform_name = "msm-compress-dsp",
5501 .dynamic = 1,
5502 .dpcm_playback = 1,
5503 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5504 SND_SOC_DPCM_TRIGGER_POST},
5505 .codec_dai_name = "snd-soc-dummy-dai",
5506 .codec_name = "snd-soc-dummy",
5507 .ignore_suspend = 1,
5508 .ignore_pmdown_time = 1,
5509 /* this dainlink has playback support */
5510 .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
5511 },
5512 {/* hw:x,27 */
5513 .name = MSM_DAILINK_NAME(Compress7),
5514 .stream_name = "Compress7",
5515 .cpu_dai_name = "MultiMedia14",
5516 .platform_name = "msm-compress-dsp",
5517 .dynamic = 1,
5518 .dpcm_playback = 1,
5519 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5520 SND_SOC_DPCM_TRIGGER_POST},
5521 .codec_dai_name = "snd-soc-dummy-dai",
5522 .codec_name = "snd-soc-dummy",
5523 .ignore_suspend = 1,
5524 .ignore_pmdown_time = 1,
5525 /* this dainlink has playback support */
5526 .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
5527 },
5528 {/* hw:x,28 */
5529 .name = MSM_DAILINK_NAME(Compress8),
5530 .stream_name = "Compress8",
5531 .cpu_dai_name = "MultiMedia15",
5532 .platform_name = "msm-compress-dsp",
5533 .dynamic = 1,
5534 .dpcm_playback = 1,
5535 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5536 SND_SOC_DPCM_TRIGGER_POST},
5537 .codec_dai_name = "snd-soc-dummy-dai",
5538 .codec_name = "snd-soc-dummy",
5539 .ignore_suspend = 1,
5540 .ignore_pmdown_time = 1,
5541 /* this dainlink has playback support */
5542 .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
5543 },
5544 {/* hw:x,29 */
5545 .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
5546 .stream_name = "MM_NOIRQ_2",
5547 .cpu_dai_name = "MultiMedia16",
5548 .platform_name = "msm-pcm-dsp-noirq",
5549 .dynamic = 1,
5550 .dpcm_playback = 1,
5551 .dpcm_capture = 1,
5552 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5553 SND_SOC_DPCM_TRIGGER_POST},
5554 .codec_dai_name = "snd-soc-dummy-dai",
5555 .codec_name = "snd-soc-dummy",
5556 .ignore_suspend = 1,
5557 .ignore_pmdown_time = 1,
5558 /* this dainlink has playback support */
5559 .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
Arun Mirpuri149008c2019-07-17 17:49:49 -0700[diff] [blame]5560 .ops = &msm_fe_qos_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5561 },
5562 {/* hw:x,30 */
5563 .name = "CDC_DMA Hostless",
5564 .stream_name = "CDC_DMA Hostless",
5565 .cpu_dai_name = "CDC_DMA_HOSTLESS",
5566 .platform_name = "msm-pcm-hostless",
5567 .dynamic = 1,
5568 .dpcm_playback = 1,
5569 .dpcm_capture = 1,
5570 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5571 SND_SOC_DPCM_TRIGGER_POST},
5572 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5573 .ignore_suspend = 1,
5574 /* this dailink has playback support */
5575 .ignore_pmdown_time = 1,
5576 .codec_dai_name = "snd-soc-dummy-dai",
5577 .codec_name = "snd-soc-dummy",
5578 },
5579 {/* hw:x,31 */
5580 .name = "TX3_CDC_DMA Hostless",
5581 .stream_name = "TX3_CDC_DMA Hostless",
5582 .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
5583 .platform_name = "msm-pcm-hostless",
5584 .dynamic = 1,
5585 .dpcm_capture = 1,
5586 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5587 SND_SOC_DPCM_TRIGGER_POST},
5588 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5589 .ignore_suspend = 1,
5590 .codec_dai_name = "snd-soc-dummy-dai",
5591 .codec_name = "snd-soc-dummy",
5592 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5593 {/* hw:x,32 */
5594 .name = "Tertiary MI2S TX_Hostless",
5595 .stream_name = "Tertiary MI2S_TX Hostless Capture",
5596 .cpu_dai_name = "TERT_MI2S_TX_HOSTLESS",
5597 .platform_name = "msm-pcm-hostless",
5598 .dynamic = 1,
5599 .dpcm_capture = 1,
5600 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5601 SND_SOC_DPCM_TRIGGER_POST},
5602 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5603 .ignore_suspend = 1,
5604 .ignore_pmdown_time = 1,
5605 .codec_dai_name = "snd-soc-dummy-dai",
5606 .codec_name = "snd-soc-dummy",
5607 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5608};
5609
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5610static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5611 {/* hw:x,33 */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]5612 .name = LPASS_BE_WSA_CDC_DMA_TX_0,
5613 .stream_name = "WSA CDC DMA0 Capture",
5614 .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
5615 .platform_name = "msm-pcm-hostless",
5616 .codec_name = "bolero_codec",
5617 .codec_dai_name = "wsa_macro_vifeedback",
5618 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
5619 .be_hw_params_fixup = msm_be_hw_params_fixup,
5620 .ignore_suspend = 1,
5621 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5622 .ops = &msm_cdc_dma_be_ops,
5623 },
5624};
5625
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5626static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5627 {/* hw:x,34 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5628 .name = MSM_DAILINK_NAME(ASM Loopback),
5629 .stream_name = "MultiMedia6",
5630 .cpu_dai_name = "MultiMedia6",
5631 .platform_name = "msm-pcm-loopback",
5632 .dynamic = 1,
5633 .dpcm_playback = 1,
5634 .dpcm_capture = 1,
5635 .codec_dai_name = "snd-soc-dummy-dai",
5636 .codec_name = "snd-soc-dummy",
5637 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5638 SND_SOC_DPCM_TRIGGER_POST},
5639 .ignore_suspend = 1,
5640 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5641 .ignore_pmdown_time = 1,
5642 .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
5643 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5644 {/* hw:x,35 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5645 .name = "USB Audio Hostless",
5646 .stream_name = "USB Audio Hostless",
5647 .cpu_dai_name = "USBAUDIO_HOSTLESS",
5648 .platform_name = "msm-pcm-hostless",
5649 .dynamic = 1,
5650 .dpcm_playback = 1,
5651 .dpcm_capture = 1,
5652 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5653 SND_SOC_DPCM_TRIGGER_POST},
5654 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5655 .ignore_suspend = 1,
5656 .ignore_pmdown_time = 1,
5657 .codec_dai_name = "snd-soc-dummy-dai",
5658 .codec_name = "snd-soc-dummy",
5659 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5660 {/* hw:x,36 */
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5661 .name = "SLIMBUS_7 Hostless",
5662 .stream_name = "SLIMBUS_7 Hostless",
5663 .cpu_dai_name = "SLIMBUS7_HOSTLESS",
5664 .platform_name = "msm-pcm-hostless",
5665 .dynamic = 1,
5666 .dpcm_capture = 1,
5667 .dpcm_playback = 1,
5668 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5669 SND_SOC_DPCM_TRIGGER_POST},
5670 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5671 .ignore_suspend = 1,
5672 .ignore_pmdown_time = 1,
5673 .codec_dai_name = "snd-soc-dummy-dai",
5674 .codec_name = "snd-soc-dummy",
5675 },
Karthikeyan Manif0de7562019-03-04 16:39:41 -0800[diff] [blame]5676 {/* hw:x,37 */
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]5677 .name = "Compress Capture",
5678 .stream_name = "Compress9",
5679 .cpu_dai_name = "MultiMedia17",
5680 .platform_name = "msm-compress-dsp",
5681 .dynamic = 1,
5682 .dpcm_capture = 1,
5683 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5684 SND_SOC_DPCM_TRIGGER_POST},
5685 .codec_dai_name = "snd-soc-dummy-dai",
5686 .codec_name = "snd-soc-dummy",
5687 .ignore_suspend = 1,
5688 .ignore_pmdown_time = 1,
5689 .id = MSM_FRONTEND_DAI_MULTIMEDIA17,
5690 },
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]5691 {/* hw:x,38 */
5692 .name = "SLIMBUS_8 Hostless",
5693 .stream_name = "SLIMBUS_8 Hostless",
5694 .cpu_dai_name = "SLIMBUS8_HOSTLESS",
5695 .platform_name = "msm-pcm-hostless",
5696 .dynamic = 1,
5697 .dpcm_capture = 1,
5698 .dpcm_playback = 1,
5699 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
5700 SND_SOC_DPCM_TRIGGER_POST},
5701 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5702 .ignore_suspend = 1,
5703 .ignore_pmdown_time = 1,
5704 .codec_dai_name = "snd-soc-dummy-dai",
5705 .codec_name = "snd-soc-dummy",
5706 },
Karthikeyan Mani2176abc2019-07-11 14:41:05 -0700[diff] [blame]5707 {/* hw:x,39 */
5708 .name = LPASS_BE_TX_CDC_DMA_TX_5,
5709 .stream_name = "TX CDC DMA5 Capture",
5710 .cpu_dai_name = "msm-dai-cdc-dma-dev.45115",
5711 .platform_name = "msm-pcm-hostless",
5712 .codec_name = "bolero_codec",
5713 .codec_dai_name = "tx_macro_tx3",
5714 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
5715 .be_hw_params_fixup = msm_be_hw_params_fixup,
5716 .ignore_suspend = 1,
5717 .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
5718 .ops = &msm_cdc_dma_be_ops,
5719 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5720};
5721
5722static struct snd_soc_dai_link msm_common_be_dai_links[] = {
5723 /* Backend AFE DAI Links */
5724 {
5725 .name = LPASS_BE_AFE_PCM_RX,
5726 .stream_name = "AFE Playback",
5727 .cpu_dai_name = "msm-dai-q6-dev.224",
5728 .platform_name = "msm-pcm-routing",
5729 .codec_name = "msm-stub-codec.1",
5730 .codec_dai_name = "msm-stub-rx",
5731 .no_pcm = 1,
5732 .dpcm_playback = 1,
5733 .id = MSM_BACKEND_DAI_AFE_PCM_RX,
5734 .be_hw_params_fixup = msm_be_hw_params_fixup,
5735 /* this dainlink has playback support */
5736 .ignore_pmdown_time = 1,
5737 .ignore_suspend = 1,
5738 },
5739 {
5740 .name = LPASS_BE_AFE_PCM_TX,
5741 .stream_name = "AFE Capture",
5742 .cpu_dai_name = "msm-dai-q6-dev.225",
5743 .platform_name = "msm-pcm-routing",
5744 .codec_name = "msm-stub-codec.1",
5745 .codec_dai_name = "msm-stub-tx",
5746 .no_pcm = 1,
5747 .dpcm_capture = 1,
5748 .id = MSM_BACKEND_DAI_AFE_PCM_TX,
5749 .be_hw_params_fixup = msm_be_hw_params_fixup,
5750 .ignore_suspend = 1,
5751 },
5752 /* Incall Record Uplink BACK END DAI Link */
5753 {
5754 .name = LPASS_BE_INCALL_RECORD_TX,
5755 .stream_name = "Voice Uplink Capture",
5756 .cpu_dai_name = "msm-dai-q6-dev.32772",
5757 .platform_name = "msm-pcm-routing",
5758 .codec_name = "msm-stub-codec.1",
5759 .codec_dai_name = "msm-stub-tx",
5760 .no_pcm = 1,
5761 .dpcm_capture = 1,
5762 .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
5763 .be_hw_params_fixup = msm_be_hw_params_fixup,
5764 .ignore_suspend = 1,
5765 },
5766 /* Incall Record Downlink BACK END DAI Link */
5767 {
5768 .name = LPASS_BE_INCALL_RECORD_RX,
5769 .stream_name = "Voice Downlink Capture",
5770 .cpu_dai_name = "msm-dai-q6-dev.32771",
5771 .platform_name = "msm-pcm-routing",
5772 .codec_name = "msm-stub-codec.1",
5773 .codec_dai_name = "msm-stub-tx",
5774 .no_pcm = 1,
5775 .dpcm_capture = 1,
5776 .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
5777 .be_hw_params_fixup = msm_be_hw_params_fixup,
5778 .ignore_suspend = 1,
5779 },
5780 /* Incall Music BACK END DAI Link */
5781 {
5782 .name = LPASS_BE_VOICE_PLAYBACK_TX,
5783 .stream_name = "Voice Farend Playback",
5784 .cpu_dai_name = "msm-dai-q6-dev.32773",
5785 .platform_name = "msm-pcm-routing",
5786 .codec_name = "msm-stub-codec.1",
5787 .codec_dai_name = "msm-stub-rx",
5788 .no_pcm = 1,
5789 .dpcm_playback = 1,
5790 .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
5791 .be_hw_params_fixup = msm_be_hw_params_fixup,
5792 .ignore_suspend = 1,
5793 .ignore_pmdown_time = 1,
5794 },
5795 /* Incall Music 2 BACK END DAI Link */
5796 {
5797 .name = LPASS_BE_VOICE2_PLAYBACK_TX,
5798 .stream_name = "Voice2 Farend Playback",
5799 .cpu_dai_name = "msm-dai-q6-dev.32770",
5800 .platform_name = "msm-pcm-routing",
5801 .codec_name = "msm-stub-codec.1",
5802 .codec_dai_name = "msm-stub-rx",
5803 .no_pcm = 1,
5804 .dpcm_playback = 1,
5805 .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
5806 .be_hw_params_fixup = msm_be_hw_params_fixup,
5807 .ignore_suspend = 1,
5808 .ignore_pmdown_time = 1,
5809 },
5810 {
5811 .name = LPASS_BE_USB_AUDIO_RX,
5812 .stream_name = "USB Audio Playback",
5813 .cpu_dai_name = "msm-dai-q6-dev.28672",
5814 .platform_name = "msm-pcm-routing",
5815 .codec_name = "msm-stub-codec.1",
5816 .codec_dai_name = "msm-stub-rx",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]5817 .dynamic_be = 1,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]5818 .no_pcm = 1,
5819 .dpcm_playback = 1,
5820 .id = MSM_BACKEND_DAI_USB_RX,
5821 .be_hw_params_fixup = msm_be_hw_params_fixup,
5822 .ignore_pmdown_time = 1,
5823 .ignore_suspend = 1,
5824 },
5825 {
5826 .name = LPASS_BE_USB_AUDIO_TX,
5827 .stream_name = "USB Audio Capture",
5828 .cpu_dai_name = "msm-dai-q6-dev.28673",
5829 .platform_name = "msm-pcm-routing",
5830 .codec_name = "msm-stub-codec.1",
5831 .codec_dai_name = "msm-stub-tx",
5832 .no_pcm = 1,
5833 .dpcm_capture = 1,
5834 .id = MSM_BACKEND_DAI_USB_TX,
5835 .be_hw_params_fixup = msm_be_hw_params_fixup,
5836 .ignore_suspend = 1,
5837 },
5838 {
5839 .name = LPASS_BE_PRI_TDM_RX_0,
5840 .stream_name = "Primary TDM0 Playback",
5841 .cpu_dai_name = "msm-dai-q6-tdm.36864",
5842 .platform_name = "msm-pcm-routing",
5843 .codec_name = "msm-stub-codec.1",
5844 .codec_dai_name = "msm-stub-rx",
5845 .no_pcm = 1,
5846 .dpcm_playback = 1,
5847 .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
5848 .be_hw_params_fixup = msm_be_hw_params_fixup,
5849 .ops = &kona_tdm_be_ops,
5850 .ignore_suspend = 1,
5851 .ignore_pmdown_time = 1,
5852 },
5853 {
5854 .name = LPASS_BE_PRI_TDM_TX_0,
5855 .stream_name = "Primary TDM0 Capture",
5856 .cpu_dai_name = "msm-dai-q6-tdm.36865",
5857 .platform_name = "msm-pcm-routing",
5858 .codec_name = "msm-stub-codec.1",
5859 .codec_dai_name = "msm-stub-tx",
5860 .no_pcm = 1,
5861 .dpcm_capture = 1,
5862 .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
5863 .be_hw_params_fixup = msm_be_hw_params_fixup,
5864 .ops = &kona_tdm_be_ops,
5865 .ignore_suspend = 1,
5866 },
5867 {
5868 .name = LPASS_BE_SEC_TDM_RX_0,
5869 .stream_name = "Secondary TDM0 Playback",
5870 .cpu_dai_name = "msm-dai-q6-tdm.36880",
5871 .platform_name = "msm-pcm-routing",
5872 .codec_name = "msm-stub-codec.1",
5873 .codec_dai_name = "msm-stub-rx",
5874 .no_pcm = 1,
5875 .dpcm_playback = 1,
5876 .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
5877 .be_hw_params_fixup = msm_be_hw_params_fixup,
5878 .ops = &kona_tdm_be_ops,
5879 .ignore_suspend = 1,
5880 .ignore_pmdown_time = 1,
5881 },
5882 {
5883 .name = LPASS_BE_SEC_TDM_TX_0,
5884 .stream_name = "Secondary TDM0 Capture",
5885 .cpu_dai_name = "msm-dai-q6-tdm.36881",
5886 .platform_name = "msm-pcm-routing",
5887 .codec_name = "msm-stub-codec.1",
5888 .codec_dai_name = "msm-stub-tx",
5889 .no_pcm = 1,
5890 .dpcm_capture = 1,
5891 .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
5892 .be_hw_params_fixup = msm_be_hw_params_fixup,
5893 .ops = &kona_tdm_be_ops,
5894 .ignore_suspend = 1,
5895 },
5896 {
5897 .name = LPASS_BE_TERT_TDM_RX_0,
5898 .stream_name = "Tertiary TDM0 Playback",
5899 .cpu_dai_name = "msm-dai-q6-tdm.36896",
5900 .platform_name = "msm-pcm-routing",
5901 .codec_name = "msm-stub-codec.1",
5902 .codec_dai_name = "msm-stub-rx",
5903 .no_pcm = 1,
5904 .dpcm_playback = 1,
5905 .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
5906 .be_hw_params_fixup = msm_be_hw_params_fixup,
5907 .ops = &kona_tdm_be_ops,
5908 .ignore_suspend = 1,
5909 .ignore_pmdown_time = 1,
5910 },
5911 {
5912 .name = LPASS_BE_TERT_TDM_TX_0,
5913 .stream_name = "Tertiary TDM0 Capture",
5914 .cpu_dai_name = "msm-dai-q6-tdm.36897",
5915 .platform_name = "msm-pcm-routing",
5916 .codec_name = "msm-stub-codec.1",
5917 .codec_dai_name = "msm-stub-tx",
5918 .no_pcm = 1,
5919 .dpcm_capture = 1,
5920 .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
5921 .be_hw_params_fixup = msm_be_hw_params_fixup,
5922 .ops = &kona_tdm_be_ops,
5923 .ignore_suspend = 1,
5924 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]5925 {
5926 .name = LPASS_BE_QUAT_TDM_RX_0,
5927 .stream_name = "Quaternary TDM0 Playback",
5928 .cpu_dai_name = "msm-dai-q6-tdm.36912",
5929 .platform_name = "msm-pcm-routing",
5930 .codec_name = "msm-stub-codec.1",
5931 .codec_dai_name = "msm-stub-rx",
5932 .no_pcm = 1,
5933 .dpcm_playback = 1,
5934 .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
5935 .be_hw_params_fixup = msm_be_hw_params_fixup,
5936 .ops = &kona_tdm_be_ops,
5937 .ignore_suspend = 1,
5938 .ignore_pmdown_time = 1,
5939 },
5940 {
5941 .name = LPASS_BE_QUAT_TDM_TX_0,
5942 .stream_name = "Quaternary TDM0 Capture",
5943 .cpu_dai_name = "msm-dai-q6-tdm.36913",
5944 .platform_name = "msm-pcm-routing",
5945 .codec_name = "msm-stub-codec.1",
5946 .codec_dai_name = "msm-stub-tx",
5947 .no_pcm = 1,
5948 .dpcm_capture = 1,
5949 .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
5950 .be_hw_params_fixup = msm_be_hw_params_fixup,
5951 .ops = &kona_tdm_be_ops,
5952 .ignore_suspend = 1,
5953 },
5954 {
5955 .name = LPASS_BE_QUIN_TDM_RX_0,
5956 .stream_name = "Quinary TDM0 Playback",
5957 .cpu_dai_name = "msm-dai-q6-tdm.36928",
5958 .platform_name = "msm-pcm-routing",
5959 .codec_name = "msm-stub-codec.1",
5960 .codec_dai_name = "msm-stub-rx",
5961 .no_pcm = 1,
5962 .dpcm_playback = 1,
5963 .id = MSM_BACKEND_DAI_QUIN_TDM_RX_0,
5964 .be_hw_params_fixup = msm_be_hw_params_fixup,
5965 .ops = &kona_tdm_be_ops,
5966 .ignore_suspend = 1,
5967 .ignore_pmdown_time = 1,
5968 },
5969 {
5970 .name = LPASS_BE_QUIN_TDM_TX_0,
5971 .stream_name = "Quinary TDM0 Capture",
5972 .cpu_dai_name = "msm-dai-q6-tdm.36929",
5973 .platform_name = "msm-pcm-routing",
5974 .codec_name = "msm-stub-codec.1",
5975 .codec_dai_name = "msm-stub-tx",
5976 .no_pcm = 1,
5977 .dpcm_capture = 1,
5978 .id = MSM_BACKEND_DAI_QUIN_TDM_TX_0,
5979 .be_hw_params_fixup = msm_be_hw_params_fixup,
5980 .ops = &kona_tdm_be_ops,
5981 .ignore_suspend = 1,
5982 },
5983 {
5984 .name = LPASS_BE_SEN_TDM_RX_0,
5985 .stream_name = "Senary TDM0 Playback",
5986 .cpu_dai_name = "msm-dai-q6-tdm.36944",
5987 .platform_name = "msm-pcm-routing",
5988 .codec_name = "msm-stub-codec.1",
5989 .codec_dai_name = "msm-stub-rx",
5990 .no_pcm = 1,
5991 .dpcm_playback = 1,
5992 .id = MSM_BACKEND_DAI_SEN_TDM_RX_0,
5993 .be_hw_params_fixup = msm_be_hw_params_fixup,
5994 .ops = &kona_tdm_be_ops,
5995 .ignore_suspend = 1,
5996 .ignore_pmdown_time = 1,
5997 },
5998 {
5999 .name = LPASS_BE_SEN_TDM_TX_0,
6000 .stream_name = "Senary TDM0 Capture",
6001 .cpu_dai_name = "msm-dai-q6-tdm.36945",
6002 .platform_name = "msm-pcm-routing",
6003 .codec_name = "msm-stub-codec.1",
6004 .codec_dai_name = "msm-stub-tx",
6005 .no_pcm = 1,
6006 .dpcm_capture = 1,
6007 .id = MSM_BACKEND_DAI_SEN_TDM_TX_0,
6008 .be_hw_params_fixup = msm_be_hw_params_fixup,
6009 .ops = &kona_tdm_be_ops,
6010 .ignore_suspend = 1,
6011 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6012};
6013
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6014static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
6015 {
6016 .name = LPASS_BE_SLIMBUS_7_RX,
6017 .stream_name = "Slimbus7 Playback",
6018 .cpu_dai_name = "msm-dai-q6-dev.16398",
6019 .platform_name = "msm-pcm-routing",
6020 .codec_name = "btfmslim_slave",
6021 /* BT codec driver determines capabilities based on
6022 * dai name, bt codecdai name should always contains
6023 * supported usecase information
6024 */
6025 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6026 .no_pcm = 1,
6027 .dpcm_playback = 1,
6028 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6029 .be_hw_params_fixup = msm_be_hw_params_fixup,
6030 .init = &msm_wcn_init,
6031 .ops = &msm_wcn_ops,
6032 /* dai link has playback support */
6033 .ignore_pmdown_time = 1,
6034 .ignore_suspend = 1,
6035 },
6036 {
6037 .name = LPASS_BE_SLIMBUS_7_TX,
6038 .stream_name = "Slimbus7 Capture",
6039 .cpu_dai_name = "msm-dai-q6-dev.16399",
6040 .platform_name = "msm-pcm-routing",
6041 .codec_name = "btfmslim_slave",
6042 .codec_dai_name = "btfm_bt_sco_slim_tx",
6043 .no_pcm = 1,
6044 .dpcm_capture = 1,
6045 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6046 .be_hw_params_fixup = msm_be_hw_params_fixup,
6047 .ops = &msm_wcn_ops,
6048 .ignore_suspend = 1,
6049 },
6050};
6051
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6052static struct snd_soc_dai_link msm_wcn_btfm_be_dai_links[] = {
6053 {
6054 .name = LPASS_BE_SLIMBUS_7_RX,
6055 .stream_name = "Slimbus7 Playback",
6056 .cpu_dai_name = "msm-dai-q6-dev.16398",
6057 .platform_name = "msm-pcm-routing",
6058 .codec_name = "btfmslim_slave",
6059 /* BT codec driver determines capabilities based on
6060 * dai name, bt codecdai name should always contains
6061 * supported usecase information
6062 */
6063 .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
6064 .no_pcm = 1,
6065 .dpcm_playback = 1,
6066 .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
6067 .be_hw_params_fixup = msm_be_hw_params_fixup,
6068 .init = &msm_wcn_init_lito,
6069 .ops = &msm_wcn_ops_lito,
6070 /* dai link has playback support */
6071 .ignore_pmdown_time = 1,
6072 .ignore_suspend = 1,
6073 },
6074 {
6075 .name = LPASS_BE_SLIMBUS_7_TX,
6076 .stream_name = "Slimbus7 Capture",
6077 .cpu_dai_name = "msm-dai-q6-dev.16399",
6078 .platform_name = "msm-pcm-routing",
6079 .codec_name = "btfmslim_slave",
6080 .codec_dai_name = "btfm_bt_sco_slim_tx",
6081 .no_pcm = 1,
6082 .dpcm_capture = 1,
6083 .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
6084 .be_hw_params_fixup = msm_be_hw_params_fixup,
6085 .ops = &msm_wcn_ops_lito,
6086 .ignore_suspend = 1,
6087 },
6088 {
6089 .name = LPASS_BE_SLIMBUS_8_TX,
6090 .stream_name = "Slimbus8 Capture",
6091 .cpu_dai_name = "msm-dai-q6-dev.16401",
6092 .platform_name = "msm-pcm-routing",
6093 .codec_name = "btfmslim_slave",
6094 .codec_dai_name = "btfm_fm_slim_tx",
6095 .no_pcm = 1,
6096 .dpcm_capture = 1,
6097 .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
6098 .be_hw_params_fixup = msm_be_hw_params_fixup,
6099 .ops = &msm_wcn_ops_lito,
6100 .ignore_suspend = 1,
6101 },
6102};
6103
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6104static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
6105 /* DISP PORT BACK END DAI Link */
6106 {
6107 .name = LPASS_BE_DISPLAY_PORT,
6108 .stream_name = "Display Port Playback",
6109 .cpu_dai_name = "msm-dai-q6-dp.24608",
6110 .platform_name = "msm-pcm-routing",
6111 .codec_name = "msm-ext-disp-audio-codec-rx",
6112 .codec_dai_name = "msm_dp_audio_codec_rx_dai",
6113 .no_pcm = 1,
6114 .dpcm_playback = 1,
6115 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
6116 .be_hw_params_fixup = msm_be_hw_params_fixup,
6117 .ignore_pmdown_time = 1,
6118 .ignore_suspend = 1,
6119 },
6120 /* DISP PORT 1 BACK END DAI Link */
6121 {
6122 .name = LPASS_BE_DISPLAY_PORT1,
6123 .stream_name = "Display Port1 Playback",
6124 .cpu_dai_name = "msm-dai-q6-dp.24608",
6125 .platform_name = "msm-pcm-routing",
6126 .codec_name = "msm-ext-disp-audio-codec-rx",
6127 .codec_dai_name = "msm_dp_audio_codec_rx1_dai",
6128 .no_pcm = 1,
6129 .dpcm_playback = 1,
6130 .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
6131 .be_hw_params_fixup = msm_be_hw_params_fixup,
6132 .ignore_pmdown_time = 1,
6133 .ignore_suspend = 1,
6134 },
6135};
6136
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6137static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
6138 {
6139 .name = LPASS_BE_PRI_MI2S_RX,
6140 .stream_name = "Primary MI2S Playback",
6141 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6142 .platform_name = "msm-pcm-routing",
6143 .codec_name = "msm-stub-codec.1",
6144 .codec_dai_name = "msm-stub-rx",
6145 .no_pcm = 1,
6146 .dpcm_playback = 1,
6147 .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
6148 .be_hw_params_fixup = msm_be_hw_params_fixup,
6149 .ops = &msm_mi2s_be_ops,
6150 .ignore_suspend = 1,
6151 .ignore_pmdown_time = 1,
6152 },
6153 {
6154 .name = LPASS_BE_PRI_MI2S_TX,
6155 .stream_name = "Primary MI2S Capture",
6156 .cpu_dai_name = "msm-dai-q6-mi2s.0",
6157 .platform_name = "msm-pcm-routing",
6158 .codec_name = "msm-stub-codec.1",
6159 .codec_dai_name = "msm-stub-tx",
6160 .no_pcm = 1,
6161 .dpcm_capture = 1,
6162 .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
6163 .be_hw_params_fixup = msm_be_hw_params_fixup,
6164 .ops = &msm_mi2s_be_ops,
6165 .ignore_suspend = 1,
6166 },
6167 {
6168 .name = LPASS_BE_SEC_MI2S_RX,
6169 .stream_name = "Secondary MI2S Playback",
6170 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6171 .platform_name = "msm-pcm-routing",
6172 .codec_name = "msm-stub-codec.1",
6173 .codec_dai_name = "msm-stub-rx",
6174 .no_pcm = 1,
6175 .dpcm_playback = 1,
6176 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
6177 .be_hw_params_fixup = msm_be_hw_params_fixup,
6178 .ops = &msm_mi2s_be_ops,
6179 .ignore_suspend = 1,
6180 .ignore_pmdown_time = 1,
6181 },
6182 {
6183 .name = LPASS_BE_SEC_MI2S_TX,
6184 .stream_name = "Secondary MI2S Capture",
6185 .cpu_dai_name = "msm-dai-q6-mi2s.1",
6186 .platform_name = "msm-pcm-routing",
6187 .codec_name = "msm-stub-codec.1",
6188 .codec_dai_name = "msm-stub-tx",
6189 .no_pcm = 1,
6190 .dpcm_capture = 1,
6191 .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
6192 .be_hw_params_fixup = msm_be_hw_params_fixup,
6193 .ops = &msm_mi2s_be_ops,
6194 .ignore_suspend = 1,
6195 },
6196 {
6197 .name = LPASS_BE_TERT_MI2S_RX,
6198 .stream_name = "Tertiary MI2S Playback",
6199 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6200 .platform_name = "msm-pcm-routing",
6201 .codec_name = "msm-stub-codec.1",
6202 .codec_dai_name = "msm-stub-rx",
6203 .no_pcm = 1,
6204 .dpcm_playback = 1,
6205 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
6206 .be_hw_params_fixup = msm_be_hw_params_fixup,
6207 .ops = &msm_mi2s_be_ops,
6208 .ignore_suspend = 1,
6209 .ignore_pmdown_time = 1,
6210 },
6211 {
6212 .name = LPASS_BE_TERT_MI2S_TX,
6213 .stream_name = "Tertiary MI2S Capture",
6214 .cpu_dai_name = "msm-dai-q6-mi2s.2",
6215 .platform_name = "msm-pcm-routing",
6216 .codec_name = "msm-stub-codec.1",
6217 .codec_dai_name = "msm-stub-tx",
6218 .no_pcm = 1,
6219 .dpcm_capture = 1,
6220 .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
6221 .be_hw_params_fixup = msm_be_hw_params_fixup,
6222 .ops = &msm_mi2s_be_ops,
6223 .ignore_suspend = 1,
6224 },
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6225 {
6226 .name = LPASS_BE_QUAT_MI2S_RX,
6227 .stream_name = "Quaternary MI2S Playback",
6228 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6229 .platform_name = "msm-pcm-routing",
6230 .codec_name = "msm-stub-codec.1",
6231 .codec_dai_name = "msm-stub-rx",
6232 .no_pcm = 1,
6233 .dpcm_playback = 1,
6234 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
6235 .be_hw_params_fixup = msm_be_hw_params_fixup,
6236 .ops = &msm_mi2s_be_ops,
6237 .ignore_suspend = 1,
6238 .ignore_pmdown_time = 1,
6239 },
6240 {
6241 .name = LPASS_BE_QUAT_MI2S_TX,
6242 .stream_name = "Quaternary MI2S Capture",
6243 .cpu_dai_name = "msm-dai-q6-mi2s.3",
6244 .platform_name = "msm-pcm-routing",
6245 .codec_name = "msm-stub-codec.1",
6246 .codec_dai_name = "msm-stub-tx",
6247 .no_pcm = 1,
6248 .dpcm_capture = 1,
6249 .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
6250 .be_hw_params_fixup = msm_be_hw_params_fixup,
6251 .ops = &msm_mi2s_be_ops,
6252 .ignore_suspend = 1,
6253 },
6254 {
6255 .name = LPASS_BE_QUIN_MI2S_RX,
6256 .stream_name = "Quinary MI2S Playback",
6257 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6258 .platform_name = "msm-pcm-routing",
6259 .codec_name = "msm-stub-codec.1",
6260 .codec_dai_name = "msm-stub-rx",
6261 .no_pcm = 1,
6262 .dpcm_playback = 1,
6263 .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
6264 .be_hw_params_fixup = msm_be_hw_params_fixup,
6265 .ops = &msm_mi2s_be_ops,
6266 .ignore_suspend = 1,
6267 .ignore_pmdown_time = 1,
6268 },
6269 {
6270 .name = LPASS_BE_QUIN_MI2S_TX,
6271 .stream_name = "Quinary MI2S Capture",
6272 .cpu_dai_name = "msm-dai-q6-mi2s.4",
6273 .platform_name = "msm-pcm-routing",
6274 .codec_name = "msm-stub-codec.1",
6275 .codec_dai_name = "msm-stub-tx",
6276 .no_pcm = 1,
6277 .dpcm_capture = 1,
6278 .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
6279 .be_hw_params_fixup = msm_be_hw_params_fixup,
6280 .ops = &msm_mi2s_be_ops,
6281 .ignore_suspend = 1,
6282 },
6283 {
6284 .name = LPASS_BE_SENARY_MI2S_RX,
6285 .stream_name = "Senary MI2S Playback",
6286 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6287 .platform_name = "msm-pcm-routing",
6288 .codec_name = "msm-stub-codec.1",
6289 .codec_dai_name = "msm-stub-rx",
6290 .no_pcm = 1,
6291 .dpcm_playback = 1,
6292 .id = MSM_BACKEND_DAI_SENARY_MI2S_RX,
6293 .be_hw_params_fixup = msm_be_hw_params_fixup,
6294 .ops = &msm_mi2s_be_ops,
6295 .ignore_suspend = 1,
6296 .ignore_pmdown_time = 1,
6297 },
6298 {
6299 .name = LPASS_BE_SENARY_MI2S_TX,
6300 .stream_name = "Senary MI2S Capture",
6301 .cpu_dai_name = "msm-dai-q6-mi2s.5",
6302 .platform_name = "msm-pcm-routing",
6303 .codec_name = "msm-stub-codec.1",
6304 .codec_dai_name = "msm-stub-tx",
6305 .no_pcm = 1,
6306 .dpcm_capture = 1,
6307 .id = MSM_BACKEND_DAI_SENARY_MI2S_TX,
6308 .be_hw_params_fixup = msm_be_hw_params_fixup,
6309 .ops = &msm_mi2s_be_ops,
6310 .ignore_suspend = 1,
6311 },
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6312};
6313
6314static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
6315 /* Primary AUX PCM Backend DAI Links */
6316 {
6317 .name = LPASS_BE_AUXPCM_RX,
6318 .stream_name = "AUX PCM Playback",
6319 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6320 .platform_name = "msm-pcm-routing",
6321 .codec_name = "msm-stub-codec.1",
6322 .codec_dai_name = "msm-stub-rx",
6323 .no_pcm = 1,
6324 .dpcm_playback = 1,
6325 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6326 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6327 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6328 .ignore_pmdown_time = 1,
6329 .ignore_suspend = 1,
6330 },
6331 {
6332 .name = LPASS_BE_AUXPCM_TX,
6333 .stream_name = "AUX PCM Capture",
6334 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6335 .platform_name = "msm-pcm-routing",
6336 .codec_name = "msm-stub-codec.1",
6337 .codec_dai_name = "msm-stub-tx",
6338 .no_pcm = 1,
6339 .dpcm_capture = 1,
6340 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6341 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6342 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6343 .ignore_suspend = 1,
6344 },
6345 /* Secondary AUX PCM Backend DAI Links */
6346 {
6347 .name = LPASS_BE_SEC_AUXPCM_RX,
6348 .stream_name = "Sec AUX PCM Playback",
6349 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6350 .platform_name = "msm-pcm-routing",
6351 .codec_name = "msm-stub-codec.1",
6352 .codec_dai_name = "msm-stub-rx",
6353 .no_pcm = 1,
6354 .dpcm_playback = 1,
6355 .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
6356 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6357 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6358 .ignore_pmdown_time = 1,
6359 .ignore_suspend = 1,
6360 },
6361 {
6362 .name = LPASS_BE_SEC_AUXPCM_TX,
6363 .stream_name = "Sec AUX PCM Capture",
6364 .cpu_dai_name = "msm-dai-q6-auxpcm.2",
6365 .platform_name = "msm-pcm-routing",
6366 .codec_name = "msm-stub-codec.1",
6367 .codec_dai_name = "msm-stub-tx",
6368 .no_pcm = 1,
6369 .dpcm_capture = 1,
6370 .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
6371 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6372 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6373 .ignore_suspend = 1,
6374 },
6375 /* Tertiary AUX PCM Backend DAI Links */
6376 {
6377 .name = LPASS_BE_TERT_AUXPCM_RX,
6378 .stream_name = "Tert AUX PCM Playback",
6379 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6380 .platform_name = "msm-pcm-routing",
6381 .codec_name = "msm-stub-codec.1",
6382 .codec_dai_name = "msm-stub-rx",
6383 .no_pcm = 1,
6384 .dpcm_playback = 1,
6385 .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
6386 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6387 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6388 .ignore_suspend = 1,
6389 },
6390 {
6391 .name = LPASS_BE_TERT_AUXPCM_TX,
6392 .stream_name = "Tert AUX PCM Capture",
6393 .cpu_dai_name = "msm-dai-q6-auxpcm.3",
6394 .platform_name = "msm-pcm-routing",
6395 .codec_name = "msm-stub-codec.1",
6396 .codec_dai_name = "msm-stub-tx",
6397 .no_pcm = 1,
6398 .dpcm_capture = 1,
6399 .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
6400 .be_hw_params_fixup = msm_be_hw_params_fixup,
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]6401 .ops = &kona_aux_be_ops,
6402 .ignore_suspend = 1,
6403 },
6404 /* Quaternary AUX PCM Backend DAI Links */
6405 {
6406 .name = LPASS_BE_QUAT_AUXPCM_RX,
6407 .stream_name = "Quat AUX PCM Playback",
6408 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6409 .platform_name = "msm-pcm-routing",
6410 .codec_name = "msm-stub-codec.1",
6411 .codec_dai_name = "msm-stub-rx",
6412 .no_pcm = 1,
6413 .dpcm_playback = 1,
6414 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
6415 .be_hw_params_fixup = msm_be_hw_params_fixup,
6416 .ops = &kona_aux_be_ops,
6417 .ignore_suspend = 1,
6418 },
6419 {
6420 .name = LPASS_BE_QUAT_AUXPCM_TX,
6421 .stream_name = "Quat AUX PCM Capture",
6422 .cpu_dai_name = "msm-dai-q6-auxpcm.4",
6423 .platform_name = "msm-pcm-routing",
6424 .codec_name = "msm-stub-codec.1",
6425 .codec_dai_name = "msm-stub-tx",
6426 .no_pcm = 1,
6427 .dpcm_capture = 1,
6428 .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
6429 .be_hw_params_fixup = msm_be_hw_params_fixup,
6430 .ops = &kona_aux_be_ops,
6431 .ignore_suspend = 1,
6432 },
6433 /* Quinary AUX PCM Backend DAI Links */
6434 {
6435 .name = LPASS_BE_QUIN_AUXPCM_RX,
6436 .stream_name = "Quin AUX PCM Playback",
6437 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6438 .platform_name = "msm-pcm-routing",
6439 .codec_name = "msm-stub-codec.1",
6440 .codec_dai_name = "msm-stub-rx",
6441 .no_pcm = 1,
6442 .dpcm_playback = 1,
6443 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
6444 .be_hw_params_fixup = msm_be_hw_params_fixup,
6445 .ops = &kona_aux_be_ops,
6446 .ignore_suspend = 1,
6447 },
6448 {
6449 .name = LPASS_BE_QUIN_AUXPCM_TX,
6450 .stream_name = "Quin AUX PCM Capture",
6451 .cpu_dai_name = "msm-dai-q6-auxpcm.5",
6452 .platform_name = "msm-pcm-routing",
6453 .codec_name = "msm-stub-codec.1",
6454 .codec_dai_name = "msm-stub-tx",
6455 .no_pcm = 1,
6456 .dpcm_capture = 1,
6457 .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
6458 .be_hw_params_fixup = msm_be_hw_params_fixup,
6459 .ops = &kona_aux_be_ops,
6460 .ignore_suspend = 1,
6461 },
6462 /* Senary AUX PCM Backend DAI Links */
6463 {
6464 .name = LPASS_BE_SEN_AUXPCM_RX,
6465 .stream_name = "Sen AUX PCM Playback",
6466 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6467 .platform_name = "msm-pcm-routing",
6468 .codec_name = "msm-stub-codec.1",
6469 .codec_dai_name = "msm-stub-rx",
6470 .no_pcm = 1,
6471 .dpcm_playback = 1,
6472 .id = MSM_BACKEND_DAI_SEN_AUXPCM_RX,
6473 .be_hw_params_fixup = msm_be_hw_params_fixup,
6474 .ops = &kona_aux_be_ops,
6475 .ignore_suspend = 1,
6476 },
6477 {
6478 .name = LPASS_BE_SEN_AUXPCM_TX,
6479 .stream_name = "Sen AUX PCM Capture",
6480 .cpu_dai_name = "msm-dai-q6-auxpcm.6",
6481 .platform_name = "msm-pcm-routing",
6482 .codec_name = "msm-stub-codec.1",
6483 .codec_dai_name = "msm-stub-tx",
6484 .no_pcm = 1,
6485 .dpcm_capture = 1,
6486 .id = MSM_BACKEND_DAI_SEN_AUXPCM_TX,
6487 .be_hw_params_fixup = msm_be_hw_params_fixup,
6488 .ops = &kona_aux_be_ops,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6489 .ignore_suspend = 1,
6490 },
6491};
6492
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6493static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
6494 /* WSA CDC DMA Backend DAI Links */
6495 {
6496 .name = LPASS_BE_WSA_CDC_DMA_RX_0,
6497 .stream_name = "WSA CDC DMA0 Playback",
6498 .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
6499 .platform_name = "msm-pcm-routing",
6500 .codec_name = "bolero_codec",
6501 .codec_dai_name = "wsa_macro_rx1",
6502 .no_pcm = 1,
6503 .dpcm_playback = 1,
6504 .init = &msm_int_audrx_init,
6505 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
6506 .be_hw_params_fixup = msm_be_hw_params_fixup,
6507 .ignore_pmdown_time = 1,
6508 .ignore_suspend = 1,
6509 .ops = &msm_cdc_dma_be_ops,
6510 },
6511 {
6512 .name = LPASS_BE_WSA_CDC_DMA_RX_1,
6513 .stream_name = "WSA CDC DMA1 Playback",
6514 .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
6515 .platform_name = "msm-pcm-routing",
6516 .codec_name = "bolero_codec",
6517 .codec_dai_name = "wsa_macro_rx_mix",
6518 .no_pcm = 1,
6519 .dpcm_playback = 1,
6520 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
6521 .be_hw_params_fixup = msm_be_hw_params_fixup,
6522 .ignore_pmdown_time = 1,
6523 .ignore_suspend = 1,
6524 .ops = &msm_cdc_dma_be_ops,
6525 },
6526 {
6527 .name = LPASS_BE_WSA_CDC_DMA_TX_1,
6528 .stream_name = "WSA CDC DMA1 Capture",
6529 .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
6530 .platform_name = "msm-pcm-routing",
6531 .codec_name = "bolero_codec",
6532 .codec_dai_name = "wsa_macro_echo",
6533 .no_pcm = 1,
6534 .dpcm_capture = 1,
6535 .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
6536 .be_hw_params_fixup = msm_be_hw_params_fixup,
6537 .ignore_suspend = 1,
6538 .ops = &msm_cdc_dma_be_ops,
6539 },
6540};
6541
6542static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
6543 /* RX CDC DMA Backend DAI Links */
6544 {
6545 .name = LPASS_BE_RX_CDC_DMA_RX_0,
6546 .stream_name = "RX CDC DMA0 Playback",
6547 .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
6548 .platform_name = "msm-pcm-routing",
6549 .codec_name = "bolero_codec",
6550 .codec_dai_name = "rx_macro_rx1",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6551 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6552 .no_pcm = 1,
6553 .dpcm_playback = 1,
6554 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
6555 .be_hw_params_fixup = msm_be_hw_params_fixup,
6556 .ignore_pmdown_time = 1,
6557 .ignore_suspend = 1,
6558 .ops = &msm_cdc_dma_be_ops,
6559 },
6560 {
6561 .name = LPASS_BE_RX_CDC_DMA_RX_1,
6562 .stream_name = "RX CDC DMA1 Playback",
6563 .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
6564 .platform_name = "msm-pcm-routing",
6565 .codec_name = "bolero_codec",
6566 .codec_dai_name = "rx_macro_rx2",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6567 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6568 .no_pcm = 1,
6569 .dpcm_playback = 1,
6570 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
6571 .be_hw_params_fixup = msm_be_hw_params_fixup,
6572 .ignore_pmdown_time = 1,
6573 .ignore_suspend = 1,
6574 .ops = &msm_cdc_dma_be_ops,
6575 },
6576 {
6577 .name = LPASS_BE_RX_CDC_DMA_RX_2,
6578 .stream_name = "RX CDC DMA2 Playback",
6579 .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
6580 .platform_name = "msm-pcm-routing",
6581 .codec_name = "bolero_codec",
6582 .codec_dai_name = "rx_macro_rx3",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6583 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6584 .no_pcm = 1,
6585 .dpcm_playback = 1,
6586 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
6587 .be_hw_params_fixup = msm_be_hw_params_fixup,
6588 .ignore_pmdown_time = 1,
6589 .ignore_suspend = 1,
6590 .ops = &msm_cdc_dma_be_ops,
6591 },
6592 {
6593 .name = LPASS_BE_RX_CDC_DMA_RX_3,
6594 .stream_name = "RX CDC DMA3 Playback",
6595 .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
6596 .platform_name = "msm-pcm-routing",
6597 .codec_name = "bolero_codec",
6598 .codec_dai_name = "rx_macro_rx4",
Sudheer Papothiff2733c2019-05-17 01:49:27 +0530[diff] [blame]6599 .dynamic_be = 1,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6600 .no_pcm = 1,
6601 .dpcm_playback = 1,
6602 .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
6603 .be_hw_params_fixup = msm_be_hw_params_fixup,
6604 .ignore_pmdown_time = 1,
6605 .ignore_suspend = 1,
6606 .ops = &msm_cdc_dma_be_ops,
6607 },
6608 /* TX CDC DMA Backend DAI Links */
6609 {
6610 .name = LPASS_BE_TX_CDC_DMA_TX_3,
6611 .stream_name = "TX CDC DMA3 Capture",
6612 .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
6613 .platform_name = "msm-pcm-routing",
6614 .codec_name = "bolero_codec",
6615 .codec_dai_name = "tx_macro_tx1",
6616 .no_pcm = 1,
6617 .dpcm_capture = 1,
6618 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
6619 .be_hw_params_fixup = msm_be_hw_params_fixup,
6620 .ignore_suspend = 1,
6621 .ops = &msm_cdc_dma_be_ops,
6622 },
6623 {
6624 .name = LPASS_BE_TX_CDC_DMA_TX_4,
6625 .stream_name = "TX CDC DMA4 Capture",
6626 .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
6627 .platform_name = "msm-pcm-routing",
6628 .codec_name = "bolero_codec",
6629 .codec_dai_name = "tx_macro_tx2",
6630 .no_pcm = 1,
6631 .dpcm_capture = 1,
6632 .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
6633 .be_hw_params_fixup = msm_be_hw_params_fixup,
6634 .ignore_suspend = 1,
6635 .ops = &msm_cdc_dma_be_ops,
6636 },
6637};
6638
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6639static struct snd_soc_dai_link msm_va_cdc_dma_be_dai_links[] = {
6640 {
6641 .name = LPASS_BE_VA_CDC_DMA_TX_0,
6642 .stream_name = "VA CDC DMA0 Capture",
6643 .cpu_dai_name = "msm-dai-cdc-dma-dev.45089",
6644 .platform_name = "msm-pcm-routing",
6645 .codec_name = "bolero_codec",
6646 .codec_dai_name = "va_macro_tx1",
6647 .no_pcm = 1,
6648 .dpcm_capture = 1,
6649 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
6650 .be_hw_params_fixup = msm_be_hw_params_fixup,
6651 .ignore_suspend = 1,
6652 .ops = &msm_cdc_dma_be_ops,
6653 },
6654 {
6655 .name = LPASS_BE_VA_CDC_DMA_TX_1,
6656 .stream_name = "VA CDC DMA1 Capture",
6657 .cpu_dai_name = "msm-dai-cdc-dma-dev.45091",
6658 .platform_name = "msm-pcm-routing",
6659 .codec_name = "bolero_codec",
6660 .codec_dai_name = "va_macro_tx2",
6661 .no_pcm = 1,
6662 .dpcm_capture = 1,
6663 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
6664 .be_hw_params_fixup = msm_be_hw_params_fixup,
6665 .ignore_suspend = 1,
6666 .ops = &msm_cdc_dma_be_ops,
6667 },
6668 {
6669 .name = LPASS_BE_VA_CDC_DMA_TX_2,
6670 .stream_name = "VA CDC DMA2 Capture",
6671 .cpu_dai_name = "msm-dai-cdc-dma-dev.45093",
6672 .platform_name = "msm-pcm-routing",
6673 .codec_name = "bolero_codec",
6674 .codec_dai_name = "va_macro_tx3",
6675 .no_pcm = 1,
6676 .dpcm_capture = 1,
6677 .id = MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
6678 .be_hw_params_fixup = msm_be_hw_params_fixup,
6679 .ignore_suspend = 1,
6680 .ops = &msm_cdc_dma_be_ops,
6681 },
6682};
6683
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6684static struct snd_soc_dai_link msm_afe_rxtx_lb_be_dai_link[] = {
6685 {
6686 .name = LPASS_BE_AFE_LOOPBACK_TX,
6687 .stream_name = "AFE Loopback Capture",
6688 .cpu_dai_name = "msm-dai-q6-dev.24577",
6689 .platform_name = "msm-pcm-routing",
6690 .codec_name = "msm-stub-codec.1",
6691 .codec_dai_name = "msm-stub-tx",
6692 .no_pcm = 1,
6693 .dpcm_capture = 1,
6694 .id = MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
6695 .be_hw_params_fixup = msm_be_hw_params_fixup,
6696 .ignore_pmdown_time = 1,
6697 .ignore_suspend = 1,
6698 },
6699};
6700
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6701static struct snd_soc_dai_link msm_kona_dai_links[
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6702 ARRAY_SIZE(msm_common_dai_links) +
6703 ARRAY_SIZE(msm_bolero_fe_dai_links) +
6704 ARRAY_SIZE(msm_common_misc_fe_dai_links) +
6705 ARRAY_SIZE(msm_common_be_dai_links) +
6706 ARRAY_SIZE(msm_mi2s_be_dai_links) +
6707 ARRAY_SIZE(msm_auxpcm_be_dai_links) +
6708 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6709 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links) +
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6710 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links) +
6711 ARRAY_SIZE(ext_disp_be_dai_link) +
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]6712 ARRAY_SIZE(msm_wcn_be_dai_links) +
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6713 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link) +
6714 ARRAY_SIZE(msm_wcn_btfm_be_dai_links)];
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6715
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6716static int msm_populate_dai_link_component_of_node(
6717 struct snd_soc_card *card)
6718{
6719 int i, index, ret = 0;
6720 struct device *cdev = card->dev;
6721 struct snd_soc_dai_link *dai_link = card->dai_link;
6722 struct device_node *np;
6723
6724 if (!cdev) {
6725 dev_err(cdev, "%s: Sound card device memory NULL\n", __func__);
6726 return -ENODEV;
6727 }
6728
6729 for (i = 0; i < card->num_links; i++) {
6730 if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
6731 continue;
6732
6733 /* populate platform_of_node for snd card dai links */
6734 if (dai_link[i].platform_name &&
6735 !dai_link[i].platform_of_node) {
6736 index = of_property_match_string(cdev->of_node,
6737 "asoc-platform-names",
6738 dai_link[i].platform_name);
6739 if (index < 0) {
6740 dev_err(cdev, "%s: No match found for platform name: %s\n",
6741 __func__, dai_link[i].platform_name);
6742 ret = index;
6743 goto err;
6744 }
6745 np = of_parse_phandle(cdev->of_node, "asoc-platform",
6746 index);
6747 if (!np) {
6748 dev_err(cdev, "%s: retrieving phandle for platform %s, index %d failed\n",
6749 __func__, dai_link[i].platform_name,
6750 index);
6751 ret = -ENODEV;
6752 goto err;
6753 }
6754 dai_link[i].platform_of_node = np;
6755 dai_link[i].platform_name = NULL;
6756 }
6757
6758 /* populate cpu_of_node for snd card dai links */
6759 if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
6760 index = of_property_match_string(cdev->of_node,
6761 "asoc-cpu-names",
6762 dai_link[i].cpu_dai_name);
6763 if (index >= 0) {
6764 np = of_parse_phandle(cdev->of_node, "asoc-cpu",
6765 index);
6766 if (!np) {
6767 dev_err(cdev, "%s: retrieving phandle for cpu dai %s failed\n",
6768 __func__,
6769 dai_link[i].cpu_dai_name);
6770 ret = -ENODEV;
6771 goto err;
6772 }
6773 dai_link[i].cpu_of_node = np;
6774 dai_link[i].cpu_dai_name = NULL;
6775 }
6776 }
6777
6778 /* populate codec_of_node for snd card dai links */
6779 if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
6780 index = of_property_match_string(cdev->of_node,
6781 "asoc-codec-names",
6782 dai_link[i].codec_name);
6783 if (index < 0)
6784 continue;
6785 np = of_parse_phandle(cdev->of_node, "asoc-codec",
6786 index);
6787 if (!np) {
6788 dev_err(cdev, "%s: retrieving phandle for codec %s failed\n",
6789 __func__, dai_link[i].codec_name);
6790 ret = -ENODEV;
6791 goto err;
6792 }
6793 dai_link[i].codec_of_node = np;
6794 dai_link[i].codec_name = NULL;
6795 }
6796 }
6797
6798err:
6799 return ret;
6800}
6801
6802static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
6803{
6804 int ret = -EINVAL;
6805 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, "msm-stub-codec");
6806
6807 if (!component) {
6808 pr_err("* %s: No match for msm-stub-codec component\n", __func__);
6809 return ret;
6810 }
6811
6812 ret = snd_soc_add_component_controls(component, msm_snd_controls,
6813 ARRAY_SIZE(msm_snd_controls));
6814 if (ret < 0) {
6815 dev_err(component->dev,
6816 "%s: add_codec_controls failed, err = %d\n",
6817 __func__, ret);
6818 return ret;
6819 }
6820
6821 return ret;
6822}
6823
6824static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
6825 struct snd_pcm_hw_params *params)
6826{
6827 return 0;
6828}
6829
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6830static struct snd_soc_ops msm_stub_be_ops = {
6831 .hw_params = msm_snd_stub_hw_params,
6832};
6833
6834struct snd_soc_card snd_soc_card_stub_msm = {
6835 .name = "kona-stub-snd-card",
6836};
6837
6838static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
6839 /* FrontEnd DAI Links */
6840 {
6841 .name = "MSMSTUB Media1",
6842 .stream_name = "MultiMedia1",
6843 .cpu_dai_name = "MultiMedia1",
6844 .platform_name = "msm-pcm-dsp.0",
6845 .dynamic = 1,
6846 .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
6847 .dpcm_playback = 1,
6848 .dpcm_capture = 1,
6849 .trigger = {SND_SOC_DPCM_TRIGGER_POST,
6850 SND_SOC_DPCM_TRIGGER_POST},
6851 .codec_dai_name = "snd-soc-dummy-dai",
6852 .codec_name = "snd-soc-dummy",
6853 .ignore_suspend = 1,
6854 /* this dainlink has playback support */
6855 .ignore_pmdown_time = 1,
6856 .id = MSM_FRONTEND_DAI_MULTIMEDIA1
6857 },
6858};
6859
6860static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
6861 /* Backend DAI Links */
6862 {
6863 .name = LPASS_BE_AUXPCM_RX,
6864 .stream_name = "AUX PCM Playback",
6865 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6866 .platform_name = "msm-pcm-routing",
6867 .codec_name = "msm-stub-codec.1",
6868 .codec_dai_name = "msm-stub-rx",
6869 .no_pcm = 1,
6870 .dpcm_playback = 1,
6871 .id = MSM_BACKEND_DAI_AUXPCM_RX,
6872 .init = &msm_audrx_stub_init,
6873 .be_hw_params_fixup = msm_be_hw_params_fixup,
6874 .ignore_pmdown_time = 1,
6875 .ignore_suspend = 1,
6876 .ops = &msm_stub_be_ops,
6877 },
6878 {
6879 .name = LPASS_BE_AUXPCM_TX,
6880 .stream_name = "AUX PCM Capture",
6881 .cpu_dai_name = "msm-dai-q6-auxpcm.1",
6882 .platform_name = "msm-pcm-routing",
6883 .codec_name = "msm-stub-codec.1",
6884 .codec_dai_name = "msm-stub-tx",
6885 .no_pcm = 1,
6886 .dpcm_capture = 1,
6887 .id = MSM_BACKEND_DAI_AUXPCM_TX,
6888 .be_hw_params_fixup = msm_be_hw_params_fixup,
6889 .ignore_suspend = 1,
6890 .ops = &msm_stub_be_ops,
6891 },
6892};
6893
6894static struct snd_soc_dai_link msm_stub_dai_links[
6895 ARRAY_SIZE(msm_stub_fe_dai_links) +
6896 ARRAY_SIZE(msm_stub_be_dai_links)];
6897
6898static const struct of_device_id kona_asoc_machine_of_match[] = {
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6899 { .compatible = "qcom,kona-asoc-snd",
6900 .data = "codec"},
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6901 { .compatible = "qcom,kona-asoc-snd-stub",
6902 .data = "stub_codec"},
6903 {},
6904};
6905
6906static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
6907{
6908 struct snd_soc_card *card = NULL;
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6909 struct snd_soc_dai_link *dailink = NULL;
6910 int len_1 = 0;
6911 int len_2 = 0;
6912 int total_links = 0;
6913 int rc = 0;
6914 u32 mi2s_audio_intf = 0;
6915 u32 auxpcm_audio_intf = 0;
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]6916 u32 val = 0;
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]6917 u32 wcn_btfm_intf = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]6918 const struct of_device_id *match;
6919
6920 match = of_match_node(kona_asoc_machine_of_match, dev->of_node);
6921 if (!match) {
6922 dev_err(dev, "%s: No DT match found for sound card\n",
6923 __func__);
6924 return NULL;
6925 }
6926
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6927 if (!strcmp(match->data, "codec")) {
6928 card = &snd_soc_card_kona_msm;
6929
6930 memcpy(msm_kona_dai_links + total_links,
6931 msm_common_dai_links,
6932 sizeof(msm_common_dai_links));
6933 total_links += ARRAY_SIZE(msm_common_dai_links);
6934
6935 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6936 msm_bolero_fe_dai_links,
6937 sizeof(msm_bolero_fe_dai_links));
6938 total_links +=
6939 ARRAY_SIZE(msm_bolero_fe_dai_links);
6940
6941 memcpy(msm_kona_dai_links + total_links,
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6942 msm_common_misc_fe_dai_links,
6943 sizeof(msm_common_misc_fe_dai_links));
6944 total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
6945
6946 memcpy(msm_kona_dai_links + total_links,
6947 msm_common_be_dai_links,
6948 sizeof(msm_common_be_dai_links));
6949 total_links += ARRAY_SIZE(msm_common_be_dai_links);
6950
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]6951 memcpy(msm_kona_dai_links + total_links,
6952 msm_wsa_cdc_dma_be_dai_links,
6953 sizeof(msm_wsa_cdc_dma_be_dai_links));
6954 total_links +=
6955 ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
6956
6957 memcpy(msm_kona_dai_links + total_links,
6958 msm_rx_tx_cdc_dma_be_dai_links,
6959 sizeof(msm_rx_tx_cdc_dma_be_dai_links));
6960 total_links +=
6961 ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
6962
Xiaoyu Ye2228bf02018-12-12 15:47:20 -0800[diff] [blame]6963 memcpy(msm_kona_dai_links + total_links,
6964 msm_va_cdc_dma_be_dai_links,
6965 sizeof(msm_va_cdc_dma_be_dai_links));
6966 total_links +=
6967 ARRAY_SIZE(msm_va_cdc_dma_be_dai_links);
6968
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]6969 rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
6970 &mi2s_audio_intf);
6971 if (rc) {
6972 dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
6973 __func__);
6974 } else {
6975 if (mi2s_audio_intf) {
6976 memcpy(msm_kona_dai_links + total_links,
6977 msm_mi2s_be_dai_links,
6978 sizeof(msm_mi2s_be_dai_links));
6979 total_links +=
6980 ARRAY_SIZE(msm_mi2s_be_dai_links);
6981 }
6982 }
6983
6984 rc = of_property_read_u32(dev->of_node,
6985 "qcom,auxpcm-audio-intf",
6986 &auxpcm_audio_intf);
6987 if (rc) {
6988 dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
6989 __func__);
6990 } else {
6991 if (auxpcm_audio_intf) {
6992 memcpy(msm_kona_dai_links + total_links,
6993 msm_auxpcm_be_dai_links,
6994 sizeof(msm_auxpcm_be_dai_links));
6995 total_links +=
6996 ARRAY_SIZE(msm_auxpcm_be_dai_links);
6997 }
6998 }
6999
Karthikeyan Manieaad2ed2018-12-26 11:47:26 -0800[diff] [blame]7000 rc = of_property_read_u32(dev->of_node,
7001 "qcom,ext-disp-audio-rx", &val);
7002 if (!rc && val) {
7003 dev_dbg(dev, "%s(): ext disp audio support present\n",
7004 __func__);
7005 memcpy(msm_kona_dai_links + total_links,
7006 ext_disp_be_dai_link,
7007 sizeof(ext_disp_be_dai_link));
7008 total_links += ARRAY_SIZE(ext_disp_be_dai_link);
7009 }
7010
7011 rc = of_property_read_u32(dev->of_node, "qcom,wcn-bt", &val);
7012 if (!rc && val) {
7013 dev_dbg(dev, "%s(): WCN BT support present\n",
7014 __func__);
7015 memcpy(msm_kona_dai_links + total_links,
7016 msm_wcn_be_dai_links,
7017 sizeof(msm_wcn_be_dai_links));
7018 total_links += ARRAY_SIZE(msm_wcn_be_dai_links);
7019 }
7020
Meng Wange8e53822019-03-18 10:49:50 +0800[diff] [blame]7021 rc = of_property_read_u32(dev->of_node, "qcom,afe-rxtx-lb",
7022 &val);
7023 if (!rc && val) {
7024 memcpy(msm_kona_dai_links + total_links,
7025 msm_afe_rxtx_lb_be_dai_link,
7026 sizeof(msm_afe_rxtx_lb_be_dai_link));
7027 total_links +=
7028 ARRAY_SIZE(msm_afe_rxtx_lb_be_dai_link);
7029 }
Vatsal Bucha82b30ba2019-04-17 12:43:54 +0530[diff] [blame]7030
7031 rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
7032 &wcn_btfm_intf);
7033 if (rc) {
7034 dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
7035 __func__);
7036 } else {
7037 if (wcn_btfm_intf) {
7038 memcpy(msm_kona_dai_links + total_links,
7039 msm_wcn_btfm_be_dai_links,
7040 sizeof(msm_wcn_btfm_be_dai_links));
7041 total_links +=
7042 ARRAY_SIZE(msm_wcn_btfm_be_dai_links);
7043 }
7044 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7045 dailink = msm_kona_dai_links;
7046 } else if(!strcmp(match->data, "stub_codec")) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7047 card = &snd_soc_card_stub_msm;
7048 len_1 = ARRAY_SIZE(msm_stub_fe_dai_links);
7049 len_2 = len_1 + ARRAY_SIZE(msm_stub_be_dai_links);
7050
7051 memcpy(msm_stub_dai_links,
7052 msm_stub_fe_dai_links,
7053 sizeof(msm_stub_fe_dai_links));
7054 memcpy(msm_stub_dai_links + len_1,
7055 msm_stub_be_dai_links,
7056 sizeof(msm_stub_be_dai_links));
7057
7058 dailink = msm_stub_dai_links;
7059 total_links = len_2;
7060 }
7061
7062 if (card) {
7063 card->dai_link = dailink;
7064 card->num_links = total_links;
7065 }
7066
7067 return card;
7068}
7069
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7070static int msm_wsa881x_init(struct snd_soc_component *component)
7071{
7072 u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7073 u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
7074 u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
7075 SPKR_L_BOOST, SPKR_L_VI};
7076 u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
7077 SPKR_R_BOOST, SPKR_R_VI};
7078 unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
7079 unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
7080 struct msm_asoc_mach_data *pdata;
7081 struct snd_soc_dapm_context *dapm;
7082 struct snd_card *card;
7083 struct snd_info_entry *entry;
7084 int ret = 0;
7085
7086 if (!component) {
7087 pr_err("%s component is NULL\n", __func__);
7088 return -EINVAL;
7089 }
7090
7091 card = component->card->snd_card;
7092 dapm = snd_soc_component_get_dapm(component);
7093
7094 if (!strcmp(component->name_prefix, "SpkrLeft")) {
7095 dev_dbg(component->dev, "%s: setting left ch map to codec %s\n",
7096 __func__, component->name);
7097 wsa881x_set_channel_map(component, &spkleft_ports[0],
7098 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7099 &ch_rate[0], &spkleft_port_types[0]);
7100 if (dapm->component) {
7101 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
7102 snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
7103 }
7104 } else if (!strcmp(component->name_prefix, "SpkrRight")) {
7105 dev_dbg(component->dev, "%s: setting right ch map to codec %s\n",
7106 __func__, component->name);
7107 wsa881x_set_channel_map(component, &spkright_ports[0],
7108 WSA881X_MAX_SWR_PORTS, &ch_mask[0],
7109 &ch_rate[0], &spkright_port_types[0]);
7110 if (dapm->component) {
7111 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
7112 snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
7113 }
7114 } else {
7115 dev_err(component->dev, "%s: wrong codec name %s\n", __func__,
7116 component->name);
7117 ret = -EINVAL;
7118 goto err;
7119 }
7120 pdata = snd_soc_card_get_drvdata(component->card);
7121 if (!pdata->codec_root) {
7122 entry = snd_info_create_subdir(card->module, "codecs",
7123 card->proc_root);
7124 if (!entry) {
7125 pr_err("%s: Cannot create codecs module entry\n",
7126 __func__);
7127 ret = 0;
7128 goto err;
7129 }
7130 pdata->codec_root = entry;
7131 }
7132 wsa881x_codec_info_create_codec_entry(pdata->codec_root,
7133 component);
7134err:
7135 return ret;
7136}
7137
7138static int msm_aux_codec_init(struct snd_soc_component *component)
7139{
7140 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
7141 int ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7142 void *mbhc_calibration;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7143 struct snd_info_entry *entry;
7144 struct snd_card *card = component->card->snd_card;
7145 struct msm_asoc_mach_data *pdata;
7146
7147 snd_soc_dapm_ignore_suspend(dapm, "EAR");
7148 snd_soc_dapm_ignore_suspend(dapm, "AUX");
7149 snd_soc_dapm_ignore_suspend(dapm, "HPHL");
7150 snd_soc_dapm_ignore_suspend(dapm, "HPHR");
7151 snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
7152 snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
7153 snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
7154 snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
7155 snd_soc_dapm_sync(dapm);
7156
7157 pdata = snd_soc_card_get_drvdata(component->card);
7158 if (!pdata->codec_root) {
7159 entry = snd_info_create_subdir(card->module, "codecs",
7160 card->proc_root);
7161 if (!entry) {
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7162 dev_dbg(component->dev, "%s: Cannot create codecs module entry\n",
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7163 __func__);
7164 ret = 0;
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7165 goto mbhc_cfg_cal;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7166 }
7167 pdata->codec_root = entry;
7168 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7169 wcd938x_info_create_codec_entry(pdata->codec_root, component);
7170
7171mbhc_cfg_cal:
7172 mbhc_calibration = def_wcd_mbhc_cal();
7173 if (!mbhc_calibration)
7174 return -ENOMEM;
7175 wcd_mbhc_cfg.calibration = mbhc_calibration;
7176 ret = wcd938x_mbhc_hs_detect(component, &wcd_mbhc_cfg);
7177 if (ret) {
7178 dev_err(component->dev, "%s: mbhc hs detect failed, err:%d\n",
7179 __func__, ret);
7180 goto err_hs_detect;
7181 }
7182 return 0;
7183
7184err_hs_detect:
7185 kfree(mbhc_calibration);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7186 return ret;
7187}
7188
7189static int msm_init_aux_dev(struct platform_device *pdev,
7190 struct snd_soc_card *card)
7191{
7192 struct device_node *wsa_of_node;
7193 struct device_node *aux_codec_of_node;
7194 u32 wsa_max_devs;
7195 u32 wsa_dev_cnt;
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7196 u32 codec_max_aux_devs = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7197 u32 codec_aux_dev_cnt = 0;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7198 int i;
7199 struct msm_wsa881x_dev_info *wsa881x_dev_info;
7200 struct aux_codec_dev_info *aux_cdc_dev_info;
7201 const char *auxdev_name_prefix[1];
7202 char *dev_name_str = NULL;
7203 int found = 0;
7204 int codecs_found = 0;
7205 int ret = 0;
7206
7207 /* Get maximum WSA device count for this platform */
7208 ret = of_property_read_u32(pdev->dev.of_node,
7209 "qcom,wsa-max-devs", &wsa_max_devs);
7210 if (ret) {
7211 dev_info(&pdev->dev,
7212 "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
7213 __func__, pdev->dev.of_node->full_name, ret);
7214 wsa_max_devs = 0;
7215 goto codec_aux_dev;
7216 }
7217 if (wsa_max_devs == 0) {
7218 dev_warn(&pdev->dev,
7219 "%s: Max WSA devices is 0 for this target?\n",
7220 __func__);
7221 goto codec_aux_dev;
7222 }
7223
7224 /* Get count of WSA device phandles for this platform */
7225 wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
7226 "qcom,wsa-devs", NULL);
7227 if (wsa_dev_cnt == -ENOENT) {
7228 dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
7229 __func__);
7230 goto err;
7231 } else if (wsa_dev_cnt <= 0) {
7232 dev_err(&pdev->dev,
7233 "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
7234 __func__, wsa_dev_cnt);
7235 ret = -EINVAL;
7236 goto err;
7237 }
7238
7239 /*
7240 * Expect total phandles count to be NOT less than maximum possible
7241 * WSA count. However, if it is less, then assign same value to
7242 * max count as well.
7243 */
7244 if (wsa_dev_cnt < wsa_max_devs) {
7245 dev_dbg(&pdev->dev,
7246 "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
7247 __func__, wsa_max_devs, wsa_dev_cnt);
7248 wsa_max_devs = wsa_dev_cnt;
7249 }
7250
7251 /* Make sure prefix string passed for each WSA device */
7252 ret = of_property_count_strings(pdev->dev.of_node,
7253 "qcom,wsa-aux-dev-prefix");
7254 if (ret != wsa_dev_cnt) {
7255 dev_err(&pdev->dev,
7256 "%s: expecting %d wsa prefix. Defined only %d in DT\n",
7257 __func__, wsa_dev_cnt, ret);
7258 ret = -EINVAL;
7259 goto err;
7260 }
7261
7262 /*
7263 * Alloc mem to store phandle and index info of WSA device, if already
7264 * registered with ALSA core
7265 */
7266 wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
7267 sizeof(struct msm_wsa881x_dev_info),
7268 GFP_KERNEL);
7269 if (!wsa881x_dev_info) {
7270 ret = -ENOMEM;
7271 goto err;
7272 }
7273
7274 /*
7275 * search and check whether all WSA devices are already
7276 * registered with ALSA core or not. If found a node, store
7277 * the node and the index in a local array of struct for later
7278 * use.
7279 */
7280 for (i = 0; i < wsa_dev_cnt; i++) {
7281 wsa_of_node = of_parse_phandle(pdev->dev.of_node,
7282 "qcom,wsa-devs", i);
7283 if (unlikely(!wsa_of_node)) {
7284 /* we should not be here */
7285 dev_err(&pdev->dev,
7286 "%s: wsa dev node is not present\n",
7287 __func__);
7288 ret = -EINVAL;
7289 goto err;
7290 }
7291 if (soc_find_component(wsa_of_node, NULL)) {
7292 /* WSA device registered with ALSA core */
7293 wsa881x_dev_info[found].of_node = wsa_of_node;
7294 wsa881x_dev_info[found].index = i;
7295 found++;
7296 if (found == wsa_max_devs)
7297 break;
7298 }
7299 }
7300
7301 if (found < wsa_max_devs) {
7302 dev_dbg(&pdev->dev,
7303 "%s: failed to find %d components. Found only %d\n",
7304 __func__, wsa_max_devs, found);
7305 return -EPROBE_DEFER;
7306 }
7307 dev_info(&pdev->dev,
7308 "%s: found %d wsa881x devices registered with ALSA core\n",
7309 __func__, found);
7310
7311codec_aux_dev:
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7312 /* Get maximum aux codec device count for this platform */
7313 ret = of_property_read_u32(pdev->dev.of_node,
7314 "qcom,codec-max-aux-devs",
7315 &codec_max_aux_devs);
7316 if (ret) {
7317 dev_err(&pdev->dev,
7318 "%s: codec-max-aux-devs property missing in DT %s, ret = %d\n",
7319 __func__, pdev->dev.of_node->full_name, ret);
7320 codec_max_aux_devs = 0;
7321 goto aux_dev_register;
7322 }
7323 if (codec_max_aux_devs == 0) {
7324 dev_dbg(&pdev->dev,
7325 "%s: Max aux codec devices is 0 for this target?\n",
7326 __func__);
7327 goto aux_dev_register;
7328 }
7329
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7330 /* Get count of aux codec device phandles for this platform */
7331 codec_aux_dev_cnt = of_count_phandle_with_args(
7332 pdev->dev.of_node,
7333 "qcom,codec-aux-devs", NULL);
7334 if (codec_aux_dev_cnt == -ENOENT) {
7335 dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
7336 __func__);
7337 goto err;
7338 } else if (codec_aux_dev_cnt <= 0) {
7339 dev_err(&pdev->dev,
7340 "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
7341 __func__, codec_aux_dev_cnt);
7342 ret = -EINVAL;
7343 goto err;
7344 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7345
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7346 /*
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7347 * Expect total phandles count to be NOT less than maximum possible
7348 * AUX device count. However, if it is less, then assign same value to
7349 * max count as well.
7350 */
7351 if (codec_aux_dev_cnt < codec_max_aux_devs) {
7352 dev_dbg(&pdev->dev,
7353 "%s: codec_max_aux_devs = %d cannot exceed codec_aux_dev_cnt = %d\n",
7354 __func__, codec_max_aux_devs,
7355 codec_aux_dev_cnt);
7356 codec_max_aux_devs = codec_aux_dev_cnt;
7357 }
7358
7359 /*
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7360 * Alloc mem to store phandle and index info of aux codec
7361 * if already registered with ALSA core
7362 */
7363 aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
7364 sizeof(struct aux_codec_dev_info),
7365 GFP_KERNEL);
7366 if (!aux_cdc_dev_info) {
7367 ret = -ENOMEM;
7368 goto err;
7369 }
7370
7371 /*
7372 * search and check whether all aux codecs are already
7373 * registered with ALSA core or not. If found a node, store
7374 * the node and the index in a local array of struct for later
7375 * use.
7376 */
7377 for (i = 0; i < codec_aux_dev_cnt; i++) {
7378 aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
7379 "qcom,codec-aux-devs", i);
7380 if (unlikely(!aux_codec_of_node)) {
7381 /* we should not be here */
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7382 dev_err(&pdev->dev,
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7383 "%s: aux codec dev node is not present\n",
7384 __func__);
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7385 ret = -EINVAL;
7386 goto err;
7387 }
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7388 if (soc_find_component(aux_codec_of_node, NULL)) {
7389 /* AUX codec registered with ALSA core */
7390 aux_cdc_dev_info[codecs_found].of_node =
7391 aux_codec_of_node;
7392 aux_cdc_dev_info[codecs_found].index = i;
7393 codecs_found++;
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7394 }
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7395 }
7396
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7397 if (codecs_found < codec_aux_dev_cnt) {
7398 dev_dbg(&pdev->dev,
7399 "%s: failed to find %d components. Found only %d\n",
7400 __func__, codec_aux_dev_cnt, codecs_found);
7401 return -EPROBE_DEFER;
7402 }
7403 dev_info(&pdev->dev,
7404 "%s: found %d AUX codecs registered with ALSA core\n",
7405 __func__, codecs_found);
7406
Sudheer Papothid6d524d2019-06-19 02:31:11 +0530[diff] [blame]7407aux_dev_register:
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7408 card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
7409 card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
7410
7411 /* Alloc array of AUX devs struct */
7412 msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
7413 sizeof(struct snd_soc_aux_dev),
7414 GFP_KERNEL);
7415 if (!msm_aux_dev) {
7416 ret = -ENOMEM;
7417 goto err;
7418 }
7419
7420 /* Alloc array of codec conf struct */
7421 msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
7422 sizeof(struct snd_soc_codec_conf),
7423 GFP_KERNEL);
7424 if (!msm_codec_conf) {
7425 ret = -ENOMEM;
7426 goto err;
7427 }
7428
7429 for (i = 0; i < wsa_max_devs; i++) {
7430 dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
7431 GFP_KERNEL);
7432 if (!dev_name_str) {
7433 ret = -ENOMEM;
7434 goto err;
7435 }
7436
7437 ret = of_property_read_string_index(pdev->dev.of_node,
7438 "qcom,wsa-aux-dev-prefix",
7439 wsa881x_dev_info[i].index,
7440 auxdev_name_prefix);
7441 if (ret) {
7442 dev_err(&pdev->dev,
7443 "%s: failed to read wsa aux dev prefix, ret = %d\n",
7444 __func__, ret);
7445 ret = -EINVAL;
7446 goto err;
7447 }
7448
7449 snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
7450 msm_aux_dev[i].name = dev_name_str;
7451 msm_aux_dev[i].codec_name = NULL;
7452 msm_aux_dev[i].codec_of_node =
7453 wsa881x_dev_info[i].of_node;
7454 msm_aux_dev[i].init = msm_wsa881x_init;
7455 msm_codec_conf[i].dev_name = NULL;
7456 msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
7457 msm_codec_conf[i].of_node =
7458 wsa881x_dev_info[i].of_node;
7459 }
7460
7461 for (i = 0; i < codec_aux_dev_cnt; i++) {
7462 msm_aux_dev[wsa_max_devs + i].name = NULL;
7463 msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
7464 msm_aux_dev[wsa_max_devs + i].codec_of_node =
7465 aux_cdc_dev_info[i].of_node;
7466 msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
7467 msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
7468 msm_codec_conf[wsa_max_devs + i].name_prefix =
7469 NULL;
7470 msm_codec_conf[wsa_max_devs + i].of_node =
7471 aux_cdc_dev_info[i].of_node;
7472 }
7473
7474 card->codec_conf = msm_codec_conf;
7475 card->aux_dev = msm_aux_dev;
7476err:
7477 return ret;
7478}
7479
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7480static void msm_i2s_auxpcm_init(struct platform_device *pdev)
7481{
7482 int count = 0;
7483 u32 mi2s_master_slave[MI2S_MAX];
7484 int ret = 0;
7485
7486 for (count = 0; count < MI2S_MAX; count++) {
7487 mutex_init(&mi2s_intf_conf[count].lock);
7488 mi2s_intf_conf[count].ref_cnt = 0;
7489 }
7490
7491 ret = of_property_read_u32_array(pdev->dev.of_node,
7492 "qcom,msm-mi2s-master",
7493 mi2s_master_slave, MI2S_MAX);
7494 if (ret) {
7495 dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
7496 __func__);
7497 } else {
7498 for (count = 0; count < MI2S_MAX; count++) {
7499 mi2s_intf_conf[count].msm_is_mi2s_master =
7500 mi2s_master_slave[count];
7501 }
7502 }
7503}
7504
7505static void msm_i2s_auxpcm_deinit(void)
7506{
7507 int count = 0;
7508
7509 for (count = 0; count < MI2S_MAX; count++) {
7510 mutex_destroy(&mi2s_intf_conf[count].lock);
7511 mi2s_intf_conf[count].ref_cnt = 0;
7512 mi2s_intf_conf[count].msm_is_mi2s_master = 0;
7513 }
7514}
7515
7516static int kona_ssr_enable(struct device *dev, void *data)
7517{
7518 struct platform_device *pdev = to_platform_device(dev);
7519 struct snd_soc_card *card = platform_get_drvdata(pdev);
7520 int ret = 0;
7521
7522 if (!card) {
7523 dev_err(dev, "%s: card is NULL\n", __func__);
7524 ret = -EINVAL;
7525 goto err;
7526 }
7527
7528 if (!strcmp(card->name, "kona-stub-snd-card")) {
7529 /* TODO */
7530 dev_dbg(dev, "%s: TODO \n", __func__);
7531 }
7532
7533 snd_soc_card_change_online_state(card, 1);
7534 dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
7535
7536err:
7537 return ret;
7538}
7539
7540static void kona_ssr_disable(struct device *dev, void *data)
7541{
7542 struct platform_device *pdev = to_platform_device(dev);
7543 struct snd_soc_card *card = platform_get_drvdata(pdev);
7544
7545 if (!card) {
7546 dev_err(dev, "%s: card is NULL\n", __func__);
7547 return;
7548 }
7549
7550 dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
7551 snd_soc_card_change_online_state(card, 0);
7552
7553 if (!strcmp(card->name, "kona-stub-snd-card")) {
7554 /* TODO */
7555 dev_dbg(dev, "%s: TODO \n", __func__);
7556 }
7557}
7558
7559static const struct snd_event_ops kona_ssr_ops = {
7560 .enable = kona_ssr_enable,
7561 .disable = kona_ssr_disable,
7562};
7563
7564static int msm_audio_ssr_compare(struct device *dev, void *data)
7565{
7566 struct device_node *node = data;
7567
7568 dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
7569 __func__, dev->of_node, node);
7570 return (dev->of_node && dev->of_node == node);
7571}
7572
7573static int msm_audio_ssr_register(struct device *dev)
7574{
7575 struct device_node *np = dev->of_node;
7576 struct snd_event_clients *ssr_clients = NULL;
7577 struct device_node *node = NULL;
7578 int ret = 0;
7579 int i = 0;
7580
7581 for (i = 0; ; i++) {
7582 node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
7583 if (!node)
7584 break;
7585 snd_event_mstr_add_client(&ssr_clients,
7586 msm_audio_ssr_compare, node);
7587 }
7588
7589 ret = snd_event_master_register(dev, &kona_ssr_ops,
7590 ssr_clients, NULL);
7591 if (!ret)
7592 snd_event_notify(dev, SND_EVENT_UP);
7593
7594 return ret;
7595}
7596
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7597static int msm_asoc_machine_probe(struct platform_device *pdev)
7598{
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7599 struct snd_soc_card *card = NULL;
7600 struct msm_asoc_mach_data *pdata = NULL;
7601 const char *mbhc_audio_jack_type = NULL;
7602 int ret = 0;
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]7603 uint index = 0;
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7604
7605 if (!pdev->dev.of_node) {
7606 dev_err(&pdev->dev, "%s: No platform supplied from device tree\n", __func__);
7607 return -EINVAL;
7608 }
7609
7610 pdata = devm_kzalloc(&pdev->dev,
7611 sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
7612 if (!pdata)
7613 return -ENOMEM;
7614
7615 card = populate_snd_card_dailinks(&pdev->dev);
7616 if (!card) {
7617 dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
7618 ret = -EINVAL;
7619 goto err;
7620 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7621
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7622 card->dev = &pdev->dev;
7623 platform_set_drvdata(pdev, card);
7624 snd_soc_card_set_drvdata(card, pdata);
7625
7626 ret = snd_soc_of_parse_card_name(card, "qcom,model");
7627 if (ret) {
7628 dev_err(&pdev->dev, "%s: parse card name failed, err:%d\n",
7629 __func__, ret);
7630 goto err;
7631 }
7632
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7633 ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
7634 if (ret) {
7635 dev_err(&pdev->dev, "%s: parse audio routing failed, err:%d\n",
7636 __func__, ret);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7637 goto err;
7638 }
7639
7640 ret = msm_populate_dai_link_component_of_node(card);
7641 if (ret) {
7642 ret = -EPROBE_DEFER;
7643 goto err;
7644 }
7645
Vignesh Kulothungan3e5ebbf2018-10-23 12:19:13 -0700[diff] [blame]7646 ret = msm_init_aux_dev(pdev, card);
7647 if (ret)
7648 goto err;
7649
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7650 ret = devm_snd_soc_register_card(&pdev->dev, card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7651 if (ret == -EPROBE_DEFER) {
7652 if (codec_reg_done)
7653 ret = -EINVAL;
7654 goto err;
7655 } else if (ret) {
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7656 dev_err(&pdev->dev, "%s: snd_soc_register_card failed (%d)\n",
7657 __func__, ret);
7658 goto err;
7659 }
7660 dev_info(&pdev->dev, "%s: Sound card %s registered\n",
7661 __func__, card->name);
7662
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7663 pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
7664 "qcom,hph-en1-gpio", 0);
7665 if (!pdata->hph_en1_gpio_p) {
7666 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7667 __func__, "qcom,hph-en1-gpio",
7668 pdev->dev.of_node->full_name);
7669 }
7670
7671 pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
7672 "qcom,hph-en0-gpio", 0);
7673 if (!pdata->hph_en0_gpio_p) {
7674 dev_dbg(&pdev->dev, "%s: property %s not detected in node %s\n",
7675 __func__, "qcom,hph-en0-gpio",
7676 pdev->dev.of_node->full_name);
7677 }
7678
7679 ret = of_property_read_string(pdev->dev.of_node,
7680 "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
7681 if (ret) {
7682 dev_dbg(&pdev->dev, "%s: Looking up %s property in node %s failed\n",
7683 __func__, "qcom,mbhc-audio-jack-type",
7684 pdev->dev.of_node->full_name);
7685 dev_dbg(&pdev->dev, "Jack type properties set to default\n");
7686 } else {
7687 if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
7688 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7689 dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
7690 } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
7691 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7692 dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
7693 } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
7694 wcd_mbhc_cfg.enable_anc_mic_detect = true;
7695 dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
7696 } else {
7697 wcd_mbhc_cfg.enable_anc_mic_detect = false;
7698 dev_dbg(&pdev->dev, "Unknown value, set to default\n");
7699 }
7700 }
Karthikeyan Mani5eb13422018-11-05 13:49:17 -0800[diff] [blame]7701 /*
7702 * Parse US-Euro gpio info from DT. Report no error if us-euro
7703 * entry is not found in DT file as some targets do not support
7704 * US-Euro detection
7705 */
7706 pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
7707 "qcom,us-euro-gpios", 0);
7708 if (!pdata->us_euro_gpio_p) {
7709 dev_dbg(&pdev->dev, "property %s not detected in node %s",
7710 "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
7711 } else {
7712 dev_dbg(&pdev->dev, "%s detected\n",
7713 "qcom,us-euro-gpios");
7714 wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
7715 }
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7716
Meng Wanga60b4082019-02-25 17:02:23 +0800[diff] [blame]7717 if (wcd_mbhc_cfg.enable_usbc_analog)
7718 wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
7719
7720 pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
7721 "fsa4480-i2c-handle", 0);
7722 if (!pdata->fsa_handle)
7723 dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
7724 "fsa4480-i2c-handle", pdev->dev.of_node->full_name);
7725
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7726 msm_i2s_auxpcm_init(pdev);
Karthikeyan Mani1a111b92019-02-12 21:35:31 -0800[diff] [blame]7727 pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
7728 "qcom,cdc-dmic01-gpios",
7729 0);
7730 pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
7731 "qcom,cdc-dmic23-gpios",
7732 0);
7733 pdata->dmic45_gpio_p = of_parse_phandle(pdev->dev.of_node,
7734 "qcom,cdc-dmic45-gpios",
7735 0);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7736
Karthikeyan Mani12dcf642019-01-29 11:21:15 -0800[diff] [blame]7737 pdata->mi2s_gpio_p[PRIM_MI2S] = of_parse_phandle(pdev->dev.of_node,
7738 "qcom,pri-mi2s-gpios", 0);
7739 pdata->mi2s_gpio_p[SEC_MI2S] = of_parse_phandle(pdev->dev.of_node,
7740 "qcom,sec-mi2s-gpios", 0);
7741 pdata->mi2s_gpio_p[TERT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7742 "qcom,tert-mi2s-gpios", 0);
7743 pdata->mi2s_gpio_p[QUAT_MI2S] = of_parse_phandle(pdev->dev.of_node,
7744 "qcom,quat-mi2s-gpios", 0);
7745 pdata->mi2s_gpio_p[QUIN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7746 "qcom,quin-mi2s-gpios", 0);
7747 pdata->mi2s_gpio_p[SEN_MI2S] = of_parse_phandle(pdev->dev.of_node,
7748 "qcom,sen-mi2s-gpios", 0);
7749 for (index = PRIM_MI2S; index < MI2S_MAX; index++)
7750 atomic_set(&(pdata->mi2s_gpio_ref_count[index]), 0);
7751
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7752 ret = msm_audio_ssr_register(&pdev->dev);
7753 if (ret)
7754 pr_err("%s: Registration with SND event FWK failed ret = %d\n",
7755 __func__, ret);
7756
7757 is_initial_boot = true;
7758
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7759 return 0;
7760err:
7761 devm_kfree(&pdev->dev, pdata);
7762 return ret;
7763}
7764
7765static int msm_asoc_machine_remove(struct platform_device *pdev)
7766{
7767 struct snd_soc_card *card = platform_get_drvdata(pdev);
7768
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7769 snd_event_master_deregister(&pdev->dev);
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7770 snd_soc_unregister_card(card);
Vignesh Kulothungan483a5592018-10-19 15:00:08 -0700[diff] [blame]7771 msm_i2s_auxpcm_deinit();
7772
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7773 return 0;
7774}
7775
7776static struct platform_driver kona_asoc_machine_driver = {
7777 .driver = {
7778 .name = DRV_NAME,
7779 .owner = THIS_MODULE,
7780 .pm = &snd_soc_pm_ops,
7781 .of_match_table = kona_asoc_machine_of_match,
Xiaojun Sang53cd13a2018-06-29 15:14:37 +0800[diff] [blame]7782 .suppress_bind_attrs = true,
Vignesh Kulothungane9abcd02018-10-01 15:55:25 -0700[diff] [blame]7783 },
7784 .probe = msm_asoc_machine_probe,
7785 .remove = msm_asoc_machine_remove,
7786};
7787module_platform_driver(kona_asoc_machine_driver);
7788
7789MODULE_DESCRIPTION("ALSA SoC msm");
7790MODULE_LICENSE("GPL v2");
7791MODULE_ALIAS("platform:" DRV_NAME);
7792MODULE_DEVICE_TABLE(of, kona_asoc_machine_of_match);