Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 1 | /* |
Tallapragada Kalyan | eff377a | 2019-01-09 19:13:19 +0530 | [diff] [blame] | 2 | * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved. |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
| 19 | #ifndef _HAL_RX_H_ |
| 20 | #define _HAL_RX_H_ |
| 21 | |
Leo Chang | 5ea93a4 | 2016-11-03 12:39:49 -0700 | [diff] [blame] | 22 | #include <hal_internal.h> |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 23 | |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 24 | #define HAL_RX_OFFSET(block, field) block##_##field##_OFFSET |
| 25 | #define HAL_RX_LSB(block, field) block##_##field##_LSB |
| 26 | #define HAL_RX_MASk(block, field) block##_##field##_MASK |
| 27 | |
| 28 | #define HAL_RX_GET(_ptr, block, field) \ |
| 29 | (((*((volatile uint32_t *)_ptr + (HAL_RX_OFFSET(block, field)>>2))) & \ |
| 30 | HAL_RX_MASk(block, field)) >> \ |
| 31 | HAL_RX_LSB(block, field)) |
| 32 | |
| 33 | #ifdef NO_RX_PKT_HDR_TLV |
| 34 | /* RX_BUFFER_SIZE = 1536 data bytes + 256 RX TLV bytes. We are avoiding |
| 35 | * 128 bytes of RX_PKT_HEADER_TLV. |
| 36 | */ |
| 37 | #define RX_BUFFER_SIZE 1792 |
| 38 | #else |
| 39 | /* RX_BUFFER_SIZE = 1536 data bytes + 384 RX TLV bytes + some spare bytes */ |
| 40 | #define RX_BUFFER_SIZE 2048 |
| 41 | #endif |
| 42 | |
nobelj | 2b861f8 | 2019-03-20 20:23:59 -0700 | [diff] [blame] | 43 | /* HAL_RX_NON_QOS_TID = NON_QOS_TID which is 16 */ |
| 44 | #define HAL_RX_NON_QOS_TID 16 |
| 45 | |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 46 | enum { |
| 47 | HAL_HW_RX_DECAP_FORMAT_RAW = 0, |
| 48 | HAL_HW_RX_DECAP_FORMAT_NWIFI, |
| 49 | HAL_HW_RX_DECAP_FORMAT_ETH2, |
| 50 | HAL_HW_RX_DECAP_FORMAT_8023, |
| 51 | }; |
| 52 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 53 | /** |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 54 | * struct hal_wbm_err_desc_info: structure to hold wbm error codes and reasons |
| 55 | * |
| 56 | * @reo_psh_rsn: REO push reason |
| 57 | * @reo_err_code: REO Error code |
| 58 | * @rxdma_psh_rsn: RXDMA push reason |
| 59 | * @rxdma_err_code: RXDMA Error code |
| 60 | * @reserved_1: Reserved bits |
| 61 | * @wbm_err_src: WBM error source |
| 62 | * @pool_id: pool ID, indicates which rxdma pool |
| 63 | * @reserved_2: Reserved bits |
| 64 | */ |
| 65 | struct hal_wbm_err_desc_info { |
| 66 | uint16_t reo_psh_rsn:2, |
| 67 | reo_err_code:5, |
| 68 | rxdma_psh_rsn:2, |
| 69 | rxdma_err_code:5, |
| 70 | reserved_1:2; |
| 71 | uint8_t wbm_err_src:3, |
| 72 | pool_id:2, |
| 73 | reserved_2:3; |
| 74 | }; |
| 75 | |
| 76 | /** |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 77 | * enum hal_reo_error_code: Enum which encapsulates "reo_push_reason" |
| 78 | * |
| 79 | * @ HAL_REO_ERROR_DETECTED: Packets arrived because of an error detected |
| 80 | * @ HAL_REO_ROUTING_INSTRUCTION: Packets arrived because of REO routing |
| 81 | */ |
| 82 | enum hal_reo_error_status { |
| 83 | HAL_REO_ERROR_DETECTED = 0, |
| 84 | HAL_REO_ROUTING_INSTRUCTION = 1, |
| 85 | }; |
| 86 | |
| 87 | /** |
| 88 | * @msdu_flags: [0] first_msdu_in_mpdu |
| 89 | * [1] last_msdu_in_mpdu |
| 90 | * [2] msdu_continuation - MSDU spread across buffers |
| 91 | * [23] sa_is_valid - SA match in peer table |
| 92 | * [24] sa_idx_timeout - Timeout while searching for SA match |
| 93 | * [25] da_is_valid - Used to identtify intra-bss forwarding |
| 94 | * [26] da_is_MCBC |
| 95 | * [27] da_idx_timeout - Timeout while searching for DA match |
| 96 | * |
| 97 | */ |
| 98 | struct hal_rx_msdu_desc_info { |
| 99 | uint32_t msdu_flags; |
| 100 | uint16_t msdu_len; /* 14 bits for length */ |
| 101 | }; |
| 102 | |
| 103 | /** |
| 104 | * enum hal_rx_msdu_desc_flags: Enum for flags in MSDU_DESC_INFO |
| 105 | * |
| 106 | * @ HAL_MSDU_F_FIRST_MSDU_IN_MPDU: First MSDU in MPDU |
| 107 | * @ HAL_MSDU_F_LAST_MSDU_IN_MPDU: Last MSDU in MPDU |
| 108 | * @ HAL_MSDU_F_MSDU_CONTINUATION: MSDU continuation |
| 109 | * @ HAL_MSDU_F_SA_IS_VALID: Found match for SA in AST |
| 110 | * @ HAL_MSDU_F_SA_IDX_TIMEOUT: AST search for SA timed out |
| 111 | * @ HAL_MSDU_F_DA_IS_VALID: Found match for DA in AST |
| 112 | * @ HAL_MSDU_F_DA_IS_MCBC: DA is MC/BC address |
| 113 | * @ HAL_MSDU_F_DA_IDX_TIMEOUT: AST search for DA timed out |
| 114 | */ |
| 115 | enum hal_rx_msdu_desc_flags { |
| 116 | HAL_MSDU_F_FIRST_MSDU_IN_MPDU = (0x1 << 0), |
| 117 | HAL_MSDU_F_LAST_MSDU_IN_MPDU = (0x1 << 1), |
| 118 | HAL_MSDU_F_MSDU_CONTINUATION = (0x1 << 2), |
| 119 | HAL_MSDU_F_SA_IS_VALID = (0x1 << 23), |
| 120 | HAL_MSDU_F_SA_IDX_TIMEOUT = (0x1 << 24), |
| 121 | HAL_MSDU_F_DA_IS_VALID = (0x1 << 25), |
| 122 | HAL_MSDU_F_DA_IS_MCBC = (0x1 << 26), |
| 123 | HAL_MSDU_F_DA_IDX_TIMEOUT = (0x1 << 27) |
| 124 | }; |
| 125 | |
| 126 | /* |
| 127 | * @msdu_count: no. of msdus in the MPDU |
| 128 | * @mpdu_seq: MPDU sequence number |
| 129 | * @mpdu_flags [0] Fragment flag |
| 130 | * [1] MPDU_retry_bit |
| 131 | * [2] AMPDU flag |
| 132 | * [3] raw_ampdu |
| 133 | * @peer_meta_data: Upper bits containing peer id, vdev id |
| 134 | */ |
| 135 | struct hal_rx_mpdu_desc_info { |
| 136 | uint16_t msdu_count; |
| 137 | uint16_t mpdu_seq; /* 12 bits for length */ |
| 138 | uint32_t mpdu_flags; |
| 139 | uint32_t peer_meta_data; /* sw progamed meta-data:MAC Id & peer Id */ |
| 140 | }; |
| 141 | |
| 142 | /** |
| 143 | * enum hal_rx_mpdu_desc_flags: Enum for flags in MPDU_DESC_INFO |
| 144 | * |
| 145 | * @ HAL_MPDU_F_FRAGMENT: Fragmented MPDU (802.11 fragemtation) |
| 146 | * @ HAL_MPDU_F_RETRY_BIT: Retry bit is set in FC of MPDU |
| 147 | * @ HAL_MPDU_F_AMPDU_FLAG: MPDU received as part of A-MPDU |
| 148 | * @ HAL_MPDU_F_RAW_AMPDU: MPDU is a Raw MDPU |
| 149 | */ |
| 150 | enum hal_rx_mpdu_desc_flags { |
| 151 | HAL_MPDU_F_FRAGMENT = (0x1 << 20), |
| 152 | HAL_MPDU_F_RETRY_BIT = (0x1 << 21), |
| 153 | HAL_MPDU_F_AMPDU_FLAG = (0x1 << 22), |
| 154 | HAL_MPDU_F_RAW_AMPDU = (0x1 << 30) |
| 155 | }; |
| 156 | |
| 157 | /** |
| 158 | * enum hal_rx_ret_buf_manager: Enum for return_buffer_manager field in |
| 159 | * BUFFER_ADDR_INFO structure |
| 160 | * |
| 161 | * @ HAL_RX_BUF_RBM_WBM_IDLE_BUF_LIST: Buffer returned to WBM idle buffer list |
| 162 | * @ HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST: Descriptor returned to WBM idle |
| 163 | * descriptor list |
| 164 | * @ HAL_RX_BUF_RBM_FW_BM: Buffer returned to FW |
| 165 | * @ HAL_RX_BUF_RBM_SW0_BM: For Tx completion -- returned to host |
| 166 | * @ HAL_RX_BUF_RBM_SW1_BM: For Tx completion -- returned to host |
| 167 | * @ HAL_RX_BUF_RBM_SW2_BM: For Tx completion -- returned to host |
| 168 | * @ HAL_RX_BUF_RBM_SW3_BM: For Rx release -- returned to host |
| 169 | */ |
| 170 | enum hal_rx_ret_buf_manager { |
| 171 | HAL_RX_BUF_RBM_WBM_IDLE_BUF_LIST = 0, |
| 172 | HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST = 1, |
| 173 | HAL_RX_BUF_RBM_FW_BM = 2, |
| 174 | HAL_RX_BUF_RBM_SW0_BM = 3, |
| 175 | HAL_RX_BUF_RBM_SW1_BM = 4, |
| 176 | HAL_RX_BUF_RBM_SW2_BM = 5, |
| 177 | HAL_RX_BUF_RBM_SW3_BM = 6, |
| 178 | }; |
| 179 | |
| 180 | /* |
| 181 | * Given the offset of a field in bytes, returns uint8_t * |
| 182 | */ |
| 183 | #define _OFFSET_TO_BYTE_PTR(_ptr, _off_in_bytes) \ |
| 184 | (((uint8_t *)(_ptr)) + (_off_in_bytes)) |
| 185 | |
| 186 | /* |
| 187 | * Given the offset of a field in bytes, returns uint32_t * |
| 188 | */ |
| 189 | #define _OFFSET_TO_WORD_PTR(_ptr, _off_in_bytes) \ |
| 190 | (((uint32_t *)(_ptr)) + ((_off_in_bytes) >> 2)) |
| 191 | |
| 192 | #define _HAL_MS(_word, _mask, _shift) \ |
| 193 | (((_word) & (_mask)) >> (_shift)) |
| 194 | |
| 195 | /* |
| 196 | * macro to set the LSW of the nbuf data physical address |
| 197 | * to the rxdma ring entry |
| 198 | */ |
| 199 | #define HAL_RXDMA_PADDR_LO_SET(buff_addr_info, paddr_lo) \ |
| 200 | ((*(((unsigned int *) buff_addr_info) + \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 201 | (BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET >> 2))) = \ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 202 | (paddr_lo << BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB) & \ |
| 203 | BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK) |
| 204 | |
| 205 | /* |
| 206 | * macro to set the LSB of MSW of the nbuf data physical address |
| 207 | * to the rxdma ring entry |
| 208 | */ |
| 209 | #define HAL_RXDMA_PADDR_HI_SET(buff_addr_info, paddr_hi) \ |
| 210 | ((*(((unsigned int *) buff_addr_info) + \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 211 | (BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET >> 2))) = \ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 212 | (paddr_hi << BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB) & \ |
| 213 | BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK) |
| 214 | |
| 215 | /* |
| 216 | * macro to set the cookie into the rxdma ring entry |
| 217 | */ |
| 218 | #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \ |
| 219 | ((*(((unsigned int *) buff_addr_info) + \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 220 | (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \ |
Karunakar Dasineni | 1d891ed | 2017-03-29 15:42:02 -0700 | [diff] [blame] | 221 | ~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 222 | ((*(((unsigned int *) buff_addr_info) + \ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 223 | (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \ |
| 224 | (cookie << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \ |
| 225 | BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK) |
| 226 | |
| 227 | /* |
| 228 | * macro to set the manager into the rxdma ring entry |
| 229 | */ |
| 230 | #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \ |
| 231 | ((*(((unsigned int *) buff_addr_info) + \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 232 | (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \ |
Karunakar Dasineni | 1d891ed | 2017-03-29 15:42:02 -0700 | [diff] [blame] | 233 | ~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \ |
Tallapragada Kalyan | a5cbbfe | 2016-12-07 11:49:47 +0530 | [diff] [blame] | 234 | ((*(((unsigned int *) buff_addr_info) + \ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 235 | (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \ |
| 236 | (manager << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \ |
| 237 | BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK) |
| 238 | |
| 239 | #define HAL_RX_ERROR_STATUS_GET(reo_desc) \ |
| 240 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(reo_desc, \ |
| 241 | REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET)),\ |
| 242 | REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK, \ |
| 243 | REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB)) |
| 244 | |
| 245 | #define HAL_RX_BUF_COOKIE_GET(buff_addr_info) \ |
| 246 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \ |
| 247 | BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET)), \ |
| 248 | BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK, \ |
| 249 | BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB)) |
| 250 | |
| 251 | #define HAL_RX_BUFFER_ADDR_39_32_GET(buff_addr_info) \ |
| 252 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \ |
| 253 | BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET)), \ |
| 254 | BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK, \ |
| 255 | BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB)) |
| 256 | |
| 257 | #define HAL_RX_BUFFER_ADDR_31_0_GET(buff_addr_info) \ |
| 258 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \ |
| 259 | BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET)), \ |
| 260 | BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK, \ |
| 261 | BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB)) |
| 262 | |
| 263 | #define HAL_RX_BUF_RBM_GET(buff_addr_info) \ |
| 264 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \ |
| 265 | BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET)),\ |
| 266 | BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK, \ |
| 267 | BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB)) |
| 268 | |
| 269 | /* TODO: Convert the following structure fields accesseses to offsets */ |
| 270 | |
| 271 | #define HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_desc) \ |
| 272 | (HAL_RX_BUFFER_ADDR_39_32_GET(& \ |
| 273 | (((struct reo_destination_ring *) \ |
| 274 | reo_desc)->buf_or_link_desc_addr_info))) |
| 275 | |
| 276 | #define HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_desc) \ |
| 277 | (HAL_RX_BUFFER_ADDR_31_0_GET(& \ |
| 278 | (((struct reo_destination_ring *) \ |
| 279 | reo_desc)->buf_or_link_desc_addr_info))) |
| 280 | |
| 281 | #define HAL_RX_REO_BUF_COOKIE_GET(reo_desc) \ |
| 282 | (HAL_RX_BUF_COOKIE_GET(& \ |
| 283 | (((struct reo_destination_ring *) \ |
| 284 | reo_desc)->buf_or_link_desc_addr_info))) |
| 285 | |
| 286 | #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info_ptr) \ |
| 287 | ((mpdu_info_ptr \ |
| 288 | [RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_OFFSET >> 2] & \ |
| 289 | RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_MASK) >> \ |
| 290 | RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_LSB) |
| 291 | |
Tallapragada Kalyan | 603c594 | 2016-12-07 21:30:44 +0530 | [diff] [blame] | 292 | #define HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info_ptr) \ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 293 | ((mpdu_info_ptr \ |
| 294 | [RX_MPDU_DESC_INFO_1_PEER_META_DATA_OFFSET >> 2] & \ |
| 295 | RX_MPDU_DESC_INFO_1_PEER_META_DATA_MASK) >> \ |
| 296 | RX_MPDU_DESC_INFO_1_PEER_META_DATA_LSB) |
| 297 | |
| 298 | #define HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info_ptr) \ |
| 299 | ((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MSDU_COUNT_OFFSET >> 2] & \ |
| 300 | RX_MPDU_DESC_INFO_0_MSDU_COUNT_MASK) >> \ |
| 301 | RX_MPDU_DESC_INFO_0_MSDU_COUNT_LSB) |
| 302 | |
| 303 | #define HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) \ |
| 304 | (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_OFFSET >> 2] & \ |
| 305 | RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_MASK) |
| 306 | |
| 307 | #define HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) \ |
| 308 | (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_OFFSET >> 2] & \ |
| 309 | RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_MASK) |
| 310 | |
| 311 | #define HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) \ |
| 312 | (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_AMPDU_FLAG_OFFSET >> 2] & \ |
| 313 | RX_MPDU_DESC_INFO_0_AMPDU_FLAG_MASK) |
| 314 | |
| 315 | #define HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr) \ |
| 316 | (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_RAW_MPDU_OFFSET >> 2] & \ |
| 317 | RX_MPDU_DESC_INFO_0_RAW_MPDU_MASK) |
| 318 | |
| 319 | #define HAL_RX_MPDU_FLAGS_GET(mpdu_info_ptr) \ |
| 320 | (HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) | \ |
| 321 | HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) | \ |
| 322 | HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) | \ |
| 323 | HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr)) |
| 324 | |
| 325 | |
| 326 | #define HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info_ptr) \ |
| 327 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 328 | RX_MSDU_DESC_INFO_0_MSDU_LENGTH_OFFSET)), \ |
| 329 | RX_MSDU_DESC_INFO_0_MSDU_LENGTH_MASK, \ |
| 330 | RX_MSDU_DESC_INFO_0_MSDU_LENGTH_LSB)) |
| 331 | |
| 332 | /* |
| 333 | * NOTE: None of the following _GET macros need a right |
| 334 | * shift by the corresponding _LSB. This is because, they are |
| 335 | * finally taken and "OR'ed" into a single word again. |
| 336 | */ |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 337 | #define HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_SET(msdu_info_ptr, val) \ |
| 338 | ((*(((uint32_t *)msdu_info_ptr) + \ |
| 339 | (RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET >> 2))) |= \ |
| 340 | (val << RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_LSB) & \ |
| 341 | RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK) |
| 342 | |
| 343 | #define HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_info_ptr, val) \ |
| 344 | ((*(((uint32_t *)msdu_info_ptr) + \ |
| 345 | (RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET >> 2))) |= \ |
| 346 | (val << RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_LSB) & \ |
| 347 | RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK) |
| 348 | |
| 349 | #define HAL_RX_MSDU_CONTINUATION_FLAG_SET(msdu_info_ptr, val) \ |
| 350 | ((*(((uint32_t *)msdu_info_ptr) + \ |
| 351 | (RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET >> 2))) |= \ |
| 352 | (val << RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB) & \ |
| 353 | RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK) |
| 354 | |
| 355 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 356 | #define HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) \ |
| 357 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 358 | RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_OFFSET)) & \ |
| 359 | RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK) |
| 360 | |
| 361 | #define HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) \ |
| 362 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 363 | RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_OFFSET)) & \ |
| 364 | RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK) |
| 365 | |
| 366 | #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) \ |
| 367 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 368 | RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \ |
| 369 | RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK) |
| 370 | |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 371 | #define HAL_RX_MSDU_REO_DST_IND_GET(msdu_info_ptr) \ |
| 372 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 373 | RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET)), \ |
| 374 | RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK, \ |
| 375 | RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB)) |
| 376 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 377 | #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) \ |
| 378 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 379 | RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) & \ |
| 380 | RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK) |
| 381 | |
| 382 | #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \ |
| 383 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 384 | RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) & \ |
| 385 | RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK) |
| 386 | |
| 387 | #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) \ |
| 388 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 389 | RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) & \ |
| 390 | RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK) |
| 391 | |
| 392 | #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) \ |
| 393 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 394 | RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) & \ |
| 395 | RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK) |
| 396 | |
| 397 | #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \ |
| 398 | ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \ |
| 399 | RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) & \ |
| 400 | RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK) |
| 401 | |
| 402 | |
| 403 | #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \ |
| 404 | (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \ |
| 405 | HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \ |
| 406 | HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \ |
| 407 | HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \ |
| 408 | HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \ |
| 409 | HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \ |
| 410 | HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \ |
| 411 | HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr)) |
| 412 | |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 413 | |
| 414 | #define HAL_RX_MPDU_PN_31_0_GET(_rx_mpdu_info) \ |
| 415 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 416 | RX_MPDU_INFO_4_PN_31_0_OFFSET)), \ |
| 417 | RX_MPDU_INFO_4_PN_31_0_MASK, \ |
| 418 | RX_MPDU_INFO_4_PN_31_0_LSB)) |
| 419 | |
| 420 | #define HAL_RX_MPDU_PN_63_32_GET(_rx_mpdu_info) \ |
| 421 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 422 | RX_MPDU_INFO_5_PN_63_32_OFFSET)), \ |
| 423 | RX_MPDU_INFO_5_PN_63_32_MASK, \ |
| 424 | RX_MPDU_INFO_5_PN_63_32_LSB)) |
| 425 | |
| 426 | #define HAL_RX_MPDU_PN_95_64_GET(_rx_mpdu_info) \ |
| 427 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 428 | RX_MPDU_INFO_6_PN_95_64_OFFSET)), \ |
| 429 | RX_MPDU_INFO_6_PN_95_64_MASK, \ |
| 430 | RX_MPDU_INFO_6_PN_95_64_LSB)) |
| 431 | |
| 432 | #define HAL_RX_MPDU_PN_127_96_GET(_rx_mpdu_info) \ |
| 433 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 434 | RX_MPDU_INFO_7_PN_127_96_OFFSET)), \ |
| 435 | RX_MPDU_INFO_7_PN_127_96_MASK, \ |
| 436 | RX_MPDU_INFO_7_PN_127_96_LSB)) |
| 437 | |
| 438 | #define HAL_RX_MPDU_ENCRYPT_TYPE_GET(_rx_mpdu_info) \ |
| 439 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 440 | RX_MPDU_INFO_3_ENCRYPT_TYPE_OFFSET)), \ |
| 441 | RX_MPDU_INFO_3_ENCRYPT_TYPE_MASK, \ |
| 442 | RX_MPDU_INFO_3_ENCRYPT_TYPE_LSB)) |
| 443 | |
| 444 | #define HAL_RX_MPDU_ENCRYPTION_INFO_VALID(_rx_mpdu_info) \ |
| 445 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 446 | RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_OFFSET)), \ |
| 447 | RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_MASK, \ |
| 448 | RX_MPDU_INFO_2_FRAME_ENCRYPTION_INFO_VALID_LSB)) |
| 449 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 450 | #define HAL_RX_FLD_SET(_ptr, _wrd, _field, _val) \ |
| 451 | (*(uint32_t *)(((uint8_t *)_ptr) + \ |
| 452 | _wrd ## _ ## _field ## _OFFSET) |= \ |
| 453 | ((_val << _wrd ## _ ## _field ## _LSB) & \ |
| 454 | _wrd ## _ ## _field ## _MASK)) |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 455 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 456 | #define HAL_RX_UNIFORM_HDR_SET(_rx_msdu_link, _field, _val) \ |
| 457 | HAL_RX_FLD_SET(_rx_msdu_link, UNIFORM_DESCRIPTOR_HEADER_0, \ |
| 458 | _field, _val) |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 459 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 460 | #define HAL_RX_MSDU_DESC_INFO_SET(_msdu_info_ptr, _field, _val) \ |
| 461 | HAL_RX_FLD_SET(_msdu_info_ptr, RX_MSDU_DESC_INFO_0, \ |
| 462 | _field, _val) |
| 463 | |
| 464 | #define HAL_RX_MPDU_DESC_INFO_SET(_mpdu_info_ptr, _field, _val) \ |
| 465 | HAL_RX_FLD_SET(_mpdu_info_ptr, RX_MPDU_DESC_INFO_0, \ |
| 466 | _field, _val) |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 467 | |
Tallapragada Kalyan | 603c594 | 2016-12-07 21:30:44 +0530 | [diff] [blame] | 468 | static inline void hal_rx_mpdu_desc_info_get(void *desc_addr, |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 469 | struct hal_rx_mpdu_desc_info *mpdu_desc_info) |
| 470 | { |
| 471 | struct reo_destination_ring *reo_dst_ring; |
Chaithanya Garrepalli | ab234e5 | 2019-05-28 12:10:49 +0530 | [diff] [blame] | 472 | uint32_t *mpdu_info; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 473 | |
| 474 | reo_dst_ring = (struct reo_destination_ring *) desc_addr; |
| 475 | |
Chaithanya Garrepalli | ab234e5 | 2019-05-28 12:10:49 +0530 | [diff] [blame] | 476 | mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 477 | |
| 478 | mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info); |
| 479 | mpdu_desc_info->mpdu_seq = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info); |
| 480 | mpdu_desc_info->mpdu_flags = HAL_RX_MPDU_FLAGS_GET(mpdu_info); |
| 481 | mpdu_desc_info->peer_meta_data = |
Tallapragada Kalyan | 603c594 | 2016-12-07 21:30:44 +0530 | [diff] [blame] | 482 | HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info); |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 483 | } |
| 484 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 485 | /* |
| 486 | * @ hal_rx_msdu_desc_info_get: Gets the flags related to MSDU desciptor. |
| 487 | * @ Specifically flags needed are: |
| 488 | * @ first_msdu_in_mpdu, last_msdu_in_mpdu, |
| 489 | * @ msdu_continuation, sa_is_valid, |
| 490 | * @ sa_idx_timeout, da_is_valid, da_idx_timeout, |
| 491 | * @ da_is_MCBC |
| 492 | * |
| 493 | * @ hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to the current |
| 494 | * @ descriptor |
| 495 | * @ msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor |
| 496 | * @ Return: void |
| 497 | */ |
| 498 | static inline void hal_rx_msdu_desc_info_get(void *desc_addr, |
| 499 | struct hal_rx_msdu_desc_info *msdu_desc_info) |
| 500 | { |
| 501 | struct reo_destination_ring *reo_dst_ring; |
Chaithanya Garrepalli | ab234e5 | 2019-05-28 12:10:49 +0530 | [diff] [blame] | 502 | uint32_t *msdu_info; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 503 | |
| 504 | reo_dst_ring = (struct reo_destination_ring *) desc_addr; |
| 505 | |
Chaithanya Garrepalli | ab234e5 | 2019-05-28 12:10:49 +0530 | [diff] [blame] | 506 | msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 507 | msdu_desc_info->msdu_flags = HAL_RX_MSDU_FLAGS_GET(msdu_info); |
| 508 | msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info); |
| 509 | } |
| 510 | |
| 511 | /* |
| 512 | * hal_rxdma_buff_addr_info_set() - set the buffer_addr_info of the |
| 513 | * rxdma ring entry. |
| 514 | * @rxdma_entry: descriptor entry |
| 515 | * @paddr: physical address of nbuf data pointer. |
| 516 | * @cookie: SW cookie used as a index to SW rx desc. |
| 517 | * @manager: who owns the nbuf (host, NSS, etc...). |
| 518 | * |
| 519 | */ |
| 520 | static inline void hal_rxdma_buff_addr_info_set(void *rxdma_entry, |
Tallapragada Kalyan | aae8c41 | 2017-02-13 12:00:17 +0530 | [diff] [blame] | 521 | qdf_dma_addr_t paddr, uint32_t cookie, uint8_t manager) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 522 | { |
| 523 | uint32_t paddr_lo = ((u64)paddr & 0x00000000ffffffff); |
| 524 | uint32_t paddr_hi = ((u64)paddr & 0xffffffff00000000) >> 32; |
| 525 | |
| 526 | HAL_RXDMA_PADDR_LO_SET(rxdma_entry, paddr_lo); |
| 527 | HAL_RXDMA_PADDR_HI_SET(rxdma_entry, paddr_hi); |
| 528 | HAL_RXDMA_COOKIE_SET(rxdma_entry, cookie); |
| 529 | HAL_RXDMA_MANAGER_SET(rxdma_entry, manager); |
| 530 | } |
| 531 | |
| 532 | /* |
| 533 | * Structures & Macros to obtain fields from the TLV's in the Rx packet |
| 534 | * pre-header. |
| 535 | */ |
| 536 | |
| 537 | /* |
| 538 | * Every Rx packet starts at an offset from the top of the buffer. |
| 539 | * If the host hasn't subscribed to any specific TLV, there is |
| 540 | * still space reserved for the following TLV's from the start of |
| 541 | * the buffer: |
| 542 | * -- RX ATTENTION |
| 543 | * -- RX MPDU START |
| 544 | * -- RX MSDU START |
| 545 | * -- RX MSDU END |
| 546 | * -- RX MPDU END |
| 547 | * -- RX PACKET HEADER (802.11) |
| 548 | * If the host subscribes to any of the TLV's above, that TLV |
| 549 | * if populated by the HW |
| 550 | */ |
| 551 | |
| 552 | #define NUM_DWORDS_TAG 1 |
| 553 | |
| 554 | /* By default the packet header TLV is 128 bytes */ |
| 555 | #define NUM_OF_BYTES_RX_802_11_HDR_TLV 128 |
| 556 | #define NUM_OF_DWORDS_RX_802_11_HDR_TLV \ |
| 557 | (NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2) |
| 558 | |
| 559 | #define RX_PKT_OFFSET_WORDS \ |
| 560 | ( \ |
| 561 | NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG \ |
| 562 | NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG \ |
| 563 | NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG \ |
| 564 | NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG \ |
| 565 | NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG \ |
| 566 | NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG \ |
| 567 | ) |
| 568 | |
| 569 | #define RX_PKT_OFFSET_BYTES \ |
| 570 | (RX_PKT_OFFSET_WORDS << 2) |
| 571 | |
| 572 | #define RX_PKT_HDR_TLV_LEN 120 |
| 573 | |
| 574 | /* |
| 575 | * Each RX descriptor TLV is preceded by 1 DWORD "tag" |
| 576 | */ |
| 577 | struct rx_attention_tlv { |
| 578 | uint32_t tag; |
| 579 | struct rx_attention rx_attn; |
| 580 | }; |
| 581 | |
| 582 | struct rx_mpdu_start_tlv { |
| 583 | uint32_t tag; |
| 584 | struct rx_mpdu_start rx_mpdu_start; |
| 585 | }; |
| 586 | |
| 587 | struct rx_msdu_start_tlv { |
| 588 | uint32_t tag; |
| 589 | struct rx_msdu_start rx_msdu_start; |
| 590 | }; |
| 591 | |
| 592 | struct rx_msdu_end_tlv { |
| 593 | uint32_t tag; |
| 594 | struct rx_msdu_end rx_msdu_end; |
| 595 | }; |
| 596 | |
| 597 | struct rx_mpdu_end_tlv { |
| 598 | uint32_t tag; |
| 599 | struct rx_mpdu_end rx_mpdu_end; |
| 600 | }; |
| 601 | |
| 602 | struct rx_pkt_hdr_tlv { |
| 603 | uint32_t tag; /* 4 B */ |
| 604 | uint32_t phy_ppdu_id; /* 4 B */ |
| 605 | char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN]; /* 120 B */ |
| 606 | }; |
| 607 | |
| 608 | |
| 609 | #define RXDMA_OPTIMIZATION |
| 610 | |
| 611 | #ifdef RXDMA_OPTIMIZATION |
| 612 | /* |
| 613 | * The RX_PADDING_BYTES is required so that the TLV's don't |
| 614 | * spread across the 128 byte boundary |
| 615 | * RXDMA optimization requires: |
| 616 | * 1) MSDU_END & ATTENTION TLV's follow in that order |
| 617 | * 2) TLV's don't span across 128 byte lines |
| 618 | * 3) Rx Buffer is nicely aligned on the 128 byte boundary |
| 619 | */ |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 620 | #define RX_PADDING0_BYTES 4 |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 621 | #define RX_PADDING1_BYTES 16 |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 622 | struct rx_pkt_tlvs { |
| 623 | struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */ |
| 624 | struct rx_attention_tlv attn_tlv; /* 16 bytes */ |
| 625 | struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */ |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 626 | uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 627 | struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */ |
| 628 | struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */ |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 629 | uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */ |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 630 | #ifndef NO_RX_PKT_HDR_TLV |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 631 | struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */ |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 632 | #endif |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 633 | }; |
| 634 | #else /* RXDMA_OPTIMIZATION */ |
| 635 | struct rx_pkt_tlvs { |
| 636 | struct rx_attention_tlv attn_tlv; |
| 637 | struct rx_mpdu_start_tlv mpdu_start_tlv; |
| 638 | struct rx_msdu_start_tlv msdu_start_tlv; |
| 639 | struct rx_msdu_end_tlv msdu_end_tlv; |
| 640 | struct rx_mpdu_end_tlv mpdu_end_tlv; |
| 641 | struct rx_pkt_hdr_tlv pkt_hdr_tlv; |
| 642 | }; |
| 643 | #endif /* RXDMA_OPTIMIZATION */ |
| 644 | |
| 645 | #define RX_PKT_TLVS_LEN (sizeof(struct rx_pkt_tlvs)) |
| 646 | |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 647 | #ifdef NO_RX_PKT_HDR_TLV |
| 648 | static inline uint8_t |
| 649 | *hal_rx_pkt_hdr_get(uint8_t *buf) |
| 650 | { |
| 651 | return buf + RX_PKT_TLVS_LEN; |
| 652 | } |
| 653 | #else |
Pratik Gandhi | 3da3bc7 | 2017-03-16 18:20:22 +0530 | [diff] [blame] | 654 | static inline uint8_t |
| 655 | *hal_rx_pkt_hdr_get(uint8_t *buf) |
| 656 | { |
| 657 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 658 | |
| 659 | return pkt_tlvs->pkt_hdr_tlv.rx_pkt_hdr; |
| 660 | |
| 661 | } |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 662 | #endif |
Pratik Gandhi | 3da3bc7 | 2017-03-16 18:20:22 +0530 | [diff] [blame] | 663 | |
Kiran Venkatappa | 0792161 | 2019-03-02 23:14:12 +0530 | [diff] [blame] | 664 | #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field) |
| 665 | |
| 666 | #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \ |
| 667 | RX_PKT_TLV_OFFSET(mpdu_start_tlv) |
| 668 | #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv) |
| 669 | #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \ |
| 670 | RX_PKT_TLV_OFFSET(msdu_start_tlv) |
| 671 | #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv) |
| 672 | #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv) |
| 673 | #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv) |
| 674 | |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 675 | static inline uint8_t |
| 676 | *hal_rx_padding0_get(uint8_t *buf) |
| 677 | { |
| 678 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 679 | |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 680 | return pkt_tlvs->rx_padding0; |
| 681 | } |
| 682 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 683 | /* |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 684 | * @ hal_rx_encryption_info_valid: Returns encryption type. |
| 685 | * |
| 686 | * @ buf: rx_tlv_hdr of the received packet |
| 687 | * @ Return: encryption type |
| 688 | */ |
| 689 | static inline uint32_t |
| 690 | hal_rx_encryption_info_valid(uint8_t *buf) |
| 691 | { |
| 692 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 693 | struct rx_mpdu_start *mpdu_start = |
| 694 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 695 | struct rx_mpdu_info *mpdu_info = &(mpdu_start->rx_mpdu_info_details); |
| 696 | uint32_t encryption_info = HAL_RX_MPDU_ENCRYPTION_INFO_VALID(mpdu_info); |
| 697 | |
| 698 | return encryption_info; |
| 699 | } |
| 700 | |
| 701 | /* |
| 702 | * @ hal_rx_print_pn: Prints the PN of rx packet. |
| 703 | * |
| 704 | * @ buf: rx_tlv_hdr of the received packet |
| 705 | * @ Return: void |
| 706 | */ |
| 707 | static inline void |
| 708 | hal_rx_print_pn(uint8_t *buf) |
| 709 | { |
| 710 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 711 | struct rx_mpdu_start *mpdu_start = |
| 712 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 713 | struct rx_mpdu_info *mpdu_info = &(mpdu_start->rx_mpdu_info_details); |
| 714 | |
| 715 | uint32_t pn_31_0 = HAL_RX_MPDU_PN_31_0_GET(mpdu_info); |
| 716 | uint32_t pn_63_32 = HAL_RX_MPDU_PN_63_32_GET(mpdu_info); |
| 717 | uint32_t pn_95_64 = HAL_RX_MPDU_PN_95_64_GET(mpdu_info); |
| 718 | uint32_t pn_127_96 = HAL_RX_MPDU_PN_127_96_GET(mpdu_info); |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 719 | |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 720 | QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 721 | "PN number pn_127_96 0x%x pn_95_64 0x%x pn_63_32 0x%x pn_31_0 0x%x ", |
Gurumoorthi Gnanasambandhan | ed4bcf8 | 2017-05-24 00:10:59 +0530 | [diff] [blame] | 722 | pn_127_96, pn_95_64, pn_63_32, pn_31_0); |
| 723 | } |
| 724 | |
| 725 | /* |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 726 | * Get msdu_done bit from the RX_ATTENTION TLV |
| 727 | */ |
| 728 | #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn) \ |
| 729 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 730 | RX_ATTENTION_2_MSDU_DONE_OFFSET)), \ |
| 731 | RX_ATTENTION_2_MSDU_DONE_MASK, \ |
| 732 | RX_ATTENTION_2_MSDU_DONE_LSB)) |
| 733 | |
| 734 | static inline uint32_t |
| 735 | hal_rx_attn_msdu_done_get(uint8_t *buf) |
| 736 | { |
| 737 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 738 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 739 | uint32_t msdu_done; |
| 740 | |
| 741 | msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn); |
| 742 | |
| 743 | return msdu_done; |
| 744 | } |
| 745 | |
Ishank Jain | 1e7401c | 2017-02-17 15:38:39 +0530 | [diff] [blame] | 746 | #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn) \ |
| 747 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 748 | RX_ATTENTION_1_FIRST_MPDU_OFFSET)), \ |
| 749 | RX_ATTENTION_1_FIRST_MPDU_MASK, \ |
| 750 | RX_ATTENTION_1_FIRST_MPDU_LSB)) |
| 751 | |
| 752 | /* |
| 753 | * hal_rx_attn_first_mpdu_get(): get fist_mpdu bit from rx attention |
| 754 | * @buf: pointer to rx_pkt_tlvs |
| 755 | * |
| 756 | * reutm: uint32_t(first_msdu) |
| 757 | */ |
| 758 | static inline uint32_t |
| 759 | hal_rx_attn_first_mpdu_get(uint8_t *buf) |
| 760 | { |
| 761 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 762 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 763 | uint32_t first_mpdu; |
| 764 | |
| 765 | first_mpdu = HAL_RX_ATTN_FIRST_MPDU_GET(rx_attn); |
| 766 | |
| 767 | return first_mpdu; |
| 768 | } |
| 769 | |
Tallapragada Kalyan | 1050380 | 2017-06-22 19:10:29 +0530 | [diff] [blame] | 770 | #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn) \ |
| 771 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 772 | RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)), \ |
| 773 | RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK, \ |
| 774 | RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB)) |
| 775 | |
| 776 | /* |
| 777 | * hal_rx_attn_tcp_udp_cksum_fail_get(): get tcp_udp cksum fail bit |
| 778 | * from rx attention |
| 779 | * @buf: pointer to rx_pkt_tlvs |
| 780 | * |
| 781 | * Return: tcp_udp_cksum_fail |
| 782 | */ |
| 783 | static inline bool |
| 784 | hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf) |
| 785 | { |
| 786 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 787 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 788 | bool tcp_udp_cksum_fail; |
| 789 | |
| 790 | tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn); |
| 791 | |
| 792 | return tcp_udp_cksum_fail; |
| 793 | } |
| 794 | |
| 795 | #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn) \ |
| 796 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 797 | RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)), \ |
| 798 | RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK, \ |
| 799 | RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB)) |
| 800 | |
| 801 | /* |
| 802 | * hal_rx_attn_ip_cksum_fail_get(): get ip cksum fail bit |
| 803 | * from rx attention |
| 804 | * @buf: pointer to rx_pkt_tlvs |
| 805 | * |
| 806 | * Return: ip_cksum_fail |
| 807 | */ |
| 808 | static inline bool |
| 809 | hal_rx_attn_ip_cksum_fail_get(uint8_t *buf) |
| 810 | { |
| 811 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 812 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 813 | bool ip_cksum_fail; |
| 814 | |
| 815 | ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn); |
| 816 | |
| 817 | return ip_cksum_fail; |
| 818 | } |
| 819 | |
Tallapragada Kalyan | 7053951 | 2018-03-29 16:19:43 +0530 | [diff] [blame] | 820 | #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn) \ |
| 821 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 822 | RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)), \ |
| 823 | RX_ATTENTION_0_PHY_PPDU_ID_MASK, \ |
| 824 | RX_ATTENTION_0_PHY_PPDU_ID_LSB)) |
| 825 | |
| 826 | /* |
| 827 | * hal_rx_attn_phy_ppdu_id_get(): get phy_ppdu_id value |
| 828 | * from rx attention |
| 829 | * @buf: pointer to rx_pkt_tlvs |
| 830 | * |
| 831 | * Return: phy_ppdu_id |
| 832 | */ |
| 833 | static inline uint16_t |
| 834 | hal_rx_attn_phy_ppdu_id_get(uint8_t *buf) |
| 835 | { |
| 836 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 837 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 838 | uint16_t phy_ppdu_id; |
| 839 | |
| 840 | phy_ppdu_id = HAL_RX_ATTN_PHY_PPDU_ID_GET(rx_attn); |
| 841 | |
| 842 | return phy_ppdu_id; |
| 843 | } |
| 844 | |
Karunakar Dasineni | 142f9ba | 2019-03-19 23:04:59 -0700 | [diff] [blame] | 845 | #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn) \ |
| 846 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 847 | RX_ATTENTION_1_CCE_MATCH_OFFSET)), \ |
| 848 | RX_ATTENTION_1_CCE_MATCH_MASK, \ |
| 849 | RX_ATTENTION_1_CCE_MATCH_LSB)) |
| 850 | |
| 851 | /* |
| 852 | * hal_rx_msdu_cce_match_get(): get CCE match bit |
| 853 | * from rx attention |
| 854 | * @buf: pointer to rx_pkt_tlvs |
| 855 | * Return: CCE match value |
| 856 | */ |
| 857 | static inline bool |
| 858 | hal_rx_msdu_cce_match_get(uint8_t *buf) |
| 859 | { |
| 860 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 861 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 862 | bool cce_match_val; |
| 863 | |
| 864 | cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn); |
| 865 | return cce_match_val; |
| 866 | } |
| 867 | |
Tallapragada Kalyan | 603c594 | 2016-12-07 21:30:44 +0530 | [diff] [blame] | 868 | /* |
| 869 | * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START |
| 870 | */ |
| 871 | #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info) \ |
| 872 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 873 | RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)), \ |
| 874 | RX_MPDU_INFO_8_PEER_META_DATA_MASK, \ |
| 875 | RX_MPDU_INFO_8_PEER_META_DATA_LSB)) |
| 876 | |
| 877 | static inline uint32_t |
| 878 | hal_rx_mpdu_peer_meta_data_get(uint8_t *buf) |
| 879 | { |
| 880 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 881 | struct rx_mpdu_start *mpdu_start = |
| 882 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 883 | |
| 884 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 885 | uint32_t peer_meta_data; |
| 886 | |
| 887 | peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info); |
| 888 | |
| 889 | return peer_meta_data; |
| 890 | } |
| 891 | |
Tallapragada Kalyan | e33a563 | 2018-02-22 20:33:15 +0530 | [diff] [blame] | 892 | #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info) \ |
| 893 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 894 | RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)), \ |
| 895 | RX_MPDU_INFO_12_AMPDU_FLAG_MASK, \ |
| 896 | RX_MPDU_INFO_12_AMPDU_FLAG_LSB)) |
| 897 | /** |
| 898 | * hal_rx_mpdu_info_ampdu_flag_get(): get ampdu flag bit |
| 899 | * from rx mpdu info |
| 900 | * @buf: pointer to rx_pkt_tlvs |
| 901 | * |
| 902 | * Return: ampdu flag |
| 903 | */ |
| 904 | static inline bool |
| 905 | hal_rx_mpdu_info_ampdu_flag_get(uint8_t *buf) |
| 906 | { |
| 907 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 908 | struct rx_mpdu_start *mpdu_start = |
| 909 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 910 | |
| 911 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 912 | bool ampdu_flag; |
| 913 | |
| 914 | ampdu_flag = HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(mpdu_info); |
| 915 | |
| 916 | return ampdu_flag; |
| 917 | } |
| 918 | |
Tallapragada Kalyan | bb3bbcd | 2017-07-14 12:17:04 +0530 | [diff] [blame] | 919 | #define HAL_RX_MPDU_PEER_META_DATA_SET(_rx_mpdu_info, peer_mdata) \ |
| 920 | ((*(((uint32_t *)_rx_mpdu_info) + \ |
| 921 | (RX_MPDU_INFO_8_PEER_META_DATA_OFFSET >> 2))) = \ |
| 922 | (peer_mdata << RX_MPDU_INFO_8_PEER_META_DATA_LSB) & \ |
| 923 | RX_MPDU_INFO_8_PEER_META_DATA_MASK) |
| 924 | |
| 925 | /* |
| 926 | * @ hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv |
| 927 | * |
| 928 | * @ buf: rx_tlv_hdr of the received packet |
| 929 | * @ peer_mdata: peer meta data to be set. |
| 930 | * @ Return: void |
| 931 | */ |
| 932 | static inline void |
| 933 | hal_rx_mpdu_peer_meta_data_set(uint8_t *buf, uint32_t peer_mdata) |
| 934 | { |
| 935 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 936 | struct rx_mpdu_start *mpdu_start = |
| 937 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 938 | |
| 939 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 940 | |
| 941 | HAL_RX_MPDU_PEER_META_DATA_SET(mpdu_info, peer_mdata); |
| 942 | } |
| 943 | |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 944 | #define HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(_rx_msdu_end) \ |
| 945 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 946 | RX_MSDU_END_5_L3_HEADER_PADDING_OFFSET)), \ |
| 947 | RX_MSDU_END_5_L3_HEADER_PADDING_MASK, \ |
| 948 | RX_MSDU_END_5_L3_HEADER_PADDING_LSB)) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 949 | |
Dhanashri Atre | 0da3122 | 2017-03-23 12:30:58 -0700 | [diff] [blame] | 950 | /** |
| 951 | * LRO information needed from the TLVs |
| 952 | */ |
| 953 | #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \ |
| 954 | (_HAL_MS( \ |
| 955 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 956 | msdu_end_tlv.rx_msdu_end), \ |
| 957 | RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \ |
| 958 | RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \ |
| 959 | RX_MSDU_END_9_LRO_ELIGIBLE_LSB)) |
| 960 | |
| 961 | #define HAL_RX_TLV_GET_TCP_CHKSUM(buf) \ |
| 962 | (_HAL_MS( \ |
| 963 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 964 | msdu_end_tlv.rx_msdu_end), \ |
| 965 | RX_MSDU_END_1_TCP_UDP_CHKSUM_OFFSET)), \ |
| 966 | RX_MSDU_END_1_TCP_UDP_CHKSUM_MASK, \ |
| 967 | RX_MSDU_END_1_TCP_UDP_CHKSUM_LSB)) |
| 968 | |
| 969 | #define HAL_RX_TLV_GET_TCP_ACK(buf) \ |
| 970 | (_HAL_MS( \ |
| 971 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 972 | msdu_end_tlv.rx_msdu_end), \ |
| 973 | RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \ |
| 974 | RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \ |
| 975 | RX_MSDU_END_8_TCP_ACK_NUMBER_LSB)) |
| 976 | |
| 977 | #define HAL_RX_TLV_GET_TCP_SEQ(buf) \ |
| 978 | (_HAL_MS( \ |
| 979 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 980 | msdu_end_tlv.rx_msdu_end), \ |
| 981 | RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \ |
| 982 | RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \ |
| 983 | RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB)) |
| 984 | |
| 985 | #define HAL_RX_TLV_GET_TCP_WIN(buf) \ |
| 986 | (_HAL_MS( \ |
| 987 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 988 | msdu_end_tlv.rx_msdu_end), \ |
| 989 | RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \ |
| 990 | RX_MSDU_END_9_WINDOW_SIZE_MASK, \ |
| 991 | RX_MSDU_END_9_WINDOW_SIZE_LSB)) |
| 992 | |
| 993 | #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \ |
| 994 | (_HAL_MS( \ |
| 995 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 996 | msdu_start_tlv.rx_msdu_start), \ |
| 997 | RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \ |
| 998 | RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \ |
| 999 | RX_MSDU_START_2_TCP_ONLY_ACK_LSB)) |
| 1000 | |
| 1001 | #define HAL_RX_TLV_GET_TCP_PROTO(buf) \ |
| 1002 | (_HAL_MS( \ |
| 1003 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 1004 | msdu_start_tlv.rx_msdu_start), \ |
| 1005 | RX_MSDU_START_2_TCP_PROTO_OFFSET)), \ |
| 1006 | RX_MSDU_START_2_TCP_PROTO_MASK, \ |
| 1007 | RX_MSDU_START_2_TCP_PROTO_LSB)) |
| 1008 | |
| 1009 | #define HAL_RX_TLV_GET_IPV6(buf) \ |
| 1010 | (_HAL_MS( \ |
| 1011 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 1012 | msdu_start_tlv.rx_msdu_start), \ |
| 1013 | RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \ |
| 1014 | RX_MSDU_START_2_IPV6_PROTO_MASK, \ |
| 1015 | RX_MSDU_START_2_IPV6_PROTO_LSB)) |
| 1016 | |
| 1017 | #define HAL_RX_TLV_GET_IP_OFFSET(buf) \ |
| 1018 | (_HAL_MS( \ |
| 1019 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 1020 | msdu_start_tlv.rx_msdu_start), \ |
| 1021 | RX_MSDU_START_1_L3_OFFSET_OFFSET)), \ |
| 1022 | RX_MSDU_START_1_L3_OFFSET_MASK, \ |
| 1023 | RX_MSDU_START_1_L3_OFFSET_LSB)) |
| 1024 | |
| 1025 | #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \ |
| 1026 | (_HAL_MS( \ |
| 1027 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 1028 | msdu_start_tlv.rx_msdu_start), \ |
| 1029 | RX_MSDU_START_1_L4_OFFSET_OFFSET)), \ |
| 1030 | RX_MSDU_START_1_L4_OFFSET_MASK, \ |
| 1031 | RX_MSDU_START_1_L4_OFFSET_LSB)) |
| 1032 | |
| 1033 | #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \ |
| 1034 | (_HAL_MS( \ |
| 1035 | (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\ |
| 1036 | msdu_start_tlv.rx_msdu_start), \ |
| 1037 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \ |
| 1038 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \ |
| 1039 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB)) |
| 1040 | |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 1041 | /** |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1042 | * hal_rx_msdu_end_l3_hdr_padding_get(): API to get the |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 1043 | * l3_header padding from rx_msdu_end TLV |
| 1044 | * |
| 1045 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1046 | * Return: number of l3 header padding bytes |
| 1047 | */ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 1048 | static inline uint32_t |
| 1049 | hal_rx_msdu_end_l3_hdr_padding_get(uint8_t *buf) |
| 1050 | { |
| 1051 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1052 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1053 | uint32_t l3_header_padding; |
| 1054 | |
| 1055 | l3_header_padding = HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(msdu_end); |
| 1056 | |
| 1057 | return l3_header_padding; |
| 1058 | } |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 1059 | |
Balamurugan Mahalingam | 96d2d41 | 2018-07-10 10:11:58 +0530 | [diff] [blame] | 1060 | #define HAL_RX_MSDU_END_SA_IDX_GET(_rx_msdu_end) \ |
| 1061 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1062 | RX_MSDU_END_13_SA_IDX_OFFSET)), \ |
| 1063 | RX_MSDU_END_13_SA_IDX_MASK, \ |
| 1064 | RX_MSDU_END_13_SA_IDX_LSB)) |
| 1065 | |
| 1066 | /** |
Pamidipati, Vijay | b8bbf16 | 2017-06-26 23:47:39 +0530 | [diff] [blame] | 1067 | * hal_rx_msdu_end_sa_idx_get(): API to get the |
| 1068 | * sa_idx from rx_msdu_end TLV |
| 1069 | * |
| 1070 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1071 | * Return: sa_idx (SA AST index) |
| 1072 | */ |
| 1073 | static inline uint16_t |
Balamurugan Mahalingam | 96d2d41 | 2018-07-10 10:11:58 +0530 | [diff] [blame] | 1074 | hal_rx_msdu_end_sa_idx_get(uint8_t *buf) |
Pamidipati, Vijay | b8bbf16 | 2017-06-26 23:47:39 +0530 | [diff] [blame] | 1075 | { |
Balamurugan Mahalingam | 96d2d41 | 2018-07-10 10:11:58 +0530 | [diff] [blame] | 1076 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1077 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1078 | uint16_t sa_idx; |
| 1079 | |
| 1080 | sa_idx = HAL_RX_MSDU_END_SA_IDX_GET(msdu_end); |
| 1081 | |
| 1082 | return sa_idx; |
Pamidipati, Vijay | b8bbf16 | 2017-06-26 23:47:39 +0530 | [diff] [blame] | 1083 | } |
| 1084 | |
Ishank Jain | 2bf04b4 | 2017-02-23 22:38:42 +0530 | [diff] [blame] | 1085 | #define HAL_RX_MSDU_END_SA_IS_VALID_GET(_rx_msdu_end) \ |
| 1086 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1087 | RX_MSDU_END_5_SA_IS_VALID_OFFSET)), \ |
| 1088 | RX_MSDU_END_5_SA_IS_VALID_MASK, \ |
| 1089 | RX_MSDU_END_5_SA_IS_VALID_LSB)) |
| 1090 | |
| 1091 | /** |
| 1092 | * hal_rx_msdu_end_sa_is_valid_get(): API to get the |
| 1093 | * sa_is_valid bit from rx_msdu_end TLV |
| 1094 | * |
| 1095 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1096 | * Return: sa_is_valid bit |
| 1097 | */ |
| 1098 | static inline uint8_t |
| 1099 | hal_rx_msdu_end_sa_is_valid_get(uint8_t *buf) |
| 1100 | { |
| 1101 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1102 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1103 | uint8_t sa_is_valid; |
| 1104 | |
| 1105 | sa_is_valid = HAL_RX_MSDU_END_SA_IS_VALID_GET(msdu_end); |
| 1106 | |
| 1107 | return sa_is_valid; |
| 1108 | } |
| 1109 | |
| 1110 | #define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_msdu_end) \ |
| 1111 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1112 | RX_MSDU_END_16_SA_SW_PEER_ID_OFFSET)), \ |
| 1113 | RX_MSDU_END_16_SA_SW_PEER_ID_MASK, \ |
| 1114 | RX_MSDU_END_16_SA_SW_PEER_ID_LSB)) |
| 1115 | |
| 1116 | /** |
| 1117 | * hal_rx_msdu_end_sa_sw_peer_id_get(): API to get the |
| 1118 | * sa_sw_peer_id from rx_msdu_end TLV |
| 1119 | * |
| 1120 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1121 | * Return: sa_sw_peer_id index |
| 1122 | */ |
| 1123 | static inline uint32_t |
| 1124 | hal_rx_msdu_end_sa_sw_peer_id_get(uint8_t *buf) |
| 1125 | { |
| 1126 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1127 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1128 | uint32_t sa_sw_peer_id; |
| 1129 | |
| 1130 | sa_sw_peer_id = HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end); |
| 1131 | |
| 1132 | return sa_sw_peer_id; |
| 1133 | } |
| 1134 | |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 1135 | #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \ |
| 1136 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ |
| 1137 | RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \ |
| 1138 | RX_MSDU_START_1_MSDU_LENGTH_MASK, \ |
| 1139 | RX_MSDU_START_1_MSDU_LENGTH_LSB)) |
| 1140 | |
| 1141 | /** |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1142 | * hal_rx_msdu_start_msdu_len_get(): API to get the MSDU length |
Tallapragada Kalyan | 1ef5480 | 2016-11-30 12:54:55 +0530 | [diff] [blame] | 1143 | * from rx_msdu_start TLV |
| 1144 | * |
| 1145 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1146 | * Return: msdu length |
| 1147 | */ |
| 1148 | static inline uint32_t |
| 1149 | hal_rx_msdu_start_msdu_len_get(uint8_t *buf) |
| 1150 | { |
| 1151 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1152 | struct rx_msdu_start *msdu_start = |
| 1153 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1154 | uint32_t msdu_len; |
| 1155 | |
| 1156 | msdu_len = HAL_RX_MSDU_START_MSDU_LEN_GET(msdu_start); |
| 1157 | |
| 1158 | return msdu_len; |
| 1159 | } |
| 1160 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1161 | /** |
| 1162 | * hal_rx_msdu_start_msdu_len_set(): API to set the MSDU length |
| 1163 | * from rx_msdu_start TLV |
| 1164 | * |
| 1165 | * @buf: pointer to the start of RX PKT TLV headers |
| 1166 | * @len: msdu length |
| 1167 | * |
| 1168 | * Return: none |
| 1169 | */ |
| 1170 | static inline void |
| 1171 | hal_rx_msdu_start_msdu_len_set(uint8_t *buf, uint32_t len) |
| 1172 | { |
| 1173 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1174 | struct rx_msdu_start *msdu_start = |
| 1175 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1176 | void *wrd1; |
| 1177 | |
| 1178 | wrd1 = (uint8_t *)msdu_start + RX_MSDU_START_1_MSDU_LENGTH_OFFSET; |
| 1179 | *(uint32_t *)wrd1 &= (~RX_MSDU_START_1_MSDU_LENGTH_MASK); |
| 1180 | *(uint32_t *)wrd1 |= len; |
| 1181 | } |
| 1182 | |
Ishank Jain | bc2d91f | 2017-01-03 18:14:54 +0530 | [diff] [blame] | 1183 | #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start) \ |
| 1184 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ |
| 1185 | RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \ |
| 1186 | RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK, \ |
| 1187 | RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB)) |
| 1188 | |
| 1189 | /* |
| 1190 | * hal_rx_msdu_start_bw_get(): API to get the Bandwidth |
| 1191 | * Interval from rx_msdu_start |
| 1192 | * |
| 1193 | * @buf: pointer to the start of RX PKT TLV header |
| 1194 | * Return: uint32_t(bw) |
| 1195 | */ |
| 1196 | static inline uint32_t |
| 1197 | hal_rx_msdu_start_bw_get(uint8_t *buf) |
| 1198 | { |
| 1199 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1200 | struct rx_msdu_start *msdu_start = |
| 1201 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1202 | uint32_t bw; |
| 1203 | |
| 1204 | bw = HAL_RX_MSDU_START_BW_GET(msdu_start); |
| 1205 | |
| 1206 | return bw; |
| 1207 | } |
| 1208 | |
Ishank Jain | bc2d91f | 2017-01-03 18:14:54 +0530 | [diff] [blame] | 1209 | |
Dhanashri Atre | 1404917 | 2016-11-11 18:32:36 -0800 | [diff] [blame] | 1210 | #define HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(_rx_msdu_start) \ |
| 1211 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ |
| 1212 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \ |
| 1213 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \ |
| 1214 | RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB)) |
| 1215 | |
| 1216 | /** |
| 1217 | * hal_rx_msdu_start_toeplitz_get: API to get the toeplitz hash |
| 1218 | * from rx_msdu_start TLV |
| 1219 | * |
| 1220 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1221 | * Return: toeplitz hash |
| 1222 | */ |
| 1223 | static inline uint32_t |
| 1224 | hal_rx_msdu_start_toeplitz_get(uint8_t *buf) |
| 1225 | { |
| 1226 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1227 | struct rx_msdu_start *msdu_start = |
| 1228 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1229 | |
| 1230 | return HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(msdu_start); |
| 1231 | } |
| 1232 | |
Karunakar Dasineni | a0f09ea | 2016-11-21 17:41:31 -0800 | [diff] [blame] | 1233 | /* |
| 1234 | * Get qos_control_valid from RX_MPDU_START |
| 1235 | */ |
| 1236 | #define HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET(_rx_mpdu_info) \ |
| 1237 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \ |
| 1238 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ |
| 1239 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ |
| 1240 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) |
| 1241 | |
| 1242 | static inline uint32_t |
| 1243 | hal_rx_mpdu_start_mpdu_qos_control_valid_get(uint8_t *buf) |
| 1244 | { |
| 1245 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1246 | struct rx_mpdu_start *mpdu_start = |
| 1247 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1248 | uint32_t qos_control_valid; |
| 1249 | |
| 1250 | qos_control_valid = HAL_RX_MPDU_INFO_QOS_CONTROL_VALID_GET( |
| 1251 | &(mpdu_start->rx_mpdu_info_details)); |
| 1252 | |
| 1253 | return qos_control_valid; |
| 1254 | } |
| 1255 | |
nobelj | 2b861f8 | 2019-03-20 20:23:59 -0700 | [diff] [blame] | 1256 | /** |
| 1257 | * enum hal_rx_mpdu_info_sw_frame_group_id_type: Enum for group id in MPDU_INFO |
| 1258 | * |
| 1259 | * @ HAL_MPDU_SW_FRAME_GROUP_NDP_FRAME: NDP frame |
| 1260 | * @ HAL_MPDU_SW_FRAME_GROUP_MULTICAST_DATA: multicast data frame |
| 1261 | * @ HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA: unicast data frame |
| 1262 | * @ HAL_MPDU_SW_FRAME_GROUP_NULL_DATA: NULL data frame |
| 1263 | * @ HAL_MPDU_SW_FRAME_GROUP_MGMT: management frame |
| 1264 | * @ HAL_MPDU_SW_FRAME_GROUP_CTRL: control frame |
| 1265 | * @ HAL_MPDU_SW_FRAME_GROUP_UNSUPPORTED: unsupported |
| 1266 | * @ HAL_MPDU_SW_FRAME_GROUP_MAX: max limit |
| 1267 | */ |
| 1268 | enum hal_rx_mpdu_info_sw_frame_group_id_type { |
| 1269 | HAL_MPDU_SW_FRAME_GROUP_NDP_FRAME = 0, |
| 1270 | HAL_MPDU_SW_FRAME_GROUP_MULTICAST_DATA, |
| 1271 | HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA, |
| 1272 | HAL_MPDU_SW_FRAME_GROUP_NULL_DATA, |
| 1273 | HAL_MPDU_SW_FRAME_GROUP_MGMT, |
| 1274 | HAL_MPDU_SW_FRAME_GROUP_CTRL = 20, |
| 1275 | HAL_MPDU_SW_FRAME_GROUP_UNSUPPORTED = 36, |
| 1276 | HAL_MPDU_SW_FRAME_GROUP_MAX = 37, |
| 1277 | }; |
| 1278 | |
| 1279 | /** |
| 1280 | * hal_rx_is_unicast: check packet is unicast frame or not. |
| 1281 | * |
| 1282 | * @ buf: pointer to rx pkt TLV. |
| 1283 | * |
| 1284 | * Return: true on unicast. |
| 1285 | */ |
| 1286 | static inline bool |
| 1287 | hal_rx_is_unicast(uint8_t *buf) |
| 1288 | { |
| 1289 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1290 | struct rx_mpdu_start *mpdu_start = |
| 1291 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1292 | uint32_t grp_id; |
| 1293 | uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details; |
| 1294 | |
| 1295 | grp_id = (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info), |
| 1296 | RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_OFFSET)), |
| 1297 | RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_MASK, |
| 1298 | RX_MPDU_INFO_0_SW_FRAME_GROUP_ID_LSB)); |
| 1299 | |
| 1300 | return (HAL_MPDU_SW_FRAME_GROUP_UNICAST_DATA == grp_id) ? true : false; |
| 1301 | } |
| 1302 | |
| 1303 | /** |
| 1304 | * hal_rx_tid_get: get tid based on qos control valid. |
| 1305 | * |
| 1306 | * @ buf: pointer to rx pkt TLV. |
| 1307 | * |
| 1308 | * Return: tid |
| 1309 | */ |
| 1310 | static inline uint32_t |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 1311 | hal_rx_tid_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf) |
nobelj | 2b861f8 | 2019-03-20 20:23:59 -0700 | [diff] [blame] | 1312 | { |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 1313 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
nobelj | 2b861f8 | 2019-03-20 20:23:59 -0700 | [diff] [blame] | 1314 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1315 | struct rx_mpdu_start *mpdu_start = |
| 1316 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1317 | uint8_t *rx_mpdu_info = (uint8_t *)&mpdu_start->rx_mpdu_info_details; |
| 1318 | uint8_t qos_control_valid = |
| 1319 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((rx_mpdu_info), |
| 1320 | RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_OFFSET)), |
| 1321 | RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_MASK, |
| 1322 | RX_MPDU_INFO_2_MPDU_QOS_CONTROL_VALID_LSB)); |
| 1323 | |
| 1324 | if (qos_control_valid) |
| 1325 | return hal_soc->ops->hal_rx_mpdu_start_tid_get(buf); |
| 1326 | |
| 1327 | return HAL_RX_NON_QOS_TID; |
| 1328 | } |
| 1329 | |
Karunakar Dasineni | a0f09ea | 2016-11-21 17:41:31 -0800 | [diff] [blame] | 1330 | |
| 1331 | /* |
| 1332 | * Get SW peer id from RX_MPDU_START |
| 1333 | */ |
| 1334 | #define HAL_RX_MPDU_INFO_SW_PEER_ID_GET(_rx_mpdu_info) \ |
| 1335 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_info), \ |
| 1336 | RX_MPDU_INFO_1_SW_PEER_ID_OFFSET)), \ |
| 1337 | RX_MPDU_INFO_1_SW_PEER_ID_MASK, \ |
| 1338 | RX_MPDU_INFO_1_SW_PEER_ID_LSB)) |
| 1339 | |
| 1340 | static inline uint32_t |
| 1341 | hal_rx_mpdu_start_sw_peer_id_get(uint8_t *buf) |
| 1342 | { |
| 1343 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1344 | struct rx_mpdu_start *mpdu_start = |
| 1345 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1346 | uint32_t sw_peer_id; |
| 1347 | |
| 1348 | sw_peer_id = HAL_RX_MPDU_INFO_SW_PEER_ID_GET( |
| 1349 | &(mpdu_start->rx_mpdu_info_details)); |
| 1350 | |
| 1351 | return sw_peer_id; |
| 1352 | } |
| 1353 | |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1354 | #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start) \ |
| 1355 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ |
| 1356 | RX_MSDU_START_5_SGI_OFFSET)), \ |
| 1357 | RX_MSDU_START_5_SGI_MASK, \ |
| 1358 | RX_MSDU_START_5_SGI_LSB)) |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1359 | /** |
| 1360 | * hal_rx_msdu_start_msdu_sgi_get(): API to get the Short Gaurd |
| 1361 | * Interval from rx_msdu_start TLV |
| 1362 | * |
| 1363 | * @buf: pointer to the start of RX PKT TLV headers |
| 1364 | * Return: uint32_t(sgi) |
| 1365 | */ |
| 1366 | static inline uint32_t |
| 1367 | hal_rx_msdu_start_sgi_get(uint8_t *buf) |
| 1368 | { |
| 1369 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1370 | struct rx_msdu_start *msdu_start = |
| 1371 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1372 | uint32_t sgi; |
| 1373 | |
| 1374 | sgi = HAL_RX_MSDU_START_SGI_GET(msdu_start); |
| 1375 | |
| 1376 | return sgi; |
| 1377 | } |
| 1378 | |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1379 | #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start) \ |
| 1380 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ |
| 1381 | RX_MSDU_START_5_RATE_MCS_OFFSET)), \ |
| 1382 | RX_MSDU_START_5_RATE_MCS_MASK, \ |
| 1383 | RX_MSDU_START_5_RATE_MCS_LSB)) |
Tallapragada Kalyan | 1b4d08d | 2016-12-15 22:19:58 +0530 | [diff] [blame] | 1384 | /** |
| 1385 | * hal_rx_msdu_start_msdu_rate_mcs_get(): API to get the MCS rate |
| 1386 | * from rx_msdu_start TLV |
| 1387 | * |
| 1388 | * @buf: pointer to the start of RX PKT TLV headers |
| 1389 | * Return: uint32_t(rate_mcs) |
| 1390 | */ |
| 1391 | static inline uint32_t |
| 1392 | hal_rx_msdu_start_rate_mcs_get(uint8_t *buf) |
| 1393 | { |
| 1394 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1395 | struct rx_msdu_start *msdu_start = |
| 1396 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1397 | uint32_t rate_mcs; |
| 1398 | |
| 1399 | rate_mcs = HAL_RX_MSDU_START_RATE_MCS_GET(msdu_start); |
| 1400 | |
| 1401 | return rate_mcs; |
| 1402 | } |
| 1403 | |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1404 | #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn) \ |
| 1405 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \ |
| 1406 | RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)), \ |
| 1407 | RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK, \ |
| 1408 | RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB)) |
| 1409 | |
| 1410 | /* |
| 1411 | * hal_rx_attn_msdu_get_is_decrypted(): API to get the decrypt status of the |
| 1412 | * packet from rx_attention |
| 1413 | * |
| 1414 | * @buf: pointer to the start of RX PKT TLV header |
| 1415 | * Return: uint32_t(decryt status) |
| 1416 | */ |
| 1417 | |
| 1418 | static inline uint32_t |
| 1419 | hal_rx_attn_msdu_get_is_decrypted(uint8_t *buf) |
| 1420 | { |
| 1421 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1422 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 1423 | uint32_t is_decrypt = 0; |
| 1424 | uint32_t decrypt_status; |
| 1425 | |
| 1426 | decrypt_status = HAL_RX_ATTN_DECRYPT_STATUS_GET(rx_attn); |
| 1427 | |
| 1428 | if (!decrypt_status) |
| 1429 | is_decrypt = 1; |
| 1430 | |
| 1431 | return is_decrypt; |
| 1432 | } |
| 1433 | |
| 1434 | /* |
| 1435 | * Get key index from RX_MSDU_END |
| 1436 | */ |
| 1437 | #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end) \ |
| 1438 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1439 | RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)), \ |
| 1440 | RX_MSDU_END_2_KEY_ID_OCTET_MASK, \ |
| 1441 | RX_MSDU_END_2_KEY_ID_OCTET_LSB)) |
| 1442 | /* |
| 1443 | * hal_rx_msdu_get_keyid(): API to get the key id if the decrypted packet |
| 1444 | * from rx_msdu_end |
| 1445 | * |
| 1446 | * @buf: pointer to the start of RX PKT TLV header |
| 1447 | * Return: uint32_t(key id) |
| 1448 | */ |
| 1449 | |
| 1450 | static inline uint32_t |
| 1451 | hal_rx_msdu_get_keyid(uint8_t *buf) |
| 1452 | { |
| 1453 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1454 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1455 | uint32_t keyid_octet; |
| 1456 | |
| 1457 | keyid_octet = HAL_RX_MSDU_END_KEYID_OCTET_GET(msdu_end); |
| 1458 | |
Venkateswara Swamy Bandaru | 348e125 | 2017-07-10 15:37:21 +0530 | [diff] [blame] | 1459 | return keyid_octet & 0x3; |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1460 | } |
| 1461 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 1462 | #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start) \ |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1463 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ |
| 1464 | RX_MSDU_START_5_USER_RSSI_OFFSET)), \ |
| 1465 | RX_MSDU_START_5_USER_RSSI_MASK, \ |
| 1466 | RX_MSDU_START_5_USER_RSSI_LSB)) |
| 1467 | /* |
| 1468 | * hal_rx_msdu_start_get_rssi(): API to get the rssi of received pkt |
| 1469 | * from rx_msdu_start |
| 1470 | * |
| 1471 | * @buf: pointer to the start of RX PKT TLV header |
| 1472 | * Return: uint32_t(rssi) |
| 1473 | */ |
| 1474 | |
| 1475 | static inline uint32_t |
| 1476 | hal_rx_msdu_start_get_rssi(uint8_t *buf) |
| 1477 | { |
| 1478 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1479 | struct rx_msdu_start *msdu_start = &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1480 | uint32_t rssi; |
| 1481 | |
| 1482 | rssi = HAL_RX_MSDU_START_RSSI_GET(msdu_start); |
| 1483 | |
| 1484 | return rssi; |
| 1485 | |
| 1486 | } |
| 1487 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 1488 | #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start) \ |
| 1489 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1490 | RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)), \ |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 1491 | RX_MSDU_START_7_SW_PHY_META_DATA_MASK, \ |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1492 | RX_MSDU_START_7_SW_PHY_META_DATA_LSB)) |
| 1493 | |
| 1494 | /* |
| 1495 | * hal_rx_msdu_start_get_freq(): API to get the frequency of operating channel |
| 1496 | * from rx_msdu_start |
| 1497 | * |
| 1498 | * @buf: pointer to the start of RX PKT TLV header |
| 1499 | * Return: uint32_t(frequency) |
| 1500 | */ |
| 1501 | |
| 1502 | static inline uint32_t |
| 1503 | hal_rx_msdu_start_get_freq(uint8_t *buf) |
| 1504 | { |
| 1505 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1506 | struct rx_msdu_start *msdu_start = |
| 1507 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1508 | uint32_t freq; |
| 1509 | |
| 1510 | freq = HAL_RX_MSDU_START_FREQ_GET(msdu_start); |
| 1511 | |
| 1512 | return freq; |
| 1513 | } |
| 1514 | |
| 1515 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 1516 | #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start) \ |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1517 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \ |
| 1518 | RX_MSDU_START_5_PKT_TYPE_OFFSET)), \ |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 1519 | RX_MSDU_START_5_PKT_TYPE_MASK, \ |
Venkateswara Swamy Bandaru | c14b1b6 | 2017-02-24 12:26:08 +0530 | [diff] [blame] | 1520 | RX_MSDU_START_5_PKT_TYPE_LSB)) |
| 1521 | |
| 1522 | /* |
| 1523 | * hal_rx_msdu_start_get_pkt_type(): API to get the pkt type |
| 1524 | * from rx_msdu_start |
| 1525 | * |
| 1526 | * @buf: pointer to the start of RX PKT TLV header |
| 1527 | * Return: uint32_t(pkt type) |
| 1528 | */ |
| 1529 | |
| 1530 | static inline uint32_t |
| 1531 | hal_rx_msdu_start_get_pkt_type(uint8_t *buf) |
| 1532 | { |
| 1533 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1534 | struct rx_msdu_start *msdu_start = &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 1535 | uint32_t pkt_type; |
| 1536 | |
| 1537 | pkt_type = HAL_RX_MSDU_START_PKT_TYPE_GET(msdu_start); |
| 1538 | |
| 1539 | return pkt_type; |
| 1540 | } |
| 1541 | |
Venkateswara Swamy Bandaru | ec4f8e6 | 2017-03-07 11:04:28 +0530 | [diff] [blame] | 1542 | #define HAL_RX_MPDU_GET_TODS(_rx_mpdu_info) \ |
| 1543 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1544 | RX_MPDU_INFO_2_TO_DS_OFFSET)), \ |
| 1545 | RX_MPDU_INFO_2_TO_DS_MASK, \ |
| 1546 | RX_MPDU_INFO_2_TO_DS_LSB)) |
| 1547 | |
| 1548 | /* |
| 1549 | * hal_rx_mpdu_get_tods(): API to get the tods info |
| 1550 | * from rx_mpdu_start |
| 1551 | * |
| 1552 | * @buf: pointer to the start of RX PKT TLV header |
| 1553 | * Return: uint32_t(to_ds) |
| 1554 | */ |
| 1555 | |
| 1556 | static inline uint32_t |
| 1557 | hal_rx_mpdu_get_to_ds(uint8_t *buf) |
| 1558 | { |
| 1559 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1560 | struct rx_mpdu_start *mpdu_start = |
| 1561 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1562 | |
| 1563 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1564 | uint32_t to_ds; |
| 1565 | |
| 1566 | to_ds = HAL_RX_MPDU_GET_TODS(mpdu_info); |
| 1567 | |
| 1568 | return to_ds; |
| 1569 | } |
| 1570 | |
| 1571 | #define HAL_RX_MPDU_GET_FROMDS(_rx_mpdu_info) \ |
| 1572 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1573 | RX_MPDU_INFO_2_FR_DS_OFFSET)), \ |
| 1574 | RX_MPDU_INFO_2_FR_DS_MASK, \ |
| 1575 | RX_MPDU_INFO_2_FR_DS_LSB)) |
| 1576 | |
| 1577 | /* |
| 1578 | * hal_rx_mpdu_get_fr_ds(): API to get the from ds info |
| 1579 | * from rx_mpdu_start |
| 1580 | * |
| 1581 | * @buf: pointer to the start of RX PKT TLV header |
| 1582 | * Return: uint32_t(fr_ds) |
| 1583 | */ |
| 1584 | |
| 1585 | static inline uint32_t |
| 1586 | hal_rx_mpdu_get_fr_ds(uint8_t *buf) |
| 1587 | { |
| 1588 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1589 | struct rx_mpdu_start *mpdu_start = |
| 1590 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1591 | |
| 1592 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1593 | uint32_t fr_ds; |
| 1594 | |
| 1595 | fr_ds = HAL_RX_MPDU_GET_FROMDS(mpdu_info); |
| 1596 | |
| 1597 | return fr_ds; |
| 1598 | } |
| 1599 | |
| 1600 | #define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \ |
| 1601 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1602 | RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \ |
| 1603 | RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \ |
| 1604 | RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB)) |
| 1605 | |
| 1606 | #define HAL_RX_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_mpdu_info) \ |
| 1607 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1608 | RX_MPDU_INFO_2_MAC_ADDR_AD2_VALID_OFFSET)), \ |
| 1609 | RX_MPDU_INFO_2_MAC_ADDR_AD2_VALID_MASK, \ |
| 1610 | RX_MPDU_INFO_2_MAC_ADDR_AD2_VALID_LSB)) |
| 1611 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1612 | #define HAL_RX_MPDU_MAC_ADDR_AD3_VALID_GET(_rx_mpdu_info) \ |
| 1613 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1614 | RX_MPDU_INFO_2_MAC_ADDR_AD3_VALID_OFFSET)), \ |
| 1615 | RX_MPDU_INFO_2_MAC_ADDR_AD3_VALID_MASK, \ |
| 1616 | RX_MPDU_INFO_2_MAC_ADDR_AD3_VALID_LSB)) |
| 1617 | |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 1618 | #define HAL_RX_MPDU_MAC_ADDR_AD4_VALID_GET(_rx_mpdu_info) \ |
| 1619 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1620 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_OFFSET)), \ |
| 1621 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_MASK, \ |
| 1622 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_LSB)) |
| 1623 | |
Venkateswara Swamy Bandaru | ec4f8e6 | 2017-03-07 11:04:28 +0530 | [diff] [blame] | 1624 | #define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \ |
| 1625 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1626 | RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \ |
| 1627 | RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \ |
| 1628 | RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB)) |
| 1629 | |
| 1630 | #define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \ |
| 1631 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1632 | RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \ |
| 1633 | RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \ |
| 1634 | RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB)) |
| 1635 | |
| 1636 | #define HAL_RX_MPDU_AD2_15_0_GET(_rx_mpdu_info) \ |
| 1637 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1638 | RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_OFFSET)), \ |
| 1639 | RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_MASK, \ |
| 1640 | RX_MPDU_INFO_16_MAC_ADDR_AD2_15_0_LSB)) |
| 1641 | |
| 1642 | #define HAL_RX_MPDU_AD2_47_16_GET(_rx_mpdu_info) \ |
| 1643 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1644 | RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_OFFSET)), \ |
| 1645 | RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_MASK, \ |
| 1646 | RX_MPDU_INFO_17_MAC_ADDR_AD2_47_16_LSB)) |
| 1647 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1648 | #define HAL_RX_MPDU_AD3_31_0_GET(_rx_mpdu_info) \ |
| 1649 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1650 | RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_OFFSET)), \ |
| 1651 | RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_MASK, \ |
| 1652 | RX_MPDU_INFO_18_MAC_ADDR_AD3_31_0_LSB)) |
| 1653 | |
| 1654 | #define HAL_RX_MPDU_AD3_47_32_GET(_rx_mpdu_info) \ |
| 1655 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1656 | RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_OFFSET)), \ |
| 1657 | RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_MASK, \ |
| 1658 | RX_MPDU_INFO_19_MAC_ADDR_AD3_47_32_LSB)) |
| 1659 | |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 1660 | #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \ |
| 1661 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1662 | RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \ |
| 1663 | RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \ |
| 1664 | RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB)) |
| 1665 | |
| 1666 | #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \ |
| 1667 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 1668 | RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \ |
| 1669 | RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ |
| 1670 | RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) |
| 1671 | |
Venkateswara Swamy Bandaru | ec4f8e6 | 2017-03-07 11:04:28 +0530 | [diff] [blame] | 1672 | /* |
| 1673 | * hal_rx_mpdu_get_addr1(): API to check get address1 of the mpdu |
| 1674 | * |
| 1675 | * @buf: pointer to the start of RX PKT TLV headera |
| 1676 | * @mac_addr: pointer to mac address |
Jeff Johnson | ae1b3de | 2018-05-06 00:09:31 -0700 | [diff] [blame] | 1677 | * Return: success/failure |
Venkateswara Swamy Bandaru | ec4f8e6 | 2017-03-07 11:04:28 +0530 | [diff] [blame] | 1678 | */ |
| 1679 | static inline |
| 1680 | QDF_STATUS hal_rx_mpdu_get_addr1(uint8_t *buf, uint8_t *mac_addr) |
| 1681 | { |
| 1682 | struct __attribute__((__packed__)) hal_addr1 { |
| 1683 | uint32_t ad1_31_0; |
| 1684 | uint16_t ad1_47_32; |
| 1685 | }; |
| 1686 | |
| 1687 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1688 | struct rx_mpdu_start *mpdu_start = |
| 1689 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1690 | |
| 1691 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1692 | struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr; |
| 1693 | uint32_t mac_addr_ad1_valid; |
| 1694 | |
| 1695 | mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info); |
| 1696 | |
| 1697 | if (mac_addr_ad1_valid) { |
| 1698 | addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info); |
| 1699 | addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info); |
| 1700 | return QDF_STATUS_SUCCESS; |
| 1701 | } |
| 1702 | |
| 1703 | return QDF_STATUS_E_FAILURE; |
| 1704 | } |
| 1705 | |
| 1706 | /* |
| 1707 | * hal_rx_mpdu_get_addr2(): API to check get address2 of the mpdu |
| 1708 | * in the packet |
| 1709 | * |
| 1710 | * @buf: pointer to the start of RX PKT TLV header |
| 1711 | * @mac_addr: pointer to mac address |
Jeff Johnson | ae1b3de | 2018-05-06 00:09:31 -0700 | [diff] [blame] | 1712 | * Return: success/failure |
Venkateswara Swamy Bandaru | ec4f8e6 | 2017-03-07 11:04:28 +0530 | [diff] [blame] | 1713 | */ |
| 1714 | static inline |
| 1715 | QDF_STATUS hal_rx_mpdu_get_addr2(uint8_t *buf, uint8_t *mac_addr) |
| 1716 | { |
| 1717 | struct __attribute__((__packed__)) hal_addr2 { |
| 1718 | uint16_t ad2_15_0; |
| 1719 | uint32_t ad2_47_16; |
| 1720 | }; |
| 1721 | |
| 1722 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1723 | struct rx_mpdu_start *mpdu_start = |
| 1724 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1725 | |
| 1726 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1727 | struct hal_addr2 *addr = (struct hal_addr2 *)mac_addr; |
| 1728 | uint32_t mac_addr_ad2_valid; |
| 1729 | |
| 1730 | mac_addr_ad2_valid = HAL_RX_MPDU_MAC_ADDR_AD2_VALID_GET(mpdu_info); |
| 1731 | |
| 1732 | if (mac_addr_ad2_valid) { |
| 1733 | addr->ad2_15_0 = HAL_RX_MPDU_AD2_15_0_GET(mpdu_info); |
| 1734 | addr->ad2_47_16 = HAL_RX_MPDU_AD2_47_16_GET(mpdu_info); |
| 1735 | return QDF_STATUS_SUCCESS; |
| 1736 | } |
| 1737 | |
| 1738 | return QDF_STATUS_E_FAILURE; |
| 1739 | } |
| 1740 | |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1741 | /* |
| 1742 | * hal_rx_mpdu_get_addr3(): API to get address3 of the mpdu |
| 1743 | * in the packet |
| 1744 | * |
| 1745 | * @buf: pointer to the start of RX PKT TLV header |
| 1746 | * @mac_addr: pointer to mac address |
Jeff Johnson | ae1b3de | 2018-05-06 00:09:31 -0700 | [diff] [blame] | 1747 | * Return: success/failure |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1748 | */ |
| 1749 | static inline |
| 1750 | QDF_STATUS hal_rx_mpdu_get_addr3(uint8_t *buf, uint8_t *mac_addr) |
| 1751 | { |
| 1752 | struct __attribute__((__packed__)) hal_addr3 { |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 1753 | uint32_t ad3_31_0; |
| 1754 | uint16_t ad3_47_32; |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1755 | }; |
| 1756 | |
| 1757 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1758 | struct rx_mpdu_start *mpdu_start = |
| 1759 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1760 | |
| 1761 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1762 | struct hal_addr3 *addr = (struct hal_addr3 *)mac_addr; |
| 1763 | uint32_t mac_addr_ad3_valid; |
| 1764 | |
| 1765 | mac_addr_ad3_valid = HAL_RX_MPDU_MAC_ADDR_AD3_VALID_GET(mpdu_info); |
| 1766 | |
| 1767 | if (mac_addr_ad3_valid) { |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 1768 | addr->ad3_31_0 = HAL_RX_MPDU_AD3_31_0_GET(mpdu_info); |
| 1769 | addr->ad3_47_32 = HAL_RX_MPDU_AD3_47_32_GET(mpdu_info); |
| 1770 | return QDF_STATUS_SUCCESS; |
| 1771 | } |
| 1772 | |
| 1773 | return QDF_STATUS_E_FAILURE; |
| 1774 | } |
| 1775 | |
| 1776 | /* |
| 1777 | * hal_rx_mpdu_get_addr4(): API to get address4 of the mpdu |
| 1778 | * in the packet |
| 1779 | * |
| 1780 | * @buf: pointer to the start of RX PKT TLV header |
| 1781 | * @mac_addr: pointer to mac address |
Jeff Johnson | ae1b3de | 2018-05-06 00:09:31 -0700 | [diff] [blame] | 1782 | * Return: success/failure |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 1783 | */ |
| 1784 | static inline |
| 1785 | QDF_STATUS hal_rx_mpdu_get_addr4(uint8_t *buf, uint8_t *mac_addr) |
| 1786 | { |
| 1787 | struct __attribute__((__packed__)) hal_addr4 { |
| 1788 | uint32_t ad4_31_0; |
| 1789 | uint16_t ad4_47_32; |
| 1790 | }; |
| 1791 | |
| 1792 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1793 | struct rx_mpdu_start *mpdu_start = |
| 1794 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 1795 | |
| 1796 | struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details; |
| 1797 | struct hal_addr4 *addr = (struct hal_addr4 *)mac_addr; |
| 1798 | uint32_t mac_addr_ad4_valid; |
| 1799 | |
| 1800 | mac_addr_ad4_valid = HAL_RX_MPDU_MAC_ADDR_AD4_VALID_GET(mpdu_info); |
| 1801 | |
| 1802 | if (mac_addr_ad4_valid) { |
| 1803 | addr->ad4_31_0 = HAL_RX_MPDU_AD4_31_0_GET(mpdu_info); |
| 1804 | addr->ad4_47_32 = HAL_RX_MPDU_AD4_47_32_GET(mpdu_info); |
psimha | 223883f | 2017-11-16 17:18:51 -0800 | [diff] [blame] | 1805 | return QDF_STATUS_SUCCESS; |
| 1806 | } |
| 1807 | |
| 1808 | return QDF_STATUS_E_FAILURE; |
| 1809 | } |
| 1810 | |
Tallapragada Kalyan | 6f6166e | 2017-02-17 17:00:23 +0530 | [diff] [blame] | 1811 | /** |
| 1812 | * hal_rx_msdu_end_da_idx_get: API to get da_idx |
| 1813 | * from rx_msdu_end TLV |
| 1814 | * |
| 1815 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1816 | * Return: da index |
| 1817 | */ |
| 1818 | static inline uint16_t |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 1819 | hal_rx_msdu_end_da_idx_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf) |
Tallapragada Kalyan | 6f6166e | 2017-02-17 17:00:23 +0530 | [diff] [blame] | 1820 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 1821 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 1822 | |
Balamurugan Mahalingam | 96d2d41 | 2018-07-10 10:11:58 +0530 | [diff] [blame] | 1823 | return hal_soc->ops->hal_rx_msdu_end_da_idx_get(buf); |
Tallapragada Kalyan | 6f6166e | 2017-02-17 17:00:23 +0530 | [diff] [blame] | 1824 | } |
| 1825 | |
| 1826 | #define HAL_RX_MSDU_END_DA_IS_VALID_GET(_rx_msdu_end) \ |
| 1827 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1828 | RX_MSDU_END_5_DA_IS_VALID_OFFSET)), \ |
| 1829 | RX_MSDU_END_5_DA_IS_VALID_MASK, \ |
| 1830 | RX_MSDU_END_5_DA_IS_VALID_LSB)) |
| 1831 | |
| 1832 | /** |
| 1833 | * hal_rx_msdu_end_da_is_valid_get: API to check if da is valid |
| 1834 | * from rx_msdu_end TLV |
| 1835 | * |
| 1836 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1837 | * Return: da_is_valid |
| 1838 | */ |
| 1839 | static inline uint8_t |
| 1840 | hal_rx_msdu_end_da_is_valid_get(uint8_t *buf) |
| 1841 | { |
| 1842 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1843 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1844 | uint8_t da_is_valid; |
| 1845 | |
| 1846 | da_is_valid = HAL_RX_MSDU_END_DA_IS_VALID_GET(msdu_end); |
| 1847 | |
| 1848 | return da_is_valid; |
| 1849 | } |
| 1850 | |
| 1851 | #define HAL_RX_MSDU_END_DA_IS_MCBC_GET(_rx_msdu_end) \ |
| 1852 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1853 | RX_MSDU_END_5_DA_IS_MCBC_OFFSET)), \ |
| 1854 | RX_MSDU_END_5_DA_IS_MCBC_MASK, \ |
| 1855 | RX_MSDU_END_5_DA_IS_MCBC_LSB)) |
| 1856 | |
| 1857 | /** |
| 1858 | * hal_rx_msdu_end_da_is_mcbc_get: API to check if pkt is MCBC |
| 1859 | * from rx_msdu_end TLV |
| 1860 | * |
| 1861 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1862 | * Return: da_is_mcbc |
| 1863 | */ |
| 1864 | static inline uint8_t |
| 1865 | hal_rx_msdu_end_da_is_mcbc_get(uint8_t *buf) |
| 1866 | { |
| 1867 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1868 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1869 | uint8_t da_is_mcbc; |
| 1870 | |
| 1871 | da_is_mcbc = HAL_RX_MSDU_END_DA_IS_MCBC_GET(msdu_end); |
| 1872 | |
| 1873 | return da_is_mcbc; |
| 1874 | } |
| 1875 | |
Pratik Gandhi | 3da3bc7 | 2017-03-16 18:20:22 +0530 | [diff] [blame] | 1876 | #define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \ |
| 1877 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1878 | RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \ |
| 1879 | RX_MSDU_END_5_FIRST_MSDU_MASK, \ |
| 1880 | RX_MSDU_END_5_FIRST_MSDU_LSB)) |
| 1881 | |
| 1882 | /** |
| 1883 | * hal_rx_msdu_end_first_msdu_get: API to get first msdu status |
| 1884 | * from rx_msdu_end TLV |
| 1885 | * |
| 1886 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1887 | * Return: first_msdu |
| 1888 | */ |
| 1889 | static inline uint8_t |
| 1890 | hal_rx_msdu_end_first_msdu_get(uint8_t *buf) |
| 1891 | { |
| 1892 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1893 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1894 | uint8_t first_msdu; |
| 1895 | |
| 1896 | first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end); |
| 1897 | |
| 1898 | return first_msdu; |
| 1899 | } |
| 1900 | |
| 1901 | #define HAL_RX_MSDU_END_LAST_MSDU_GET(_rx_msdu_end) \ |
| 1902 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1903 | RX_MSDU_END_5_LAST_MSDU_OFFSET)), \ |
| 1904 | RX_MSDU_END_5_LAST_MSDU_MASK, \ |
| 1905 | RX_MSDU_END_5_LAST_MSDU_LSB)) |
| 1906 | |
| 1907 | /** |
| 1908 | * hal_rx_msdu_end_last_msdu_get: API to get last msdu status |
| 1909 | * from rx_msdu_end TLV |
| 1910 | * |
| 1911 | * @ buf: pointer to the start of RX PKT TLV headers |
| 1912 | * Return: last_msdu |
| 1913 | */ |
| 1914 | static inline uint8_t |
| 1915 | hal_rx_msdu_end_last_msdu_get(uint8_t *buf) |
| 1916 | { |
| 1917 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1918 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1919 | uint8_t last_msdu; |
| 1920 | |
| 1921 | last_msdu = HAL_RX_MSDU_END_LAST_MSDU_GET(msdu_end); |
| 1922 | |
| 1923 | return last_msdu; |
| 1924 | } |
Karunakar Dasineni | 142f9ba | 2019-03-19 23:04:59 -0700 | [diff] [blame] | 1925 | |
| 1926 | #define HAL_RX_MSDU_END_CCE_METADATA_GET(_rx_msdu_end) \ |
| 1927 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 1928 | RX_MSDU_END_16_CCE_METADATA_OFFSET)), \ |
Sumeet Rao | c4fa4df | 2019-07-05 02:11:19 -0700 | [diff] [blame] | 1929 | RX_MSDU_END_16_CCE_METADATA_MASK, \ |
Karunakar Dasineni | 142f9ba | 2019-03-19 23:04:59 -0700 | [diff] [blame] | 1930 | RX_MSDU_END_16_CCE_METADATA_LSB)) |
| 1931 | |
| 1932 | /** |
| 1933 | * hal_rx_msdu_cce_metadata_get: API to get CCE metadata |
| 1934 | * from rx_msdu_end TLV |
Sumeet Rao | c4fa4df | 2019-07-05 02:11:19 -0700 | [diff] [blame] | 1935 | * @buf: pointer to the start of RX PKT TLV headers |
Karunakar Dasineni | 142f9ba | 2019-03-19 23:04:59 -0700 | [diff] [blame] | 1936 | * Return: last_msdu |
| 1937 | */ |
| 1938 | |
| 1939 | static inline uint32_t |
| 1940 | hal_rx_msdu_cce_metadata_get(uint8_t *buf) |
| 1941 | { |
| 1942 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1943 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 1944 | uint32_t cce_metadata; |
| 1945 | |
| 1946 | cce_metadata = HAL_RX_MSDU_END_CCE_METADATA_GET(msdu_end); |
| 1947 | return cce_metadata; |
| 1948 | } |
| 1949 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 1950 | /******************************************************************************* |
| 1951 | * RX ERROR APIS |
| 1952 | ******************************************************************************/ |
| 1953 | |
Ishank Jain | 1e7401c | 2017-02-17 15:38:39 +0530 | [diff] [blame] | 1954 | #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end) \ |
| 1955 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\ |
| 1956 | RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)), \ |
| 1957 | RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK, \ |
| 1958 | RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB)) |
| 1959 | |
| 1960 | /** |
| 1961 | * hal_rx_mpdu_end_decrypt_err_get(): API to get the Decrypt ERR |
| 1962 | * from rx_mpdu_end TLV |
| 1963 | * |
| 1964 | * @buf: pointer to the start of RX PKT TLV headers |
| 1965 | * Return: uint32_t(decrypt_err) |
| 1966 | */ |
| 1967 | static inline uint32_t |
| 1968 | hal_rx_mpdu_end_decrypt_err_get(uint8_t *buf) |
| 1969 | { |
| 1970 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1971 | struct rx_mpdu_end *mpdu_end = |
| 1972 | &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end; |
| 1973 | uint32_t decrypt_err; |
| 1974 | |
| 1975 | decrypt_err = HAL_RX_MPDU_END_DECRYPT_ERR_GET(mpdu_end); |
| 1976 | |
| 1977 | return decrypt_err; |
| 1978 | } |
| 1979 | |
| 1980 | #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end) \ |
| 1981 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\ |
| 1982 | RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)), \ |
| 1983 | RX_MPDU_END_1_TKIP_MIC_ERR_MASK, \ |
| 1984 | RX_MPDU_END_1_TKIP_MIC_ERR_LSB)) |
| 1985 | |
| 1986 | /** |
| 1987 | * hal_rx_mpdu_end_mic_err_get(): API to get the MIC ERR |
| 1988 | * from rx_mpdu_end TLV |
| 1989 | * |
| 1990 | * @buf: pointer to the start of RX PKT TLV headers |
| 1991 | * Return: uint32_t(mic_err) |
| 1992 | */ |
| 1993 | static inline uint32_t |
| 1994 | hal_rx_mpdu_end_mic_err_get(uint8_t *buf) |
| 1995 | { |
| 1996 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 1997 | struct rx_mpdu_end *mpdu_end = |
| 1998 | &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end; |
| 1999 | uint32_t mic_err; |
| 2000 | |
| 2001 | mic_err = HAL_RX_MPDU_END_MIC_ERR_GET(mpdu_end); |
| 2002 | |
| 2003 | return mic_err; |
| 2004 | } |
| 2005 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2006 | /******************************************************************************* |
| 2007 | * RX REO ERROR APIS |
| 2008 | ******************************************************************************/ |
| 2009 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2010 | #define HAL_RX_NUM_MSDU_DESC 6 |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2011 | #define HAL_RX_MAX_SAVED_RING_DESC 16 |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2012 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2013 | /* TODO: rework the structure */ |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2014 | struct hal_rx_msdu_list { |
| 2015 | struct hal_rx_msdu_desc_info msdu_info[HAL_RX_NUM_MSDU_DESC]; |
| 2016 | uint32_t sw_cookie[HAL_RX_NUM_MSDU_DESC]; |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2017 | uint8_t rbm[HAL_RX_NUM_MSDU_DESC]; |
nwzhao | d7196d8 | 2019-02-14 11:54:25 -0800 | [diff] [blame] | 2018 | /* physical address of the msdu */ |
| 2019 | uint64_t paddr[HAL_RX_NUM_MSDU_DESC]; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2020 | }; |
| 2021 | |
| 2022 | struct hal_buf_info { |
| 2023 | uint64_t paddr; |
| 2024 | uint32_t sw_cookie; |
| 2025 | }; |
| 2026 | |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2027 | /** |
| 2028 | * hal_rx_link_desc_msdu0_ptr - Get pointer to rx_msdu details |
| 2029 | * @msdu_link_ptr - msdu link ptr |
| 2030 | * @hal - pointer to hal_soc |
| 2031 | * Return - Pointer to rx_msdu_details structure |
| 2032 | * |
| 2033 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 2034 | static inline |
| 2035 | void *hal_rx_link_desc_msdu0_ptr(void *msdu_link_ptr, |
| 2036 | struct hal_soc *hal_soc) |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2037 | { |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2038 | return hal_soc->ops->hal_rx_link_desc_msdu0_ptr(msdu_link_ptr); |
| 2039 | } |
| 2040 | |
| 2041 | /** |
| 2042 | * hal_rx_msdu_desc_info_get_ptr() - Get msdu desc info ptr |
| 2043 | * @msdu_details_ptr - Pointer to msdu_details_ptr |
| 2044 | * @hal - pointer to hal_soc |
| 2045 | * Return - Pointer to rx_msdu_desc_info structure. |
| 2046 | * |
| 2047 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 2048 | static inline |
| 2049 | void *hal_rx_msdu_desc_info_get_ptr(void *msdu_details_ptr, |
| 2050 | struct hal_soc *hal_soc) |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2051 | { |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2052 | return hal_soc->ops->hal_rx_msdu_desc_info_get_ptr(msdu_details_ptr); |
| 2053 | } |
| 2054 | |
Karunakar Dasineni | 15a3d48 | 2017-07-12 19:19:40 -0700 | [diff] [blame] | 2055 | /* This special cookie value will be used to indicate FW allocated buffers |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2056 | * received through RXDMA2SW ring for RXDMA WARs |
| 2057 | */ |
Karunakar Dasineni | 15a3d48 | 2017-07-12 19:19:40 -0700 | [diff] [blame] | 2058 | #define HAL_RX_COOKIE_SPECIAL 0x1fffff |
| 2059 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2060 | /** |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2061 | * hal_rx_msdu_link_desc_get(): API to get the MSDU information |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2062 | * from the MSDU link descriptor |
| 2063 | * |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2064 | * @msdu_link_desc: Opaque pointer used by HAL to get to the |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2065 | * MSDU link descriptor (struct rx_msdu_link) |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2066 | * |
| 2067 | * @msdu_list: Return the list of MSDUs contained in this link descriptor |
| 2068 | * |
| 2069 | * @num_msdus: Number of MSDUs in the MPDU |
| 2070 | * |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2071 | * Return: void |
| 2072 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 2073 | static inline void hal_rx_msdu_list_get(hal_soc_handle_t hal_soc_hdl, |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2074 | void *msdu_link_desc, |
| 2075 | struct hal_rx_msdu_list *msdu_list, |
| 2076 | uint16_t *num_msdus) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2077 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 2078 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2079 | struct rx_msdu_details *msdu_details; |
| 2080 | struct rx_msdu_desc_info *msdu_desc_info; |
| 2081 | struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc; |
| 2082 | int i; |
| 2083 | |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2084 | msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc); |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2085 | |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2086 | QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 2087 | "[%s][%d] msdu_link=%pK msdu_details=%pK", |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2088 | __func__, __LINE__, msdu_link, msdu_details); |
| 2089 | |
Kai Chen | 634d53f | 2017-07-15 18:49:02 -0700 | [diff] [blame] | 2090 | for (i = 0; i < HAL_RX_NUM_MSDU_DESC; i++) { |
Karunakar Dasineni | 80cded8 | 2017-07-10 10:49:55 -0700 | [diff] [blame] | 2091 | /* num_msdus received in mpdu descriptor may be incorrect |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2092 | * sometimes due to HW issue. Check msdu buffer address also |
| 2093 | */ |
Karunakar Dasineni | 80cded8 | 2017-07-10 10:49:55 -0700 | [diff] [blame] | 2094 | if (HAL_RX_BUFFER_ADDR_31_0_GET( |
| 2095 | &msdu_details[i].buffer_addr_info_details) == 0) { |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2096 | /* set the last msdu bit in the prev msdu_desc_info */ |
| 2097 | msdu_desc_info = |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2098 | hal_rx_msdu_desc_info_get_ptr(&msdu_details[i - 1], hal_soc); |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2099 | HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1); |
Karunakar Dasineni | 80cded8 | 2017-07-10 10:49:55 -0700 | [diff] [blame] | 2100 | break; |
| 2101 | } |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2102 | msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[i], |
| 2103 | hal_soc); |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2104 | |
| 2105 | /* set first MSDU bit or the last MSDU bit */ |
| 2106 | if (!i) |
| 2107 | HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1); |
| 2108 | else if (i == (HAL_RX_NUM_MSDU_DESC - 1)) |
| 2109 | HAL_RX_LAST_MSDU_IN_MPDU_FLAG_SET(msdu_desc_info, 1); |
| 2110 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2111 | msdu_list->msdu_info[i].msdu_flags = |
| 2112 | HAL_RX_MSDU_FLAGS_GET(msdu_desc_info); |
| 2113 | msdu_list->msdu_info[i].msdu_len = |
| 2114 | HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info); |
| 2115 | msdu_list->sw_cookie[i] = |
| 2116 | HAL_RX_BUF_COOKIE_GET( |
| 2117 | &msdu_details[i].buffer_addr_info_details); |
nwzhao | d7196d8 | 2019-02-14 11:54:25 -0800 | [diff] [blame] | 2118 | msdu_list->rbm[i] = HAL_RX_BUF_RBM_GET( |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2119 | &msdu_details[i].buffer_addr_info_details); |
nwzhao | d7196d8 | 2019-02-14 11:54:25 -0800 | [diff] [blame] | 2120 | msdu_list->paddr[i] = HAL_RX_BUFFER_ADDR_31_0_GET( |
| 2121 | &msdu_details[i].buffer_addr_info_details) | |
| 2122 | (uint64_t)HAL_RX_BUFFER_ADDR_39_32_GET( |
| 2123 | &msdu_details[i].buffer_addr_info_details) << 32; |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2124 | QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG, |
Aditya Sathish | ded018e | 2018-07-02 16:25:21 +0530 | [diff] [blame] | 2125 | "[%s][%d] i=%d sw_cookie=%d", |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2126 | __func__, __LINE__, i, msdu_list->sw_cookie[i]); |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2127 | } |
Kai Chen | 634d53f | 2017-07-15 18:49:02 -0700 | [diff] [blame] | 2128 | *num_msdus = i; |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2129 | } |
| 2130 | |
| 2131 | /** |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2132 | * hal_rx_msdu_reo_dst_ind_get: Gets the REO |
| 2133 | * destination ring ID from the msdu desc info |
| 2134 | * |
| 2135 | * @msdu_link_desc : Opaque cookie pointer used by HAL to get to |
| 2136 | * the current descriptor |
| 2137 | * |
| 2138 | * Return: dst_ind (REO destination ring ID) |
| 2139 | */ |
| 2140 | static inline uint32_t |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 2141 | hal_rx_msdu_reo_dst_ind_get(hal_soc_handle_t hal_soc_hdl, void *msdu_link_desc) |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2142 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 2143 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2144 | struct rx_msdu_details *msdu_details; |
| 2145 | struct rx_msdu_desc_info *msdu_desc_info; |
| 2146 | struct rx_msdu_link *msdu_link = (struct rx_msdu_link *)msdu_link_desc; |
| 2147 | uint32_t dst_ind; |
| 2148 | |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2149 | msdu_details = hal_rx_link_desc_msdu0_ptr(msdu_link, hal_soc); |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2150 | |
| 2151 | /* The first msdu in the link should exsist */ |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2152 | msdu_desc_info = hal_rx_msdu_desc_info_get_ptr(&msdu_details[0], |
| 2153 | hal_soc); |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2154 | dst_ind = HAL_RX_MSDU_REO_DST_IND_GET(msdu_desc_info); |
| 2155 | return dst_ind; |
| 2156 | } |
| 2157 | |
| 2158 | /** |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2159 | * hal_rx_reo_buf_paddr_get: Gets the physical address and |
| 2160 | * cookie from the REO destination ring element |
| 2161 | * |
| 2162 | * @ hal_rx_desc_cookie: Opaque cookie pointer used by HAL to get to |
| 2163 | * the current descriptor |
| 2164 | * @ buf_info: structure to return the buffer information |
| 2165 | * Return: void |
| 2166 | */ |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2167 | static inline |
| 2168 | void hal_rx_reo_buf_paddr_get(hal_ring_desc_t rx_desc, |
| 2169 | struct hal_buf_info *buf_info) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2170 | { |
| 2171 | struct reo_destination_ring *reo_ring = |
| 2172 | (struct reo_destination_ring *)rx_desc; |
| 2173 | |
| 2174 | buf_info->paddr = |
| 2175 | (HAL_RX_REO_BUFFER_ADDR_31_0_GET(reo_ring) | |
| 2176 | ((uint64_t)(HAL_RX_REO_BUFFER_ADDR_39_32_GET(reo_ring)) << 32)); |
| 2177 | |
| 2178 | buf_info->sw_cookie = HAL_RX_REO_BUF_COOKIE_GET(reo_ring); |
| 2179 | } |
| 2180 | |
| 2181 | /** |
| 2182 | * enum hal_reo_error_code: Indicates that type of buffer or descriptor |
| 2183 | * |
| 2184 | * @ HAL_RX_MSDU_BUF_ADDR_TYPE : Reo buffer address points to the MSDU buffer |
| 2185 | * @ HAL_RX_MSDU_LINK_DESC_TYPE: Reo buffer address points to the link |
| 2186 | * descriptor |
| 2187 | */ |
| 2188 | enum hal_rx_reo_buf_type { |
| 2189 | HAL_RX_REO_MSDU_BUF_ADDR_TYPE = 0, |
| 2190 | HAL_RX_REO_MSDU_LINK_DESC_TYPE, |
| 2191 | }; |
| 2192 | |
| 2193 | #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *) reo_desc)+ \ |
| 2194 | (REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \ |
| 2195 | REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK) >> \ |
| 2196 | REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB) |
| 2197 | |
Ankit Kumar | e222775 | 2019-04-30 00:16:04 +0530 | [diff] [blame] | 2198 | #define HAL_RX_REO_QUEUE_NUMBER_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \ |
| 2199 | (REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET >> 2))) & \ |
| 2200 | REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK) >> \ |
| 2201 | REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB) |
| 2202 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2203 | /** |
| 2204 | * enum hal_reo_error_code: Error code describing the type of error detected |
| 2205 | * |
| 2206 | * @ HAL_REO_ERR_QUEUE_DESC_ADDR_0 : Reo queue descriptor provided in the |
| 2207 | * REO_ENTRANCE ring is set to 0 |
| 2208 | * @ HAL_REO_ERR_QUEUE_DESC_INVALID: Reo queue descriptor valid bit is NOT set |
| 2209 | * @ HAL_REO_ERR_AMPDU_IN_NON_BA : AMPDU frame received without BA session |
| 2210 | * having been setup |
| 2211 | * @ HAL_REO_ERR_NON_BA_DUPLICATE : Non-BA session, SN equal to SSN, |
| 2212 | * Retry bit set: duplicate frame |
| 2213 | * @ HAL_REO_ERR_BA_DUPLICATE : BA session, duplicate frame |
| 2214 | * @ HAL_REO_ERR_REGULAR_FRAME_2K_JUMP : A normal (management/data frame) |
| 2215 | * received with 2K jump in SN |
| 2216 | * @ HAL_REO_ERR_BAR_FRAME_2K_JUMP : A bar received with 2K jump in SSN |
| 2217 | * @ HAL_REO_ERR_REGULAR_FRAME_OOR : A normal (management/data frame) received |
| 2218 | * with SN falling within the OOR window |
| 2219 | * @ HAL_REO_ERR_BAR_FRAME_OOR : A bar received with SSN falling within the |
| 2220 | * OOR window |
| 2221 | * @ HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION : A bar received without a BA session |
| 2222 | * @ HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN : A bar received with SSN equal to SN |
| 2223 | * @ HAL_REO_ERR_PN_CHECK_FAILED : PN Check Failed packet |
| 2224 | * @ HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET : Frame is forwarded as a result |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2225 | * of the Seq_2k_error_detected_flag been set in the REO Queue descriptor |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2226 | * @ HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET : Frame is forwarded as a result |
Kai Chen | 6eca1a6 | 2017-01-12 10:17:53 -0800 | [diff] [blame] | 2227 | * of the pn_error_detected_flag been set in the REO Queue descriptor |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2228 | * @ HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET : Frame is forwarded as a result of |
| 2229 | * the queue descriptor(address) being blocked as SW/FW seems to be currently |
| 2230 | * in the process of making updates to this descriptor |
| 2231 | */ |
| 2232 | enum hal_reo_error_code { |
| 2233 | HAL_REO_ERR_QUEUE_DESC_ADDR_0 = 0, |
| 2234 | HAL_REO_ERR_QUEUE_DESC_INVALID, |
| 2235 | HAL_REO_ERR_AMPDU_IN_NON_BA, |
| 2236 | HAL_REO_ERR_NON_BA_DUPLICATE, |
| 2237 | HAL_REO_ERR_BA_DUPLICATE, |
| 2238 | HAL_REO_ERR_REGULAR_FRAME_2K_JUMP, |
| 2239 | HAL_REO_ERR_BAR_FRAME_2K_JUMP, |
| 2240 | HAL_REO_ERR_REGULAR_FRAME_OOR, |
| 2241 | HAL_REO_ERR_BAR_FRAME_OOR, |
| 2242 | HAL_REO_ERR_BAR_FRAME_NO_BA_SESSION, |
| 2243 | HAL_REO_ERR_BAR_FRAME_SN_EQUALS_SSN, |
| 2244 | HAL_REO_ERR_PN_CHECK_FAILED, |
| 2245 | HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET, |
| 2246 | HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET, |
Pamidipati, Vijay | 623fbee | 2017-07-07 10:58:15 +0530 | [diff] [blame] | 2247 | HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET, |
| 2248 | HAL_REO_ERR_MAX |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2249 | }; |
| 2250 | |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2251 | /** |
| 2252 | * enum hal_rxdma_error_code: Code describing the type of RxDMA error detected |
| 2253 | * |
| 2254 | * @HAL_RXDMA_ERR_OVERFLOW: MPDU frame is not complete due to a FIFO overflow |
| 2255 | * @ HAL_RXDMA_ERR_OVERFLOW : MPDU frame is not complete due to a FIFO |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2256 | * overflow |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2257 | * @ HAL_RXDMA_ERR_MPDU_LENGTH : MPDU frame is not complete due to receiving |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2258 | * incomplete |
| 2259 | * MPDU from the PHY |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2260 | * @ HAL_RXDMA_ERR_FCS : FCS check on the MPDU frame failed |
| 2261 | * @ HAL_RXDMA_ERR_DECRYPT : Decryption error |
| 2262 | * @ HAL_RXDMA_ERR_TKIP_MIC : TKIP MIC error |
Venkateswara Swamy Bandaru | 1fecd15 | 2017-07-04 17:26:18 +0530 | [diff] [blame] | 2263 | * @ HAL_RXDMA_ERR_UNENCRYPTED : Received a frame that was expected to be |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2264 | * encrypted but wasn’t |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2265 | * @ HAL_RXDMA_ERR_MSDU_LEN : MSDU related length error |
| 2266 | * @ HAL_RXDMA_ERR_MSDU_LIMIT : Number of MSDUs in the MPDUs exceeded |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2267 | * the max allowed |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2268 | * @ HAL_RXDMA_ERR_WIFI_PARSE : wifi parsing error |
| 2269 | * @ HAL_RXDMA_ERR_AMSDU_PARSE : Amsdu parsing error |
| 2270 | * @ HAL_RXDMA_ERR_SA_TIMEOUT : Source Address search timeout |
| 2271 | * @ HAL_RXDMA_ERR_DA_TIMEOUT : Destination Address search timeout |
| 2272 | * @ HAL_RXDMA_ERR_FLOW_TIMEOUT : Flow Search Timeout |
| 2273 | * @ HAL_RXDMA_ERR_FLUSH_REQUEST : RxDMA FIFO Flush request |
Karunakar Dasineni | 15a3d48 | 2017-07-12 19:19:40 -0700 | [diff] [blame] | 2274 | * @ HAL_RXDMA_ERR_WAR : RxDMA WAR dummy errors |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2275 | */ |
| 2276 | enum hal_rxdma_error_code { |
| 2277 | HAL_RXDMA_ERR_OVERFLOW = 0, |
| 2278 | HAL_RXDMA_ERR_MPDU_LENGTH, |
| 2279 | HAL_RXDMA_ERR_FCS, |
| 2280 | HAL_RXDMA_ERR_DECRYPT, |
| 2281 | HAL_RXDMA_ERR_TKIP_MIC, |
Pamidipati, Vijay | eb8a92c | 2017-05-01 00:55:56 +0530 | [diff] [blame] | 2282 | HAL_RXDMA_ERR_UNENCRYPTED, |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2283 | HAL_RXDMA_ERR_MSDU_LEN, |
| 2284 | HAL_RXDMA_ERR_MSDU_LIMIT, |
| 2285 | HAL_RXDMA_ERR_WIFI_PARSE, |
| 2286 | HAL_RXDMA_ERR_AMSDU_PARSE, |
| 2287 | HAL_RXDMA_ERR_SA_TIMEOUT, |
| 2288 | HAL_RXDMA_ERR_DA_TIMEOUT, |
| 2289 | HAL_RXDMA_ERR_FLOW_TIMEOUT, |
Karunakar Dasineni | 15a3d48 | 2017-07-12 19:19:40 -0700 | [diff] [blame] | 2290 | HAL_RXDMA_ERR_FLUSH_REQUEST, |
Pamidipati, Vijay | 623fbee | 2017-07-07 10:58:15 +0530 | [diff] [blame] | 2291 | HAL_RXDMA_ERR_WAR = 31, |
| 2292 | HAL_RXDMA_ERR_MAX |
Pamidipati, Vijay | c2cb427 | 2017-05-23 10:09:26 +0530 | [diff] [blame] | 2293 | }; |
| 2294 | |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 2295 | /** |
| 2296 | * HW BM action settings in WBM release ring |
| 2297 | */ |
| 2298 | #define HAL_BM_ACTION_PUT_IN_IDLE_LIST 0 |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2299 | #define HAL_BM_ACTION_RELEASE_MSDU_LIST 1 |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 2300 | |
| 2301 | /** |
| 2302 | * enum hal_rx_wbm_error_source: Indicates which module initiated the |
| 2303 | * release of this buffer or descriptor |
| 2304 | * |
| 2305 | * @ HAL_RX_WBM_ERR_SRC_TQM : TQM released this buffer or descriptor |
| 2306 | * @ HAL_RX_WBM_ERR_SRC_RXDMA: RXDMA released this buffer or descriptor |
| 2307 | * @ HAL_RX_WBM_ERR_SRC_REO: REO released this buffer or descriptor |
| 2308 | * @ HAL_RX_WBM_ERR_SRC_FW: FW released this buffer or descriptor |
| 2309 | * @ HAL_RX_WBM_ERR_SRC_SW: SW released this buffer or descriptor |
| 2310 | */ |
| 2311 | enum hal_rx_wbm_error_source { |
| 2312 | HAL_RX_WBM_ERR_SRC_TQM = 0, |
| 2313 | HAL_RX_WBM_ERR_SRC_RXDMA, |
| 2314 | HAL_RX_WBM_ERR_SRC_REO, |
| 2315 | HAL_RX_WBM_ERR_SRC_FW, |
| 2316 | HAL_RX_WBM_ERR_SRC_SW, |
| 2317 | }; |
| 2318 | |
| 2319 | /** |
| 2320 | * enum hal_rx_wbm_buf_type: Indicates that type of buffer or descriptor |
| 2321 | * released |
| 2322 | * |
| 2323 | * @ HAL_RX_WBM_ERR_SRC_TQM : TQM released this buffer or descriptor |
| 2324 | * @ HAL_RX_WBM_ERR_SRC_RXDMA: RXDMA released this buffer or descriptor |
| 2325 | * @ HAL_RX_WBM_ERR_SRC_REO: REO released this buffer or descriptor |
| 2326 | * @ HAL_RX_WBM_ERR_SRC_FW: FW released this buffer or descriptor |
| 2327 | * @ HAL_RX_WBM_ERR_SRC_SW: SW released this buffer or descriptor |
| 2328 | */ |
| 2329 | enum hal_rx_wbm_buf_type { |
| 2330 | HAL_RX_WBM_BUF_TYPE_REL_BUF = 0, |
| 2331 | HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC, |
| 2332 | HAL_RX_WBM_BUF_TYPE_MPDU_LINK_DESC, |
| 2333 | HAL_RX_WBM_BUF_TYPE_MSDU_EXT_DESC, |
| 2334 | HAL_RX_WBM_BUF_TYPE_Q_EXT_DESC, |
| 2335 | }; |
| 2336 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2337 | #define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *) reo_desc)+ \ |
| 2338 | (REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \ |
| 2339 | REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \ |
| 2340 | REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB) |
| 2341 | |
| 2342 | /** |
| 2343 | * hal_rx_is_pn_error() - Indicate if this error was caused by a |
| 2344 | * PN check failure |
| 2345 | * |
| 2346 | * @reo_desc: opaque pointer used by HAL to get the REO destination entry |
| 2347 | * |
| 2348 | * Return: true: error caused by PN check, false: other error |
| 2349 | */ |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2350 | static inline bool hal_rx_reo_is_pn_error(hal_ring_desc_t rx_desc) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2351 | { |
| 2352 | struct reo_destination_ring *reo_desc = |
| 2353 | (struct reo_destination_ring *)rx_desc; |
| 2354 | |
| 2355 | return ((HAL_RX_REO_ERROR_GET(reo_desc) == |
| 2356 | HAL_REO_ERR_PN_CHECK_FAILED) | |
| 2357 | (HAL_RX_REO_ERROR_GET(reo_desc) == |
| 2358 | HAL_REO_ERR_PN_ERROR_HANDLING_FLAG_SET)) ? |
| 2359 | true : false; |
| 2360 | } |
| 2361 | |
| 2362 | /** |
| 2363 | * hal_rx_is_2k_jump() - Indicate if this error was caused by a 2K jump in |
| 2364 | * the sequence number |
| 2365 | * |
| 2366 | * @ring_desc: opaque pointer used by HAL to get the REO destination entry |
| 2367 | * |
| 2368 | * Return: true: error caused by 2K jump, false: other error |
| 2369 | */ |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2370 | static inline bool hal_rx_reo_is_2k_jump(hal_ring_desc_t rx_desc) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2371 | { |
| 2372 | struct reo_destination_ring *reo_desc = |
| 2373 | (struct reo_destination_ring *)rx_desc; |
| 2374 | |
| 2375 | return ((HAL_RX_REO_ERROR_GET(reo_desc) == |
| 2376 | HAL_REO_ERR_REGULAR_FRAME_2K_JUMP) | |
| 2377 | (HAL_RX_REO_ERROR_GET(reo_desc) == |
| 2378 | HAL_REO_ERR_2K_ERROR_HANDLING_FLAG_SET)) ? |
| 2379 | true : false; |
| 2380 | } |
| 2381 | |
| 2382 | /** |
| 2383 | * hal_rx_msdu_link_desc_set: Retrieves MSDU Link Descriptor to WBM |
| 2384 | * |
Akshay Kosigi | a870c61 | 2019-07-08 23:10:30 +0530 | [diff] [blame] | 2385 | * @ hal_soc_hdl : HAL version of the SOC pointer |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2386 | * @ src_srng_desc : void pointer to the WBM Release Ring descriptor |
| 2387 | * @ buf_addr_info : void pointer to the buffer_addr_info |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2388 | * @ bm_action : put in IDLE list or release to MSDU_LIST |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2389 | * |
| 2390 | * Return: void |
| 2391 | */ |
| 2392 | /* look at implementation at dp_hw_link_desc_pool_setup()*/ |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2393 | static inline |
Akshay Kosigi | a870c61 | 2019-07-08 23:10:30 +0530 | [diff] [blame] | 2394 | void hal_rx_msdu_link_desc_set(hal_soc_handle_t hal_soc_hdl, |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2395 | void *src_srng_desc, |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 2396 | hal_link_desc_t buf_addr_info, |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2397 | uint8_t bm_action) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2398 | { |
| 2399 | struct wbm_release_ring *wbm_rel_srng = |
| 2400 | (struct wbm_release_ring *)src_srng_desc; |
| 2401 | |
| 2402 | /* Structure copy !!! */ |
| 2403 | wbm_rel_srng->released_buff_or_desc_addr_info = |
| 2404 | *((struct buffer_addr_info *)buf_addr_info); |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 2405 | HAL_DESC_SET_FIELD(src_srng_desc, WBM_RELEASE_RING_2, |
| 2406 | RELEASE_SOURCE_MODULE, HAL_RX_WBM_ERR_SRC_SW); |
| 2407 | HAL_DESC_SET_FIELD(src_srng_desc, WBM_RELEASE_RING_2, BM_ACTION, |
Tallapragada Kalyan | 0017291 | 2017-09-26 21:04:24 +0530 | [diff] [blame] | 2408 | bm_action); |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 2409 | HAL_DESC_SET_FIELD(src_srng_desc, WBM_RELEASE_RING_2, |
| 2410 | BUFFER_OR_DESC_TYPE, HAL_RX_WBM_BUF_TYPE_MSDU_LINK_DESC); |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2411 | } |
| 2412 | |
| 2413 | /* |
| 2414 | * hal_rx_msdu_link_desc_reinject: Re-injects the MSDU link descriptor to |
| 2415 | * REO entrance ring |
| 2416 | * |
| 2417 | * @ soc: HAL version of the SOC pointer |
| 2418 | * @ pa: Physical address of the MSDU Link Descriptor |
| 2419 | * @ cookie: SW cookie to get to the virtual address |
| 2420 | * @ error_enabled_reo_q: Argument to determine whether this needs to go |
| 2421 | * to the error enabled REO queue |
| 2422 | * |
| 2423 | * Return: void |
| 2424 | */ |
| 2425 | static inline void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc, |
| 2426 | uint64_t pa, uint32_t cookie, bool error_enabled_reo_q) |
| 2427 | { |
| 2428 | /* TODO */ |
| 2429 | } |
| 2430 | |
| 2431 | /** |
| 2432 | * HAL_RX_BUF_ADDR_INFO_GET: Returns the address of the |
| 2433 | * BUFFER_ADDR_INFO, give the RX descriptor |
| 2434 | * (Assumption -- BUFFER_ADDR_INFO is the |
| 2435 | * first field in the descriptor structure) |
| 2436 | */ |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2437 | #define HAL_RX_BUF_ADDR_INFO_GET(ring_desc) \ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 2438 | ((hal_link_desc_t)(ring_desc)) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2439 | |
| 2440 | #define HAL_RX_REO_BUF_ADDR_INFO_GET HAL_RX_BUF_ADDR_INFO_GET |
| 2441 | |
| 2442 | #define HAL_RX_WBM_BUF_ADDR_INFO_GET HAL_RX_BUF_ADDR_INFO_GET |
| 2443 | |
| 2444 | /** |
| 2445 | * hal_rx_ret_buf_manager_get: Returns the "return_buffer_manager" |
| 2446 | * from the BUFFER_ADDR_INFO structure |
| 2447 | * given a REO destination ring descriptor. |
| 2448 | * @ ring_desc: RX(REO/WBM release) destination ring descriptor |
| 2449 | * |
| 2450 | * Return: uint8_t (value of the return_buffer_manager) |
| 2451 | */ |
| 2452 | static inline |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 2453 | uint8_t hal_rx_ret_buf_manager_get(hal_ring_desc_t ring_desc) |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2454 | { |
| 2455 | /* |
| 2456 | * The following macro takes buf_addr_info as argument, |
| 2457 | * but since buf_addr_info is the first field in ring_desc |
| 2458 | * Hence the following call is OK |
| 2459 | */ |
| 2460 | return HAL_RX_BUF_RBM_GET(ring_desc); |
| 2461 | } |
| 2462 | |
| 2463 | |
| 2464 | /******************************************************************************* |
| 2465 | * RX WBM ERROR APIS |
| 2466 | ******************************************************************************/ |
| 2467 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2468 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2469 | #define HAL_RX_WBM_BUF_TYPE_GET(wbm_desc) (((*(((uint32_t *) wbm_desc)+ \ |
| 2470 | (WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_OFFSET >> 2))) & \ |
| 2471 | WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_MASK) >> \ |
| 2472 | WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_LSB) |
| 2473 | |
| 2474 | /** |
| 2475 | * enum - hal_rx_wbm_reo_push_reason: Indicates why REO pushed |
| 2476 | * the frame to this release ring |
| 2477 | * |
| 2478 | * @ HAL_RX_WBM_REO_PSH_RSN_ERROR : Reo detected an error and pushed this |
| 2479 | * frame to this queue |
| 2480 | * @ HAL_RX_WBM_REO_PSH_RSN_ROUTE: Reo pushed the frame to this queue per |
| 2481 | * received routing instructions. No error within REO was detected |
| 2482 | */ |
| 2483 | enum hal_rx_wbm_reo_push_reason { |
| 2484 | HAL_RX_WBM_REO_PSH_RSN_ERROR = 0, |
| 2485 | HAL_RX_WBM_REO_PSH_RSN_ROUTE, |
| 2486 | }; |
| 2487 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2488 | |
| 2489 | /** |
| 2490 | * enum hal_rx_wbm_rxdma_push_reason: Indicates why REO pushed the frame to |
| 2491 | * this release ring |
| 2492 | * |
| 2493 | * @ HAL_RX_WBM_RXDMA_PSH_RSN_ERROR : RXDMA detected an error and pushed |
| 2494 | * this frame to this queue |
| 2495 | * @ HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE: RXDMA pushed the frame to this queue |
| 2496 | * per received routing instructions. No error within RXDMA was detected |
| 2497 | */ |
| 2498 | enum hal_rx_wbm_rxdma_push_reason { |
| 2499 | HAL_RX_WBM_RXDMA_PSH_RSN_ERROR = 0, |
| 2500 | HAL_RX_WBM_RXDMA_PSH_RSN_ROUTE, |
| 2501 | }; |
| 2502 | |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 2503 | |
Pratik Gandhi | 3da3bc7 | 2017-03-16 18:20:22 +0530 | [diff] [blame] | 2504 | #define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc) \ |
| 2505 | (((*(((uint32_t *) wbm_desc) + \ |
| 2506 | (WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET >> 2))) & \ |
| 2507 | WBM_RELEASE_RING_4_FIRST_MSDU_MASK) >> \ |
| 2508 | WBM_RELEASE_RING_4_FIRST_MSDU_LSB) |
| 2509 | |
| 2510 | #define HAL_RX_WBM_LAST_MSDU_GET(wbm_desc) \ |
| 2511 | (((*(((uint32_t *) wbm_desc) + \ |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2512 | (WBM_RELEASE_RING_4_LAST_MSDU_OFFSET >> 2))) & \ |
Pratik Gandhi | 3da3bc7 | 2017-03-16 18:20:22 +0530 | [diff] [blame] | 2513 | WBM_RELEASE_RING_4_LAST_MSDU_MASK) >> \ |
| 2514 | WBM_RELEASE_RING_4_LAST_MSDU_LSB) |
| 2515 | |
| 2516 | #define HAL_RX_WBM_BUF_COOKIE_GET(wbm_desc) \ |
| 2517 | HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \ |
| 2518 | wbm_desc)->released_buff_or_desc_addr_info) |
| 2519 | |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2520 | /** |
| 2521 | * hal_rx_dump_rx_attention_tlv: dump RX attention TLV in structured |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2522 | * humman readable format. |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2523 | * @ rx_attn: pointer the rx_attention TLV in pkt. |
| 2524 | * @ dbg_level: log level. |
| 2525 | * |
| 2526 | * Return: void |
| 2527 | */ |
| 2528 | static inline void hal_rx_dump_rx_attention_tlv(struct rx_attention *rx_attn, |
| 2529 | uint8_t dbg_level) |
| 2530 | { |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 2531 | hal_verbose_debug( |
| 2532 | "rx_attention tlv (1/2) - " |
| 2533 | "rxpcu_mpdu_filter_in_category: %x " |
| 2534 | "sw_frame_group_id: %x " |
| 2535 | "reserved_0: %x " |
| 2536 | "phy_ppdu_id: %x " |
| 2537 | "first_mpdu : %x " |
| 2538 | "reserved_1a: %x " |
| 2539 | "mcast_bcast: %x " |
| 2540 | "ast_index_not_found: %x " |
| 2541 | "ast_index_timeout: %x " |
| 2542 | "power_mgmt: %x " |
| 2543 | "non_qos: %x " |
| 2544 | "null_data: %x " |
| 2545 | "mgmt_type: %x " |
| 2546 | "ctrl_type: %x " |
| 2547 | "more_data: %x " |
| 2548 | "eosp: %x " |
| 2549 | "a_msdu_error: %x " |
| 2550 | "fragment_flag: %x " |
| 2551 | "order: %x " |
| 2552 | "cce_match: %x " |
| 2553 | "overflow_err: %x " |
| 2554 | "msdu_length_err: %x " |
| 2555 | "tcp_udp_chksum_fail: %x " |
| 2556 | "ip_chksum_fail: %x " |
| 2557 | "sa_idx_invalid: %x " |
| 2558 | "da_idx_invalid: %x " |
| 2559 | "reserved_1b: %x " |
| 2560 | "rx_in_tx_decrypt_byp: %x ", |
| 2561 | rx_attn->rxpcu_mpdu_filter_in_category, |
| 2562 | rx_attn->sw_frame_group_id, |
| 2563 | rx_attn->reserved_0, |
| 2564 | rx_attn->phy_ppdu_id, |
| 2565 | rx_attn->first_mpdu, |
| 2566 | rx_attn->reserved_1a, |
| 2567 | rx_attn->mcast_bcast, |
| 2568 | rx_attn->ast_index_not_found, |
| 2569 | rx_attn->ast_index_timeout, |
| 2570 | rx_attn->power_mgmt, |
| 2571 | rx_attn->non_qos, |
| 2572 | rx_attn->null_data, |
| 2573 | rx_attn->mgmt_type, |
| 2574 | rx_attn->ctrl_type, |
| 2575 | rx_attn->more_data, |
| 2576 | rx_attn->eosp, |
| 2577 | rx_attn->a_msdu_error, |
| 2578 | rx_attn->fragment_flag, |
| 2579 | rx_attn->order, |
| 2580 | rx_attn->cce_match, |
| 2581 | rx_attn->overflow_err, |
| 2582 | rx_attn->msdu_length_err, |
| 2583 | rx_attn->tcp_udp_chksum_fail, |
| 2584 | rx_attn->ip_chksum_fail, |
| 2585 | rx_attn->sa_idx_invalid, |
| 2586 | rx_attn->da_idx_invalid, |
| 2587 | rx_attn->reserved_1b, |
| 2588 | rx_attn->rx_in_tx_decrypt_byp); |
Mohit Khanna | 5868efa | 2018-12-18 16:50:20 -0800 | [diff] [blame] | 2589 | |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 2590 | hal_verbose_debug( |
| 2591 | "rx_attention tlv (2/2) - " |
| 2592 | "encrypt_required: %x " |
| 2593 | "directed: %x " |
| 2594 | "buffer_fragment: %x " |
| 2595 | "mpdu_length_err: %x " |
| 2596 | "tkip_mic_err: %x " |
| 2597 | "decrypt_err: %x " |
| 2598 | "unencrypted_frame_err: %x " |
| 2599 | "fcs_err: %x " |
| 2600 | "flow_idx_timeout: %x " |
| 2601 | "flow_idx_invalid: %x " |
| 2602 | "wifi_parser_error: %x " |
| 2603 | "amsdu_parser_error: %x " |
| 2604 | "sa_idx_timeout: %x " |
| 2605 | "da_idx_timeout: %x " |
| 2606 | "msdu_limit_error: %x " |
| 2607 | "da_is_valid: %x " |
| 2608 | "da_is_mcbc: %x " |
| 2609 | "sa_is_valid: %x " |
| 2610 | "decrypt_status_code: %x " |
| 2611 | "rx_bitmap_not_updated: %x " |
| 2612 | "reserved_2: %x " |
| 2613 | "msdu_done: %x ", |
| 2614 | rx_attn->encrypt_required, |
| 2615 | rx_attn->directed, |
| 2616 | rx_attn->buffer_fragment, |
| 2617 | rx_attn->mpdu_length_err, |
| 2618 | rx_attn->tkip_mic_err, |
| 2619 | rx_attn->decrypt_err, |
| 2620 | rx_attn->unencrypted_frame_err, |
| 2621 | rx_attn->fcs_err, |
| 2622 | rx_attn->flow_idx_timeout, |
| 2623 | rx_attn->flow_idx_invalid, |
| 2624 | rx_attn->wifi_parser_error, |
| 2625 | rx_attn->amsdu_parser_error, |
| 2626 | rx_attn->sa_idx_timeout, |
| 2627 | rx_attn->da_idx_timeout, |
| 2628 | rx_attn->msdu_limit_error, |
| 2629 | rx_attn->da_is_valid, |
| 2630 | rx_attn->da_is_mcbc, |
| 2631 | rx_attn->sa_is_valid, |
| 2632 | rx_attn->decrypt_status_code, |
| 2633 | rx_attn->rx_bitmap_not_updated, |
| 2634 | rx_attn->reserved_2, |
| 2635 | rx_attn->msdu_done); |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2636 | } |
| 2637 | |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2638 | static inline void hal_rx_dump_mpdu_start_tlv(struct rx_mpdu_start *mpdu_start, |
Balamurugan Mahalingam | 764219e | 2018-09-17 15:34:25 +0530 | [diff] [blame] | 2639 | uint8_t dbg_level, |
| 2640 | struct hal_soc *hal) |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2641 | { |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2642 | |
Balamurugan Mahalingam | 764219e | 2018-09-17 15:34:25 +0530 | [diff] [blame] | 2643 | hal->ops->hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level); |
| 2644 | } |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2645 | /** |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2646 | * hal_rx_dump_msdu_end_tlv: dump RX msdu_end TLV in structured |
| 2647 | * human readable format. |
| 2648 | * @ msdu_end: pointer the msdu_end TLV in pkt. |
| 2649 | * @ dbg_level: log level. |
| 2650 | * |
| 2651 | * Return: void |
| 2652 | */ |
Balamurugan Mahalingam | 97ad106 | 2018-07-11 15:22:58 +0530 | [diff] [blame] | 2653 | static inline void hal_rx_dump_msdu_end_tlv(struct hal_soc *hal_soc, |
| 2654 | struct rx_msdu_end *msdu_end, |
| 2655 | uint8_t dbg_level) |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2656 | { |
Balamurugan Mahalingam | 97ad106 | 2018-07-11 15:22:58 +0530 | [diff] [blame] | 2657 | hal_soc->ops->hal_rx_dump_msdu_end_tlv(msdu_end, dbg_level); |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2658 | } |
| 2659 | |
| 2660 | /** |
| 2661 | * hal_rx_dump_mpdu_end_tlv: dump RX mpdu_end TLV in structured |
| 2662 | * human readable format. |
| 2663 | * @ mpdu_end: pointer the mpdu_end TLV in pkt. |
| 2664 | * @ dbg_level: log level. |
| 2665 | * |
| 2666 | * Return: void |
| 2667 | */ |
| 2668 | static inline void hal_rx_dump_mpdu_end_tlv(struct rx_mpdu_end *mpdu_end, |
| 2669 | uint8_t dbg_level) |
| 2670 | { |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 2671 | hal_verbose_debug( |
| 2672 | "rx_mpdu_end tlv - " |
| 2673 | "rxpcu_mpdu_filter_in_category: %x " |
| 2674 | "sw_frame_group_id: %x " |
| 2675 | "phy_ppdu_id: %x " |
| 2676 | "unsup_ktype_short_frame: %x " |
| 2677 | "rx_in_tx_decrypt_byp: %x " |
| 2678 | "overflow_err: %x " |
| 2679 | "mpdu_length_err: %x " |
| 2680 | "tkip_mic_err: %x " |
| 2681 | "decrypt_err: %x " |
| 2682 | "unencrypted_frame_err: %x " |
| 2683 | "pn_fields_contain_valid_info: %x " |
| 2684 | "fcs_err: %x " |
| 2685 | "msdu_length_err: %x " |
| 2686 | "rxdma0_destination_ring: %x " |
| 2687 | "rxdma1_destination_ring: %x " |
| 2688 | "decrypt_status_code: %x " |
| 2689 | "rx_bitmap_not_updated: %x ", |
| 2690 | mpdu_end->rxpcu_mpdu_filter_in_category, |
| 2691 | mpdu_end->sw_frame_group_id, |
| 2692 | mpdu_end->phy_ppdu_id, |
| 2693 | mpdu_end->unsup_ktype_short_frame, |
| 2694 | mpdu_end->rx_in_tx_decrypt_byp, |
| 2695 | mpdu_end->overflow_err, |
| 2696 | mpdu_end->mpdu_length_err, |
| 2697 | mpdu_end->tkip_mic_err, |
| 2698 | mpdu_end->decrypt_err, |
| 2699 | mpdu_end->unencrypted_frame_err, |
| 2700 | mpdu_end->pn_fields_contain_valid_info, |
| 2701 | mpdu_end->fcs_err, |
| 2702 | mpdu_end->msdu_length_err, |
| 2703 | mpdu_end->rxdma0_destination_ring, |
| 2704 | mpdu_end->rxdma1_destination_ring, |
| 2705 | mpdu_end->decrypt_status_code, |
| 2706 | mpdu_end->rx_bitmap_not_updated); |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2707 | } |
| 2708 | |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 2709 | #ifdef NO_RX_PKT_HDR_TLV |
| 2710 | static inline void hal_rx_dump_pkt_hdr_tlv(struct rx_pkt_tlvs *pkt_tlvs, |
| 2711 | uint8_t dbg_level) |
| 2712 | { |
| 2713 | } |
| 2714 | #else |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2715 | /** |
| 2716 | * hal_rx_dump_pkt_hdr_tlv: dump RX pkt header TLV in hex format |
| 2717 | * @ pkt_hdr_tlv: pointer the pkt_hdr_tlv in pkt. |
| 2718 | * @ dbg_level: log level. |
| 2719 | * |
| 2720 | * Return: void |
| 2721 | */ |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 2722 | static inline void hal_rx_dump_pkt_hdr_tlv(struct rx_pkt_tlvs *pkt_tlvs, |
| 2723 | uint8_t dbg_level) |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2724 | { |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 2725 | struct rx_pkt_hdr_tlv *pkt_hdr_tlv = &pkt_tlvs->pkt_hdr_tlv; |
| 2726 | |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 2727 | hal_verbose_debug( |
| 2728 | "\n---------------\n" |
| 2729 | "rx_pkt_hdr_tlv \n" |
| 2730 | "---------------\n" |
| 2731 | "phy_ppdu_id %d ", |
| 2732 | pkt_hdr_tlv->phy_ppdu_id); |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2733 | |
Krunal Soni | 9911b44 | 2019-02-22 15:39:03 -0800 | [diff] [blame] | 2734 | hal_verbose_hex_dump(pkt_hdr_tlv->rx_pkt_hdr, 128); |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2735 | } |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 2736 | #endif |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2737 | |
| 2738 | /** |
Jeff Johnson | ff2dfb2 | 2018-05-12 10:27:57 -0700 | [diff] [blame] | 2739 | * hal_srng_ring_id_get: API to retrieve ring id from hal ring |
Venkata Sharath Chandra Manchala | 918aefe | 2017-04-10 10:21:56 -0700 | [diff] [blame] | 2740 | * structure |
| 2741 | * @hal_ring: pointer to hal_srng structure |
| 2742 | * |
| 2743 | * Return: ring_id |
| 2744 | */ |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 2745 | static inline uint8_t hal_srng_ring_id_get(hal_ring_handle_t hal_ring_hdl) |
Venkata Sharath Chandra Manchala | 918aefe | 2017-04-10 10:21:56 -0700 | [diff] [blame] | 2746 | { |
Akshay Kosigi | 0bca9fb | 2019-06-27 15:26:13 +0530 | [diff] [blame] | 2747 | return ((struct hal_srng *)hal_ring_hdl)->ring_id; |
Venkata Sharath Chandra Manchala | 918aefe | 2017-04-10 10:21:56 -0700 | [diff] [blame] | 2748 | } |
Tallapragada Kalyan | 67ad342 | 2017-02-06 15:59:45 +0530 | [diff] [blame] | 2749 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2750 | /* Rx MSDU link pointer info */ |
| 2751 | struct hal_rx_msdu_link_ptr_info { |
| 2752 | struct rx_msdu_link msdu_link; |
| 2753 | struct hal_buf_info msdu_link_buf_info; |
| 2754 | }; |
| 2755 | |
| 2756 | /** |
| 2757 | * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf |
| 2758 | * |
| 2759 | * @nbuf: Pointer to data buffer field |
| 2760 | * Returns: pointer to rx_pkt_tlvs |
| 2761 | */ |
| 2762 | static inline |
| 2763 | struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start) |
| 2764 | { |
| 2765 | return (struct rx_pkt_tlvs *)rx_buf_start; |
| 2766 | } |
| 2767 | |
| 2768 | /** |
| 2769 | * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs |
| 2770 | * |
| 2771 | * @pkt_tlvs: Pointer to pkt_tlvs |
| 2772 | * Returns: pointer to rx_mpdu_info structure |
| 2773 | */ |
| 2774 | static inline |
| 2775 | struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs) |
| 2776 | { |
| 2777 | return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details; |
| 2778 | } |
| 2779 | |
| 2780 | /** |
| 2781 | * hal_rx_get_rx_sequence(): Function to retrieve rx sequence number |
| 2782 | * |
| 2783 | * @nbuf: Network buffer |
| 2784 | * Returns: rx sequence number |
| 2785 | */ |
| 2786 | #define DOT11_SEQ_FRAG_MASK 0x000f |
| 2787 | #define DOT11_FC1_MORE_FRAG_OFFSET 0x04 |
| 2788 | |
| 2789 | #define HAL_RX_MPDU_GET_SEQUENCE_NUMBER(_rx_mpdu_info) \ |
| 2790 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 2791 | RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_OFFSET)), \ |
| 2792 | RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_MASK, \ |
| 2793 | RX_MPDU_INFO_2_MPDU_SEQUENCE_NUMBER_LSB)) |
| 2794 | static inline |
| 2795 | uint16_t hal_rx_get_rx_sequence(uint8_t *buf) |
| 2796 | { |
| 2797 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2798 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2799 | uint16_t seq_number = 0; |
| 2800 | |
Karunakar Dasineni | 142f9ba | 2019-03-19 23:04:59 -0700 | [diff] [blame] | 2801 | seq_number = HAL_RX_MPDU_GET_SEQUENCE_NUMBER(rx_mpdu_info); |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2802 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2803 | return seq_number; |
| 2804 | } |
| 2805 | |
| 2806 | /** |
| 2807 | * hal_rx_get_rx_fragment_number(): Function to retrieve rx fragment number |
| 2808 | * |
| 2809 | * @nbuf: Network buffer |
| 2810 | * Returns: rx fragment number |
| 2811 | */ |
| 2812 | static inline |
| 2813 | uint8_t hal_rx_get_rx_fragment_number(uint8_t *buf) |
| 2814 | { |
| 2815 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2816 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2817 | uint8_t frag_number = 0; |
| 2818 | |
| 2819 | frag_number = HAL_RX_MPDU_GET_SEQUENCE_NUMBER(rx_mpdu_info) & |
| 2820 | DOT11_SEQ_FRAG_MASK; |
| 2821 | |
| 2822 | /* Return first 4 bits as fragment number */ |
| 2823 | return frag_number; |
| 2824 | } |
| 2825 | |
| 2826 | #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info) \ |
| 2827 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 2828 | RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)), \ |
| 2829 | RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK, \ |
| 2830 | RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB)) |
| 2831 | /** |
| 2832 | * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit |
| 2833 | * |
| 2834 | * @nbuf: Network buffer |
| 2835 | * Returns: rx more fragment bit |
| 2836 | */ |
| 2837 | static inline |
| 2838 | uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf) |
| 2839 | { |
| 2840 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2841 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2842 | uint16_t frame_ctrl = 0; |
| 2843 | |
| 2844 | frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_mpdu_info) >> |
| 2845 | DOT11_FC1_MORE_FRAG_OFFSET; |
| 2846 | |
| 2847 | /* more fragment bit if at offset bit 4 */ |
| 2848 | return frame_ctrl; |
| 2849 | } |
| 2850 | |
| 2851 | /** |
| 2852 | * hal_rx_get_frame_ctrl_field(): Function to retrieve frame control field |
| 2853 | * |
| 2854 | * @nbuf: Network buffer |
| 2855 | * Returns: rx more fragment bit |
| 2856 | * |
| 2857 | */ |
| 2858 | static inline |
psimha | 7e69eaa | 2018-01-08 16:35:26 -0800 | [diff] [blame] | 2859 | uint16_t hal_rx_get_frame_ctrl_field(uint8_t *buf) |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2860 | { |
| 2861 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2862 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2863 | uint16_t frame_ctrl = 0; |
| 2864 | |
| 2865 | frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_mpdu_info); |
| 2866 | |
| 2867 | return frame_ctrl; |
| 2868 | } |
| 2869 | |
| 2870 | /* |
| 2871 | * hal_rx_msdu_is_wlan_mcast(): Check if the buffer is for multicast address |
| 2872 | * |
| 2873 | * @nbuf: Network buffer |
| 2874 | * Returns: flag to indicate whether the nbuf has MC/BC address |
| 2875 | */ |
| 2876 | static inline |
| 2877 | uint32_t hal_rx_msdu_is_wlan_mcast(qdf_nbuf_t nbuf) |
| 2878 | { |
| 2879 | uint8 *buf = qdf_nbuf_data(nbuf); |
| 2880 | |
| 2881 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 2882 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 2883 | |
| 2884 | return rx_attn->mcast_bcast; |
| 2885 | } |
| 2886 | |
| 2887 | #define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ |
| 2888 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 2889 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ |
| 2890 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ |
| 2891 | RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) |
| 2892 | /* |
| 2893 | * hal_rx_get_mpdu_sequence_control_valid(): Get mpdu sequence control valid |
| 2894 | * |
| 2895 | * @nbuf: Network buffer |
| 2896 | * Returns: value of sequence control valid field |
| 2897 | */ |
| 2898 | static inline |
| 2899 | uint8_t hal_rx_get_mpdu_sequence_control_valid(uint8_t *buf) |
| 2900 | { |
| 2901 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2902 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2903 | uint8_t seq_ctrl_valid = 0; |
| 2904 | |
| 2905 | seq_ctrl_valid = |
| 2906 | HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); |
| 2907 | |
| 2908 | return seq_ctrl_valid; |
| 2909 | } |
| 2910 | |
| 2911 | #define HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(_rx_mpdu_info) \ |
| 2912 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 2913 | RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \ |
| 2914 | RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \ |
| 2915 | RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB)) |
| 2916 | /* |
| 2917 | * hal_rx_get_mpdu_frame_control_valid(): Retrieves mpdu frame control valid |
| 2918 | * |
| 2919 | * @nbuf: Network buffer |
| 2920 | * Returns: value of frame control valid field |
| 2921 | */ |
| 2922 | static inline |
| 2923 | uint8_t hal_rx_get_mpdu_frame_control_valid(uint8_t *buf) |
| 2924 | { |
| 2925 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2926 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2927 | uint8_t frm_ctrl_valid = 0; |
| 2928 | |
| 2929 | frm_ctrl_valid = |
| 2930 | HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); |
| 2931 | |
| 2932 | return frm_ctrl_valid; |
| 2933 | } |
| 2934 | |
Tallapragada Kalyan | 85a1455 | 2017-08-23 14:41:02 +0530 | [diff] [blame] | 2935 | #define HAL_RX_MPDU_GET_MAC_AD4_VALID(_rx_mpdu_info) \ |
| 2936 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ |
| 2937 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_OFFSET)), \ |
| 2938 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_MASK, \ |
| 2939 | RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_LSB)) |
| 2940 | /* |
| 2941 | * hal_rx_get_mpdu_mac_ad4_valid(): Retrieves if mpdu 4th addr is valid |
| 2942 | * |
| 2943 | * @nbuf: Network buffer |
Jeff Johnson | ff2dfb2 | 2018-05-12 10:27:57 -0700 | [diff] [blame] | 2944 | * Returns: value of mpdu 4th address valid field |
Tallapragada Kalyan | 85a1455 | 2017-08-23 14:41:02 +0530 | [diff] [blame] | 2945 | */ |
| 2946 | static inline |
| 2947 | bool hal_rx_get_mpdu_mac_ad4_valid(uint8_t *buf) |
| 2948 | { |
| 2949 | struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); |
| 2950 | struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); |
| 2951 | bool ad4_valid = 0; |
| 2952 | |
| 2953 | ad4_valid = HAL_RX_MPDU_GET_MAC_AD4_VALID(rx_mpdu_info); |
| 2954 | |
| 2955 | return ad4_valid; |
| 2956 | } |
| 2957 | |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2958 | /* |
| 2959 | * hal_rx_clear_mpdu_desc_info(): Clears mpdu_desc_info |
| 2960 | * |
| 2961 | * @rx_mpdu_desc_info: HAL view of rx mpdu desc info |
| 2962 | * Returns: None |
| 2963 | */ |
| 2964 | static inline |
| 2965 | void hal_rx_clear_mpdu_desc_info( |
| 2966 | struct hal_rx_mpdu_desc_info *rx_mpdu_desc_info) |
| 2967 | { |
| 2968 | qdf_mem_zero(rx_mpdu_desc_info, |
| 2969 | sizeof(*rx_mpdu_desc_info)); |
| 2970 | } |
| 2971 | |
| 2972 | /* |
| 2973 | * hal_rx_clear_msdu_link_ptr(): Clears msdu_link_ptr |
| 2974 | * |
| 2975 | * @msdu_link_ptr: HAL view of msdu link ptr |
| 2976 | * @size: number of msdu link pointers |
| 2977 | * Returns: None |
| 2978 | */ |
| 2979 | static inline |
| 2980 | void hal_rx_clear_msdu_link_ptr(struct hal_rx_msdu_link_ptr_info *msdu_link_ptr, |
| 2981 | int size) |
| 2982 | { |
| 2983 | qdf_mem_zero(msdu_link_ptr, |
| 2984 | (sizeof(*msdu_link_ptr) * size)); |
| 2985 | } |
| 2986 | |
| 2987 | /* |
| 2988 | * hal_rx_chain_msdu_links() - Chains msdu link pointers |
| 2989 | * @msdu_link_ptr: msdu link pointer |
| 2990 | * @mpdu_desc_info: mpdu descriptor info |
| 2991 | * |
| 2992 | * Build a list of msdus using msdu link pointer. If the |
| 2993 | * number of msdus are more, chain them together |
| 2994 | * |
| 2995 | * Returns: Number of processed msdus |
| 2996 | */ |
| 2997 | static inline |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 2998 | int hal_rx_chain_msdu_links(struct hal_soc *hal_soc, qdf_nbuf_t msdu, |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 2999 | struct hal_rx_msdu_link_ptr_info *msdu_link_ptr_info, |
| 3000 | struct hal_rx_mpdu_desc_info *mpdu_desc_info) |
| 3001 | { |
| 3002 | int j; |
| 3003 | struct rx_msdu_link *msdu_link_ptr = |
| 3004 | &msdu_link_ptr_info->msdu_link; |
| 3005 | struct rx_msdu_link *prev_msdu_link_ptr = NULL; |
| 3006 | struct rx_msdu_details *msdu_details = |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 3007 | hal_rx_link_desc_msdu0_ptr(msdu_link_ptr, hal_soc); |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 3008 | uint8_t num_msdus = mpdu_desc_info->msdu_count; |
| 3009 | struct rx_msdu_desc_info *msdu_desc_info; |
| 3010 | uint8_t fragno, more_frag; |
| 3011 | uint8_t *rx_desc_info; |
| 3012 | struct hal_rx_msdu_list msdu_list; |
| 3013 | |
| 3014 | for (j = 0; j < num_msdus; j++) { |
| 3015 | msdu_desc_info = |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 3016 | hal_rx_msdu_desc_info_get_ptr(&msdu_details[j], |
| 3017 | hal_soc); |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 3018 | msdu_list.msdu_info[j].msdu_flags = |
| 3019 | HAL_RX_MSDU_FLAGS_GET(msdu_desc_info); |
| 3020 | msdu_list.msdu_info[j].msdu_len = |
| 3021 | HAL_RX_MSDU_PKT_LENGTH_GET(msdu_desc_info); |
| 3022 | msdu_list.sw_cookie[j] = HAL_RX_BUF_COOKIE_GET( |
| 3023 | &msdu_details[j].buffer_addr_info_details); |
| 3024 | } |
| 3025 | |
| 3026 | /* Chain msdu links together */ |
| 3027 | if (prev_msdu_link_ptr) { |
| 3028 | /* 31-0 bits of the physical address */ |
| 3029 | prev_msdu_link_ptr-> |
| 3030 | next_msdu_link_desc_addr_info.buffer_addr_31_0 = |
| 3031 | msdu_link_ptr_info->msdu_link_buf_info.paddr & |
| 3032 | BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK; |
| 3033 | /* 39-32 bits of the physical address */ |
| 3034 | prev_msdu_link_ptr-> |
| 3035 | next_msdu_link_desc_addr_info.buffer_addr_39_32 |
| 3036 | = ((msdu_link_ptr_info->msdu_link_buf_info.paddr |
Yuanyuan Liu | a33c0be | 2018-09-26 11:39:43 -0700 | [diff] [blame] | 3037 | >> 32) & |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 3038 | BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK); |
| 3039 | prev_msdu_link_ptr-> |
| 3040 | next_msdu_link_desc_addr_info.sw_buffer_cookie = |
| 3041 | msdu_link_ptr_info->msdu_link_buf_info.sw_cookie; |
| 3042 | } |
| 3043 | |
| 3044 | /* There is space for only 6 MSDUs in a MSDU link descriptor */ |
| 3045 | if (num_msdus < HAL_RX_NUM_MSDU_DESC) { |
| 3046 | /* mark first and last MSDUs */ |
| 3047 | rx_desc_info = qdf_nbuf_data(msdu); |
| 3048 | fragno = hal_rx_get_rx_fragment_number(rx_desc_info); |
| 3049 | more_frag = hal_rx_get_rx_more_frag_bit(rx_desc_info); |
| 3050 | |
| 3051 | /* TODO: create skb->fragslist[] */ |
| 3052 | |
| 3053 | if (more_frag == 0) { |
| 3054 | msdu_list.msdu_info[num_msdus].msdu_flags |= |
| 3055 | RX_MSDU_DESC_INFO_0_LAST_MSDU_IN_MPDU_FLAG_MASK; |
| 3056 | } else if (fragno == 1) { |
| 3057 | msdu_list.msdu_info[num_msdus].msdu_flags |= |
| 3058 | RX_MSDU_DESC_INFO_0_FIRST_MSDU_IN_MPDU_FLAG_MASK; |
| 3059 | |
| 3060 | msdu_list.msdu_info[num_msdus].msdu_flags |= |
| 3061 | RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK; |
| 3062 | } |
| 3063 | |
| 3064 | num_msdus++; |
| 3065 | |
| 3066 | /* Number of MSDUs per mpdu descriptor is updated */ |
| 3067 | mpdu_desc_info->msdu_count += num_msdus; |
| 3068 | } else { |
| 3069 | num_msdus = 0; |
| 3070 | prev_msdu_link_ptr = msdu_link_ptr; |
| 3071 | } |
| 3072 | |
| 3073 | return num_msdus; |
| 3074 | } |
| 3075 | |
| 3076 | /* |
| 3077 | * hal_rx_defrag_update_src_ring_desc(): updates reo src ring desc |
| 3078 | * |
| 3079 | * @ring_desc: HAL view of ring descriptor |
| 3080 | * @mpdu_des_info: saved mpdu desc info |
| 3081 | * @msdu_link_ptr: saved msdu link ptr |
| 3082 | * |
Jeff Johnson | ff2dfb2 | 2018-05-12 10:27:57 -0700 | [diff] [blame] | 3083 | * API used explicitly for rx defrag to update ring desc with |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 3084 | * mpdu desc info and msdu link ptr before reinjecting the |
| 3085 | * packet back to REO |
| 3086 | * |
| 3087 | * Returns: None |
| 3088 | */ |
| 3089 | static inline |
Akshay Kosigi | 91c5652 | 2019-07-02 11:49:39 +0530 | [diff] [blame] | 3090 | void hal_rx_defrag_update_src_ring_desc( |
| 3091 | hal_ring_desc_t ring_desc, |
| 3092 | void *saved_mpdu_desc_info, |
| 3093 | struct hal_rx_msdu_link_ptr_info *saved_msdu_link_ptr) |
Ravi Joshi | 36f68ad | 2016-11-09 17:09:47 -0800 | [diff] [blame] | 3094 | { |
| 3095 | struct reo_entrance_ring *reo_ent_ring; |
| 3096 | struct rx_mpdu_desc_info *reo_ring_mpdu_desc_info; |
| 3097 | struct hal_buf_info buf_info; |
| 3098 | |
| 3099 | reo_ent_ring = (struct reo_entrance_ring *)ring_desc; |
| 3100 | reo_ring_mpdu_desc_info = &reo_ent_ring-> |
| 3101 | reo_level_mpdu_frame_info.rx_mpdu_desc_info_details; |
| 3102 | |
| 3103 | qdf_mem_copy(&reo_ring_mpdu_desc_info, saved_mpdu_desc_info, |
| 3104 | sizeof(*reo_ring_mpdu_desc_info)); |
| 3105 | |
| 3106 | /* |
| 3107 | * TODO: Check for additional fields that need configuration in |
| 3108 | * reo_ring_mpdu_desc_info |
| 3109 | */ |
| 3110 | |
| 3111 | /* Update msdu_link_ptr in the reo entrance ring */ |
| 3112 | hal_rx_reo_buf_paddr_get(ring_desc, &buf_info); |
| 3113 | buf_info.paddr = saved_msdu_link_ptr->msdu_link_buf_info.paddr; |
| 3114 | buf_info.sw_cookie = |
| 3115 | saved_msdu_link_ptr->msdu_link_buf_info.sw_cookie; |
| 3116 | } |
| 3117 | |
| 3118 | /* |
| 3119 | * hal_rx_defrag_save_info_from_ring_desc(): Saves info from ring desc |
| 3120 | * |
| 3121 | * @msdu_link_desc_va: msdu link descriptor handle |
| 3122 | * @msdu_link_ptr_info: HAL view of msdu link pointer info |
| 3123 | * |
| 3124 | * API used to save msdu link information along with physical |
| 3125 | * address. The API also copues the sw cookie. |
| 3126 | * |
| 3127 | * Returns: None |
| 3128 | */ |
| 3129 | static inline |
| 3130 | void hal_rx_defrag_save_info_from_ring_desc(void *msdu_link_desc_va, |
| 3131 | struct hal_rx_msdu_link_ptr_info *msdu_link_ptr_info, |
| 3132 | struct hal_buf_info *hbi) |
| 3133 | { |
| 3134 | struct rx_msdu_link *msdu_link_ptr = |
| 3135 | (struct rx_msdu_link *)msdu_link_desc_va; |
| 3136 | |
| 3137 | qdf_mem_copy(&msdu_link_ptr_info->msdu_link, msdu_link_ptr, |
| 3138 | sizeof(struct rx_msdu_link)); |
| 3139 | |
| 3140 | msdu_link_ptr_info->msdu_link_buf_info.paddr = hbi->paddr; |
| 3141 | msdu_link_ptr_info->msdu_link_buf_info.sw_cookie = hbi->sw_cookie; |
| 3142 | } |
| 3143 | |
| 3144 | /* |
| 3145 | * hal_rx_get_desc_len(): Returns rx descriptor length |
| 3146 | * |
| 3147 | * Returns the size of rx_pkt_tlvs which follows the |
| 3148 | * data in the nbuf |
| 3149 | * |
| 3150 | * Returns: Length of rx descriptor |
| 3151 | */ |
| 3152 | static inline |
| 3153 | uint16_t hal_rx_get_desc_len(void) |
| 3154 | { |
| 3155 | return sizeof(struct rx_pkt_tlvs); |
| 3156 | } |
| 3157 | |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3158 | /* |
| 3159 | * hal_rx_reo_ent_rxdma_push_reason_get(): Retrieves RXDMA push reason from |
| 3160 | * reo_entrance_ring descriptor |
| 3161 | * |
| 3162 | * @reo_ent_desc: reo_entrance_ring descriptor |
| 3163 | * Returns: value of rxdma_push_reason |
| 3164 | */ |
| 3165 | static inline |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 3166 | uint8_t hal_rx_reo_ent_rxdma_push_reason_get(hal_rxdma_desc_t reo_ent_desc) |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3167 | { |
| 3168 | return _HAL_MS((*_OFFSET_TO_WORD_PTR(reo_ent_desc, |
| 3169 | REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_OFFSET)), |
| 3170 | REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_MASK, |
| 3171 | REO_ENTRANCE_RING_6_RXDMA_PUSH_REASON_LSB); |
| 3172 | } |
| 3173 | |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 3174 | /** |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3175 | * hal_rx_reo_ent_rxdma_error_code_get(): Retrieves RXDMA error code from |
| 3176 | * reo_entrance_ring descriptor |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3177 | * @reo_ent_desc: reo_entrance_ring descriptor |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 3178 | * Return: value of rxdma_error_code |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3179 | */ |
| 3180 | static inline |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 3181 | uint8_t hal_rx_reo_ent_rxdma_error_code_get(hal_rxdma_desc_t reo_ent_desc) |
Karunakar Dasineni | f40efac | 2017-06-16 16:14:03 -0700 | [diff] [blame] | 3182 | { |
| 3183 | return _HAL_MS((*_OFFSET_TO_WORD_PTR(reo_ent_desc, |
| 3184 | REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_OFFSET)), |
| 3185 | REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_MASK, |
| 3186 | REO_ENTRANCE_RING_6_RXDMA_ERROR_CODE_LSB); |
| 3187 | } |
| 3188 | |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 3189 | /** |
| 3190 | * hal_rx_wbm_err_info_get(): Retrieves WBM error code and reason and |
| 3191 | * save it to hal_wbm_err_desc_info structure passed by caller |
| 3192 | * @wbm_desc: wbm ring descriptor |
| 3193 | * @wbm_er_info: hal_wbm_err_desc_info structure, output parameter. |
| 3194 | * Return: void |
| 3195 | */ |
| 3196 | static inline void hal_rx_wbm_err_info_get(void *wbm_desc, |
Balamurugan Mahalingam | 764219e | 2018-09-17 15:34:25 +0530 | [diff] [blame] | 3197 | struct hal_wbm_err_desc_info *wbm_er_info, |
Akshay Kosigi | a870c61 | 2019-07-08 23:10:30 +0530 | [diff] [blame] | 3198 | hal_soc_handle_t hal_soc_hdl) |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 3199 | { |
Akshay Kosigi | a870c61 | 2019-07-08 23:10:30 +0530 | [diff] [blame] | 3200 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 3201 | |
Balamurugan Mahalingam | 764219e | 2018-09-17 15:34:25 +0530 | [diff] [blame] | 3202 | hal_soc->ops->hal_rx_wbm_err_info_get(wbm_desc, (void *)wbm_er_info); |
Tallapragada Kalyan | 9403463 | 2017-12-07 17:29:13 +0530 | [diff] [blame] | 3203 | } |
| 3204 | |
| 3205 | /** |
| 3206 | * hal_rx_wbm_err_info_set_in_tlv(): Save the wbm error codes and reason to |
| 3207 | * the reserved bytes of rx_tlv_hdr |
| 3208 | * @buf: start of rx_tlv_hdr |
| 3209 | * @wbm_er_info: hal_wbm_err_desc_info structure |
| 3210 | * Return: void |
| 3211 | */ |
| 3212 | static inline void hal_rx_wbm_err_info_set_in_tlv(uint8_t *buf, |
| 3213 | struct hal_wbm_err_desc_info *wbm_er_info) |
| 3214 | { |
| 3215 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3216 | |
| 3217 | qdf_mem_copy(pkt_tlvs->rx_padding0, wbm_er_info, |
| 3218 | sizeof(struct hal_wbm_err_desc_info)); |
| 3219 | } |
| 3220 | |
| 3221 | /** |
| 3222 | * hal_rx_wbm_err_info_get_from_tlv(): retrieve wbm error codes and reason from |
| 3223 | * the reserved bytes of rx_tlv_hdr. |
| 3224 | * @buf: start of rx_tlv_hdr |
| 3225 | * @wbm_er_info: hal_wbm_err_desc_info structure, output parameter. |
| 3226 | * Return: void |
| 3227 | */ |
| 3228 | static inline void hal_rx_wbm_err_info_get_from_tlv(uint8_t *buf, |
| 3229 | struct hal_wbm_err_desc_info *wbm_er_info) |
| 3230 | { |
| 3231 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3232 | |
| 3233 | qdf_mem_copy(wbm_er_info, pkt_tlvs->rx_padding0, |
| 3234 | sizeof(struct hal_wbm_err_desc_info)); |
| 3235 | } |
| 3236 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3237 | #define HAL_RX_MSDU_START_NSS_GET(_rx_msdu_start) \ |
| 3238 | (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start), \ |
| 3239 | RX_MSDU_START_5_NSS_OFFSET)), \ |
| 3240 | RX_MSDU_START_5_NSS_MASK, \ |
| 3241 | RX_MSDU_START_5_NSS_LSB)) |
| 3242 | |
| 3243 | /** |
| 3244 | * hal_rx_mon_hw_desc_get_mpdu_status: Retrieve MPDU status |
| 3245 | * |
| 3246 | * @ hal_soc: HAL version of the SOC pointer |
| 3247 | * @ hw_desc_addr: Start address of Rx HW TLVs |
| 3248 | * @ rs: Status for monitor mode |
| 3249 | * |
| 3250 | * Return: void |
| 3251 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3252 | static inline |
| 3253 | void hal_rx_mon_hw_desc_get_mpdu_status(hal_soc_handle_t hal_soc_hdl, |
| 3254 | void *hw_desc_addr, |
| 3255 | struct mon_rx_status *rs) |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3256 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3257 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 3258 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3259 | hal_soc->ops->hal_rx_mon_hw_desc_get_mpdu_status(hw_desc_addr, rs); |
| 3260 | } |
| 3261 | |
| 3262 | /* |
| 3263 | * hal_rx_get_tlv(): API to get the tlv |
| 3264 | * |
| 3265 | * @hal_soc: HAL version of the SOC pointer |
| 3266 | * @rx_tlv: TLV data extracted from the rx packet |
| 3267 | * Return: uint8_t |
| 3268 | */ |
| 3269 | static inline uint8_t hal_rx_get_tlv(struct hal_soc *hal_soc, void *rx_tlv) |
| 3270 | { |
| 3271 | return hal_soc->ops->hal_rx_get_tlv(rx_tlv); |
| 3272 | } |
| 3273 | |
| 3274 | /* |
| 3275 | * hal_rx_msdu_start_nss_get(): API to get the NSS |
| 3276 | * Interval from rx_msdu_start |
| 3277 | * |
| 3278 | * @hal_soc: HAL version of the SOC pointer |
| 3279 | * @buf: pointer to the start of RX PKT TLV header |
| 3280 | * Return: uint32_t(nss) |
| 3281 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3282 | static inline |
| 3283 | uint32_t hal_rx_msdu_start_nss_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf) |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3284 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3285 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 3286 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3287 | return hal_soc->ops->hal_rx_msdu_start_nss_get(buf); |
| 3288 | } |
| 3289 | |
| 3290 | /** |
| 3291 | * hal_rx_dump_msdu_start_tlv: dump RX msdu_start TLV in structured |
| 3292 | * human readable format. |
| 3293 | * @ msdu_start: pointer the msdu_start TLV in pkt. |
| 3294 | * @ dbg_level: log level. |
| 3295 | * |
| 3296 | * Return: void |
| 3297 | */ |
| 3298 | static inline void hal_rx_dump_msdu_start_tlv(struct hal_soc *hal_soc, |
| 3299 | struct rx_msdu_start *msdu_start, |
| 3300 | uint8_t dbg_level) |
| 3301 | { |
| 3302 | hal_soc->ops->hal_rx_dump_msdu_start_tlv(msdu_start, dbg_level); |
| 3303 | } |
| 3304 | |
| 3305 | /** |
| 3306 | * hal_rx_mpdu_start_tid_get - Return tid info from the rx mpdu start |
| 3307 | * info details |
| 3308 | * |
| 3309 | * @ buf - Pointer to buffer containing rx pkt tlvs. |
| 3310 | * |
| 3311 | * |
| 3312 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3313 | static inline uint32_t hal_rx_mpdu_start_tid_get(hal_soc_handle_t hal_soc_hdl, |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3314 | uint8_t *buf) |
| 3315 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3316 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 3317 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3318 | return hal_soc->ops->hal_rx_mpdu_start_tid_get(buf); |
| 3319 | } |
| 3320 | |
| 3321 | /* |
| 3322 | * hal_rx_msdu_start_reception_type_get(): API to get the reception type |
| 3323 | * Interval from rx_msdu_start |
| 3324 | * |
| 3325 | * @buf: pointer to the start of RX PKT TLV header |
| 3326 | * Return: uint32_t(reception_type) |
| 3327 | */ |
| 3328 | static inline |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3329 | uint32_t hal_rx_msdu_start_reception_type_get(hal_soc_handle_t hal_soc_hdl, |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3330 | uint8_t *buf) |
| 3331 | { |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3332 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
| 3333 | |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3334 | return hal_soc->ops->hal_rx_msdu_start_reception_type_get(buf); |
| 3335 | } |
| 3336 | |
| 3337 | /** |
| 3338 | * hal_rx_dump_pkt_tlvs: API to print all member elements of |
| 3339 | * RX TLVs |
| 3340 | * @ buf: pointer the pkt buffer. |
| 3341 | * @ dbg_level: log level. |
| 3342 | * |
| 3343 | * Return: void |
| 3344 | */ |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3345 | static inline void hal_rx_dump_pkt_tlvs(hal_soc_handle_t hal_soc_hdl, |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3346 | uint8_t *buf, uint8_t dbg_level) |
| 3347 | { |
| 3348 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3349 | struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn; |
| 3350 | struct rx_mpdu_start *mpdu_start = |
| 3351 | &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start; |
| 3352 | struct rx_msdu_start *msdu_start = |
| 3353 | &pkt_tlvs->msdu_start_tlv.rx_msdu_start; |
| 3354 | struct rx_mpdu_end *mpdu_end = &pkt_tlvs->mpdu_end_tlv.rx_mpdu_end; |
| 3355 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
Akshay Kosigi | 6a20675 | 2019-06-10 23:14:52 +0530 | [diff] [blame] | 3356 | struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3357 | |
| 3358 | hal_rx_dump_rx_attention_tlv(rx_attn, dbg_level); |
Balamurugan Mahalingam | 764219e | 2018-09-17 15:34:25 +0530 | [diff] [blame] | 3359 | hal_rx_dump_mpdu_start_tlv(mpdu_start, dbg_level, hal_soc); |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3360 | hal_rx_dump_msdu_start_tlv(hal_soc, msdu_start, dbg_level); |
| 3361 | hal_rx_dump_mpdu_end_tlv(mpdu_end, dbg_level); |
Balamurugan Mahalingam | 97ad106 | 2018-07-11 15:22:58 +0530 | [diff] [blame] | 3362 | hal_rx_dump_msdu_end_tlv(hal_soc, msdu_end, dbg_level); |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 3363 | hal_rx_dump_pkt_hdr_tlv(pkt_tlvs, dbg_level); |
Balamurugan Mahalingam | d015964 | 2018-07-11 15:02:29 +0530 | [diff] [blame] | 3364 | } |
| 3365 | |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 3366 | |
| 3367 | /** |
| 3368 | * hal_reo_status_get_header_generic - Process reo desc info |
| 3369 | * @d - Pointer to reo descriptior |
| 3370 | * @b - tlv type info |
| 3371 | * @h - Pointer to hal_reo_status_header where info to be stored |
| 3372 | * @hal- pointer to hal_soc structure |
| 3373 | * Return - none. |
| 3374 | * |
| 3375 | */ |
Akshay Kosigi | 8eda31c | 2019-07-10 14:42:42 +0530 | [diff] [blame] | 3376 | static inline |
| 3377 | void hal_reo_status_get_header(uint32_t *d, int b, |
| 3378 | void *h, struct hal_soc *hal_soc) |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 3379 | { |
Balamurugan Mahalingam | 5d80641 | 2018-07-30 18:04:15 +0530 | [diff] [blame] | 3380 | hal_soc->ops->hal_reo_status_get_header(d, b, h); |
| 3381 | } |
| 3382 | |
Shashikala Prabhu | e11412d | 2019-03-08 11:37:15 +0530 | [diff] [blame] | 3383 | static inline |
| 3384 | uint32_t hal_rx_desc_is_first_msdu(void *hw_desc_addr) |
| 3385 | { |
| 3386 | struct rx_pkt_tlvs *rx_tlvs = (struct rx_pkt_tlvs *)hw_desc_addr; |
| 3387 | struct rx_msdu_end *msdu_end = &rx_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3388 | |
| 3389 | return HAL_RX_GET(msdu_end, RX_MSDU_END_5, FIRST_MSDU); |
| 3390 | } |
| 3391 | |
| 3392 | static inline |
| 3393 | uint32_t |
| 3394 | HAL_RX_DESC_GET_DECAP_FORMAT(void *hw_desc_addr) { |
| 3395 | struct rx_msdu_start *rx_msdu_start; |
| 3396 | struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; |
| 3397 | |
| 3398 | rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start; |
| 3399 | |
| 3400 | return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT); |
| 3401 | } |
| 3402 | |
| 3403 | #ifdef NO_RX_PKT_HDR_TLV |
| 3404 | static inline |
| 3405 | uint8_t * |
| 3406 | HAL_RX_DESC_GET_80211_HDR(void *hw_desc_addr) { |
| 3407 | QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG, |
| 3408 | "[%s][%d] decap format not raw", __func__, __LINE__); |
| 3409 | QDF_ASSERT(0); |
| 3410 | return 0; |
| 3411 | } |
| 3412 | #else |
| 3413 | static inline |
| 3414 | uint8_t * |
| 3415 | HAL_RX_DESC_GET_80211_HDR(void *hw_desc_addr) { |
| 3416 | uint8_t *rx_pkt_hdr; |
| 3417 | struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr; |
| 3418 | |
| 3419 | rx_pkt_hdr = &rx_desc->pkt_hdr_tlv.rx_pkt_hdr[0]; |
| 3420 | |
| 3421 | return rx_pkt_hdr; |
| 3422 | } |
| 3423 | #endif |
| 3424 | |
| 3425 | #ifdef NO_RX_PKT_HDR_TLV |
| 3426 | static inline |
| 3427 | bool HAL_IS_DECAP_FORMAT_RAW(uint8_t *rx_tlv_hdr) |
| 3428 | { |
| 3429 | uint8_t decap_format; |
| 3430 | |
| 3431 | if (hal_rx_desc_is_first_msdu(rx_tlv_hdr)) { |
| 3432 | decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_tlv_hdr); |
| 3433 | if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) |
| 3434 | return true; |
| 3435 | } |
| 3436 | |
| 3437 | return false; |
| 3438 | } |
| 3439 | #else |
| 3440 | static inline |
| 3441 | bool HAL_IS_DECAP_FORMAT_RAW(uint8_t *rx_tlv_hdr) |
| 3442 | { |
| 3443 | return true; |
| 3444 | } |
| 3445 | #endif |
Sumeet Rao | c4fa4df | 2019-07-05 02:11:19 -0700 | [diff] [blame] | 3446 | |
| 3447 | #define HAL_RX_MSDU_END_FSE_METADATA_GET(_rx_msdu_end) \ |
| 3448 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 3449 | RX_MSDU_END_15_FSE_METADATA_OFFSET)), \ |
| 3450 | RX_MSDU_END_15_FSE_METADATA_MASK, \ |
| 3451 | RX_MSDU_END_15_FSE_METADATA_LSB)) |
| 3452 | |
| 3453 | /** |
| 3454 | * hal_rx_msdu_fse_metadata_get: API to get FSE metadata |
| 3455 | * from rx_msdu_end TLV |
| 3456 | * @buf: pointer to the start of RX PKT TLV headers |
| 3457 | * |
| 3458 | * Return: fse metadata value from MSDU END TLV |
| 3459 | */ |
| 3460 | static inline uint32_t hal_rx_msdu_fse_metadata_get(uint8_t *buf) |
| 3461 | { |
| 3462 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3463 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3464 | uint32_t fse_metadata; |
| 3465 | |
| 3466 | fse_metadata = HAL_RX_MSDU_END_FSE_METADATA_GET(msdu_end); |
| 3467 | return fse_metadata; |
| 3468 | } |
| 3469 | |
| 3470 | #define HAL_RX_MSDU_END_FLOW_IDX_GET(_rx_msdu_end) \ |
| 3471 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 3472 | RX_MSDU_END_14_FLOW_IDX_OFFSET)), \ |
| 3473 | RX_MSDU_END_14_FLOW_IDX_MASK, \ |
| 3474 | RX_MSDU_END_14_FLOW_IDX_LSB)) |
| 3475 | |
| 3476 | /** |
| 3477 | * hal_rx_msdu_flow_idx_get: API to get flow index |
| 3478 | * from rx_msdu_end TLV |
| 3479 | * @buf: pointer to the start of RX PKT TLV headers |
| 3480 | * |
| 3481 | * Return: flow index value from MSDU END TLV |
| 3482 | */ |
| 3483 | static inline uint32_t hal_rx_msdu_flow_idx_get(uint8_t *buf) |
| 3484 | { |
| 3485 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3486 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3487 | uint32_t flow_idx; |
| 3488 | |
| 3489 | flow_idx = HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end); |
| 3490 | return flow_idx; |
| 3491 | } |
| 3492 | |
| 3493 | #define HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(_rx_msdu_end) \ |
| 3494 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 3495 | RX_MSDU_END_5_FLOW_IDX_TIMEOUT_OFFSET)), \ |
| 3496 | RX_MSDU_END_5_FLOW_IDX_TIMEOUT_MASK, \ |
| 3497 | RX_MSDU_END_5_FLOW_IDX_TIMEOUT_LSB)) |
| 3498 | |
| 3499 | /** |
| 3500 | * hal_rx_msdu_flow_idx_timeout: API to get flow index timeout |
| 3501 | * from rx_msdu_end TLV |
| 3502 | * @buf: pointer to the start of RX PKT TLV headers |
| 3503 | * |
| 3504 | * Return: flow index timeout value from MSDU END TLV |
| 3505 | */ |
| 3506 | static inline bool hal_rx_msdu_flow_idx_timeout(uint8_t *buf) |
| 3507 | { |
| 3508 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3509 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3510 | bool timeout; |
| 3511 | |
| 3512 | timeout = HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(msdu_end); |
| 3513 | return timeout; |
| 3514 | } |
| 3515 | |
| 3516 | #define HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(_rx_msdu_end) \ |
| 3517 | (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \ |
| 3518 | RX_MSDU_END_5_FLOW_IDX_INVALID_OFFSET)), \ |
| 3519 | RX_MSDU_END_5_FLOW_IDX_INVALID_MASK, \ |
| 3520 | RX_MSDU_END_5_FLOW_IDX_INVALID_LSB)) |
| 3521 | /** |
| 3522 | * hal_rx_msdu_flow_idx_invalid: API to get flow index invalid |
| 3523 | * from rx_msdu_end TLV |
| 3524 | * @buf: pointer to the start of RX PKT TLV headers |
| 3525 | * |
| 3526 | * Return: flow index invalid value from MSDU END TLV |
| 3527 | */ |
| 3528 | static inline bool hal_rx_msdu_flow_idx_invalid(uint8_t *buf) |
| 3529 | { |
| 3530 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3531 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3532 | bool invalid; |
| 3533 | |
| 3534 | invalid = HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end); |
| 3535 | return invalid; |
| 3536 | } |
| 3537 | |
| 3538 | /** |
| 3539 | * hal_rx_msdu_get_flow_params: API to get flow index, flow index invalid |
| 3540 | * and flow index timeout from rx_msdu_end TLV |
| 3541 | * @buf: pointer to the start of RX PKT TLV headers |
| 3542 | * @flow_invalid: pointer to return value of flow_idx_valid |
| 3543 | * @flow_timeout: pointer to return value of flow_idx_timeout |
| 3544 | * @flow_index: pointer to return value of flow_idx |
| 3545 | * |
| 3546 | * Return: none |
| 3547 | */ |
| 3548 | static inline void hal_rx_msdu_get_flow_params(uint8_t *buf, |
| 3549 | bool *flow_invalid, |
| 3550 | bool *flow_timeout, |
| 3551 | uint32_t *flow_index) |
| 3552 | { |
| 3553 | struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; |
| 3554 | struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end; |
| 3555 | |
| 3556 | *flow_invalid = HAL_RX_MSDU_END_FLOW_IDX_INVALID_GET(msdu_end); |
| 3557 | *flow_timeout = HAL_RX_MSDU_END_FLOW_IDX_TIMEOUT_GET(msdu_end); |
| 3558 | *flow_index = HAL_RX_MSDU_END_FLOW_IDX_GET(msdu_end); |
| 3559 | } |
Debashis Dutt | f89574a | 2016-10-04 13:36:59 -0700 | [diff] [blame] | 3560 | #endif /* _HAL_RX_H */ |