Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 2 | * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 4 | * Permission to use, copy, modify, and/or distribute this software for |
| 5 | * any purpose with or without fee is hereby granted, provided that the |
| 6 | * above copyright notice and this permission notice appear in all |
| 7 | * copies. |
| 8 | * |
| 9 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 10 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 11 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 12 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 13 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 14 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 15 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 16 | * PERFORMANCE OF THIS SOFTWARE. |
| 17 | */ |
| 18 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 19 | #ifndef __CE_H__ |
| 20 | #define __CE_H__ |
| 21 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 22 | #include "qdf_atomic.h" |
| 23 | #include "qdf_lock.h" |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 24 | #include "hif_main.h" |
Nirav Shah | b70bd73 | 2016-05-25 14:31:51 +0530 | [diff] [blame] | 25 | #include "qdf_util.h" |
Houston Hoffman | def86a3 | 2017-04-21 20:23:45 -0700 | [diff] [blame] | 26 | #include "hif_exec.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 27 | |
Aditya Sathish | 80bbaef | 2018-10-25 10:02:05 +0530 | [diff] [blame] | 28 | #ifndef DATA_CE_SW_INDEX_NO_INLINE_UPDATE |
| 29 | #define DATA_CE_UPDATE_SWINDEX(x, scn, addr) \ |
| 30 | (x = CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, addr)) |
| 31 | #else |
| 32 | #define DATA_CE_UPDATE_SWINDEX(x, scn, addr) |
| 33 | #endif |
| 34 | |
| 35 | /* |
| 36 | * Number of times to check for any pending tx/rx completion on |
| 37 | * a copy engine, this count should be big enough. Once we hit |
| 38 | * this threashold we'll not check for any Tx/Rx comlpetion in same |
| 39 | * interrupt handling. Note that this threashold is only used for |
| 40 | * Rx interrupt processing, this can be used tor Tx as well if we |
| 41 | * suspect any infinite loop in checking for pending Tx completion. |
| 42 | */ |
| 43 | #define CE_TXRX_COMP_CHECK_THRESHOLD 20 |
| 44 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 45 | #define CE_HTT_T2H_MSG 1 |
| 46 | #define CE_HTT_H2T_MSG 4 |
| 47 | |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 48 | #define CE_OFFSET 0x00000400 |
| 49 | #define CE_USEFUL_SIZE 0x00000058 |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 50 | #define CE_ALL_BITMAP 0xFFFF |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 51 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 52 | /** |
| 53 | * enum ce_id_type |
| 54 | * |
| 55 | * @ce_id_type: Copy engine ID |
| 56 | */ |
| 57 | enum ce_id_type { |
| 58 | CE_ID_0, |
| 59 | CE_ID_1, |
| 60 | CE_ID_2, |
| 61 | CE_ID_3, |
| 62 | CE_ID_4, |
| 63 | CE_ID_5, |
| 64 | CE_ID_6, |
| 65 | CE_ID_7, |
| 66 | CE_ID_8, |
| 67 | CE_ID_9, |
| 68 | CE_ID_10, |
| 69 | CE_ID_11, |
| 70 | CE_ID_MAX |
| 71 | }; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 72 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 73 | enum ce_target_type { |
| 74 | CE_SVC_LEGACY, |
| 75 | CE_SVC_SRNG, |
| 76 | CE_MAX_TARGET_TYPE |
| 77 | }; |
| 78 | |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 79 | #ifdef CONFIG_WIN |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 80 | #define QWLAN_VERSIONSTR "WIN" |
| 81 | #endif |
| 82 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 83 | enum ol_ath_hif_pkt_ecodes { |
| 84 | HIF_PIPE_NO_RESOURCE = 0 |
| 85 | }; |
| 86 | |
| 87 | struct HIF_CE_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 88 | |
| 89 | /* Per-pipe state. */ |
| 90 | struct HIF_CE_pipe_info { |
| 91 | /* Handle of underlying Copy Engine */ |
| 92 | struct CE_handle *ce_hdl; |
| 93 | |
| 94 | /* Our pipe number; facilitiates use of pipe_info ptrs. */ |
| 95 | uint8_t pipe_num; |
| 96 | |
| 97 | /* Convenience back pointer to HIF_CE_state. */ |
| 98 | struct HIF_CE_state *HIF_CE_state; |
| 99 | |
| 100 | /* Instantaneous number of receive buffers that should be posted */ |
| 101 | atomic_t recv_bufs_needed; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 102 | qdf_size_t buf_sz; |
| 103 | qdf_spinlock_t recv_bufs_needed_lock; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 104 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 105 | qdf_spinlock_t completion_freeq_lock; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 106 | /* Limit the number of outstanding send requests. */ |
| 107 | int num_sends_allowed; |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 108 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 109 | /* adding three counts for debugging ring buffer errors */ |
| 110 | uint32_t nbuf_alloc_err_count; |
| 111 | uint32_t nbuf_dma_err_count; |
| 112 | uint32_t nbuf_ce_enqueue_err_count; |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 113 | struct hif_msg_callbacks pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | /** |
| 117 | * struct ce_tasklet_entry |
| 118 | * |
| 119 | * @intr_tq: intr_tq |
| 120 | * @ce_id: ce_id |
| 121 | * @inited: inited |
| 122 | * @hif_ce_state: hif_ce_state |
| 123 | * @from_irq: from_irq |
| 124 | */ |
| 125 | struct ce_tasklet_entry { |
| 126 | struct tasklet_struct intr_tq; |
| 127 | enum ce_id_type ce_id; |
| 128 | bool inited; |
| 129 | void *hif_ce_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 130 | }; |
| 131 | |
Houston Hoffman | def86a3 | 2017-04-21 20:23:45 -0700 | [diff] [blame] | 132 | static inline bool hif_dummy_grp_done(struct hif_exec_context *grp_entry, int |
| 133 | work_done) |
| 134 | { |
| 135 | return true; |
| 136 | } |
| 137 | |
| 138 | extern struct hif_execution_ops tasklet_sched_ops; |
| 139 | extern struct hif_execution_ops napi_sched_ops; |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame] | 140 | |
Mohit Khanna | 518eb50 | 2016-10-06 19:58:02 -0700 | [diff] [blame] | 141 | struct ce_stats { |
Nirav Shah | b70bd73 | 2016-05-25 14:31:51 +0530 | [diff] [blame] | 142 | uint32_t ce_per_cpu[CE_COUNT_MAX][QDF_MAX_AVAILABLE_CPU]; |
| 143 | }; |
| 144 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 145 | struct HIF_CE_state { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 146 | struct hif_softc ol_sc; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 147 | bool started; |
| 148 | struct ce_tasklet_entry tasklets[CE_COUNT_MAX]; |
Houston Hoffman | def86a3 | 2017-04-21 20:23:45 -0700 | [diff] [blame] | 149 | struct hif_exec_context *hif_ext_group[HIF_MAX_GROUP]; |
Venkateswara Swamy Bandaru | 31108f3 | 2016-08-08 18:04:29 +0530 | [diff] [blame] | 150 | uint32_t hif_num_extgroup; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 151 | qdf_spinlock_t keep_awake_lock; |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 152 | qdf_spinlock_t irq_reg_lock; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 153 | unsigned int keep_awake_count; |
| 154 | bool verified_awake; |
| 155 | bool fake_sleep; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 156 | qdf_timer_t sleep_timer; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 157 | bool sleep_timer_init; |
Houston Hoffman | 2bfb82f | 2016-04-29 16:09:04 -0700 | [diff] [blame] | 158 | qdf_time_t sleep_ticks; |
Kiran Venkatappa | a17e5e5 | 2016-12-20 11:32:06 +0530 | [diff] [blame] | 159 | uint32_t ce_register_irq_done; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 160 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 161 | struct CE_pipe_config *target_ce_config; |
| 162 | struct CE_attr *host_ce_config; |
| 163 | uint32_t target_ce_config_sz; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 164 | /* Per-pipe state. */ |
| 165 | struct HIF_CE_pipe_info pipe_info[CE_COUNT_MAX]; |
| 166 | /* to be activated after BMI_DONE */ |
| 167 | struct hif_msg_callbacks msg_callbacks_pending; |
| 168 | /* current msg callbacks in use */ |
| 169 | struct hif_msg_callbacks msg_callbacks_current; |
| 170 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 171 | /* Target address used to signal a pending firmware event */ |
| 172 | uint32_t fw_indicator_address; |
| 173 | |
| 174 | /* Copy Engine used for Diagnostic Accesses */ |
| 175 | struct CE_handle *ce_diag; |
Mohit Khanna | 518eb50 | 2016-10-06 19:58:02 -0700 | [diff] [blame] | 176 | struct ce_stats stats; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 177 | struct ce_ops *ce_services; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 178 | }; |
Govind Singh | 8f7a1ff | 2016-05-06 16:35:12 +0530 | [diff] [blame] | 179 | |
| 180 | /* |
| 181 | * HIA Map Definition |
| 182 | */ |
| 183 | struct host_interest_area_t { |
| 184 | uint32_t hi_interconnect_state; |
| 185 | uint32_t hi_early_alloc; |
| 186 | uint32_t hi_option_flag2; |
| 187 | uint32_t hi_board_data; |
| 188 | uint32_t hi_board_data_initialized; |
| 189 | uint32_t hi_failure_state; |
| 190 | uint32_t hi_rddi_msi_num; |
| 191 | uint32_t hi_pcie_perst_couple_en; |
| 192 | uint32_t hi_sw_protocol_version; |
| 193 | }; |
| 194 | |
| 195 | struct shadow_reg_cfg { |
| 196 | uint16_t ce_id; |
| 197 | uint16_t reg_offset; |
| 198 | }; |
| 199 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 200 | struct shadow_reg_v2_cfg { |
| 201 | uint32_t reg_value; |
| 202 | }; |
| 203 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 204 | void hif_ce_stop(struct hif_softc *scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 205 | int hif_dump_ce_registers(struct hif_softc *scn); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 206 | void |
| 207 | hif_ce_dump_target_memory(struct hif_softc *scn, void *ramdump_base, |
| 208 | uint32_t address, uint32_t size); |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 209 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 210 | #ifdef IPA_OFFLOAD |
| 211 | void hif_ce_ipa_get_ce_resource(struct hif_softc *scn, |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 212 | qdf_shared_mem_t **ce_sr, |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 213 | uint32_t *ce_sr_ring_size, |
| 214 | qdf_dma_addr_t *ce_reg_paddr); |
| 215 | #else |
| 216 | static inline |
| 217 | void hif_ce_ipa_get_ce_resource(struct hif_softc *scn, |
Sravan Kumar Kairam | 58e0adf | 2018-02-27 18:37:40 +0530 | [diff] [blame] | 218 | qdf_shared_mem_t **ce_sr, |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 219 | uint32_t *ce_sr_ring_size, |
| 220 | qdf_dma_addr_t *ce_reg_paddr) |
| 221 | { |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 222 | } |
| 223 | |
| 224 | #endif |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 225 | int hif_wlan_enable(struct hif_softc *scn); |
Nandha Kishore Easwaran | 7cdaae2 | 2018-07-30 15:02:51 +0530 | [diff] [blame] | 226 | void ce_enable_polling(void *cestate); |
| 227 | void ce_disable_polling(void *cestate); |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 228 | void hif_wlan_disable(struct hif_softc *scn); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 229 | void hif_get_target_ce_config(struct hif_softc *scn, |
| 230 | struct CE_pipe_config **target_ce_config_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 231 | uint32_t *target_ce_config_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 232 | struct service_to_pipe **target_service_to_ce_map_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 233 | uint32_t *target_service_to_ce_map_sz_ret, |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 234 | struct shadow_reg_cfg **target_shadow_reg_cfg_v1_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 235 | uint32_t *shadow_cfg_v1_sz_ret); |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 236 | |
Nirav Shah | 0d0cce8 | 2018-01-17 17:00:31 +0530 | [diff] [blame] | 237 | #ifdef WLAN_FEATURE_EPPING |
| 238 | void hif_ce_prepare_epping_config(struct HIF_CE_state *hif_state); |
| 239 | void hif_select_epping_service_to_pipe_map(struct service_to_pipe |
| 240 | **tgt_svc_map_to_use, |
| 241 | uint32_t *sz_tgt_svc_map_to_use); |
| 242 | |
| 243 | #else |
| 244 | static inline |
| 245 | void hif_ce_prepare_epping_config(struct HIF_CE_state *hif_state) |
| 246 | { } |
| 247 | static inline |
| 248 | void hif_select_epping_service_to_pipe_map(struct service_to_pipe |
| 249 | **tgt_svc_map_to_use, |
| 250 | uint32_t *sz_tgt_svc_map_to_use) |
| 251 | { } |
| 252 | #endif |
| 253 | |
Sathish Kumar | 8687649 | 2018-08-27 13:39:20 +0530 | [diff] [blame] | 254 | void ce_service_register_module(enum ce_target_type target_type, |
| 255 | struct ce_ops* (*ce_attach)(void)); |
| 256 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 257 | #endif /* __CE_H__ */ |