Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
Houston Hoffman | ebc6814 | 2016-01-18 15:38:27 -0800 | [diff] [blame] | 2 | * Copyright (c) 2013-2016 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
| 27 | |
| 28 | #ifndef _HIF_H_ |
| 29 | #define _HIF_H_ |
| 30 | |
| 31 | #ifdef __cplusplus |
| 32 | extern "C" { |
| 33 | #endif /* __cplusplus */ |
| 34 | |
| 35 | /* Header files */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 36 | #include <qdf_status.h> |
| 37 | #include "qdf_nbuf.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 38 | #include "ol_if_athvar.h" |
| 39 | #include <linux/platform_device.h> |
| 40 | #ifdef HIF_PCI |
| 41 | #include <linux/pci.h> |
| 42 | #endif /* HIF_PCI */ |
| 43 | |
| 44 | #define ENABLE_MBOX_DUMMY_SPACE_FEATURE 1 |
| 45 | |
| 46 | typedef struct htc_callbacks HTC_CALLBACKS; |
| 47 | typedef void __iomem *A_target_id_t; |
| 48 | |
| 49 | #define HIF_TYPE_AR6002 2 |
| 50 | #define HIF_TYPE_AR6003 3 |
| 51 | #define HIF_TYPE_AR6004 5 |
| 52 | #define HIF_TYPE_AR9888 6 |
| 53 | #define HIF_TYPE_AR6320 7 |
| 54 | #define HIF_TYPE_AR6320V2 8 |
| 55 | /* For attaching Peregrine 2.0 board host_reg_tbl only */ |
| 56 | #define HIF_TYPE_AR9888V2 8 |
| 57 | #define HIF_TYPE_QCA6180 9 |
| 58 | #define HIF_TYPE_ADRASTEA 10 |
| 59 | |
| 60 | #define TARGET_TYPE_UNKNOWN 0 |
| 61 | #define TARGET_TYPE_AR6001 1 |
| 62 | #define TARGET_TYPE_AR6002 2 |
| 63 | #define TARGET_TYPE_AR6003 3 |
| 64 | #define TARGET_TYPE_AR6004 5 |
| 65 | #define TARGET_TYPE_AR6006 6 |
| 66 | #define TARGET_TYPE_AR9888 7 |
| 67 | #define TARGET_TYPE_AR6320 8 |
| 68 | #define TARGET_TYPE_AR900B 9 |
| 69 | /* For attach Peregrine 2.0 board target_reg_tbl only */ |
| 70 | #define TARGET_TYPE_AR9888V2 10 |
| 71 | /* For attach Rome1.0 target_reg_tbl only*/ |
| 72 | #define TARGET_TYPE_AR6320V1 11 |
| 73 | /* For Rome2.0/2.1 target_reg_tbl ID*/ |
| 74 | #define TARGET_TYPE_AR6320V2 12 |
| 75 | /* For Rome3.0 target_reg_tbl ID*/ |
| 76 | #define TARGET_TYPE_AR6320V3 13 |
| 77 | /* For Tufello1.0 target_reg_tbl ID*/ |
| 78 | #define TARGET_TYPE_QCA9377V1 14 |
| 79 | /* For QCA6180 target */ |
| 80 | #define TARGET_TYPE_QCA6180 15 |
| 81 | /* For Adrastea target */ |
| 82 | #define TARGET_TYPE_ADRASTEA 16 |
| 83 | |
| 84 | struct CE_state; |
Sanjay Devnani | 9ce1577 | 2015-11-12 14:08:57 -0800 | [diff] [blame] | 85 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 86 | #define CE_COUNT_MAX 12 |
| 87 | #else |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 88 | #define CE_COUNT_MAX 8 |
Sanjay Devnani | 9ce1577 | 2015-11-12 14:08:57 -0800 | [diff] [blame] | 89 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 90 | |
| 91 | /* These numbers are selected so that the product is close to current |
| 92 | higher limit of packets HIF services at one shot (1000) */ |
| 93 | #define QCA_NAPI_BUDGET 64 |
| 94 | #define QCA_NAPI_DEF_SCALE 16 |
| 95 | /* NOTE: This is to adapt non-NAPI solution to use |
| 96 | the same "budget" as NAPI. Will be removed |
| 97 | `once decision about NAPI is made */ |
| 98 | #define HIF_NAPI_MAX_RECEIVES (QCA_NAPI_BUDGET * QCA_NAPI_DEF_SCALE) |
| 99 | |
| 100 | /* NOTE: "napi->scale" can be changed, |
| 101 | but this does not change the number of buckets */ |
| 102 | #define QCA_NAPI_NUM_BUCKETS (QCA_NAPI_BUDGET / QCA_NAPI_DEF_SCALE) |
| 103 | struct qca_napi_stat { |
| 104 | uint32_t napi_schedules; |
| 105 | uint32_t napi_polls; |
| 106 | uint32_t napi_completes; |
| 107 | uint32_t napi_workdone; |
| 108 | uint32_t napi_budget_uses[QCA_NAPI_NUM_BUCKETS]; |
| 109 | }; |
| 110 | |
| 111 | /** |
| 112 | * per NAPI instance data structure |
| 113 | * This data structure holds stuff per NAPI instance. |
| 114 | * Note that, in the current implementation, though scale is |
| 115 | * an instance variable, it is set to the same value for all |
| 116 | * instances. |
| 117 | */ |
| 118 | struct qca_napi_info { |
| 119 | struct napi_struct napi; /* one NAPI Instance per CE in phase I */ |
| 120 | uint8_t scale; /* currently same on all instances */ |
| 121 | uint8_t id; |
| 122 | struct qca_napi_stat stats[NR_CPUS]; |
| 123 | }; |
| 124 | |
| 125 | /** |
| 126 | * NAPI data-sructure common to all NAPI instances. |
| 127 | * |
| 128 | * A variable of this type will be stored in hif module context. |
| 129 | */ |
| 130 | |
| 131 | struct qca_napi_data { |
| 132 | /* NOTE: make sure the mutex is inited only at the very beginning |
| 133 | once for the lifetime of the driver. For now, granularity of one |
| 134 | is OK, but we might want to have a better granularity later */ |
| 135 | struct mutex mutex; |
| 136 | uint32_t state; |
| 137 | uint32_t ce_map; /* bitmap of created/registered NAPI |
| 138 | instances, indexed by pipe_id, |
| 139 | not used by clients (clients use an |
| 140 | id returned by create) */ |
| 141 | struct net_device netdev; /* dummy net_dev */ |
| 142 | struct qca_napi_info napis[CE_COUNT_MAX]; |
| 143 | }; |
| 144 | |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 145 | /** |
Komal Seelam | a5911d3 | 2016-02-24 19:21:59 +0530 | [diff] [blame] | 146 | * struct hif_config_info - Place Holder for hif confiruation |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 147 | * @enable_self_recovery: Self Recovery |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 148 | * |
Komal Seelam | a5911d3 | 2016-02-24 19:21:59 +0530 | [diff] [blame] | 149 | * Structure for holding hif ini parameters. |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 150 | */ |
| 151 | struct hif_config_info { |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 152 | bool enable_self_recovery; |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 153 | }; |
| 154 | |
| 155 | /** |
| 156 | * struct hif_target_info - Target Information |
| 157 | * @target_version: Target Version |
| 158 | * @target_type: Target Type |
| 159 | * @target_revision: Target Revision |
| 160 | * @soc_version: SOC Version |
| 161 | * |
| 162 | * Structure to hold target information. |
| 163 | */ |
| 164 | struct hif_target_info { |
| 165 | uint32_t target_version; |
| 166 | uint32_t target_type; |
| 167 | uint32_t target_revision; |
| 168 | uint32_t soc_version; |
| 169 | }; |
| 170 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 171 | struct hif_opaque_softc { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 172 | }; |
| 173 | |
| 174 | typedef enum { |
| 175 | HIF_DEVICE_POWER_UP, /* HIF layer should power up interface |
| 176 | * and/or module */ |
| 177 | HIF_DEVICE_POWER_DOWN, /* HIF layer should initiate bus-specific |
| 178 | * measures to minimize power */ |
| 179 | HIF_DEVICE_POWER_CUT /* HIF layer should initiate bus-specific |
| 180 | * AND/OR platform-specific measures |
| 181 | * to completely power-off the module and |
| 182 | * associated hardware (i.e. cut power |
| 183 | * supplies) */ |
| 184 | } HIF_DEVICE_POWER_CHANGE_TYPE; |
| 185 | |
| 186 | /** |
| 187 | * enum hif_enable_type: what triggered the enabling of hif |
| 188 | * |
| 189 | * @HIF_ENABLE_TYPE_PROBE: probe triggered enable |
| 190 | * @HIF_ENABLE_TYPE_REINIT: reinit triggered enable |
| 191 | */ |
| 192 | enum hif_enable_type { |
| 193 | HIF_ENABLE_TYPE_PROBE, |
| 194 | HIF_ENABLE_TYPE_REINIT, |
| 195 | HIF_ENABLE_TYPE_MAX |
| 196 | }; |
| 197 | |
| 198 | /** |
| 199 | * enum hif_disable_type: what triggered the disabling of hif |
| 200 | * |
| 201 | * @HIF_DISABLE_TYPE_PROBE_ERROR: probe error triggered disable |
| 202 | * @HIF_DISABLE_TYPE_REINIT_ERROR: reinit error triggered |
| 203 | * disable |
| 204 | * @HIF_DISABLE_TYPE_REMOVE: remove triggered disable |
| 205 | * @HIF_DISABLE_TYPE_SHUTDOWN: shutdown triggered disable |
| 206 | */ |
| 207 | enum hif_disable_type { |
| 208 | HIF_DISABLE_TYPE_PROBE_ERROR, |
| 209 | HIF_DISABLE_TYPE_REINIT_ERROR, |
| 210 | HIF_DISABLE_TYPE_REMOVE, |
| 211 | HIF_DISABLE_TYPE_SHUTDOWN, |
| 212 | HIF_DISABLE_TYPE_MAX |
| 213 | }; |
| 214 | |
| 215 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 216 | typedef struct _HID_ACCESS_LOG { |
| 217 | uint32_t seqnum; |
| 218 | bool is_write; |
| 219 | void *addr; |
| 220 | uint32_t value; |
| 221 | } HIF_ACCESS_LOG; |
| 222 | #endif |
| 223 | |
| 224 | #define HIF_MAX_DEVICES 1 |
| 225 | |
| 226 | struct htc_callbacks { |
| 227 | void *context; /* context to pass to the dsrhandler |
| 228 | * note : rwCompletionHandler is provided |
| 229 | * the context passed to hif_read_write */ |
| 230 | int (*rwCompletionHandler)(void *rwContext, int status); |
| 231 | int (*dsrHandler)(void *context); |
| 232 | }; |
| 233 | |
Komal Seelam | 7508012 | 2016-03-02 15:18:25 +0530 | [diff] [blame^] | 234 | /** |
| 235 | * struct hif_driver_state_callbacks - Callbacks for HIF to query Driver state |
| 236 | * @context: Private data context |
| 237 | * @set_recovery_in_progress: To Set Driver state for recovery in progress |
| 238 | * @is_recovery_in_progress: Query if driver state is recovery in progress |
| 239 | * @is_load_unload_in_progress: Query if driver state Load/Unload in Progress |
| 240 | * @is_driver_unloading: Query if driver is unloading. |
| 241 | * |
| 242 | * This Structure provides callback pointer for HIF to query hdd for driver |
| 243 | * states. |
| 244 | */ |
| 245 | struct hif_driver_state_callbacks { |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 246 | void *context; |
| 247 | void (*set_recovery_in_progress)(void *context, uint8_t val); |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 248 | bool (*is_recovery_in_progress)(void *context); |
| 249 | bool (*is_load_unload_in_progress)(void *context); |
| 250 | bool (*is_driver_unloading)(void *context); |
| 251 | }; |
| 252 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 253 | /* This API detaches the HTC layer from the HIF device */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 254 | void hif_detach_htc(struct hif_opaque_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 255 | |
| 256 | /****************************************************************/ |
| 257 | /* BMI and Diag window abstraction */ |
| 258 | /****************************************************************/ |
| 259 | |
| 260 | #define HIF_BMI_EXCHANGE_NO_TIMEOUT ((uint32_t)(0)) |
| 261 | |
| 262 | #define DIAG_TRANSFER_LIMIT 2048U /* maximum number of bytes that can be |
| 263 | * handled atomically by |
| 264 | * DiagRead/DiagWrite */ |
| 265 | |
| 266 | /* |
| 267 | * API to handle HIF-specific BMI message exchanges, this API is synchronous |
| 268 | * and only allowed to be called from a context that can block (sleep) */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 269 | QDF_STATUS hif_exchange_bmi_msg(struct hif_opaque_softc *scn, |
| 270 | qdf_dma_addr_t cmd, qdf_dma_addr_t rsp, |
Komal Seelam | 2a5fa63 | 2016-02-15 10:33:44 +0530 | [diff] [blame] | 271 | uint8_t *pSendMessage, uint32_t Length, |
| 272 | uint8_t *pResponseMessage, |
| 273 | uint32_t *pResponseLength, uint32_t TimeoutMS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 274 | |
| 275 | /* |
| 276 | * APIs to handle HIF specific diagnostic read accesses. These APIs are |
| 277 | * synchronous and only allowed to be called from a context that |
| 278 | * can block (sleep). They are not high performance APIs. |
| 279 | * |
| 280 | * hif_diag_read_access reads a 4 Byte aligned/length value from a |
| 281 | * Target register or memory word. |
| 282 | * |
| 283 | * hif_diag_read_mem reads an arbitrary length of arbitrarily aligned memory. |
| 284 | */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 285 | QDF_STATUS hif_diag_read_access(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 286 | uint32_t *data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 287 | QDF_STATUS hif_diag_read_mem(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 288 | uint8_t *data, int nbytes); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 289 | void hif_dump_target_memory(struct hif_opaque_softc *scn, void *ramdump_base, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 290 | uint32_t address, uint32_t size); |
| 291 | /* |
| 292 | * APIs to handle HIF specific diagnostic write accesses. These APIs are |
| 293 | * synchronous and only allowed to be called from a context that |
| 294 | * can block (sleep). |
| 295 | * They are not high performance APIs. |
| 296 | * |
| 297 | * hif_diag_write_access writes a 4 Byte aligned/length value to a |
| 298 | * Target register or memory word. |
| 299 | * |
| 300 | * hif_diag_write_mem writes an arbitrary length of arbitrarily aligned memory. |
| 301 | */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 302 | QDF_STATUS hif_diag_write_access(struct hif_opaque_softc *scn, uint32_t address, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 303 | uint32_t data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 304 | QDF_STATUS hif_diag_write_mem(struct hif_opaque_softc *scn, uint32_t address, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 305 | uint8_t *data, int nbytes); |
| 306 | |
| 307 | /* |
| 308 | * Set the FASTPATH_mode_on flag in sc, for use by data path |
| 309 | */ |
| 310 | #ifdef WLAN_FEATURE_FASTPATH |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 311 | void hif_enable_fastpath(struct hif_opaque_softc *hif_ctx); |
| 312 | bool hif_is_fastpath_mode_enabled(struct hif_opaque_softc *hif_ctx); |
| 313 | void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 314 | #endif |
| 315 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 316 | /* |
| 317 | * Enable/disable CDC max performance workaround |
| 318 | * For max-performace set this to 0 |
| 319 | * To allow SoC to enter sleep set this to 1 |
| 320 | */ |
| 321 | #define CONFIG_DISABLE_CDC_MAX_PERF_WAR 0 |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 322 | |
| 323 | #ifdef IPA_OFFLOAD |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 324 | void hif_ipa_get_ce_resource(struct hif_opaque_softc *scn, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 325 | qdf_dma_addr_t *ce_sr_base_paddr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 326 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 327 | qdf_dma_addr_t *ce_reg_paddr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 328 | #else |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 329 | /** |
| 330 | * hif_ipa_get_ce_resource() - get uc resource on hif |
| 331 | * @scn: bus context |
| 332 | * @ce_sr_base_paddr: copyengine source ring base physical address |
| 333 | * @ce_sr_ring_size: copyengine source ring size |
| 334 | * @ce_reg_paddr: copyengine register physical address |
| 335 | * |
| 336 | * IPA micro controller data path offload feature enabled, |
| 337 | * HIF should release copy engine related resource information to IPA UC |
| 338 | * IPA UC will access hardware resource with released information |
| 339 | * |
| 340 | * Return: None |
| 341 | */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 342 | static inline void hif_ipa_get_ce_resource(struct hif_opaque_softc *scn, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 343 | qdf_dma_addr_t *ce_sr_base_paddr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 344 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 345 | qdf_dma_addr_t *ce_reg_paddr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 346 | { |
| 347 | return; |
| 348 | } |
| 349 | #endif /* IPA_OFFLOAD */ |
| 350 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 351 | /** |
| 352 | * @brief List of callbacks - filled in by HTC. |
| 353 | */ |
| 354 | struct hif_msg_callbacks { |
| 355 | void *Context; |
| 356 | /**< context meaningful to HTC */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 357 | QDF_STATUS (*txCompletionHandler)(void *Context, qdf_nbuf_t wbuf, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 358 | uint32_t transferID, |
| 359 | uint32_t toeplitz_hash_result); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 360 | QDF_STATUS (*rxCompletionHandler)(void *Context, qdf_nbuf_t wbuf, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 361 | uint8_t pipeID); |
| 362 | void (*txResourceAvailHandler)(void *context, uint8_t pipe); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 363 | void (*fwEventHandler)(void *context, QDF_STATUS status); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 364 | }; |
| 365 | |
| 366 | #define HIF_DATA_ATTR_SET_TX_CLASSIFY(attr, v) \ |
| 367 | (attr |= (v & 0x01) << 5) |
| 368 | #define HIF_DATA_ATTR_SET_ENCAPSULATION_TYPE(attr, v) \ |
| 369 | (attr |= (v & 0x03) << 6) |
| 370 | #define HIF_DATA_ATTR_SET_ADDR_X_SEARCH_DISABLE(attr, v) \ |
| 371 | (attr |= (v & 0x01) << 13) |
| 372 | #define HIF_DATA_ATTR_SET_ADDR_Y_SEARCH_DISABLE(attr, v) \ |
| 373 | (attr |= (v & 0x01) << 14) |
| 374 | #define HIF_DATA_ATTR_SET_TOEPLITZ_HASH_ENABLE(attr, v) \ |
| 375 | (attr |= (v & 0x01) << 15) |
| 376 | #define HIF_DATA_ATTR_SET_PACKET_OR_RESULT_OFFSET(attr, v) \ |
| 377 | (attr |= (v & 0x0FFF) << 16) |
| 378 | #define HIF_DATA_ATTR_SET_ENABLE_11H(attr, v) \ |
| 379 | (attr |= (v & 0x01) << 30) |
| 380 | |
Houston Hoffman | f303f91 | 2016-03-14 21:11:42 -0700 | [diff] [blame] | 381 | struct hif_bus_id; |
| 382 | typedef struct hif_bus_id hif_bus_id; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 383 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 384 | void hif_post_init(struct hif_opaque_softc *scn, void *hHTC, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 385 | struct hif_msg_callbacks *callbacks); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 386 | QDF_STATUS hif_start(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 387 | void hif_stop(struct hif_opaque_softc *scn); |
| 388 | void hif_flush_surprise_remove(struct hif_opaque_softc *scn); |
| 389 | void hif_dump(struct hif_opaque_softc *scn, uint8_t CmdId, bool start); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 390 | QDF_STATUS hif_send_head(struct hif_opaque_softc *scn, uint8_t PipeID, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 391 | uint32_t transferID, uint32_t nbytes, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 392 | qdf_nbuf_t wbuf, uint32_t data_attr); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 393 | void hif_send_complete_check(struct hif_opaque_softc *scn, uint8_t PipeID, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 394 | int force); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 395 | void hif_get_default_pipe(struct hif_opaque_softc *scn, uint8_t *ULPipe, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 396 | uint8_t *DLPipe); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 397 | int hif_map_service_to_pipe(struct hif_opaque_softc *scn, uint16_t svc_id, |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 398 | uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled, |
| 399 | int *dl_is_polled); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 400 | uint16_t |
| 401 | hif_get_free_queue_number(struct hif_opaque_softc *scn, uint8_t PipeID); |
| 402 | void *hif_get_targetdef(struct hif_opaque_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 403 | uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 404 | void hif_set_target_sleep(struct hif_opaque_softc *scn, bool sleep_ok, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 405 | bool wait_for_it); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 406 | int hif_check_fw_reg(struct hif_opaque_softc *scn); |
| 407 | int hif_check_soc_status(struct hif_opaque_softc *scn); |
| 408 | void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision, |
| 409 | const char **target_name); |
| 410 | void hif_disable_isr(struct hif_opaque_softc *scn); |
| 411 | void hif_reset_soc(struct hif_opaque_softc *scn); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 412 | void hif_save_htc_htt_config_endpoint(struct hif_opaque_softc *hif_ctx, |
| 413 | int htc_endpoint); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 414 | struct hif_opaque_softc *hif_open(qdf_device_t qdf_ctx, uint32_t mode, |
| 415 | enum qdf_bus_type bus_type, |
Komal Seelam | 7508012 | 2016-03-02 15:18:25 +0530 | [diff] [blame^] | 416 | struct hif_driver_state_callbacks *cbk); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 417 | void hif_close(struct hif_opaque_softc *hif_ctx); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 418 | QDF_STATUS hif_enable(struct hif_opaque_softc *hif_ctx, struct device *dev, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 419 | void *bdev, const hif_bus_id *bid, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 420 | enum qdf_bus_type bus_type, |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 421 | enum hif_enable_type type); |
| 422 | void hif_disable(struct hif_opaque_softc *hif_ctx, enum hif_disable_type type); |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 423 | |
| 424 | #ifdef FEATURE_RUNTIME_PM |
| 425 | struct hif_pm_runtime_lock; |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 426 | int hif_pm_runtime_get(struct hif_opaque_softc *hif_ctx); |
| 427 | void hif_pm_runtime_get_noresume(struct hif_opaque_softc *hif_ctx); |
| 428 | int hif_pm_runtime_put(struct hif_opaque_softc *hif_ctx); |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 429 | struct hif_pm_runtime_lock *hif_runtime_lock_init(const char *name); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 430 | void hif_runtime_lock_deinit(struct hif_opaque_softc *hif_ctx, |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 431 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 432 | int hif_pm_runtime_prevent_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 433 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 434 | int hif_pm_runtime_allow_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 435 | struct hif_pm_runtime_lock *lock); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 436 | int hif_pm_runtime_prevent_suspend_timeout(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 437 | struct hif_pm_runtime_lock *lock, unsigned int delay); |
| 438 | #else |
| 439 | struct hif_pm_runtime_lock { |
| 440 | const char *name; |
| 441 | }; |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 442 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 443 | static inline void hif_pm_runtime_get_noresume(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 444 | {} |
| 445 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 446 | static inline int hif_pm_runtime_get(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 447 | { return 0; } |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 448 | static inline int hif_pm_runtime_put(struct hif_opaque_softc *hif_ctx) |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 449 | { return 0; } |
| 450 | static inline struct hif_pm_runtime_lock *hif_runtime_lock_init( |
| 451 | const char *name) |
| 452 | { return NULL; } |
Komal Seelam | f860068 | 2016-02-02 18:17:13 +0530 | [diff] [blame] | 453 | static inline void |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 454 | hif_runtime_lock_deinit(struct hif_opaque_softc *hif_ctx, |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 455 | struct hif_pm_runtime_lock *lock) {} |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 456 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 457 | static inline int hif_pm_runtime_prevent_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 458 | struct hif_pm_runtime_lock *lock) |
| 459 | { return 0; } |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 460 | static inline int hif_pm_runtime_allow_suspend(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 461 | struct hif_pm_runtime_lock *lock) |
| 462 | { return 0; } |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 463 | static inline int |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 464 | hif_pm_runtime_prevent_suspend_timeout(struct hif_opaque_softc *ol_sc, |
Houston Hoffman | 9078a15 | 2015-11-02 16:15:02 -0800 | [diff] [blame] | 465 | struct hif_pm_runtime_lock *lock, unsigned int delay) |
| 466 | { return 0; } |
| 467 | #endif |
| 468 | |
Houston Hoffman | fb7d612 | 2016-03-14 21:11:46 -0700 | [diff] [blame] | 469 | void hif_enable_power_management(struct hif_opaque_softc *hif_ctx, |
| 470 | bool is_packet_log_enabled); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 471 | void hif_disable_power_management(struct hif_opaque_softc *hif_ctx); |
Houston Hoffman | 78467a8 | 2016-01-05 20:08:56 -0800 | [diff] [blame] | 472 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 473 | void hif_vote_link_down(struct hif_opaque_softc *); |
| 474 | void hif_vote_link_up(struct hif_opaque_softc *); |
| 475 | bool hif_can_suspend_link(struct hif_opaque_softc *); |
Houston Hoffman | 78467a8 | 2016-01-05 20:08:56 -0800 | [diff] [blame] | 476 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 477 | int hif_bus_resume(struct hif_opaque_softc *); |
| 478 | int hif_bus_suspend(struct hif_opaque_softc *); |
Houston Hoffman | 692cc05 | 2015-11-10 18:42:47 -0800 | [diff] [blame] | 479 | |
| 480 | #ifdef FEATURE_RUNTIME_PM |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 481 | int hif_pre_runtime_suspend(struct hif_opaque_softc *hif_ctx); |
| 482 | void hif_pre_runtime_resume(struct hif_opaque_softc *hif_ctx); |
| 483 | int hif_runtime_suspend(struct hif_opaque_softc *hif_ctx); |
| 484 | int hif_runtime_resume(struct hif_opaque_softc *hif_ctx); |
| 485 | void hif_process_runtime_suspend_success(struct hif_opaque_softc *); |
| 486 | void hif_process_runtime_suspend_failure(struct hif_opaque_softc *); |
| 487 | void hif_process_runtime_resume_success(struct hif_opaque_softc *); |
Houston Hoffman | 692cc05 | 2015-11-10 18:42:47 -0800 | [diff] [blame] | 488 | #endif |
| 489 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 490 | int hif_dump_registers(struct hif_opaque_softc *scn); |
| 491 | int ol_copy_ramdump(struct hif_opaque_softc *scn); |
| 492 | void hif_crash_shutdown(struct hif_opaque_softc *hif_ctx); |
| 493 | void hif_get_hw_info(struct hif_opaque_softc *scn, u32 *version, u32 *revision, |
Komal Seelam | 91553ce | 2016-01-27 18:57:10 +0530 | [diff] [blame] | 494 | const char **target_name); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 495 | void hif_lro_flush_cb_register(struct hif_opaque_softc *scn, |
Komal Seelam | c92a0cf | 2016-02-22 20:43:52 +0530 | [diff] [blame] | 496 | void (handler)(void *), void *data); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 497 | void hif_lro_flush_cb_deregister(struct hif_opaque_softc *scn); |
Houston Hoffman | 2635259 | 2016-03-14 21:11:43 -0700 | [diff] [blame] | 498 | bool hif_needs_bmi(struct hif_opaque_softc *scn); |
Houston Hoffman | 60a1eeb | 2016-03-14 21:11:44 -0700 | [diff] [blame] | 499 | enum qdf_bus_type hif_get_bus_type(struct hif_opaque_softc *hif_hdl); |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 500 | struct hif_target_info *hif_get_target_info_handle(struct hif_opaque_softc * |
| 501 | scn); |
| 502 | struct hif_config_info *hif_get_ini_handle(struct hif_opaque_softc *scn); |
| 503 | struct ramdump_info *hif_get_ramdump_ctx(struct hif_opaque_softc *hif_ctx); |
| 504 | ol_target_status hif_get_target_status(struct hif_opaque_softc *hif_ctx); |
| 505 | void hif_set_target_status(struct hif_opaque_softc *hif_ctx, ol_target_status); |
| 506 | void hif_init_ini_config(struct hif_opaque_softc *hif_ctx, |
| 507 | struct hif_config_info *cfg); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 508 | #ifdef __cplusplus |
| 509 | } |
| 510 | #endif |
| 511 | #endif /* _HIF_H_ */ |