Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1 | /* |
yeshwanth sriram guntuka | 78ee68f | 2016-10-25 11:57:58 +0530 | [diff] [blame] | 2 | * Copyright (c) 2013-2017 The Linux Foundation. All rights reserved. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 3 | * |
| 4 | * Previously licensed under the ISC license by Qualcomm Atheros, Inc. |
| 5 | * |
| 6 | * |
| 7 | * Permission to use, copy, modify, and/or distribute this software for |
| 8 | * any purpose with or without fee is hereby granted, provided that the |
| 9 | * above copyright notice and this permission notice appear in all |
| 10 | * copies. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL |
| 13 | * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED |
| 14 | * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE |
| 15 | * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL |
| 16 | * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR |
| 17 | * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER |
| 18 | * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR |
| 19 | * PERFORMANCE OF THIS SOFTWARE. |
| 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file was originally distributed by Qualcomm Atheros, Inc. |
| 24 | * under proprietary terms before Copyright ownership was assigned |
| 25 | * to the Linux Foundation. |
| 26 | */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 27 | #include "targcfg.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 28 | #include "qdf_lock.h" |
| 29 | #include "qdf_status.h" |
| 30 | #include "qdf_status.h" |
| 31 | #include <qdf_atomic.h> /* qdf_atomic_read */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 32 | #include <targaddrs.h> |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 33 | #include "hif_io32.h" |
| 34 | #include <hif.h> |
| 35 | #include "regtable.h" |
| 36 | #define ATH_MODULE_NAME hif |
| 37 | #include <a_debug.h> |
| 38 | #include "hif_main.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 39 | #include "ce_api.h" |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 40 | #include "qdf_trace.h" |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 41 | #include "pld_common.h" |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 42 | #include "hif_debug.h" |
| 43 | #include "ce_internal.h" |
| 44 | #include "ce_reg.h" |
| 45 | #include "ce_assignment.h" |
| 46 | #include "ce_tasklet.h" |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 47 | #ifndef CONFIG_WIN |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 48 | #include "qwlan_version.h" |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 49 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 50 | |
| 51 | #define CE_POLL_TIMEOUT 10 /* ms */ |
| 52 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 53 | #define AGC_DUMP 1 |
| 54 | #define CHANINFO_DUMP 2 |
| 55 | #define BB_WATCHDOG_DUMP 3 |
| 56 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 57 | #define PCIE_ACCESS_DUMP 4 |
| 58 | #endif |
| 59 | #include "mp_dev.h" |
| 60 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 61 | #if (defined(QCA_WIFI_QCA8074) || defined(QCA_WIFI_QCA6290)) && \ |
| 62 | !defined(QCA_WIFI_SUPPORT_SRNG) |
| 63 | #define QCA_WIFI_SUPPORT_SRNG |
| 64 | #endif |
| 65 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 66 | /* Forward references */ |
| 67 | static int hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info); |
| 68 | |
| 69 | /* |
| 70 | * Fix EV118783, poll to check whether a BMI response comes |
| 71 | * other than waiting for the interruption which may be lost. |
| 72 | */ |
| 73 | /* #define BMI_RSP_POLLING */ |
| 74 | #define BMI_RSP_TO_MILLISEC 1000 |
| 75 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 76 | #ifdef CONFIG_BYPASS_QMI |
| 77 | #define BYPASS_QMI 1 |
| 78 | #else |
| 79 | #define BYPASS_QMI 0 |
| 80 | #endif |
| 81 | |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 82 | #ifdef CONFIG_WIN |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 83 | #if ENABLE_10_4_FW_HDR |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 84 | #define WDI_IPA_SERVICE_GROUP 5 |
| 85 | #define WDI_IPA_TX_SVC MAKE_SERVICE_ID(WDI_IPA_SERVICE_GROUP, 0) |
| 86 | #define HTT_DATA2_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 1) |
| 87 | #define HTT_DATA3_MSG_SVC MAKE_SERVICE_ID(HTT_SERVICE_GROUP, 2) |
Pratik Gandhi | 424c62e | 2016-08-23 19:47:09 +0530 | [diff] [blame] | 88 | #endif /* ENABLE_10_4_FW_HDR */ |
Houston Hoffman | abd0077 | 2016-05-06 17:02:48 -0700 | [diff] [blame] | 89 | #endif |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 90 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 91 | static int hif_post_recv_buffers(struct hif_softc *scn); |
| 92 | static void hif_config_rri_on_ddr(struct hif_softc *scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 93 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 94 | /** |
| 95 | * hif_target_access_log_dump() - dump access log |
| 96 | * |
| 97 | * dump access log |
| 98 | * |
| 99 | * Return: n/a |
| 100 | */ |
| 101 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 102 | static void hif_target_access_log_dump(void) |
| 103 | { |
| 104 | hif_target_dump_access_log(); |
| 105 | } |
| 106 | #endif |
| 107 | |
| 108 | |
| 109 | void hif_trigger_dump(struct hif_opaque_softc *hif_ctx, |
| 110 | uint8_t cmd_id, bool start) |
| 111 | { |
| 112 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 113 | |
| 114 | switch (cmd_id) { |
| 115 | case AGC_DUMP: |
| 116 | if (start) |
| 117 | priv_start_agc(scn); |
| 118 | else |
| 119 | priv_dump_agc(scn); |
| 120 | break; |
| 121 | case CHANINFO_DUMP: |
| 122 | if (start) |
| 123 | priv_start_cap_chaninfo(scn); |
| 124 | else |
| 125 | priv_dump_chaninfo(scn); |
| 126 | break; |
| 127 | case BB_WATCHDOG_DUMP: |
| 128 | priv_dump_bbwatchdog(scn); |
| 129 | break; |
| 130 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 131 | case PCIE_ACCESS_DUMP: |
| 132 | hif_target_access_log_dump(); |
| 133 | break; |
| 134 | #endif |
| 135 | default: |
| 136 | HIF_ERROR("%s: Invalid htc dump command", __func__); |
| 137 | break; |
| 138 | } |
| 139 | } |
| 140 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 141 | static void ce_poll_timeout(void *arg) |
| 142 | { |
| 143 | struct CE_state *CE_state = (struct CE_state *)arg; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 144 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 145 | if (CE_state->timer_inited) { |
| 146 | ce_per_engine_service(CE_state->scn, CE_state->id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 147 | qdf_timer_mod(&CE_state->poll_timer, CE_POLL_TIMEOUT); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 148 | } |
| 149 | } |
| 150 | |
| 151 | static unsigned int roundup_pwr2(unsigned int n) |
| 152 | { |
| 153 | int i; |
| 154 | unsigned int test_pwr2; |
| 155 | |
| 156 | if (!(n & (n - 1))) |
| 157 | return n; /* already a power of 2 */ |
| 158 | |
| 159 | test_pwr2 = 4; |
| 160 | for (i = 0; i < 29; i++) { |
| 161 | if (test_pwr2 > n) |
| 162 | return test_pwr2; |
| 163 | test_pwr2 = test_pwr2 << 1; |
| 164 | } |
| 165 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 166 | QDF_ASSERT(0); /* n too large */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 167 | return 0; |
| 168 | } |
| 169 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 170 | #define ADRASTEA_SRC_WR_INDEX_OFFSET 0x3C |
| 171 | #define ADRASTEA_DST_WR_INDEX_OFFSET 0x40 |
| 172 | |
| 173 | static struct shadow_reg_cfg target_shadow_reg_cfg_map[] = { |
| 174 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 175 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 176 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 177 | { 5, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 178 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 179 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 180 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 181 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 182 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 183 | #ifdef QCA_WIFI_3_0_ADRASTEA |
| 184 | { 9, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 185 | { 10, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 186 | { 11, ADRASTEA_DST_WR_INDEX_OFFSET}, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 187 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 188 | }; |
| 189 | |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 190 | static struct shadow_reg_cfg target_shadow_reg_cfg_epping[] = { |
| 191 | { 0, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 192 | { 3, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 193 | { 4, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 194 | { 7, ADRASTEA_SRC_WR_INDEX_OFFSET}, |
| 195 | { 1, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 196 | { 2, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 197 | { 5, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 198 | { 7, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 199 | { 8, ADRASTEA_DST_WR_INDEX_OFFSET}, |
| 200 | }; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 201 | |
| 202 | /* CE_PCI TABLE */ |
| 203 | /* |
| 204 | * NOTE: the table below is out of date, though still a useful reference. |
| 205 | * Refer to target_service_to_ce_map and hif_map_service_to_pipe for the actual |
| 206 | * mapping of HTC services to HIF pipes. |
| 207 | */ |
| 208 | /* |
| 209 | * This authoritative table defines Copy Engine configuration and the mapping |
| 210 | * of services/endpoints to CEs. A subset of this information is passed to |
| 211 | * the Target during startup as a prerequisite to entering BMI phase. |
| 212 | * See: |
| 213 | * target_service_to_ce_map - Target-side mapping |
| 214 | * hif_map_service_to_pipe - Host-side mapping |
| 215 | * target_ce_config - Target-side configuration |
| 216 | * host_ce_config - Host-side configuration |
| 217 | ============================================================================ |
| 218 | Purpose | Service / Endpoint | CE | Dire | Xfer | Xfer |
| 219 | | | | ctio | Size | Frequency |
| 220 | | | | n | | |
| 221 | ============================================================================ |
| 222 | tx | HTT_DATA (downlink) | CE 0 | h->t | medium - | very frequent |
| 223 | descriptor | | | | O(100B) | and regular |
| 224 | download | | | | | |
| 225 | ---------------------------------------------------------------------------- |
| 226 | rx | HTT_DATA (uplink) | CE 1 | t->h | small - | frequent and |
| 227 | indication | | | | O(10B) | regular |
| 228 | upload | | | | | |
| 229 | ---------------------------------------------------------------------------- |
| 230 | MSDU | DATA_BK (uplink) | CE 2 | t->h | large - | rare |
| 231 | upload | | | | O(1000B) | (frequent |
| 232 | e.g. noise | | | | | during IP1.0 |
| 233 | packets | | | | | testing) |
| 234 | ---------------------------------------------------------------------------- |
| 235 | MSDU | DATA_BK (downlink) | CE 3 | h->t | large - | very rare |
| 236 | download | | | | O(1000B) | (frequent |
| 237 | e.g. | | | | | during IP1.0 |
| 238 | misdirecte | | | | | testing) |
| 239 | d EAPOL | | | | | |
| 240 | packets | | | | | |
| 241 | ---------------------------------------------------------------------------- |
| 242 | n/a | DATA_BE, DATA_VI | CE 2 | t->h | | never(?) |
| 243 | | DATA_VO (uplink) | | | | |
| 244 | ---------------------------------------------------------------------------- |
| 245 | n/a | DATA_BE, DATA_VI | CE 3 | h->t | | never(?) |
| 246 | | DATA_VO (downlink) | | | | |
| 247 | ---------------------------------------------------------------------------- |
| 248 | WMI events | WMI_CONTROL (uplink) | CE 4 | t->h | medium - | infrequent |
| 249 | | | | | O(100B) | |
| 250 | ---------------------------------------------------------------------------- |
| 251 | WMI | WMI_CONTROL | CE 5 | h->t | medium - | infrequent |
| 252 | messages | (downlink) | | | O(100B) | |
| 253 | | | | | | |
| 254 | ---------------------------------------------------------------------------- |
| 255 | n/a | HTC_CTRL_RSVD, | CE 1 | t->h | | never(?) |
| 256 | | HTC_RAW_STREAMS | | | | |
| 257 | | (uplink) | | | | |
| 258 | ---------------------------------------------------------------------------- |
| 259 | n/a | HTC_CTRL_RSVD, | CE 0 | h->t | | never(?) |
| 260 | | HTC_RAW_STREAMS | | | | |
| 261 | | (downlink) | | | | |
| 262 | ---------------------------------------------------------------------------- |
| 263 | diag | none (raw CE) | CE 7 | t<>h | 4 | Diag Window |
| 264 | | | | | | infrequent |
| 265 | ============================================================================ |
| 266 | */ |
| 267 | |
| 268 | /* |
| 269 | * Map from service/endpoint to Copy Engine. |
| 270 | * This table is derived from the CE_PCI TABLE, above. |
| 271 | * It is passed to the Target at startup for use by firmware. |
| 272 | */ |
| 273 | static struct service_to_pipe target_service_to_ce_map_wlan[] = { |
| 274 | { |
| 275 | WMI_DATA_VO_SVC, |
| 276 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 277 | 3, |
| 278 | }, |
| 279 | { |
| 280 | WMI_DATA_VO_SVC, |
| 281 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 282 | 2, |
| 283 | }, |
| 284 | { |
| 285 | WMI_DATA_BK_SVC, |
| 286 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 287 | 3, |
| 288 | }, |
| 289 | { |
| 290 | WMI_DATA_BK_SVC, |
| 291 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 292 | 2, |
| 293 | }, |
| 294 | { |
| 295 | WMI_DATA_BE_SVC, |
| 296 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 297 | 3, |
| 298 | }, |
| 299 | { |
| 300 | WMI_DATA_BE_SVC, |
| 301 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 302 | 2, |
| 303 | }, |
| 304 | { |
| 305 | WMI_DATA_VI_SVC, |
| 306 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 307 | 3, |
| 308 | }, |
| 309 | { |
| 310 | WMI_DATA_VI_SVC, |
| 311 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 312 | 2, |
| 313 | }, |
| 314 | { |
| 315 | WMI_CONTROL_SVC, |
| 316 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 317 | 3, |
| 318 | }, |
| 319 | { |
| 320 | WMI_CONTROL_SVC, |
| 321 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 322 | 2, |
| 323 | }, |
| 324 | { |
Kiran Venkatappa | e17e3b6 | 2017-02-10 16:31:49 +0530 | [diff] [blame] | 325 | WMI_CONTROL_SVC_WMAC1, |
| 326 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 327 | 7, |
| 328 | }, |
| 329 | { |
| 330 | WMI_CONTROL_SVC_WMAC1, |
| 331 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 332 | 2, |
| 333 | }, |
| 334 | { |
| 335 | WMI_CONTROL_SVC_WMAC2, |
| 336 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 337 | 9, |
| 338 | }, |
| 339 | { |
| 340 | WMI_CONTROL_SVC_WMAC2, |
| 341 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 342 | 2, |
| 343 | }, |
| 344 | { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 345 | HTC_CTRL_RSVD_SVC, |
| 346 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 347 | 0, /* could be moved to 3 (share with WMI) */ |
| 348 | }, |
| 349 | { |
| 350 | HTC_CTRL_RSVD_SVC, |
| 351 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 352 | 2, |
| 353 | }, |
| 354 | { |
| 355 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 356 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 357 | 0, |
| 358 | }, |
| 359 | { |
| 360 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 361 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 362 | 2, |
| 363 | }, |
| 364 | { |
| 365 | HTT_DATA_MSG_SVC, |
| 366 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 367 | 4, |
| 368 | }, |
| 369 | { |
| 370 | HTT_DATA_MSG_SVC, |
| 371 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 372 | 1, |
| 373 | }, |
| 374 | { |
| 375 | WDI_IPA_TX_SVC, |
| 376 | PIPEDIR_OUT, /* in = DL = target -> host */ |
| 377 | 5, |
| 378 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 379 | #if defined(QCA_WIFI_3_0_ADRASTEA) |
| 380 | { |
| 381 | HTT_DATA2_MSG_SVC, |
| 382 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 383 | 9, |
| 384 | }, |
| 385 | { |
| 386 | HTT_DATA3_MSG_SVC, |
| 387 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 388 | 10, |
| 389 | }, |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 390 | { |
| 391 | PACKET_LOG_SVC, |
| 392 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 393 | 11, |
| 394 | }, |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 395 | #endif |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 396 | /* (Additions here) */ |
| 397 | |
| 398 | { /* Must be last */ |
| 399 | 0, |
| 400 | 0, |
| 401 | 0, |
| 402 | }, |
| 403 | }; |
| 404 | |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 405 | /* PIPEDIR_OUT = HOST to Target */ |
| 406 | /* PIPEDIR_IN = TARGET to HOST */ |
| 407 | static struct service_to_pipe target_service_to_ce_map_qca6290[] = { |
| 408 | { WMI_DATA_VO_SVC, PIPEDIR_OUT, 3, }, |
| 409 | { WMI_DATA_VO_SVC, PIPEDIR_IN , 2, }, |
| 410 | { WMI_DATA_BK_SVC, PIPEDIR_OUT, 3, }, |
| 411 | { WMI_DATA_BK_SVC, PIPEDIR_IN , 2, }, |
| 412 | { WMI_DATA_BE_SVC, PIPEDIR_OUT, 3, }, |
| 413 | { WMI_DATA_BE_SVC, PIPEDIR_IN , 2, }, |
| 414 | { WMI_DATA_VI_SVC, PIPEDIR_OUT, 3, }, |
| 415 | { WMI_DATA_VI_SVC, PIPEDIR_IN , 2, }, |
| 416 | { WMI_CONTROL_SVC, PIPEDIR_OUT, 3, }, |
| 417 | { WMI_CONTROL_SVC, PIPEDIR_IN , 2, }, |
| 418 | { HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0, }, |
| 419 | { HTC_CTRL_RSVD_SVC, PIPEDIR_IN , 2, }, |
| 420 | { HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4, }, |
| 421 | { HTT_DATA_MSG_SVC, PIPEDIR_IN , 1, }, |
Houston Hoffman | 88c896f | 2016-12-14 09:56:35 -0800 | [diff] [blame] | 422 | /* (Additions here) */ |
| 423 | { 0, 0, 0, }, |
| 424 | }; |
| 425 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 426 | static struct service_to_pipe target_service_to_ce_map_ar900b[] = { |
| 427 | { |
| 428 | WMI_DATA_VO_SVC, |
| 429 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 430 | 3, |
| 431 | }, |
| 432 | { |
| 433 | WMI_DATA_VO_SVC, |
| 434 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 435 | 2, |
| 436 | }, |
| 437 | { |
| 438 | WMI_DATA_BK_SVC, |
| 439 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 440 | 3, |
| 441 | }, |
| 442 | { |
| 443 | WMI_DATA_BK_SVC, |
| 444 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 445 | 2, |
| 446 | }, |
| 447 | { |
| 448 | WMI_DATA_BE_SVC, |
| 449 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 450 | 3, |
| 451 | }, |
| 452 | { |
| 453 | WMI_DATA_BE_SVC, |
| 454 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 455 | 2, |
| 456 | }, |
| 457 | { |
| 458 | WMI_DATA_VI_SVC, |
| 459 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 460 | 3, |
| 461 | }, |
| 462 | { |
| 463 | WMI_DATA_VI_SVC, |
| 464 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 465 | 2, |
| 466 | }, |
| 467 | { |
| 468 | WMI_CONTROL_SVC, |
| 469 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 470 | 3, |
| 471 | }, |
| 472 | { |
| 473 | WMI_CONTROL_SVC, |
| 474 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 475 | 2, |
| 476 | }, |
| 477 | { |
| 478 | HTC_CTRL_RSVD_SVC, |
| 479 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 480 | 0, /* could be moved to 3 (share with WMI) */ |
| 481 | }, |
| 482 | { |
| 483 | HTC_CTRL_RSVD_SVC, |
| 484 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 485 | 1, |
| 486 | }, |
| 487 | { |
| 488 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 489 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 490 | 0, |
| 491 | }, |
| 492 | { |
| 493 | HTC_RAW_STREAMS_SVC, /* not currently used */ |
| 494 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 495 | 1, |
| 496 | }, |
| 497 | { |
| 498 | HTT_DATA_MSG_SVC, |
| 499 | PIPEDIR_OUT, /* out = UL = host -> target */ |
| 500 | 4, |
| 501 | }, |
| 502 | #if WLAN_FEATURE_FASTPATH |
| 503 | { |
| 504 | HTT_DATA_MSG_SVC, |
| 505 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 506 | 5, |
| 507 | }, |
| 508 | #else /* WLAN_FEATURE_FASTPATH */ |
| 509 | { |
| 510 | HTT_DATA_MSG_SVC, |
| 511 | PIPEDIR_IN, /* in = DL = target -> host */ |
| 512 | 1, |
| 513 | }, |
| 514 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 515 | |
| 516 | /* (Additions here) */ |
| 517 | |
| 518 | { /* Must be last */ |
| 519 | 0, |
| 520 | 0, |
| 521 | 0, |
| 522 | }, |
| 523 | }; |
| 524 | |
| 525 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 526 | static struct shadow_reg_cfg *target_shadow_reg_cfg = target_shadow_reg_cfg_map; |
| 527 | static int shadow_cfg_sz = sizeof(target_shadow_reg_cfg_map); |
| 528 | |
| 529 | static struct service_to_pipe target_service_to_ce_map_wlan_epping[] = { |
| 530 | {WMI_DATA_VO_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 531 | {WMI_DATA_VO_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 532 | {WMI_DATA_BK_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 533 | {WMI_DATA_BK_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 534 | {WMI_DATA_BE_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 535 | {WMI_DATA_BE_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 536 | {WMI_DATA_VI_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 537 | {WMI_DATA_VI_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 538 | {WMI_CONTROL_SVC, PIPEDIR_OUT, 3,}, /* out = UL = host -> target */ |
| 539 | {WMI_CONTROL_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 540 | {HTC_CTRL_RSVD_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 541 | {HTC_CTRL_RSVD_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 542 | {HTC_RAW_STREAMS_SVC, PIPEDIR_OUT, 0,}, /* out = UL = host -> target */ |
| 543 | {HTC_RAW_STREAMS_SVC, PIPEDIR_IN, 2,}, /* in = DL = target -> host */ |
| 544 | {HTT_DATA_MSG_SVC, PIPEDIR_OUT, 4,}, /* out = UL = host -> target */ |
| 545 | {HTT_DATA_MSG_SVC, PIPEDIR_IN, 1,}, /* in = DL = target -> host */ |
| 546 | {0, 0, 0,}, /* Must be last */ |
| 547 | }; |
| 548 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 549 | static void hif_select_service_to_pipe_map(struct hif_softc *scn, |
| 550 | struct service_to_pipe **tgt_svc_map_to_use, |
| 551 | uint32_t *sz_tgt_svc_map_to_use) |
| 552 | { |
| 553 | uint32_t mode = hif_get_conparam(scn); |
| 554 | struct hif_target_info *tgt_info = &scn->target_info; |
| 555 | |
| 556 | if (QDF_IS_EPPING_ENABLED(mode)) { |
| 557 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan_epping; |
| 558 | *sz_tgt_svc_map_to_use = |
| 559 | sizeof(target_service_to_ce_map_wlan_epping); |
| 560 | } else { |
| 561 | switch (tgt_info->target_type) { |
| 562 | default: |
| 563 | *tgt_svc_map_to_use = target_service_to_ce_map_wlan; |
| 564 | *sz_tgt_svc_map_to_use = |
| 565 | sizeof(target_service_to_ce_map_wlan); |
| 566 | break; |
| 567 | case TARGET_TYPE_AR900B: |
| 568 | case TARGET_TYPE_QCA9984: |
| 569 | case TARGET_TYPE_IPQ4019: |
| 570 | case TARGET_TYPE_QCA9888: |
| 571 | case TARGET_TYPE_AR9888: |
| 572 | case TARGET_TYPE_AR9888V2: |
| 573 | *tgt_svc_map_to_use = target_service_to_ce_map_ar900b; |
| 574 | *sz_tgt_svc_map_to_use = |
| 575 | sizeof(target_service_to_ce_map_ar900b); |
| 576 | break; |
| 577 | case TARGET_TYPE_QCA6290: |
| 578 | *tgt_svc_map_to_use = target_service_to_ce_map_qca6290; |
| 579 | *sz_tgt_svc_map_to_use = |
| 580 | sizeof(target_service_to_ce_map_qca6290); |
| 581 | break; |
| 582 | } |
| 583 | } |
| 584 | } |
| 585 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 586 | /** |
| 587 | * ce_mark_datapath() - marks the ce_state->htt_rx_data accordingly |
| 588 | * @ce_state : pointer to the state context of the CE |
| 589 | * |
| 590 | * Description: |
| 591 | * Sets htt_rx_data attribute of the state structure if the |
| 592 | * CE serves one of the HTT DATA services. |
| 593 | * |
| 594 | * Return: |
| 595 | * false (attribute set to false) |
| 596 | * true (attribute set to true); |
| 597 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 598 | static bool ce_mark_datapath(struct CE_state *ce_state) |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 599 | { |
| 600 | struct service_to_pipe *svc_map; |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 601 | uint32_t map_sz, map_len; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 602 | int i; |
| 603 | bool rc = false; |
| 604 | |
| 605 | if (ce_state != NULL) { |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 606 | hif_select_service_to_pipe_map(ce_state->scn, &svc_map, |
| 607 | &map_sz); |
Houston Hoffman | 55fcf5a | 2016-09-27 23:21:51 -0700 | [diff] [blame] | 608 | |
Kiran Venkatappa | c068709 | 2017-04-13 16:45:03 +0530 | [diff] [blame] | 609 | map_len = map_sz / sizeof(struct service_to_pipe); |
| 610 | for (i = 0; i < map_len; i++) { |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 611 | if ((svc_map[i].pipenum == ce_state->id) && |
| 612 | ((svc_map[i].service_id == HTT_DATA_MSG_SVC) || |
| 613 | (svc_map[i].service_id == HTT_DATA2_MSG_SVC) || |
| 614 | (svc_map[i].service_id == HTT_DATA3_MSG_SVC))) { |
| 615 | /* HTT CEs are unidirectional */ |
| 616 | if (svc_map[i].pipedir == PIPEDIR_IN) |
| 617 | ce_state->htt_rx_data = true; |
| 618 | else |
| 619 | ce_state->htt_tx_data = true; |
| 620 | rc = true; |
| 621 | } |
| 622 | } |
| 623 | } |
| 624 | return rc; |
| 625 | } |
| 626 | |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 627 | /** |
| 628 | * ce_ring_test_initial_indexes() - tests the initial ce ring indexes |
| 629 | * @ce_id: ce in question |
| 630 | * @ring: ring state being examined |
| 631 | * @type: "src_ring" or "dest_ring" string for identifying the ring |
| 632 | * |
| 633 | * Warns on non-zero index values. |
| 634 | * Causes a kernel panic if the ring is not empty durring initialization. |
| 635 | */ |
| 636 | static void ce_ring_test_initial_indexes(int ce_id, struct CE_ring_state *ring, |
| 637 | char *type) |
| 638 | { |
| 639 | if (ring->write_index != 0 || ring->sw_index != 0) |
| 640 | HIF_ERROR("ce %d, %s, initial sw_index = %d, initial write_index =%d", |
| 641 | ce_id, type, ring->sw_index, ring->write_index); |
| 642 | if (ring->write_index != ring->sw_index) |
| 643 | QDF_BUG(0); |
| 644 | } |
| 645 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 646 | /** |
| 647 | * ce_srng_based() - Does this target use srng |
| 648 | * @ce_state : pointer to the state context of the CE |
| 649 | * |
| 650 | * Description: |
| 651 | * returns true if the target is SRNG based |
| 652 | * |
| 653 | * Return: |
| 654 | * false (attribute set to false) |
| 655 | * true (attribute set to true); |
| 656 | */ |
| 657 | bool ce_srng_based(struct hif_softc *scn) |
| 658 | { |
| 659 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 660 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
| 661 | |
| 662 | switch (tgt_info->target_type) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 663 | case TARGET_TYPE_QCA8074: |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 664 | case TARGET_TYPE_QCA6290: |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 665 | return true; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 666 | default: |
| 667 | return false; |
| 668 | } |
| 669 | return false; |
| 670 | } |
| 671 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 672 | #ifdef QCA_WIFI_SUPPORT_SRNG |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 673 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 674 | { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 675 | if (ce_srng_based(scn)) |
| 676 | return ce_services_srng(); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 677 | |
| 678 | return ce_services_legacy(); |
| 679 | } |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 680 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 681 | |
Venkata Sharath Chandra Manchala | 837d323 | 2017-01-18 15:11:56 -0800 | [diff] [blame] | 682 | #else /* QCA_LITHIUM */ |
| 683 | static struct ce_ops *ce_services_attach(struct hif_softc *scn) |
| 684 | { |
| 685 | return ce_services_legacy(); |
| 686 | } |
| 687 | #endif /* QCA_LITHIUM */ |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 688 | |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 689 | static void hif_prepare_hal_shadow_register_cfg(struct hif_softc *scn, |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 690 | struct pld_shadow_reg_v2_cfg **shadow_config, |
| 691 | int *num_shadow_registers_configured) { |
| 692 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 693 | |
| 694 | return hif_state->ce_services->ce_prepare_shadow_register_v2_cfg( |
| 695 | scn, shadow_config, num_shadow_registers_configured); |
| 696 | } |
| 697 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 698 | static inline uint32_t ce_get_desc_size(struct hif_softc *scn, |
| 699 | uint8_t ring_type) |
| 700 | { |
| 701 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 702 | |
| 703 | return hif_state->ce_services->ce_get_desc_size(ring_type); |
| 704 | } |
| 705 | |
| 706 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 707 | static struct CE_ring_state *ce_alloc_ring_state(struct CE_state *CE_state, |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 708 | uint8_t ring_type, uint32_t nentries) |
| 709 | { |
| 710 | uint32_t ce_nbytes; |
| 711 | char *ptr; |
| 712 | qdf_dma_addr_t base_addr; |
| 713 | struct CE_ring_state *ce_ring; |
| 714 | uint32_t desc_size; |
| 715 | struct hif_softc *scn = CE_state->scn; |
| 716 | |
| 717 | ce_nbytes = sizeof(struct CE_ring_state) |
| 718 | + (nentries * sizeof(void *)); |
| 719 | ptr = qdf_mem_malloc(ce_nbytes); |
| 720 | if (!ptr) |
| 721 | return NULL; |
| 722 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 723 | ce_ring = (struct CE_ring_state *)ptr; |
| 724 | ptr += sizeof(struct CE_ring_state); |
| 725 | ce_ring->nentries = nentries; |
| 726 | ce_ring->nentries_mask = nentries - 1; |
| 727 | |
| 728 | ce_ring->low_water_mark_nentries = 0; |
| 729 | ce_ring->high_water_mark_nentries = nentries; |
| 730 | ce_ring->per_transfer_context = (void **)ptr; |
| 731 | |
| 732 | desc_size = ce_get_desc_size(scn, ring_type); |
| 733 | |
| 734 | /* Legacy platforms that do not support cache |
| 735 | * coherent DMA are unsupported |
| 736 | */ |
| 737 | ce_ring->base_addr_owner_space_unaligned = |
| 738 | qdf_mem_alloc_consistent(scn->qdf_dev, |
| 739 | scn->qdf_dev->dev, |
| 740 | (nentries * |
| 741 | desc_size + |
| 742 | CE_DESC_RING_ALIGN), |
| 743 | &base_addr); |
| 744 | if (ce_ring->base_addr_owner_space_unaligned |
| 745 | == NULL) { |
| 746 | HIF_ERROR("%s: ring has no DMA mem", |
| 747 | __func__); |
| 748 | qdf_mem_free(ptr); |
| 749 | return NULL; |
| 750 | } |
| 751 | ce_ring->base_addr_CE_space_unaligned = base_addr; |
| 752 | |
| 753 | /* Correctly initialize memory to 0 to |
| 754 | * prevent garbage data crashing system |
| 755 | * when download firmware |
| 756 | */ |
| 757 | qdf_mem_zero(ce_ring->base_addr_owner_space_unaligned, |
| 758 | nentries * desc_size + |
| 759 | CE_DESC_RING_ALIGN); |
| 760 | |
| 761 | if (ce_ring->base_addr_CE_space_unaligned & (CE_DESC_RING_ALIGN - 1)) { |
| 762 | |
| 763 | ce_ring->base_addr_CE_space = |
| 764 | (ce_ring->base_addr_CE_space_unaligned + |
| 765 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1); |
| 766 | |
| 767 | ce_ring->base_addr_owner_space = (void *) |
| 768 | (((size_t) ce_ring->base_addr_owner_space_unaligned + |
| 769 | CE_DESC_RING_ALIGN - 1) & ~(CE_DESC_RING_ALIGN - 1)); |
| 770 | } else { |
| 771 | ce_ring->base_addr_CE_space = |
| 772 | ce_ring->base_addr_CE_space_unaligned; |
| 773 | ce_ring->base_addr_owner_space = |
| 774 | ce_ring->base_addr_owner_space_unaligned; |
| 775 | } |
| 776 | |
| 777 | return ce_ring; |
| 778 | } |
| 779 | |
| 780 | static void ce_ring_setup(struct hif_softc *scn, uint8_t ring_type, |
| 781 | uint32_t ce_id, struct CE_ring_state *ring, |
| 782 | struct CE_attr *attr) |
| 783 | { |
| 784 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 785 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 786 | hif_state->ce_services->ce_ring_setup(scn, ring_type, ce_id, |
| 787 | ring, attr); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 788 | } |
| 789 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 790 | int hif_ce_bus_early_suspend(struct hif_softc *scn) |
| 791 | { |
| 792 | uint8_t ul_pipe, dl_pipe; |
| 793 | int ce_id, status, ul_is_polled, dl_is_polled; |
| 794 | struct CE_state *ce_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 795 | |
Houston Hoffman | cbcd839 | 2017-02-08 17:43:13 -0800 | [diff] [blame] | 796 | status = hif_map_service_to_pipe(&scn->osc, WMI_CONTROL_SVC, |
| 797 | &ul_pipe, &dl_pipe, |
| 798 | &ul_is_polled, &dl_is_polled); |
| 799 | if (status) { |
| 800 | HIF_ERROR("%s: pipe_mapping failure", __func__); |
| 801 | return status; |
| 802 | } |
| 803 | |
| 804 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 805 | if (ce_id == ul_pipe) |
| 806 | continue; |
| 807 | if (ce_id == dl_pipe) |
| 808 | continue; |
| 809 | |
| 810 | ce_state = scn->ce_id_to_state[ce_id]; |
| 811 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 812 | if (ce_state->state == CE_RUNNING) |
| 813 | ce_state->state = CE_PAUSED; |
| 814 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 815 | } |
| 816 | |
| 817 | return status; |
| 818 | } |
| 819 | |
| 820 | int hif_ce_bus_late_resume(struct hif_softc *scn) |
| 821 | { |
| 822 | int ce_id; |
| 823 | struct CE_state *ce_state; |
| 824 | int write_index; |
| 825 | bool index_updated; |
| 826 | |
| 827 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 828 | ce_state = scn->ce_id_to_state[ce_id]; |
| 829 | qdf_spin_lock_bh(&ce_state->ce_index_lock); |
| 830 | if (ce_state->state == CE_PENDING) { |
| 831 | write_index = ce_state->src_ring->write_index; |
| 832 | CE_SRC_RING_WRITE_IDX_SET(scn, ce_state->ctrl_addr, |
| 833 | write_index); |
| 834 | ce_state->state = CE_RUNNING; |
| 835 | index_updated = true; |
| 836 | } else { |
| 837 | index_updated = false; |
| 838 | } |
| 839 | |
| 840 | if (ce_state->state == CE_PAUSED) |
| 841 | ce_state->state = CE_RUNNING; |
| 842 | qdf_spin_unlock_bh(&ce_state->ce_index_lock); |
| 843 | |
| 844 | if (index_updated) |
| 845 | hif_record_ce_desc_event(scn, ce_id, |
| 846 | RESUME_WRITE_INDEX_UPDATE, |
| 847 | NULL, NULL, write_index); |
| 848 | } |
| 849 | |
| 850 | return 0; |
| 851 | } |
| 852 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 853 | /** |
| 854 | * ce_oom_recovery() - try to recover rx ce from oom condition |
| 855 | * @context: CE_state of the CE with oom rx ring |
| 856 | * |
| 857 | * the executing work Will continue to be rescheduled untill |
| 858 | * at least 1 descriptor is successfully posted to the rx ring. |
| 859 | * |
| 860 | * return: none |
| 861 | */ |
| 862 | static void ce_oom_recovery(void *context) |
| 863 | { |
| 864 | struct CE_state *ce_state = context; |
| 865 | struct hif_softc *scn = ce_state->scn; |
| 866 | struct HIF_CE_state *ce_softc = HIF_GET_CE_STATE(scn); |
| 867 | struct HIF_CE_pipe_info *pipe_info = |
| 868 | &ce_softc->pipe_info[ce_state->id]; |
| 869 | |
| 870 | hif_post_recv_buffers_for_pipe(pipe_info); |
| 871 | } |
| 872 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 873 | /* |
| 874 | * Initialize a Copy Engine based on caller-supplied attributes. |
| 875 | * This may be called once to initialize both source and destination |
| 876 | * rings or it may be called twice for separate source and destination |
| 877 | * initialization. It may be that only one side or the other is |
| 878 | * initialized by software/firmware. |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 879 | * |
| 880 | * This should be called durring the initialization sequence before |
| 881 | * interupts are enabled, so we don't have to worry about thread safety. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 882 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 883 | struct CE_handle *ce_init(struct hif_softc *scn, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 884 | unsigned int CE_id, struct CE_attr *attr) |
| 885 | { |
| 886 | struct CE_state *CE_state; |
| 887 | uint32_t ctrl_addr; |
| 888 | unsigned int nentries; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 889 | bool malloc_CE_state = false; |
| 890 | bool malloc_src_ring = false; |
| 891 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 892 | QDF_ASSERT(CE_id < scn->ce_count); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 893 | ctrl_addr = CE_BASE_ADDRESS(CE_id); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 894 | CE_state = scn->ce_id_to_state[CE_id]; |
| 895 | |
| 896 | if (!CE_state) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 897 | CE_state = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 898 | (struct CE_state *)qdf_mem_malloc(sizeof(*CE_state)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 899 | if (!CE_state) { |
| 900 | HIF_ERROR("%s: CE_state has no mem", __func__); |
| 901 | return NULL; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 902 | } |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 903 | malloc_CE_state = true; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 904 | qdf_spinlock_create(&CE_state->ce_index_lock); |
Houston Hoffman | 233e909 | 2015-09-02 13:37:21 -0700 | [diff] [blame] | 905 | |
| 906 | CE_state->id = CE_id; |
| 907 | CE_state->ctrl_addr = ctrl_addr; |
| 908 | CE_state->state = CE_RUNNING; |
| 909 | CE_state->attr_flags = attr->flags; |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 910 | qdf_spinlock_create(&CE_state->lro_unloading_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 911 | } |
| 912 | CE_state->scn = scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 913 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 914 | qdf_atomic_init(&CE_state->rx_pending); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 915 | if (attr == NULL) { |
| 916 | /* Already initialized; caller wants the handle */ |
| 917 | return (struct CE_handle *)CE_state; |
| 918 | } |
| 919 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 920 | if (CE_state->src_sz_max) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 921 | QDF_ASSERT(CE_state->src_sz_max == attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 922 | else |
| 923 | CE_state->src_sz_max = attr->src_sz_max; |
| 924 | |
Houston Hoffman | 68e837e | 2015-12-04 12:57:24 -0800 | [diff] [blame] | 925 | ce_init_ce_desc_event_log(CE_id, |
| 926 | attr->src_nentries + attr->dest_nentries); |
| 927 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 928 | /* source ring setup */ |
| 929 | nentries = attr->src_nentries; |
| 930 | if (nentries) { |
| 931 | struct CE_ring_state *src_ring; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 932 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 933 | nentries = roundup_pwr2(nentries); |
| 934 | if (CE_state->src_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 935 | QDF_ASSERT(CE_state->src_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 936 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 937 | src_ring = CE_state->src_ring = |
| 938 | ce_alloc_ring_state(CE_state, |
| 939 | CE_RING_SRC, |
| 940 | nentries); |
| 941 | if (!src_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 942 | /* cannot allocate src ring. If the |
| 943 | * CE_state is allocated locally free |
| 944 | * CE_State and return error. |
| 945 | */ |
| 946 | HIF_ERROR("%s: src ring has no mem", __func__); |
| 947 | if (malloc_CE_state) { |
| 948 | /* allocated CE_state locally */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 949 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 950 | malloc_CE_state = false; |
| 951 | } |
| 952 | return NULL; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 953 | } |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 954 | /* we can allocate src ring. Mark that the src ring is |
| 955 | * allocated locally |
| 956 | */ |
| 957 | malloc_src_ring = true; |
| 958 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 959 | /* |
| 960 | * Also allocate a shadow src ring in |
| 961 | * regular mem to use for faster access. |
| 962 | */ |
| 963 | src_ring->shadow_base_unaligned = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 964 | qdf_mem_malloc(nentries * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 965 | sizeof(struct CE_src_desc) + |
| 966 | CE_DESC_RING_ALIGN); |
| 967 | if (src_ring->shadow_base_unaligned == NULL) { |
| 968 | HIF_ERROR("%s: src ring no shadow_base mem", |
| 969 | __func__); |
| 970 | goto error_no_dma_mem; |
| 971 | } |
| 972 | src_ring->shadow_base = (struct CE_src_desc *) |
| 973 | (((size_t) src_ring->shadow_base_unaligned + |
| 974 | CE_DESC_RING_ALIGN - 1) & |
| 975 | ~(CE_DESC_RING_ALIGN - 1)); |
| 976 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 977 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 978 | goto error_target_access; |
Houston Hoffman | f789c66 | 2016-04-12 15:39:04 -0700 | [diff] [blame] | 979 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 980 | ce_ring_setup(scn, CE_RING_SRC, CE_id, src_ring, attr); |
| 981 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 982 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 983 | goto error_target_access; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 984 | ce_ring_test_initial_indexes(CE_id, src_ring, |
| 985 | "src_ring"); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 986 | } |
| 987 | } |
| 988 | |
| 989 | /* destination ring setup */ |
| 990 | nentries = attr->dest_nentries; |
| 991 | if (nentries) { |
| 992 | struct CE_ring_state *dest_ring; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 993 | |
| 994 | nentries = roundup_pwr2(nentries); |
| 995 | if (CE_state->dest_ring) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 996 | QDF_ASSERT(CE_state->dest_ring->nentries == nentries); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 997 | } else { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 998 | dest_ring = CE_state->dest_ring = |
| 999 | ce_alloc_ring_state(CE_state, |
| 1000 | CE_RING_DEST, |
| 1001 | nentries); |
| 1002 | if (!dest_ring) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1003 | /* cannot allocate dst ring. If the CE_state |
| 1004 | * or src ring is allocated locally free |
| 1005 | * CE_State and src ring and return error. |
| 1006 | */ |
| 1007 | HIF_ERROR("%s: dest ring has no mem", |
| 1008 | __func__); |
Poddar, Siddarth | 55d6da0 | 2017-03-31 18:42:54 +0530 | [diff] [blame] | 1009 | goto error_no_dma_mem; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1010 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1011 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1012 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1013 | goto error_target_access; |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1014 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1015 | ce_ring_setup(scn, CE_RING_DEST, CE_id, |
| 1016 | dest_ring, attr); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1017 | |
| 1018 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1019 | goto error_target_access; |
Houston Hoffman | 4780817 | 2016-05-06 10:04:21 -0700 | [diff] [blame] | 1020 | |
| 1021 | ce_ring_test_initial_indexes(CE_id, dest_ring, |
| 1022 | "dest_ring"); |
| 1023 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1024 | /* For srng based target, init status ring here */ |
| 1025 | if (ce_srng_based(CE_state->scn)) { |
| 1026 | CE_state->status_ring = |
| 1027 | ce_alloc_ring_state(CE_state, |
| 1028 | CE_RING_STATUS, |
| 1029 | nentries); |
| 1030 | if (CE_state->status_ring == NULL) { |
| 1031 | /*Allocation failed. Cleanup*/ |
| 1032 | qdf_mem_free(CE_state->dest_ring); |
| 1033 | if (malloc_src_ring) { |
| 1034 | qdf_mem_free |
| 1035 | (CE_state->src_ring); |
| 1036 | CE_state->src_ring = NULL; |
| 1037 | malloc_src_ring = false; |
| 1038 | } |
| 1039 | if (malloc_CE_state) { |
| 1040 | /* allocated CE_state locally */ |
| 1041 | scn->ce_id_to_state[CE_id] = |
| 1042 | NULL; |
| 1043 | qdf_mem_free(CE_state); |
| 1044 | malloc_CE_state = false; |
| 1045 | } |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1046 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1047 | return NULL; |
| 1048 | } |
| 1049 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1050 | goto error_target_access; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1051 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1052 | ce_ring_setup(scn, CE_RING_STATUS, CE_id, |
| 1053 | CE_state->status_ring, attr); |
| 1054 | |
| 1055 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1056 | goto error_target_access; |
| 1057 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1058 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1059 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1060 | /* epping */ |
| 1061 | /* poll timer */ |
| 1062 | if ((CE_state->attr_flags & CE_ATTR_ENABLE_POLL)) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1063 | qdf_timer_init(scn->qdf_dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1064 | &CE_state->poll_timer, |
| 1065 | ce_poll_timeout, |
| 1066 | CE_state, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1067 | QDF_TIMER_TYPE_SW); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1068 | CE_state->timer_inited = true; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1069 | qdf_timer_mod(&CE_state->poll_timer, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1070 | CE_POLL_TIMEOUT); |
| 1071 | } |
| 1072 | } |
| 1073 | } |
| 1074 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1075 | if (!ce_srng_based(scn)) { |
| 1076 | /* Enable CE error interrupts */ |
| 1077 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 1078 | goto error_target_access; |
| 1079 | CE_ERROR_INTR_ENABLE(scn, ctrl_addr); |
| 1080 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 1081 | goto error_target_access; |
| 1082 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1083 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1084 | qdf_create_work(scn->qdf_dev, &CE_state->oom_allocation_work, |
| 1085 | ce_oom_recovery, CE_state); |
| 1086 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1087 | /* update the htt_data attribute */ |
| 1088 | ce_mark_datapath(CE_state); |
Houston Hoffman | b01db18 | 2017-03-13 14:38:09 -0700 | [diff] [blame] | 1089 | scn->ce_id_to_state[CE_id] = CE_state; |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1090 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1091 | return (struct CE_handle *)CE_state; |
| 1092 | |
Houston Hoffman | 4411ad4 | 2016-03-14 21:12:04 -0700 | [diff] [blame] | 1093 | error_target_access: |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1094 | error_no_dma_mem: |
| 1095 | ce_fini((struct CE_handle *)CE_state); |
| 1096 | return NULL; |
| 1097 | } |
| 1098 | |
| 1099 | #ifdef WLAN_FEATURE_FASTPATH |
| 1100 | /** |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1101 | * hif_enable_fastpath() Update that we have enabled fastpath mode |
| 1102 | * @hif_ctx: HIF context |
| 1103 | * |
| 1104 | * For use in data path |
| 1105 | * |
| 1106 | * Retrun: void |
| 1107 | */ |
| 1108 | void hif_enable_fastpath(struct hif_opaque_softc *hif_ctx) |
| 1109 | { |
| 1110 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1111 | |
Houston Hoffman | d63cd74 | 2016-12-05 11:59:56 -0800 | [diff] [blame] | 1112 | if (ce_srng_based(scn)) { |
| 1113 | HIF_INFO("%s, srng rings do not support fastpath", __func__); |
| 1114 | return; |
| 1115 | } |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1116 | HIF_DBG("%s, Enabling fastpath mode", __func__); |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1117 | scn->fastpath_mode_on = true; |
| 1118 | } |
| 1119 | |
| 1120 | /** |
| 1121 | * hif_is_fastpath_mode_enabled - API to query if fasthpath mode is enabled |
| 1122 | * @hif_ctx: HIF Context |
| 1123 | * |
| 1124 | * For use in data path to skip HTC |
| 1125 | * |
| 1126 | * Return: bool |
| 1127 | */ |
| 1128 | bool hif_is_fastpath_mode_enabled(struct hif_opaque_softc *hif_ctx) |
| 1129 | { |
| 1130 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1131 | |
| 1132 | return scn->fastpath_mode_on; |
| 1133 | } |
| 1134 | |
| 1135 | /** |
| 1136 | * hif_get_ce_handle - API to get CE handle for FastPath mode |
| 1137 | * @hif_ctx: HIF Context |
| 1138 | * @id: CopyEngine Id |
| 1139 | * |
| 1140 | * API to return CE handle for fastpath mode |
| 1141 | * |
| 1142 | * Return: void |
| 1143 | */ |
| 1144 | void *hif_get_ce_handle(struct hif_opaque_softc *hif_ctx, int id) |
| 1145 | { |
| 1146 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
| 1147 | |
| 1148 | return scn->ce_id_to_state[id]; |
| 1149 | } |
| 1150 | |
| 1151 | /** |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1152 | * ce_h2t_tx_ce_cleanup() Place holder function for H2T CE cleanup. |
| 1153 | * No processing is required inside this function. |
| 1154 | * @ce_hdl: Cope engine handle |
| 1155 | * Using an assert, this function makes sure that, |
| 1156 | * the TX CE has been processed completely. |
Houston Hoffman | 9a831ef | 2015-09-03 14:42:40 -0700 | [diff] [blame] | 1157 | * |
| 1158 | * This is called while dismantling CE structures. No other thread |
| 1159 | * should be using these structures while dismantling is occuring |
| 1160 | * therfore no locking is needed. |
| 1161 | * |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1162 | * Return: none |
| 1163 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1164 | void ce_h2t_tx_ce_cleanup(struct CE_handle *ce_hdl) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1165 | { |
| 1166 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1167 | struct CE_ring_state *src_ring = ce_state->src_ring; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1168 | struct hif_softc *sc = ce_state->scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1169 | uint32_t sw_index, write_index; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1170 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1171 | if (hif_is_nss_wifi_enabled(sc)) |
| 1172 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1173 | |
Houston Hoffman | c7d5429 | 2016-04-13 18:55:37 -0700 | [diff] [blame] | 1174 | if (sc->fastpath_mode_on && ce_state->htt_tx_data) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1175 | HIF_DBG("%s %d Fastpath mode ON, Cleaning up HTT Tx CE", |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1176 | __func__, __LINE__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1177 | sw_index = src_ring->sw_index; |
| 1178 | write_index = src_ring->sw_index; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1179 | |
| 1180 | /* At this point Tx CE should be clean */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1181 | qdf_assert_always(sw_index == write_index); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1182 | } |
| 1183 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1184 | |
| 1185 | /** |
| 1186 | * ce_t2h_msg_ce_cleanup() - Cleanup buffers on the t2h datapath msg queue. |
| 1187 | * @ce_hdl: Handle to CE |
| 1188 | * |
| 1189 | * These buffers are never allocated on the fly, but |
| 1190 | * are allocated only once during HIF start and freed |
| 1191 | * only once during HIF stop. |
| 1192 | * NOTE: |
| 1193 | * The assumption here is there is no in-flight DMA in progress |
| 1194 | * currently, so that buffers can be freed up safely. |
| 1195 | * |
| 1196 | * Return: NONE |
| 1197 | */ |
| 1198 | void ce_t2h_msg_ce_cleanup(struct CE_handle *ce_hdl) |
| 1199 | { |
| 1200 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 1201 | struct CE_ring_state *dst_ring = ce_state->dest_ring; |
| 1202 | qdf_nbuf_t nbuf; |
| 1203 | int i; |
| 1204 | |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1205 | if (ce_state->scn->fastpath_mode_on == false) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1206 | return; |
Houston Hoffman | 7fe51b1 | 2016-11-14 18:01:05 -0800 | [diff] [blame] | 1207 | |
| 1208 | if (!ce_state->htt_rx_data) |
| 1209 | return; |
| 1210 | |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1211 | /* |
| 1212 | * when fastpath_mode is on and for datapath CEs. Unlike other CE's, |
| 1213 | * this CE is completely full: does not leave one blank space, to |
| 1214 | * distinguish between empty queue & full queue. So free all the |
| 1215 | * entries. |
| 1216 | */ |
| 1217 | for (i = 0; i < dst_ring->nentries; i++) { |
| 1218 | nbuf = dst_ring->per_transfer_context[i]; |
| 1219 | |
| 1220 | /* |
| 1221 | * The reasons for doing this check are: |
| 1222 | * 1) Protect against calling cleanup before allocating buffers |
| 1223 | * 2) In a corner case, FASTPATH_mode_on may be set, but we |
| 1224 | * could have a partially filled ring, because of a memory |
| 1225 | * allocation failure in the middle of allocating ring. |
| 1226 | * This check accounts for that case, checking |
| 1227 | * fastpath_mode_on flag or started flag would not have |
| 1228 | * covered that case. This is not in performance path, |
| 1229 | * so OK to do this. |
| 1230 | */ |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1231 | if (nbuf) { |
| 1232 | qdf_nbuf_unmap_single(ce_state->scn->qdf_dev, nbuf, |
| 1233 | QDF_DMA_FROM_DEVICE); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1234 | qdf_nbuf_free(nbuf); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1235 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1236 | } |
| 1237 | } |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1238 | |
| 1239 | /** |
| 1240 | * hif_update_fastpath_recv_bufs_cnt() - Increments the Rx buf count by 1 |
| 1241 | * @scn: HIF handle |
| 1242 | * |
| 1243 | * Datapath Rx CEs are special case, where we reuse all the message buffers. |
| 1244 | * Hence we have to post all the entries in the pipe, even, in the beginning |
| 1245 | * unlike for other CE pipes where one less than dest_nentries are filled in |
| 1246 | * the beginning. |
| 1247 | * |
| 1248 | * Return: None |
| 1249 | */ |
| 1250 | static void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
| 1251 | { |
| 1252 | int pipe_num; |
| 1253 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 1254 | |
| 1255 | if (scn->fastpath_mode_on == false) |
| 1256 | return; |
| 1257 | |
| 1258 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1259 | struct HIF_CE_pipe_info *pipe_info = |
| 1260 | &hif_state->pipe_info[pipe_num]; |
| 1261 | struct CE_state *ce_state = |
| 1262 | scn->ce_id_to_state[pipe_info->pipe_num]; |
| 1263 | |
| 1264 | if (ce_state->htt_rx_data) |
| 1265 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 1266 | } |
| 1267 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1268 | #else |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1269 | static inline void hif_update_fastpath_recv_bufs_cnt(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1270 | { |
| 1271 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1272 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1273 | static inline bool ce_is_fastpath_enabled(struct hif_softc *scn) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1274 | { |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1275 | return false; |
| 1276 | } |
| 1277 | |
| 1278 | static inline bool ce_is_fastpath_handler_registered(struct CE_state *ce_state) |
| 1279 | { |
| 1280 | return false; |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1281 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1282 | #endif /* WLAN_FEATURE_FASTPATH */ |
| 1283 | |
| 1284 | void ce_fini(struct CE_handle *copyeng) |
| 1285 | { |
| 1286 | struct CE_state *CE_state = (struct CE_state *)copyeng; |
| 1287 | unsigned int CE_id = CE_state->id; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1288 | struct hif_softc *scn = CE_state->scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1289 | |
| 1290 | CE_state->state = CE_UNUSED; |
| 1291 | scn->ce_id_to_state[CE_id] = NULL; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1292 | |
| 1293 | qdf_spinlock_destroy(&CE_state->lro_unloading_lock); |
| 1294 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame^] | 1295 | qdf_lro_deinit(CE_state->lro_data); |
| 1296 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1297 | if (CE_state->src_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1298 | /* Cleanup the datapath Tx ring */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1299 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1300 | |
| 1301 | if (CE_state->src_ring->shadow_base_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1302 | qdf_mem_free(CE_state->src_ring->shadow_base_unaligned); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1303 | if (CE_state->src_ring->base_addr_owner_space_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1304 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1305 | scn->qdf_dev->dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1306 | (CE_state->src_ring->nentries * |
| 1307 | sizeof(struct CE_src_desc) + |
| 1308 | CE_DESC_RING_ALIGN), |
| 1309 | CE_state->src_ring-> |
| 1310 | base_addr_owner_space_unaligned, |
| 1311 | CE_state->src_ring-> |
| 1312 | base_addr_CE_space, 0); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1313 | qdf_mem_free(CE_state->src_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1314 | } |
| 1315 | if (CE_state->dest_ring) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 1316 | /* Cleanup the datapath Rx ring */ |
| 1317 | ce_t2h_msg_ce_cleanup(copyeng); |
| 1318 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1319 | if (CE_state->dest_ring->base_addr_owner_space_unaligned) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1320 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1321 | scn->qdf_dev->dev, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1322 | (CE_state->dest_ring->nentries * |
| 1323 | sizeof(struct CE_dest_desc) + |
| 1324 | CE_DESC_RING_ALIGN), |
| 1325 | CE_state->dest_ring-> |
| 1326 | base_addr_owner_space_unaligned, |
| 1327 | CE_state->dest_ring-> |
| 1328 | base_addr_CE_space, 0); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1329 | qdf_mem_free(CE_state->dest_ring); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1330 | |
| 1331 | /* epping */ |
| 1332 | if (CE_state->timer_inited) { |
| 1333 | CE_state->timer_inited = false; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1334 | qdf_timer_free(&CE_state->poll_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1335 | } |
| 1336 | } |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 1337 | if ((ce_srng_based(CE_state->scn)) && (CE_state->status_ring)) { |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 1338 | /* Cleanup the datapath Tx ring */ |
| 1339 | ce_h2t_tx_ce_cleanup(copyeng); |
| 1340 | |
| 1341 | if (CE_state->status_ring->shadow_base_unaligned) |
| 1342 | qdf_mem_free( |
| 1343 | CE_state->status_ring->shadow_base_unaligned); |
| 1344 | |
| 1345 | if (CE_state->status_ring->base_addr_owner_space_unaligned) |
| 1346 | qdf_mem_free_consistent(scn->qdf_dev, |
| 1347 | scn->qdf_dev->dev, |
| 1348 | (CE_state->status_ring->nentries * |
| 1349 | sizeof(struct CE_src_desc) + |
| 1350 | CE_DESC_RING_ALIGN), |
| 1351 | CE_state->status_ring-> |
| 1352 | base_addr_owner_space_unaligned, |
| 1353 | CE_state->status_ring-> |
| 1354 | base_addr_CE_space, 0); |
| 1355 | qdf_mem_free(CE_state->status_ring); |
| 1356 | } |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 1357 | |
| 1358 | qdf_spinlock_destroy(&CE_state->ce_index_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1359 | qdf_mem_free(CE_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1360 | } |
| 1361 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1362 | void hif_detach_htc(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1363 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1364 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1365 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1366 | qdf_mem_zero(&hif_state->msg_callbacks_pending, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1367 | sizeof(hif_state->msg_callbacks_pending)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1368 | qdf_mem_zero(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1369 | sizeof(hif_state->msg_callbacks_current)); |
| 1370 | } |
| 1371 | |
| 1372 | /* Send the first nbytes bytes of the buffer */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1373 | QDF_STATUS |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1374 | hif_send_head(struct hif_opaque_softc *hif_ctx, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1375 | uint8_t pipe, unsigned int transfer_id, unsigned int nbytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1376 | qdf_nbuf_t nbuf, unsigned int data_attr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1377 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1378 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1379 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1380 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 1381 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 1382 | int bytes = nbytes, nfrags = 0; |
| 1383 | struct ce_sendlist sendlist; |
| 1384 | int status, i = 0; |
| 1385 | unsigned int mux_id = 0; |
| 1386 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1387 | QDF_ASSERT(nbytes <= qdf_nbuf_len(nbuf)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1388 | |
| 1389 | transfer_id = |
| 1390 | (mux_id & MUX_ID_MASK) | |
| 1391 | (transfer_id & TRANSACTION_ID_MASK); |
| 1392 | data_attr &= DESC_DATA_FLAG_MASK; |
| 1393 | /* |
| 1394 | * The common case involves sending multiple fragments within a |
| 1395 | * single download (the tx descriptor and the tx frame header). |
| 1396 | * So, optimize for the case of multiple fragments by not even |
| 1397 | * checking whether it's necessary to use a sendlist. |
| 1398 | * The overhead of using a sendlist for a single buffer download |
| 1399 | * is not a big deal, since it happens rarely (for WMI messages). |
| 1400 | */ |
| 1401 | ce_sendlist_init(&sendlist); |
| 1402 | do { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1403 | qdf_dma_addr_t frag_paddr; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1404 | int frag_bytes; |
| 1405 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1406 | frag_paddr = qdf_nbuf_get_frag_paddr(nbuf, nfrags); |
| 1407 | frag_bytes = qdf_nbuf_get_frag_len(nbuf, nfrags); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1408 | /* |
| 1409 | * Clear the packet offset for all but the first CE desc. |
| 1410 | */ |
| 1411 | if (i++ > 0) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1412 | data_attr &= ~QDF_CE_TX_PKT_OFFSET_BIT_M; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1413 | |
| 1414 | status = ce_sendlist_buf_add(&sendlist, frag_paddr, |
| 1415 | frag_bytes > |
| 1416 | bytes ? bytes : frag_bytes, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1417 | qdf_nbuf_get_frag_is_wordstream |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1418 | (nbuf, |
| 1419 | nfrags) ? 0 : |
| 1420 | CE_SEND_FLAG_SWAP_DISABLE, |
| 1421 | data_attr); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1422 | if (status != QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1423 | HIF_ERROR("%s: error, frag_num %d larger than limit", |
| 1424 | __func__, nfrags); |
| 1425 | return status; |
| 1426 | } |
| 1427 | bytes -= frag_bytes; |
| 1428 | nfrags++; |
| 1429 | } while (bytes > 0); |
| 1430 | |
| 1431 | /* Make sure we have resources to handle this request */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1432 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1433 | if (pipe_info->num_sends_allowed < nfrags) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1434 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1435 | ce_pkt_error_count_incr(hif_state, HIF_PIPE_NO_RESOURCE); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1436 | return QDF_STATUS_E_RESOURCES; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1437 | } |
| 1438 | pipe_info->num_sends_allowed -= nfrags; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1439 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1440 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1441 | if (qdf_unlikely(ce_hdl == NULL)) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1442 | HIF_ERROR("%s: error CE handle is null", __func__); |
| 1443 | return A_ERROR; |
| 1444 | } |
| 1445 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1446 | QDF_NBUF_UPDATE_TX_PKT_COUNT(nbuf, QDF_NBUF_TX_PKT_HIF); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1447 | DPTRACE(qdf_dp_trace(nbuf, QDF_DP_TRACE_HIF_PACKET_PTR_RECORD, |
Nirav Shah | eaa20d8 | 2016-04-25 18:01:05 +0530 | [diff] [blame] | 1448 | qdf_nbuf_data_addr(nbuf), |
Nirav Shah | 29beae0 | 2016-04-26 22:58:54 +0530 | [diff] [blame] | 1449 | sizeof(qdf_nbuf_data(nbuf)), QDF_TX)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1450 | status = ce_sendlist_send(ce_hdl, nbuf, &sendlist, transfer_id); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1451 | QDF_ASSERT(status == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1452 | |
| 1453 | return status; |
| 1454 | } |
| 1455 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1456 | void hif_send_complete_check(struct hif_opaque_softc *hif_ctx, uint8_t pipe, |
| 1457 | int force) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1458 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1459 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 1460 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1461 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1462 | if (!force) { |
| 1463 | int resources; |
| 1464 | /* |
| 1465 | * Decide whether to actually poll for completions, or just |
| 1466 | * wait for a later chance. If there seem to be plenty of |
| 1467 | * resources left, then just wait, since checking involves |
| 1468 | * reading a CE register, which is a relatively expensive |
| 1469 | * operation. |
| 1470 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1471 | resources = hif_get_free_queue_number(hif_ctx, pipe); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1472 | /* |
| 1473 | * If at least 50% of the total resources are still available, |
| 1474 | * don't bother checking again yet. |
| 1475 | */ |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1476 | if (resources > (hif_state->host_ce_config[pipe].src_nentries >> |
| 1477 | 1)) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1478 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1479 | } |
Houston Hoffman | 56e0d70 | 2016-05-05 17:48:06 -0700 | [diff] [blame] | 1480 | #if ATH_11AC_TXCOMPACT |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1481 | ce_per_engine_servicereap(scn, pipe); |
| 1482 | #else |
| 1483 | ce_per_engine_service(scn, pipe); |
| 1484 | #endif |
| 1485 | } |
| 1486 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1487 | uint16_t |
| 1488 | hif_get_free_queue_number(struct hif_opaque_softc *hif_ctx, uint8_t pipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1489 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1490 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1491 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 1492 | uint16_t rv; |
| 1493 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1494 | qdf_spin_lock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1495 | rv = pipe_info->num_sends_allowed; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1496 | qdf_spin_unlock_bh(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1497 | return rv; |
| 1498 | } |
| 1499 | |
| 1500 | /* Called by lower (CE) layer when a send to Target completes. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1501 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1502 | hif_pci_ce_send_done(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1503 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1504 | unsigned int nbytes, unsigned int transfer_id, |
| 1505 | unsigned int sw_index, unsigned int hw_index, |
| 1506 | unsigned int toeplitz_hash_result) |
| 1507 | { |
| 1508 | struct HIF_CE_pipe_info *pipe_info = |
| 1509 | (struct HIF_CE_pipe_info *)ce_context; |
| 1510 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1511 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1512 | unsigned int sw_idx = sw_index, hw_idx = hw_index; |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1513 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1514 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1515 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1516 | do { |
| 1517 | /* |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1518 | * The upper layer callback will be triggered |
| 1519 | * when last fragment is complteted. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1520 | */ |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1521 | if (transfer_context != CE_SENDLIST_ITEM_CTXT) { |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1522 | if (scn->target_status == TARGET_STATUS_RESET) { |
| 1523 | |
| 1524 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 1525 | transfer_context, |
| 1526 | QDF_DMA_TO_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1527 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1528 | } else |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 1529 | msg_callbacks->txCompletionHandler( |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1530 | msg_callbacks->Context, |
| 1531 | transfer_context, transfer_id, |
| 1532 | toeplitz_hash_result); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1533 | } |
| 1534 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1535 | qdf_spin_lock(&pipe_info->completion_freeq_lock); |
Houston Hoffman | 8511851 | 2015-09-28 14:17:11 -0700 | [diff] [blame] | 1536 | pipe_info->num_sends_allowed++; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1537 | qdf_spin_unlock(&pipe_info->completion_freeq_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1538 | } while (ce_completed_send_next(copyeng, |
| 1539 | &ce_context, &transfer_context, |
| 1540 | &CE_data, &nbytes, &transfer_id, |
| 1541 | &sw_idx, &hw_idx, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1542 | &toeplitz_hash_result) == QDF_STATUS_SUCCESS); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1543 | } |
| 1544 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1545 | /** |
| 1546 | * hif_ce_do_recv(): send message from copy engine to upper layers |
| 1547 | * @msg_callbacks: structure containing callback and callback context |
| 1548 | * @netbuff: skb containing message |
| 1549 | * @nbytes: number of bytes in the message |
| 1550 | * @pipe_info: used for the pipe_number info |
| 1551 | * |
| 1552 | * Checks the packet length, configures the lenght in the netbuff, |
| 1553 | * and calls the upper layer callback. |
| 1554 | * |
| 1555 | * return: None |
| 1556 | */ |
| 1557 | static inline void hif_ce_do_recv(struct hif_msg_callbacks *msg_callbacks, |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1558 | qdf_nbuf_t netbuf, int nbytes, |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1559 | struct HIF_CE_pipe_info *pipe_info) { |
| 1560 | if (nbytes <= pipe_info->buf_sz) { |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1561 | qdf_nbuf_set_pktlen(netbuf, nbytes); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1562 | msg_callbacks-> |
| 1563 | rxCompletionHandler(msg_callbacks->Context, |
| 1564 | netbuf, pipe_info->pipe_num); |
| 1565 | } else { |
| 1566 | HIF_ERROR("%s: Invalid Rx msg buf:%p nbytes:%d", |
| 1567 | __func__, netbuf, nbytes); |
Houston Hoffman | 1c72830 | 2017-03-10 16:58:49 -0800 | [diff] [blame] | 1568 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1569 | qdf_nbuf_free(netbuf); |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1570 | } |
| 1571 | } |
| 1572 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1573 | /* Called by lower (CE) layer when data is received from the Target. */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1574 | static void |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1575 | hif_pci_ce_recv_data(struct CE_handle *copyeng, void *ce_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1576 | void *transfer_context, qdf_dma_addr_t CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1577 | unsigned int nbytes, unsigned int transfer_id, |
| 1578 | unsigned int flags) |
| 1579 | { |
| 1580 | struct HIF_CE_pipe_info *pipe_info = |
| 1581 | (struct HIF_CE_pipe_info *)ce_context; |
| 1582 | struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state; |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 1583 | struct CE_state *ce_state = (struct CE_state *) copyeng; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1584 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | e02e12d | 2016-03-14 21:11:36 -0700 | [diff] [blame] | 1585 | #ifdef HIF_PCI |
| 1586 | struct hif_pci_softc *hif_pci_sc = HIF_GET_PCI_SOFTC(hif_state); |
| 1587 | #endif |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1588 | struct hif_msg_callbacks *msg_callbacks = |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1589 | &pipe_info->pipe_callbacks; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1590 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1591 | do { |
Houston Hoffman | e02e12d | 2016-03-14 21:11:36 -0700 | [diff] [blame] | 1592 | #ifdef HIF_PCI |
| 1593 | hif_pm_runtime_mark_last_busy(hif_pci_sc->dev); |
| 1594 | #endif |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1595 | qdf_nbuf_unmap_single(scn->qdf_dev, |
| 1596 | (qdf_nbuf_t) transfer_context, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1597 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1598 | |
Houston Hoffman | 910c626 | 2015-09-28 12:56:25 -0700 | [diff] [blame] | 1599 | atomic_inc(&pipe_info->recv_bufs_needed); |
| 1600 | hif_post_recv_buffers_for_pipe(pipe_info); |
Komal Seelam | 6ee5590 | 2016-04-11 17:11:07 +0530 | [diff] [blame] | 1601 | if (scn->target_status == TARGET_STATUS_RESET) |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1602 | qdf_nbuf_free(transfer_context); |
Houston Hoffman | 49794a3 | 2015-12-21 12:14:56 -0800 | [diff] [blame] | 1603 | else |
| 1604 | hif_ce_do_recv(msg_callbacks, transfer_context, |
Houston Hoffman | 9c0f80a | 2015-09-28 18:36:36 -0700 | [diff] [blame] | 1605 | nbytes, pipe_info); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1606 | |
| 1607 | /* Set up force_break flag if num of receices reaches |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1608 | * MAX_NUM_OF_RECEIVES |
| 1609 | */ |
Houston Hoffman | 5bf441a | 2015-09-02 11:52:10 -0700 | [diff] [blame] | 1610 | ce_state->receive_count++; |
Houston Hoffman | 0565272 | 2016-04-29 16:58:59 -0700 | [diff] [blame] | 1611 | if (qdf_unlikely(hif_ce_service_should_yield(scn, ce_state))) { |
Houston Hoffman | 18c7fc5 | 2015-09-02 11:44:42 -0700 | [diff] [blame] | 1612 | ce_state->force_break = 1; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1613 | break; |
| 1614 | } |
| 1615 | } while (ce_completed_recv_next(copyeng, &ce_context, &transfer_context, |
| 1616 | &CE_data, &nbytes, &transfer_id, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1617 | &flags) == QDF_STATUS_SUCCESS); |
Houston Hoffman | f460785 | 2015-12-17 17:14:40 -0800 | [diff] [blame] | 1618 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1619 | } |
| 1620 | |
| 1621 | /* TBDXXX: Set CE High Watermark; invoke txResourceAvailHandler in response */ |
| 1622 | |
| 1623 | void |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1624 | hif_post_init(struct hif_opaque_softc *hif_ctx, void *unused, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1625 | struct hif_msg_callbacks *callbacks) |
| 1626 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1627 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1628 | |
| 1629 | #ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG |
| 1630 | spin_lock_init(&pcie_access_log_lock); |
| 1631 | #endif |
| 1632 | /* Save callbacks for later installation */ |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1633 | qdf_mem_copy(&hif_state->msg_callbacks_pending, callbacks, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1634 | sizeof(hif_state->msg_callbacks_pending)); |
| 1635 | |
| 1636 | } |
| 1637 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1638 | static int hif_completion_thread_startup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1639 | { |
| 1640 | struct CE_handle *ce_diag = hif_state->ce_diag; |
| 1641 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1642 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1643 | struct hif_msg_callbacks *hif_msg_callbacks = |
| 1644 | &hif_state->msg_callbacks_current; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1645 | |
| 1646 | /* daemonize("hif_compl_thread"); */ |
| 1647 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1648 | if (scn->ce_count == 0) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 1649 | HIF_ERROR("%s: Invalid ce_count", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1650 | return -EINVAL; |
| 1651 | } |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1652 | |
| 1653 | if (!hif_msg_callbacks || |
| 1654 | !hif_msg_callbacks->rxCompletionHandler || |
| 1655 | !hif_msg_callbacks->txCompletionHandler) { |
| 1656 | HIF_ERROR("%s: no completion handler registered", __func__); |
| 1657 | return -EFAULT; |
| 1658 | } |
| 1659 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1660 | A_TARGET_ACCESS_LIKELY(scn); |
| 1661 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1662 | struct CE_attr attr; |
| 1663 | struct HIF_CE_pipe_info *pipe_info; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1664 | |
| 1665 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1666 | if (pipe_info->ce_hdl == ce_diag) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1667 | continue; /* Handle Diagnostic CE specially */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 1668 | attr = hif_state->host_ce_config[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1669 | if (attr.src_nentries) { |
| 1670 | /* pipe used to send to target */ |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 1671 | HIF_DBG("%s: pipe_num:%d pipe_info:0x%p", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1672 | __func__, pipe_num, pipe_info); |
| 1673 | ce_send_cb_register(pipe_info->ce_hdl, |
| 1674 | hif_pci_ce_send_done, pipe_info, |
| 1675 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1676 | pipe_info->num_sends_allowed = attr.src_nentries - 1; |
| 1677 | } |
| 1678 | if (attr.dest_nentries) { |
| 1679 | /* pipe used to receive from target */ |
| 1680 | ce_recv_cb_register(pipe_info->ce_hdl, |
| 1681 | hif_pci_ce_recv_data, pipe_info, |
| 1682 | attr.flags & CE_ATTR_DISABLE_INTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1683 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 1684 | |
| 1685 | if (attr.src_nentries) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1686 | qdf_spinlock_create(&pipe_info->completion_freeq_lock); |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 1687 | |
| 1688 | qdf_mem_copy(&pipe_info->pipe_callbacks, hif_msg_callbacks, |
| 1689 | sizeof(pipe_info->pipe_callbacks)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1690 | } |
Houston Hoffman | 6666df7 | 2015-11-30 16:48:35 -0800 | [diff] [blame] | 1691 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1692 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 1693 | return 0; |
| 1694 | } |
| 1695 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1696 | /* |
| 1697 | * Install pending msg callbacks. |
| 1698 | * |
| 1699 | * TBDXXX: This hack is needed because upper layers install msg callbacks |
| 1700 | * for use with HTC before BMI is done; yet this HIF implementation |
| 1701 | * needs to continue to use BMI msg callbacks. Really, upper layers |
| 1702 | * should not register HTC callbacks until AFTER BMI phase. |
| 1703 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1704 | static void hif_msg_callbacks_install(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1705 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1706 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1707 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1708 | qdf_mem_copy(&hif_state->msg_callbacks_current, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1709 | &hif_state->msg_callbacks_pending, |
| 1710 | sizeof(hif_state->msg_callbacks_pending)); |
| 1711 | } |
| 1712 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 1713 | void hif_get_default_pipe(struct hif_opaque_softc *hif_hdl, uint8_t *ULPipe, |
| 1714 | uint8_t *DLPipe) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1715 | { |
| 1716 | int ul_is_polled, dl_is_polled; |
| 1717 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1718 | (void)hif_map_service_to_pipe(hif_hdl, HTC_CTRL_RSVD_SVC, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1719 | ULPipe, DLPipe, &ul_is_polled, &dl_is_polled); |
| 1720 | } |
| 1721 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1722 | /** |
| 1723 | * hif_dump_pipe_debug_count() - Log error count |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1724 | * @scn: hif_softc pointer. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1725 | * |
| 1726 | * Output the pipe error counts of each pipe to log file |
| 1727 | * |
| 1728 | * Return: N/A |
| 1729 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1730 | void hif_dump_pipe_debug_count(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1731 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1732 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1733 | int pipe_num; |
| 1734 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1735 | if (hif_state == NULL) { |
| 1736 | HIF_ERROR("%s hif_state is NULL", __func__); |
| 1737 | return; |
| 1738 | } |
| 1739 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1740 | struct HIF_CE_pipe_info *pipe_info; |
| 1741 | |
| 1742 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 1743 | |
| 1744 | if (pipe_info->nbuf_alloc_err_count > 0 || |
| 1745 | pipe_info->nbuf_dma_err_count > 0 || |
| 1746 | pipe_info->nbuf_ce_enqueue_err_count) |
| 1747 | HIF_ERROR( |
| 1748 | "%s: pipe_id = %d, recv_bufs_needed = %d, nbuf_alloc_err_count = %u, nbuf_dma_err_count = %u, nbuf_ce_enqueue_err_count = %u", |
| 1749 | __func__, pipe_info->pipe_num, |
| 1750 | atomic_read(&pipe_info->recv_bufs_needed), |
| 1751 | pipe_info->nbuf_alloc_err_count, |
| 1752 | pipe_info->nbuf_dma_err_count, |
| 1753 | pipe_info->nbuf_ce_enqueue_err_count); |
| 1754 | } |
| 1755 | } |
| 1756 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1757 | static void hif_post_recv_buffers_failure(struct HIF_CE_pipe_info *pipe_info, |
| 1758 | void *nbuf, uint32_t *error_cnt, |
| 1759 | enum hif_ce_event_type failure_type, |
| 1760 | const char *failure_type_string) |
| 1761 | { |
| 1762 | int bufs_needed_tmp = atomic_inc_return(&pipe_info->recv_bufs_needed); |
| 1763 | struct CE_state *CE_state = (struct CE_state *)pipe_info->ce_hdl; |
| 1764 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
| 1765 | int ce_id = CE_state->id; |
| 1766 | uint32_t error_cnt_tmp; |
| 1767 | |
| 1768 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
| 1769 | error_cnt_tmp = ++(*error_cnt); |
| 1770 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Himanshu Agarwal | 38cea4a | 2017-03-30 19:02:52 +0530 | [diff] [blame] | 1771 | HIF_DBG("%s: pipe_num %d, needed %d, err_cnt = %u, fail_type = %s", |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1772 | __func__, pipe_info->pipe_num, bufs_needed_tmp, error_cnt_tmp, |
| 1773 | failure_type_string); |
| 1774 | hif_record_ce_desc_event(scn, ce_id, failure_type, |
| 1775 | NULL, nbuf, bufs_needed_tmp); |
| 1776 | /* if we fail to allocate the last buffer for an rx pipe, |
| 1777 | * there is no trigger to refill the ce and we will |
| 1778 | * eventually crash |
| 1779 | */ |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 1780 | if (bufs_needed_tmp == CE_state->dest_ring->nentries - 1) |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1781 | qdf_sched_work(scn->qdf_dev, &CE_state->oom_allocation_work); |
Himanshu Agarwal | bedeed9 | 2017-03-21 14:05:10 +0530 | [diff] [blame] | 1782 | |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1783 | } |
| 1784 | |
| 1785 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1786 | |
| 1787 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1788 | static int hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info) |
| 1789 | { |
| 1790 | struct CE_handle *ce_hdl; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1791 | qdf_size_t buf_sz; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1792 | struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1793 | QDF_STATUS ret; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1794 | uint32_t bufs_posted = 0; |
| 1795 | |
| 1796 | buf_sz = pipe_info->buf_sz; |
| 1797 | if (buf_sz == 0) { |
| 1798 | /* Unused Copy Engine */ |
| 1799 | return 0; |
| 1800 | } |
| 1801 | |
| 1802 | ce_hdl = pipe_info->ce_hdl; |
| 1803 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1804 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1805 | while (atomic_read(&pipe_info->recv_bufs_needed) > 0) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1806 | qdf_dma_addr_t CE_data; /* CE space buffer address */ |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1807 | qdf_nbuf_t nbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1808 | int status; |
| 1809 | |
| 1810 | atomic_dec(&pipe_info->recv_bufs_needed); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1811 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1812 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1813 | nbuf = qdf_nbuf_alloc(scn->qdf_dev, buf_sz, 0, 4, false); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1814 | if (!nbuf) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1815 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1816 | &pipe_info->nbuf_alloc_err_count, |
| 1817 | HIF_RX_NBUF_ALLOC_FAILURE, |
| 1818 | "HIF_RX_NBUF_ALLOC_FAILURE"); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1819 | return 1; |
| 1820 | } |
| 1821 | |
| 1822 | /* |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1823 | * qdf_nbuf_peek_header(nbuf, &data, &unused); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1824 | * CE_data = dma_map_single(dev, data, buf_sz, ); |
| 1825 | * DMA_FROM_DEVICE); |
| 1826 | */ |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 1827 | ret = qdf_nbuf_map_single(scn->qdf_dev, nbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1828 | QDF_DMA_FROM_DEVICE); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1829 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1830 | if (unlikely(ret != QDF_STATUS_SUCCESS)) { |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1831 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1832 | &pipe_info->nbuf_dma_err_count, |
| 1833 | HIF_RX_NBUF_MAP_FAILURE, |
| 1834 | "HIF_RX_NBUF_MAP_FAILURE"); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1835 | qdf_nbuf_free(nbuf); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1836 | return 1; |
| 1837 | } |
| 1838 | |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1839 | CE_data = qdf_nbuf_get_frag_paddr(nbuf, 0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1840 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1841 | qdf_mem_dma_sync_single_for_device(scn->qdf_dev, CE_data, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1842 | buf_sz, DMA_FROM_DEVICE); |
| 1843 | status = ce_recv_buf_enqueue(ce_hdl, (void *)nbuf, CE_data); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1844 | QDF_ASSERT(status == QDF_STATUS_SUCCESS); |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1845 | if (unlikely(status != EOK)) { |
| 1846 | hif_post_recv_buffers_failure(pipe_info, nbuf, |
| 1847 | &pipe_info->nbuf_ce_enqueue_err_count, |
| 1848 | HIF_RX_NBUF_ENQUEUE_FAILURE, |
| 1849 | "HIF_RX_NBUF_ENQUEUE_FAILURE"); |
| 1850 | |
Govind Singh | 4fcafd4 | 2016-08-08 12:37:31 +0530 | [diff] [blame] | 1851 | qdf_nbuf_unmap_single(scn->qdf_dev, nbuf, |
| 1852 | QDF_DMA_FROM_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1853 | qdf_nbuf_free(nbuf); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1854 | return 1; |
| 1855 | } |
| 1856 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1857 | qdf_spin_lock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1858 | bufs_posted++; |
| 1859 | } |
| 1860 | pipe_info->nbuf_alloc_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1861 | (pipe_info->nbuf_alloc_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1862 | pipe_info->nbuf_alloc_err_count - bufs_posted : 0; |
| 1863 | pipe_info->nbuf_dma_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1864 | (pipe_info->nbuf_dma_err_count > bufs_posted) ? |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1865 | pipe_info->nbuf_dma_err_count - bufs_posted : 0; |
| 1866 | pipe_info->nbuf_ce_enqueue_err_count = |
Houston Hoffman | 5693683 | 2016-03-16 12:16:24 -0700 | [diff] [blame] | 1867 | (pipe_info->nbuf_ce_enqueue_err_count > bufs_posted) ? |
Houston Hoffman | c0c00a2 | 2017-02-24 17:37:46 -0800 | [diff] [blame] | 1868 | pipe_info->nbuf_ce_enqueue_err_count - bufs_posted : 0; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1869 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1870 | qdf_spin_unlock_bh(&pipe_info->recv_bufs_needed_lock); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1871 | |
| 1872 | return 0; |
| 1873 | } |
| 1874 | |
| 1875 | /* |
| 1876 | * Try to post all desired receive buffers for all pipes. |
| 1877 | * Returns 0 if all desired buffers are posted, |
| 1878 | * non-zero if were were unable to completely |
| 1879 | * replenish receive buffers. |
| 1880 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1881 | static int hif_post_recv_buffers(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1882 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1883 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1884 | int pipe_num, rv = 0; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1885 | struct CE_state *ce_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1886 | |
| 1887 | A_TARGET_ACCESS_LIKELY(scn); |
| 1888 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 1889 | struct HIF_CE_pipe_info *pipe_info; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1890 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1891 | ce_state = scn->ce_id_to_state[pipe_num]; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1892 | pipe_info = &hif_state->pipe_info[pipe_num]; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1893 | |
| 1894 | if (hif_is_nss_wifi_enabled(scn) && |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1895 | ce_state && (ce_state->htt_rx_data)) |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1896 | continue; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 1897 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1898 | if (hif_post_recv_buffers_for_pipe(pipe_info)) { |
| 1899 | rv = 1; |
| 1900 | goto done; |
| 1901 | } |
| 1902 | } |
| 1903 | |
| 1904 | done: |
| 1905 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 1906 | |
| 1907 | return rv; |
| 1908 | } |
| 1909 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1910 | QDF_STATUS hif_start(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1911 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1912 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1913 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1914 | |
Manjunathappa Prakash | 4a9c3a8 | 2016-04-14 01:12:14 -0700 | [diff] [blame] | 1915 | hif_update_fastpath_recv_bufs_cnt(scn); |
| 1916 | |
Houston Hoffman | 9c12f7f | 2015-09-28 16:52:14 -0700 | [diff] [blame] | 1917 | hif_msg_callbacks_install(scn); |
| 1918 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1919 | if (hif_completion_thread_startup(hif_state)) |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1920 | return QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1921 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1922 | /* enable buffer cleanup */ |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1923 | hif_state->started = true; |
| 1924 | |
Houston Hoffman | 271951f | 2016-11-12 15:24:27 -0800 | [diff] [blame] | 1925 | /* Post buffers once to start things off. */ |
| 1926 | if (hif_post_recv_buffers(scn)) { |
| 1927 | /* cleanup is done in hif_ce_disable */ |
| 1928 | HIF_ERROR("%s:failed to post buffers", __func__); |
| 1929 | return QDF_STATUS_E_FAILURE; |
| 1930 | } |
| 1931 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1932 | return QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1933 | } |
| 1934 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1935 | static void hif_recv_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1936 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1937 | struct hif_softc *scn; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1938 | struct CE_handle *ce_hdl; |
| 1939 | uint32_t buf_sz; |
| 1940 | struct HIF_CE_state *hif_state; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1941 | qdf_nbuf_t netbuf; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1942 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1943 | void *per_CE_context; |
| 1944 | |
| 1945 | buf_sz = pipe_info->buf_sz; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1946 | /* Unused Copy Engine */ |
| 1947 | if (buf_sz == 0) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1948 | return; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1949 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1950 | |
| 1951 | hif_state = pipe_info->HIF_CE_state; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1952 | if (!hif_state->started) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1953 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1954 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1955 | scn = HIF_GET_SOFTC(hif_state); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1956 | ce_hdl = pipe_info->ce_hdl; |
| 1957 | |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 1958 | if (scn->qdf_dev == NULL) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1959 | return; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1960 | while (ce_revoke_recv_next |
| 1961 | (ce_hdl, &per_CE_context, (void **)&netbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1962 | &CE_data) == QDF_STATUS_SUCCESS) { |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1963 | qdf_nbuf_unmap_single(scn->qdf_dev, netbuf, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1964 | QDF_DMA_FROM_DEVICE); |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1965 | qdf_nbuf_free(netbuf); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1966 | } |
| 1967 | } |
| 1968 | |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 1969 | static void hif_send_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1970 | { |
| 1971 | struct CE_handle *ce_hdl; |
| 1972 | struct HIF_CE_state *hif_state; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 1973 | struct hif_softc *scn; |
Vishwajith Upendra | 70f8b6e | 2016-03-01 16:28:23 +0530 | [diff] [blame] | 1974 | qdf_nbuf_t netbuf; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1975 | void *per_CE_context; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 1976 | qdf_dma_addr_t CE_data; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1977 | unsigned int nbytes; |
| 1978 | unsigned int id; |
| 1979 | uint32_t buf_sz; |
| 1980 | uint32_t toeplitz_hash_result; |
| 1981 | |
| 1982 | buf_sz = pipe_info->buf_sz; |
| 1983 | if (buf_sz == 0) { |
| 1984 | /* Unused Copy Engine */ |
| 1985 | return; |
| 1986 | } |
| 1987 | |
| 1988 | hif_state = pipe_info->HIF_CE_state; |
| 1989 | if (!hif_state->started) { |
| 1990 | return; |
| 1991 | } |
| 1992 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 1993 | scn = HIF_GET_SOFTC(hif_state); |
| 1994 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 1995 | ce_hdl = pipe_info->ce_hdl; |
| 1996 | |
| 1997 | while (ce_cancel_send_next |
| 1998 | (ce_hdl, &per_CE_context, |
| 1999 | (void **)&netbuf, &CE_data, &nbytes, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2000 | &id, &toeplitz_hash_result) == QDF_STATUS_SUCCESS) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2001 | if (netbuf != CE_SENDLIST_ITEM_CTXT) { |
| 2002 | /* |
| 2003 | * Packets enqueued by htt_h2t_ver_req_msg() and |
| 2004 | * htt_h2t_rx_ring_cfg_msg_ll() have already been |
| 2005 | * freed in htt_htc_misc_pkt_pool_free() in |
| 2006 | * wlantl_close(), so do not free them here again |
Houston Hoffman | 29573d9 | 2015-10-20 17:49:44 -0700 | [diff] [blame] | 2007 | * by checking whether it's the endpoint |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2008 | * which they are queued in. |
| 2009 | */ |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2010 | if (id == scn->htc_htt_tx_endpoint) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2011 | return; |
Nirav Shah | d7f9159 | 2016-04-21 14:18:43 +0530 | [diff] [blame] | 2012 | /* Indicate the completion to higher |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2013 | * layer to free the buffer |
| 2014 | */ |
| 2015 | if (pipe_info->pipe_callbacks.txCompletionHandler) |
Venkateswara Swamy Bandaru | 26f6f1e | 2016-10-03 19:35:57 +0530 | [diff] [blame] | 2016 | pipe_info->pipe_callbacks. |
| 2017 | txCompletionHandler(pipe_info-> |
| 2018 | pipe_callbacks.Context, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2019 | netbuf, id, toeplitz_hash_result); |
| 2020 | } |
| 2021 | } |
| 2022 | } |
| 2023 | |
| 2024 | /* |
| 2025 | * Cleanup residual buffers for device shutdown: |
| 2026 | * buffers that were enqueued for receive |
| 2027 | * buffers that were to be sent |
| 2028 | * Note: Buffers that had completed but which were |
| 2029 | * not yet processed are on a completion queue. They |
| 2030 | * are handled when the completion thread shuts down. |
| 2031 | */ |
Jeff Johnson | 6950fdb | 2016-10-07 13:00:59 -0700 | [diff] [blame] | 2032 | static void hif_buffer_cleanup(struct HIF_CE_state *hif_state) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2033 | { |
| 2034 | int pipe_num; |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2035 | struct hif_softc *scn = HIF_GET_SOFTC(hif_state); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2036 | struct CE_state *ce_state; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2037 | |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2038 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2039 | struct HIF_CE_pipe_info *pipe_info; |
| 2040 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2041 | ce_state = scn->ce_id_to_state[pipe_num]; |
| 2042 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 2043 | ((ce_state->htt_tx_data) || |
| 2044 | (ce_state->htt_rx_data))) { |
| 2045 | continue; |
| 2046 | } |
| 2047 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2048 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2049 | hif_recv_buffer_cleanup_on_pipe(pipe_info); |
| 2050 | hif_send_buffer_cleanup_on_pipe(pipe_info); |
| 2051 | } |
| 2052 | } |
| 2053 | |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2054 | void hif_flush_surprise_remove(struct hif_opaque_softc *hif_ctx) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2055 | { |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2056 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2057 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2058 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2059 | hif_buffer_cleanup(hif_state); |
| 2060 | } |
| 2061 | |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2062 | static void hif_destroy_oom_work(struct hif_softc *scn) |
| 2063 | { |
| 2064 | struct CE_state *ce_state; |
| 2065 | int ce_id; |
| 2066 | |
| 2067 | for (ce_id = 0; ce_id < scn->ce_count; ce_id++) { |
| 2068 | ce_state = scn->ce_id_to_state[ce_id]; |
| 2069 | if (ce_state) |
| 2070 | qdf_destroy_work(scn->qdf_dev, |
| 2071 | &ce_state->oom_allocation_work); |
| 2072 | } |
| 2073 | } |
| 2074 | |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2075 | void hif_ce_stop(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2076 | { |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2077 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2078 | int pipe_num; |
| 2079 | |
Houston Hoffman | a69581e | 2016-11-14 18:03:19 -0800 | [diff] [blame] | 2080 | /* |
| 2081 | * before cleaning up any memory, ensure irq & |
| 2082 | * bottom half contexts will not be re-entered |
| 2083 | */ |
| 2084 | hif_nointrs(scn); |
Houston Hoffman | b12ccb7 | 2017-03-01 20:02:28 -0800 | [diff] [blame] | 2085 | hif_destroy_oom_work(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2086 | scn->hif_init_done = false; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2087 | |
| 2088 | /* |
| 2089 | * At this point, asynchronous threads are stopped, |
| 2090 | * The Target should not DMA nor interrupt, Host code may |
| 2091 | * not initiate anything more. So we just need to clean |
| 2092 | * up Host-side state. |
| 2093 | */ |
| 2094 | |
| 2095 | if (scn->athdiag_procfs_inited) { |
| 2096 | athdiag_procfs_remove(); |
| 2097 | scn->athdiag_procfs_inited = false; |
| 2098 | } |
| 2099 | |
| 2100 | hif_buffer_cleanup(hif_state); |
| 2101 | |
| 2102 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2103 | struct HIF_CE_pipe_info *pipe_info; |
| 2104 | |
| 2105 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2106 | if (pipe_info->ce_hdl) { |
| 2107 | ce_fini(pipe_info->ce_hdl); |
| 2108 | pipe_info->ce_hdl = NULL; |
| 2109 | pipe_info->buf_sz = 0; |
| 2110 | } |
| 2111 | } |
| 2112 | |
| 2113 | if (hif_state->sleep_timer_init) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2114 | qdf_timer_stop(&hif_state->sleep_timer); |
| 2115 | qdf_timer_free(&hif_state->sleep_timer); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2116 | hif_state->sleep_timer_init = false; |
| 2117 | } |
| 2118 | |
| 2119 | hif_state->started = false; |
| 2120 | } |
| 2121 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2122 | |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2123 | /** |
| 2124 | * hif_get_target_ce_config() - get copy engine configuration |
| 2125 | * @target_ce_config_ret: basic copy engine configuration |
| 2126 | * @target_ce_config_sz_ret: size of the basic configuration in bytes |
| 2127 | * @target_service_to_ce_map_ret: service mapping for the copy engines |
| 2128 | * @target_service_to_ce_map_sz_ret: size of the mapping in bytes |
| 2129 | * @target_shadow_reg_cfg_ret: shadow register configuration |
| 2130 | * @shadow_cfg_sz_ret: size of the shadow register configuration in bytes |
| 2131 | * |
| 2132 | * providing accessor to these values outside of this file. |
| 2133 | * currently these are stored in static pointers to const sections. |
| 2134 | * there are multiple configurations that are selected from at compile time. |
| 2135 | * Runtime selection would need to consider mode, target type and bus type. |
| 2136 | * |
| 2137 | * Return: return by parameter. |
| 2138 | */ |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2139 | void hif_get_target_ce_config(struct hif_softc *scn, |
| 2140 | struct CE_pipe_config **target_ce_config_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2141 | uint32_t *target_ce_config_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2142 | struct service_to_pipe **target_service_to_ce_map_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2143 | uint32_t *target_service_to_ce_map_sz_ret, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2144 | struct shadow_reg_cfg **target_shadow_reg_cfg_ret, |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2145 | uint32_t *shadow_cfg_sz_ret) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2146 | { |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2147 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2148 | |
| 2149 | *target_ce_config_ret = hif_state->target_ce_config; |
| 2150 | *target_ce_config_sz_ret = hif_state->target_ce_config_sz; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2151 | |
| 2152 | hif_select_service_to_pipe_map(scn, target_service_to_ce_map_ret, |
| 2153 | target_service_to_ce_map_sz_ret); |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2154 | |
| 2155 | if (target_shadow_reg_cfg_ret) |
| 2156 | *target_shadow_reg_cfg_ret = target_shadow_reg_cfg; |
| 2157 | |
| 2158 | if (shadow_cfg_sz_ret) |
| 2159 | *shadow_cfg_sz_ret = shadow_cfg_sz; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2160 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2161 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2162 | #ifdef CONFIG_SHADOW_V2 |
Houston Hoffman | 403c2df | 2017-01-27 12:51:15 -0800 | [diff] [blame] | 2163 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2164 | { |
| 2165 | int i; |
| 2166 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 2167 | "%s: num_config %d\n", __func__, cfg->num_shadow_reg_v2_cfg); |
| 2168 | |
| 2169 | for (i = 0; i < cfg->num_shadow_reg_v2_cfg; i++) { |
| 2170 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO, |
| 2171 | "%s: i %d, val %x\n", __func__, i, |
| 2172 | cfg->shadow_reg_v2_cfg[i].addr); |
| 2173 | } |
| 2174 | } |
| 2175 | |
Houston Hoffman | f60a348 | 2017-01-31 10:45:07 -0800 | [diff] [blame] | 2176 | #else |
| 2177 | static void hif_print_hal_shadow_register_cfg(struct pld_wlan_enable_cfg *cfg) |
| 2178 | { |
| 2179 | QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR, |
| 2180 | "%s: CONFIG_SHADOW_V2 not defined\n", __func__); |
| 2181 | } |
| 2182 | #endif |
| 2183 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2184 | /** |
| 2185 | * hif_wlan_enable(): call the platform driver to enable wlan |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2186 | * @scn: HIF Context |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2187 | * |
| 2188 | * This function passes the con_mode and CE configuration to |
| 2189 | * platform driver to enable wlan. |
| 2190 | * |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2191 | * Return: linux error code |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2192 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2193 | int hif_wlan_enable(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2194 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2195 | struct pld_wlan_enable_cfg cfg; |
| 2196 | enum pld_driver_mode mode; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2197 | uint32_t con_mode = hif_get_conparam(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2198 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2199 | hif_get_target_ce_config(scn, |
| 2200 | (struct CE_pipe_config **)&cfg.ce_tgt_cfg, |
Houston Hoffman | 854e67f | 2016-03-14 21:11:39 -0700 | [diff] [blame] | 2201 | &cfg.num_ce_tgt_cfg, |
| 2202 | (struct service_to_pipe **)&cfg.ce_svc_cfg, |
| 2203 | &cfg.num_ce_svc_pipe_cfg, |
| 2204 | (struct shadow_reg_cfg **)&cfg.shadow_reg_cfg, |
| 2205 | &cfg.num_shadow_reg_cfg); |
| 2206 | |
| 2207 | /* translate from structure size to array size */ |
| 2208 | cfg.num_ce_tgt_cfg /= sizeof(struct CE_pipe_config); |
| 2209 | cfg.num_ce_svc_pipe_cfg /= sizeof(struct service_to_pipe); |
| 2210 | cfg.num_shadow_reg_cfg /= sizeof(struct shadow_reg_cfg); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2211 | |
Houston Hoffman | 5141f9d | 2017-01-05 10:49:17 -0800 | [diff] [blame] | 2212 | hif_prepare_hal_shadow_register_cfg(scn, &cfg.shadow_reg_v2_cfg, |
| 2213 | &cfg.num_shadow_reg_v2_cfg); |
| 2214 | |
| 2215 | hif_print_hal_shadow_register_cfg(&cfg); |
| 2216 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2217 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2218 | mode = PLD_FTM; |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2219 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2220 | mode = PLD_EPPING; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 2221 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2222 | mode = PLD_MISSION; |
Peng Xu | 7b96253 | 2015-10-02 17:17:03 -0700 | [diff] [blame] | 2223 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2224 | if (BYPASS_QMI) |
| 2225 | return 0; |
| 2226 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 2227 | return pld_wlan_enable(scn->qdf_dev->dev, &cfg, |
| 2228 | mode, QWLAN_VERSIONSTR); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2229 | } |
| 2230 | |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2231 | #define CE_EPPING_USES_IRQ true |
| 2232 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2233 | /** |
| 2234 | * hif_ce_prepare_config() - load the correct static tables. |
| 2235 | * @scn: hif context |
| 2236 | * |
| 2237 | * Epping uses different static attribute tables than mission mode. |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2238 | */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2239 | void hif_ce_prepare_config(struct hif_softc *scn) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2240 | { |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2241 | uint32_t mode = hif_get_conparam(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2242 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 2243 | struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl); |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2244 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2245 | |
Houston Hoffman | 10fedfc | 2017-01-23 15:23:09 -0800 | [diff] [blame] | 2246 | hif_state->ce_services = ce_services_attach(scn); |
| 2247 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 2248 | scn->ce_count = HOST_CE_COUNT; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2249 | /* if epping is enabled we need to use the epping configuration. */ |
Houston Hoffman | 75ef5a5 | 2016-04-14 17:15:49 -0700 | [diff] [blame] | 2250 | if (QDF_IS_EPPING_ENABLED(mode)) { |
| 2251 | if (CE_EPPING_USES_IRQ) |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2252 | hif_state->host_ce_config = host_ce_config_wlan_epping_irq; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2253 | else |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2254 | hif_state->host_ce_config = host_ce_config_wlan_epping_poll; |
| 2255 | hif_state->target_ce_config = target_ce_config_wlan_epping; |
| 2256 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan_epping); |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 2257 | target_shadow_reg_cfg = target_shadow_reg_cfg_epping; |
| 2258 | shadow_cfg_sz = sizeof(target_shadow_reg_cfg_epping); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2259 | } |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2260 | |
| 2261 | switch (tgt_info->target_type) { |
| 2262 | default: |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2263 | hif_state->host_ce_config = host_ce_config_wlan; |
| 2264 | hif_state->target_ce_config = target_ce_config_wlan; |
| 2265 | hif_state->target_ce_config_sz = sizeof(target_ce_config_wlan); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2266 | break; |
| 2267 | case TARGET_TYPE_AR900B: |
| 2268 | case TARGET_TYPE_QCA9984: |
| 2269 | case TARGET_TYPE_IPQ4019: |
| 2270 | case TARGET_TYPE_QCA9888: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 2271 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_NO_PKTLOG_CFG)) { |
| 2272 | hif_state->host_ce_config = |
| 2273 | host_lowdesc_ce_cfg_wlan_ar900b_nopktlog; |
| 2274 | } else if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 2275 | hif_state->host_ce_config = |
| 2276 | host_lowdesc_ce_cfg_wlan_ar900b; |
| 2277 | } else { |
| 2278 | hif_state->host_ce_config = host_ce_config_wlan_ar900b; |
| 2279 | } |
| 2280 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2281 | hif_state->target_ce_config = target_ce_config_wlan_ar900b; |
| 2282 | hif_state->target_ce_config_sz = |
| 2283 | sizeof(target_ce_config_wlan_ar900b); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2284 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2285 | break; |
| 2286 | |
| 2287 | case TARGET_TYPE_AR9888: |
| 2288 | case TARGET_TYPE_AR9888V2: |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 2289 | if (hif_is_attribute_set(scn, HIF_LOWDESC_CE_CFG)) { |
| 2290 | hif_state->host_ce_config = host_lowdesc_ce_cfg_wlan_ar9888; |
| 2291 | } else { |
| 2292 | hif_state->host_ce_config = host_ce_config_wlan_ar9888; |
| 2293 | } |
| 2294 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2295 | hif_state->target_ce_config = target_ce_config_wlan_ar9888; |
| 2296 | hif_state->target_ce_config_sz = |
| 2297 | sizeof(target_ce_config_wlan_ar9888); |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2298 | |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2299 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2300 | |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2301 | case TARGET_TYPE_QCA8074: |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 2302 | if (scn->bus_type == QDF_BUS_TYPE_PCI) { |
| 2303 | hif_state->host_ce_config = |
| 2304 | host_ce_config_wlan_qca8074_pci; |
| 2305 | hif_state->target_ce_config = |
| 2306 | target_ce_config_wlan_qca8074_pci; |
| 2307 | hif_state->target_ce_config_sz = |
| 2308 | sizeof(target_ce_config_wlan_qca8074_pci); |
| 2309 | } else { |
| 2310 | hif_state->host_ce_config = host_ce_config_wlan_qca8074; |
| 2311 | hif_state->target_ce_config = |
| 2312 | target_ce_config_wlan_qca8074; |
| 2313 | hif_state->target_ce_config_sz = |
| 2314 | sizeof(target_ce_config_wlan_qca8074); |
| 2315 | } |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2316 | break; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2317 | case TARGET_TYPE_QCA6290: |
| 2318 | hif_state->host_ce_config = host_ce_config_wlan_qca6290; |
| 2319 | hif_state->target_ce_config = target_ce_config_wlan_qca6290; |
| 2320 | hif_state->target_ce_config_sz = |
| 2321 | sizeof(target_ce_config_wlan_qca6290); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2322 | |
Houston Hoffman | 710af5a | 2016-11-22 21:59:03 -0800 | [diff] [blame] | 2323 | scn->ce_count = QCA_6290_CE_COUNT; |
Houston Hoffman | 31b25ec | 2016-09-19 13:12:30 -0700 | [diff] [blame] | 2324 | break; |
Houston Hoffman | fb698ef | 2016-05-05 19:50:44 -0700 | [diff] [blame] | 2325 | } |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2326 | } |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2327 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2328 | /** |
| 2329 | * hif_ce_open() - do ce specific allocations |
| 2330 | * @hif_sc: pointer to hif context |
| 2331 | * |
| 2332 | * return: 0 for success or QDF_STATUS_E_NOMEM |
| 2333 | */ |
| 2334 | QDF_STATUS hif_ce_open(struct hif_softc *hif_sc) |
| 2335 | { |
| 2336 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2337 | |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 2338 | qdf_spinlock_create(&hif_state->irq_reg_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2339 | qdf_spinlock_create(&hif_state->keep_awake_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2340 | return QDF_STATUS_SUCCESS; |
| 2341 | } |
| 2342 | |
| 2343 | /** |
| 2344 | * hif_ce_close() - do ce specific free |
| 2345 | * @hif_sc: pointer to hif context |
| 2346 | */ |
| 2347 | void hif_ce_close(struct hif_softc *hif_sc) |
| 2348 | { |
Venkateswara Swamy Bandaru | 9fd9af0 | 2016-09-20 20:27:31 +0530 | [diff] [blame] | 2349 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
| 2350 | |
| 2351 | qdf_spinlock_destroy(&hif_state->irq_reg_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2352 | } |
| 2353 | |
| 2354 | /** |
| 2355 | * hif_unconfig_ce() - ensure resources from hif_config_ce are freed |
| 2356 | * @hif_sc: hif context |
| 2357 | * |
| 2358 | * uses state variables to support cleaning up when hif_config_ce fails. |
| 2359 | */ |
| 2360 | void hif_unconfig_ce(struct hif_softc *hif_sc) |
| 2361 | { |
| 2362 | int pipe_num; |
| 2363 | struct HIF_CE_pipe_info *pipe_info; |
| 2364 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_sc); |
| 2365 | |
| 2366 | for (pipe_num = 0; pipe_num < hif_sc->ce_count; pipe_num++) { |
| 2367 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2368 | if (pipe_info->ce_hdl) { |
| 2369 | ce_unregister_irq(hif_state, (1 << pipe_num)); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2370 | ce_fini(pipe_info->ce_hdl); |
| 2371 | pipe_info->ce_hdl = NULL; |
| 2372 | pipe_info->buf_sz = 0; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 2373 | qdf_spinlock_destroy(&pipe_info->recv_bufs_needed_lock); |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2374 | } |
| 2375 | } |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2376 | if (hif_sc->athdiag_procfs_inited) { |
| 2377 | athdiag_procfs_remove(); |
| 2378 | hif_sc->athdiag_procfs_inited = false; |
| 2379 | } |
| 2380 | } |
| 2381 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2382 | #ifdef CONFIG_BYPASS_QMI |
| 2383 | #define FW_SHARED_MEM (2 * 1024 * 1024) |
| 2384 | |
| 2385 | /** |
| 2386 | * hif_post_static_buf_to_target() - post static buffer to WLAN FW |
| 2387 | * @scn: pointer to HIF structure |
| 2388 | * |
| 2389 | * WLAN FW needs 2MB memory from DDR when QMI is disabled. |
| 2390 | * |
| 2391 | * Return: void |
| 2392 | */ |
| 2393 | static void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 2394 | { |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2395 | void *target_va; |
| 2396 | phys_addr_t target_pa; |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2397 | |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2398 | target_va = qdf_mem_alloc_consistent(scn->qdf_dev, scn->qdf_dev->dev, |
| 2399 | FW_SHARED_MEM, &target_pa); |
| 2400 | if (NULL == target_va) { |
| 2401 | HIF_TRACE("Memory allocation failed could not post target buf"); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2402 | return; |
| 2403 | } |
Hardik Kantilal Patel | c5dc5f2 | 2016-04-21 14:11:33 -0700 | [diff] [blame] | 2404 | hif_write32_mb(scn->mem + BYPASS_QMI_TEMP_REGISTER, target_pa); |
| 2405 | HIF_TRACE("target va %pK target pa %pa", target_va, &target_pa); |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2406 | } |
| 2407 | #else |
| 2408 | static inline void hif_post_static_buf_to_target(struct hif_softc *scn) |
| 2409 | { |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2410 | } |
| 2411 | #endif |
| 2412 | |
Dustin Brown | 6bdbda5 | 2016-09-27 15:52:30 -0700 | [diff] [blame] | 2413 | #ifdef WLAN_SUSPEND_RESUME_TEST |
| 2414 | static void hif_fake_apps_init_ctx(struct hif_softc *scn) |
| 2415 | { |
| 2416 | INIT_WORK(&scn->fake_apps_ctx.resume_work, |
| 2417 | hif_fake_apps_resume_work); |
| 2418 | } |
| 2419 | #else |
| 2420 | static inline void hif_fake_apps_init_ctx(struct hif_softc *scn) {} |
| 2421 | #endif |
| 2422 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2423 | /** |
| 2424 | * hif_config_ce() - configure copy engines |
| 2425 | * @scn: hif context |
| 2426 | * |
| 2427 | * Prepares fw, copy engine hardware and host sw according |
| 2428 | * to the attributes selected by hif_ce_prepare_config. |
| 2429 | * |
| 2430 | * also calls athdiag_procfs_init |
| 2431 | * |
| 2432 | * return: 0 for success nonzero for failure. |
| 2433 | */ |
| 2434 | int hif_config_ce(struct hif_softc *scn) |
| 2435 | { |
| 2436 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 2437 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
| 2438 | struct HIF_CE_pipe_info *pipe_info; |
| 2439 | int pipe_num; |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2440 | struct CE_state *ce_state; |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2441 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 2442 | int i; |
| 2443 | #endif |
| 2444 | QDF_STATUS rv = QDF_STATUS_SUCCESS; |
| 2445 | |
| 2446 | scn->notice_send = true; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2447 | |
Yuanyuan Liu | a7a282f | 2016-04-15 12:55:04 -0700 | [diff] [blame] | 2448 | hif_post_static_buf_to_target(scn); |
| 2449 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2450 | hif_state->fw_indicator_address = FW_INDICATOR_ADDRESS; |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2451 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2452 | hif_config_rri_on_ddr(scn); |
| 2453 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2454 | for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) { |
| 2455 | struct CE_attr *attr; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2456 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2457 | pipe_info = &hif_state->pipe_info[pipe_num]; |
| 2458 | pipe_info->pipe_num = pipe_num; |
| 2459 | pipe_info->HIF_CE_state = hif_state; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2460 | attr = &hif_state->host_ce_config[pipe_num]; |
Karunakar Dasineni | f61cb07 | 2016-09-29 11:50:45 -0700 | [diff] [blame] | 2461 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2462 | pipe_info->ce_hdl = ce_init(scn, pipe_num, attr); |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2463 | ce_state = scn->ce_id_to_state[pipe_num]; |
Houston Hoffman | 03f4657 | 2016-12-12 12:53:56 -0800 | [diff] [blame] | 2464 | qdf_spinlock_create(&pipe_info->recv_bufs_needed_lock); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2465 | QDF_ASSERT(pipe_info->ce_hdl != NULL); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2466 | if (pipe_info->ce_hdl == NULL) { |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2467 | rv = QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2468 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2469 | goto err; |
| 2470 | } |
| 2471 | |
Dhanashri Atre | 991ee4d | 2017-05-03 19:03:10 -0700 | [diff] [blame^] | 2472 | ce_state->lro_data = qdf_lro_init(); |
| 2473 | |
Kiran Venkatappa | e17e3b6 | 2017-02-10 16:31:49 +0530 | [diff] [blame] | 2474 | if (attr->flags & CE_ATTR_DIAG) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2475 | /* Reserve the ultimate CE for |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2476 | * Diagnostic Window support |
| 2477 | */ |
Houston Hoffman | c1d9a41 | 2016-03-30 21:07:57 -0700 | [diff] [blame] | 2478 | hif_state->ce_diag = pipe_info->ce_hdl; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2479 | continue; |
| 2480 | } |
| 2481 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 2482 | if (hif_is_nss_wifi_enabled(scn) && ce_state && |
| 2483 | (ce_state->htt_rx_data)) |
| 2484 | continue; |
| 2485 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2486 | pipe_info->buf_sz = (qdf_size_t) (attr->src_sz_max); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2487 | if (attr->dest_nentries > 0) { |
| 2488 | atomic_set(&pipe_info->recv_bufs_needed, |
| 2489 | init_buffer_count(attr->dest_nentries - 1)); |
Kiran Venkatappa | f41ef2e | 2016-09-05 10:59:58 +0530 | [diff] [blame] | 2490 | /*SRNG based CE has one entry less */ |
| 2491 | if (ce_srng_based(scn)) |
| 2492 | atomic_dec(&pipe_info->recv_bufs_needed); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2493 | } else { |
| 2494 | atomic_set(&pipe_info->recv_bufs_needed, 0); |
| 2495 | } |
| 2496 | ce_tasklet_init(hif_state, (1 << pipe_num)); |
| 2497 | ce_register_irq(hif_state, (1 << pipe_num)); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2498 | } |
| 2499 | |
| 2500 | if (athdiag_procfs_init(scn) != 0) { |
| 2501 | A_TARGET_ACCESS_UNLIKELY(scn); |
| 2502 | goto err; |
| 2503 | } |
| 2504 | scn->athdiag_procfs_inited = true; |
| 2505 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2506 | HIF_DBG("%s: ce_init done", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2507 | |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2508 | init_tasklet_workers(hif_hdl); |
Dustin Brown | 6bdbda5 | 2016-09-27 15:52:30 -0700 | [diff] [blame] | 2509 | hif_fake_apps_init_ctx(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2510 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2511 | HIF_DBG("%s: X, ret = %d", __func__, rv); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2512 | |
| 2513 | #ifdef ADRASTEA_SHADOW_REGISTERS |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2514 | HIF_DBG("%s, Using Shadow Registers instead of CE Registers", __func__); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2515 | for (i = 0; i < NUM_SHADOW_REGISTERS; i++) { |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2516 | HIF_DBG("%s Shadow Register%d is mapped to address %x", |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2517 | __func__, i, |
| 2518 | (A_TARGET_READ(scn, (SHADOW_ADDRESS(i))) << 2)); |
| 2519 | } |
| 2520 | #endif |
| 2521 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2522 | return rv != QDF_STATUS_SUCCESS; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2523 | |
| 2524 | err: |
| 2525 | /* Failure, so clean up */ |
Houston Hoffman | 108da40 | 2016-03-14 21:11:24 -0700 | [diff] [blame] | 2526 | hif_unconfig_ce(scn); |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2527 | HIF_TRACE("%s: X, ret = %d", __func__, rv); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2528 | return QDF_STATUS_SUCCESS != QDF_STATUS_E_FAILURE; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2529 | } |
| 2530 | |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2531 | #ifdef WLAN_FEATURE_FASTPATH |
| 2532 | /** |
| 2533 | * hif_ce_fastpath_cb_register() - Register callback for fastpath msg handler |
| 2534 | * @handler: Callback funtcion |
| 2535 | * @context: handle for callback function |
| 2536 | * |
| 2537 | * Return: QDF_STATUS_SUCCESS on success or QDF_STATUS_E_FAILURE |
| 2538 | */ |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 2539 | int hif_ce_fastpath_cb_register(struct hif_opaque_softc *hif_ctx, |
| 2540 | fastpath_msg_handler handler, |
| 2541 | void *context) |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2542 | { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2543 | struct CE_state *ce_state; |
Houston Hoffman | 127467f | 2016-04-26 22:37:14 -0700 | [diff] [blame] | 2544 | struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2545 | int i; |
| 2546 | |
Himanshu Agarwal | 2a92459 | 2016-06-30 18:04:14 +0530 | [diff] [blame] | 2547 | if (!scn) { |
| 2548 | HIF_ERROR("%s: scn is NULL", __func__); |
| 2549 | QDF_ASSERT(0); |
| 2550 | return QDF_STATUS_E_FAILURE; |
| 2551 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2552 | |
| 2553 | if (!scn->fastpath_mode_on) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2554 | HIF_WARN("%s: Fastpath mode disabled", __func__); |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2555 | return QDF_STATUS_E_FAILURE; |
| 2556 | } |
| 2557 | |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 2558 | for (i = 0; i < scn->ce_count; i++) { |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2559 | ce_state = scn->ce_id_to_state[i]; |
| 2560 | if (ce_state->htt_rx_data) { |
| 2561 | ce_state->fastpath_handler = handler; |
| 2562 | ce_state->context = context; |
| 2563 | } |
| 2564 | } |
| 2565 | |
| 2566 | return QDF_STATUS_SUCCESS; |
| 2567 | } |
Manjunathappa Prakash | 7399f14 | 2016-04-13 23:38:16 -0700 | [diff] [blame] | 2568 | #endif |
| 2569 | |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2570 | #ifdef IPA_OFFLOAD |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 2571 | /** |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2572 | * hif_ce_ipa_get_ce_resource() - get uc resource on hif |
Leo Chang | d85f78d | 2015-11-13 10:55:34 -0800 | [diff] [blame] | 2573 | * @scn: bus context |
| 2574 | * @ce_sr_base_paddr: copyengine source ring base physical address |
| 2575 | * @ce_sr_ring_size: copyengine source ring size |
| 2576 | * @ce_reg_paddr: copyengine register physical address |
| 2577 | * |
| 2578 | * IPA micro controller data path offload feature enabled, |
| 2579 | * HIF should release copy engine related resource information to IPA UC |
| 2580 | * IPA UC will access hardware resource with released information |
| 2581 | * |
| 2582 | * Return: None |
| 2583 | */ |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 2584 | void hif_ce_ipa_get_ce_resource(struct hif_softc *scn, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2585 | qdf_dma_addr_t *ce_sr_base_paddr, |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2586 | uint32_t *ce_sr_ring_size, |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2587 | qdf_dma_addr_t *ce_reg_paddr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2588 | { |
Komal Seelam | 02cf2f8 | 2016-02-22 20:44:25 +0530 | [diff] [blame] | 2589 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2590 | struct HIF_CE_pipe_info *pipe_info = |
| 2591 | &(hif_state->pipe_info[HIF_PCI_IPA_UC_ASSIGNED_CE]); |
| 2592 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 2593 | |
| 2594 | ce_ipa_get_resource(ce_hdl, ce_sr_base_paddr, ce_sr_ring_size, |
| 2595 | ce_reg_paddr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2596 | } |
| 2597 | #endif /* IPA_OFFLOAD */ |
| 2598 | |
| 2599 | |
| 2600 | #ifdef ADRASTEA_SHADOW_REGISTERS |
| 2601 | |
| 2602 | /* |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2603 | * Current shadow register config |
| 2604 | * |
| 2605 | * ----------------------------------------------------------- |
| 2606 | * Shadow Register | CE | src/dst write index |
| 2607 | * ----------------------------------------------------------- |
| 2608 | * 0 | 0 | src |
| 2609 | * 1 No Config - Doesn't point to anything |
| 2610 | * 2 No Config - Doesn't point to anything |
| 2611 | * 3 | 3 | src |
| 2612 | * 4 | 4 | src |
| 2613 | * 5 | 5 | src |
| 2614 | * 6 No Config - Doesn't point to anything |
| 2615 | * 7 | 7 | src |
| 2616 | * 8 No Config - Doesn't point to anything |
| 2617 | * 9 No Config - Doesn't point to anything |
| 2618 | * 10 No Config - Doesn't point to anything |
| 2619 | * 11 No Config - Doesn't point to anything |
| 2620 | * ----------------------------------------------------------- |
| 2621 | * 12 No Config - Doesn't point to anything |
| 2622 | * 13 | 1 | dst |
| 2623 | * 14 | 2 | dst |
| 2624 | * 15 No Config - Doesn't point to anything |
| 2625 | * 16 No Config - Doesn't point to anything |
| 2626 | * 17 No Config - Doesn't point to anything |
| 2627 | * 18 No Config - Doesn't point to anything |
| 2628 | * 19 | 7 | dst |
| 2629 | * 20 | 8 | dst |
| 2630 | * 21 No Config - Doesn't point to anything |
| 2631 | * 22 No Config - Doesn't point to anything |
| 2632 | * 23 No Config - Doesn't point to anything |
| 2633 | * ----------------------------------------------------------- |
| 2634 | * |
| 2635 | * |
| 2636 | * ToDo - Move shadow register config to following in the future |
| 2637 | * This helps free up a block of shadow registers towards the end. |
| 2638 | * Can be used for other purposes |
| 2639 | * |
| 2640 | * ----------------------------------------------------------- |
| 2641 | * Shadow Register | CE | src/dst write index |
| 2642 | * ----------------------------------------------------------- |
| 2643 | * 0 | 0 | src |
| 2644 | * 1 | 3 | src |
| 2645 | * 2 | 4 | src |
| 2646 | * 3 | 5 | src |
| 2647 | * 4 | 7 | src |
| 2648 | * ----------------------------------------------------------- |
| 2649 | * 5 | 1 | dst |
| 2650 | * 6 | 2 | dst |
| 2651 | * 7 | 7 | dst |
| 2652 | * 8 | 8 | dst |
| 2653 | * ----------------------------------------------------------- |
| 2654 | * 9 No Config - Doesn't point to anything |
| 2655 | * 12 No Config - Doesn't point to anything |
| 2656 | * 13 No Config - Doesn't point to anything |
| 2657 | * 14 No Config - Doesn't point to anything |
| 2658 | * 15 No Config - Doesn't point to anything |
| 2659 | * 16 No Config - Doesn't point to anything |
| 2660 | * 17 No Config - Doesn't point to anything |
| 2661 | * 18 No Config - Doesn't point to anything |
| 2662 | * 19 No Config - Doesn't point to anything |
| 2663 | * 20 No Config - Doesn't point to anything |
| 2664 | * 21 No Config - Doesn't point to anything |
| 2665 | * 22 No Config - Doesn't point to anything |
| 2666 | * 23 No Config - Doesn't point to anything |
| 2667 | * ----------------------------------------------------------- |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2668 | */ |
| 2669 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2670 | u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2671 | { |
| 2672 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2673 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2674 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2675 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2676 | case 0: |
| 2677 | addr = SHADOW_VALUE0; |
| 2678 | break; |
| 2679 | case 3: |
| 2680 | addr = SHADOW_VALUE3; |
| 2681 | break; |
| 2682 | case 4: |
| 2683 | addr = SHADOW_VALUE4; |
| 2684 | break; |
| 2685 | case 5: |
| 2686 | addr = SHADOW_VALUE5; |
| 2687 | break; |
| 2688 | case 7: |
| 2689 | addr = SHADOW_VALUE7; |
| 2690 | break; |
| 2691 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2692 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2693 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2694 | } |
| 2695 | return addr; |
| 2696 | |
| 2697 | } |
| 2698 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2699 | u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr) |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2700 | { |
| 2701 | u32 addr = 0; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2702 | u32 ce = COPY_ENGINE_ID(ctrl_addr); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2703 | |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2704 | switch (ce) { |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2705 | case 1: |
| 2706 | addr = SHADOW_VALUE13; |
| 2707 | break; |
| 2708 | case 2: |
| 2709 | addr = SHADOW_VALUE14; |
| 2710 | break; |
Vishwajith Upendra | 70efc75 | 2016-04-18 11:23:49 -0700 | [diff] [blame] | 2711 | case 5: |
| 2712 | addr = SHADOW_VALUE17; |
| 2713 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2714 | case 7: |
| 2715 | addr = SHADOW_VALUE19; |
| 2716 | break; |
| 2717 | case 8: |
| 2718 | addr = SHADOW_VALUE20; |
| 2719 | break; |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2720 | case 9: |
| 2721 | addr = SHADOW_VALUE21; |
| 2722 | break; |
| 2723 | case 10: |
| 2724 | addr = SHADOW_VALUE22; |
| 2725 | break; |
Nirav Shah | 75cc5c8 | 2016-05-25 10:52:38 +0530 | [diff] [blame] | 2726 | case 11: |
| 2727 | addr = SHADOW_VALUE23; |
| 2728 | break; |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2729 | default: |
Houston Hoffman | e633044 | 2016-02-26 12:19:11 -0800 | [diff] [blame] | 2730 | HIF_ERROR("invalid CE ctrl_addr (CE=%d)", ce); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2731 | QDF_ASSERT(0); |
Prakash Dhavali | d5c9f1c | 2015-11-08 19:04:44 -0800 | [diff] [blame] | 2732 | } |
| 2733 | |
| 2734 | return addr; |
| 2735 | |
| 2736 | } |
| 2737 | #endif |
| 2738 | |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 2739 | #if defined(FEATURE_LRO) |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 2740 | void *hif_ce_get_lro_ctx(struct hif_opaque_softc *hif_hdl, int ctx_id) |
| 2741 | { |
| 2742 | struct CE_state *ce_state; |
| 2743 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
| 2744 | |
Manjunathappa Prakash | 2146da3 | 2016-10-13 14:47:47 -0700 | [diff] [blame] | 2745 | ce_state = scn->ce_id_to_state[ctx_id]; |
| 2746 | |
| 2747 | return ce_state->lro_data; |
| 2748 | } |
Dhanashri Atre | 65b674f | 2015-10-30 15:12:03 -0700 | [diff] [blame] | 2749 | #endif |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2750 | |
| 2751 | /** |
| 2752 | * hif_map_service_to_pipe() - returns the ce ids pertaining to |
| 2753 | * this service |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2754 | * @scn: hif_softc pointer. |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2755 | * @svc_id: Service ID for which the mapping is needed. |
| 2756 | * @ul_pipe: address of the container in which ul pipe is returned. |
| 2757 | * @dl_pipe: address of the container in which dl pipe is returned. |
| 2758 | * @ul_is_polled: address of the container in which a bool |
| 2759 | * indicating if the UL CE for this service |
| 2760 | * is polled is returned. |
| 2761 | * @dl_is_polled: address of the container in which a bool |
| 2762 | * indicating if the DL CE for this service |
| 2763 | * is polled is returned. |
| 2764 | * |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2765 | * Return: Indicates whether the service has been found in the table. |
| 2766 | * Upon return, ul_is_polled is updated only if ul_pipe is updated. |
| 2767 | * There will be warning logs if either leg has not been updated |
| 2768 | * because it missed the entry in the table (but this is not an err). |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2769 | */ |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2770 | int hif_map_service_to_pipe(struct hif_opaque_softc *hif_hdl, uint16_t svc_id, |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2771 | uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled, |
| 2772 | int *dl_is_polled) |
| 2773 | { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2774 | int status = QDF_STATUS_E_INVAL; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2775 | unsigned int i; |
| 2776 | struct service_to_pipe element; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2777 | struct service_to_pipe *tgt_svc_map_to_use; |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2778 | uint32_t sz_tgt_svc_map_to_use; |
Komal Seelam | bd7c51d | 2016-02-24 10:27:30 +0530 | [diff] [blame] | 2779 | struct hif_softc *scn = HIF_GET_SOFTC(hif_hdl); |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2780 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2781 | bool dl_updated = false; |
| 2782 | bool ul_updated = false; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2783 | |
Houston Hoffman | 748e1a6 | 2017-03-30 17:20:42 -0700 | [diff] [blame] | 2784 | hif_select_service_to_pipe_map(scn, &tgt_svc_map_to_use, |
| 2785 | &sz_tgt_svc_map_to_use); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2786 | |
| 2787 | *dl_is_polled = 0; /* polling for received messages not supported */ |
| 2788 | |
| 2789 | for (i = 0; i < (sz_tgt_svc_map_to_use/sizeof(element)); i++) { |
| 2790 | |
| 2791 | memcpy(&element, &tgt_svc_map_to_use[i], sizeof(element)); |
| 2792 | if (element.service_id == svc_id) { |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2793 | if (element.pipedir == PIPEDIR_OUT) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2794 | *ul_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2795 | *ul_is_polled = |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2796 | (hif_state->host_ce_config[*ul_pipe].flags & |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2797 | CE_ATTR_DISABLE_INTR) != 0; |
| 2798 | ul_updated = true; |
| 2799 | } else if (element.pipedir == PIPEDIR_IN) { |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2800 | *dl_pipe = element.pipenum; |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2801 | dl_updated = true; |
| 2802 | } |
| 2803 | status = QDF_STATUS_SUCCESS; |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2804 | } |
| 2805 | } |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2806 | if (ul_updated == false) |
Poddar, Siddarth | f53a9b0 | 2017-03-14 20:30:17 +0530 | [diff] [blame] | 2807 | HIF_INFO("%s: ul pipe is NOT updated for service %d", |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2808 | __func__, svc_id); |
| 2809 | if (dl_updated == false) |
Poddar, Siddarth | f53a9b0 | 2017-03-14 20:30:17 +0530 | [diff] [blame] | 2810 | HIF_INFO("%s: dl pipe is NOT updated for service %d", |
Manjunathappa Prakash | 32afe37 | 2016-04-29 11:12:41 -0700 | [diff] [blame] | 2811 | __func__, svc_id); |
Sanjay Devnani | c319c82 | 2015-11-06 16:44:28 -0800 | [diff] [blame] | 2812 | |
| 2813 | return status; |
| 2814 | } |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2815 | |
| 2816 | #ifdef SHADOW_REG_DEBUG |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2817 | inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2818 | uint32_t CE_ctrl_addr) |
| 2819 | { |
| 2820 | uint32_t read_from_hw, srri_from_ddr = 0; |
| 2821 | |
| 2822 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_SRRI_ADDRESS); |
| 2823 | |
| 2824 | srri_from_ddr = SRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 2825 | |
| 2826 | if (read_from_hw != srri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2827 | HIF_ERROR("%s: error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
| 2828 | __func__, srri_from_ddr, read_from_hw, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2829 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2830 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2831 | } |
| 2832 | return srri_from_ddr; |
| 2833 | } |
| 2834 | |
| 2835 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2836 | inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2837 | uint32_t CE_ctrl_addr) |
| 2838 | { |
| 2839 | uint32_t read_from_hw, drri_from_ddr = 0; |
| 2840 | |
| 2841 | read_from_hw = A_TARGET_READ(scn, CE_ctrl_addr + CURRENT_DRRI_ADDRESS); |
| 2842 | |
| 2843 | drri_from_ddr = DRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr)); |
| 2844 | |
| 2845 | if (read_from_hw != drri_from_ddr) { |
Houston Hoffman | c50572b | 2016-06-08 19:49:46 -0700 | [diff] [blame] | 2846 | HIF_ERROR("error: read from ddr = %d actual read from register = %d, CE_MISC_INT_STATUS_GET = 0x%x", |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2847 | drri_from_ddr, read_from_hw, |
| 2848 | CE_MISC_INT_STATUS_GET(scn, CE_ctrl_addr)); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2849 | QDF_ASSERT(0); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2850 | } |
| 2851 | return drri_from_ddr; |
| 2852 | } |
| 2853 | |
| 2854 | #endif |
| 2855 | |
Houston Hoffman | 3d0cda8 | 2015-12-03 13:25:05 -0800 | [diff] [blame] | 2856 | #ifdef ADRASTEA_RRI_ON_DDR |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2857 | /** |
| 2858 | * hif_get_src_ring_read_index(): Called to get the SRRI |
| 2859 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2860 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2861 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2862 | * |
| 2863 | * This function returns the SRRI to the caller. For CEs that |
| 2864 | * dont have interrupts enabled, we look at the DDR based SRRI |
| 2865 | * |
| 2866 | * Return: SRRI |
| 2867 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2868 | inline unsigned int hif_get_src_ring_read_index(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2869 | uint32_t CE_ctrl_addr) |
| 2870 | { |
| 2871 | struct CE_attr attr; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2872 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2873 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2874 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2875 | if (attr.flags & CE_ATTR_DISABLE_INTR) |
| 2876 | return CE_SRC_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2877 | else |
| 2878 | return A_TARGET_READ(scn, |
| 2879 | (CE_ctrl_addr) + CURRENT_SRRI_ADDRESS); |
| 2880 | } |
| 2881 | |
| 2882 | /** |
| 2883 | * hif_get_dst_ring_read_index(): Called to get the DRRI |
| 2884 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2885 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2886 | * @CE_ctrl_addr: base address of the CE whose RRI is to be read |
| 2887 | * |
| 2888 | * This function returns the DRRI to the caller. For CEs that |
| 2889 | * dont have interrupts enabled, we look at the DDR based DRRI |
| 2890 | * |
| 2891 | * Return: DRRI |
| 2892 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2893 | inline unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn, |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2894 | uint32_t CE_ctrl_addr) |
| 2895 | { |
| 2896 | struct CE_attr attr; |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2897 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2898 | |
Venkateswara Swamy Bandaru | 13164aa | 2016-09-20 20:24:54 +0530 | [diff] [blame] | 2899 | attr = hif_state->host_ce_config[COPY_ENGINE_ID(CE_ctrl_addr)]; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2900 | |
| 2901 | if (attr.flags & CE_ATTR_DISABLE_INTR) |
| 2902 | return CE_DEST_RING_READ_IDX_GET_FROM_DDR(scn, CE_ctrl_addr); |
| 2903 | else |
| 2904 | return A_TARGET_READ(scn, |
| 2905 | (CE_ctrl_addr) + CURRENT_DRRI_ADDRESS); |
| 2906 | } |
| 2907 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2908 | /** |
| 2909 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2910 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2911 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2912 | * |
| 2913 | * This function allocates non cached memory on ddr and sends |
| 2914 | * the physical address of this memory to the CE hardware. The |
| 2915 | * hardware updates the RRI on this particular location. |
| 2916 | * |
| 2917 | * Return: None |
| 2918 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2919 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2920 | { |
| 2921 | unsigned int i; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2922 | qdf_dma_addr_t paddr_rri_on_ddr; |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2923 | uint32_t high_paddr, low_paddr; |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2924 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2925 | scn->vaddr_rri_on_ddr = |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2926 | (uint32_t *)qdf_mem_alloc_consistent(scn->qdf_dev, |
| 2927 | scn->qdf_dev->dev, (CE_COUNT*sizeof(uint32_t)), |
| 2928 | &paddr_rri_on_ddr); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2929 | |
| 2930 | low_paddr = BITS0_TO_31(paddr_rri_on_ddr); |
| 2931 | high_paddr = BITS32_TO_35(paddr_rri_on_ddr); |
| 2932 | |
Srinivas Girigowda | 6e0cfd9 | 2017-03-09 15:49:59 -0800 | [diff] [blame] | 2933 | HIF_DBG("%s using srri and drri from DDR", __func__); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2934 | |
| 2935 | WRITE_CE_DDR_ADDRESS_FOR_RRI_LOW(scn, low_paddr); |
| 2936 | WRITE_CE_DDR_ADDRESS_FOR_RRI_HIGH(scn, high_paddr); |
| 2937 | |
| 2938 | for (i = 0; i < CE_COUNT; i++) |
| 2939 | CE_IDX_UPD_EN_SET(scn, CE_BASE_ADDRESS(i)); |
| 2940 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2941 | qdf_mem_zero(scn->vaddr_rri_on_ddr, CE_COUNT*sizeof(uint32_t)); |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2942 | |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2943 | } |
| 2944 | #else |
| 2945 | |
| 2946 | /** |
| 2947 | * hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism |
| 2948 | * |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2949 | * @scn: hif_softc pointer |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2950 | * |
| 2951 | * This is a dummy implementation for platforms that don't |
| 2952 | * support this functionality. |
| 2953 | * |
| 2954 | * Return: None |
| 2955 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2956 | static inline void hif_config_rri_on_ddr(struct hif_softc *scn) |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2957 | { |
Sanjay Devnani | b925d7e | 2015-11-12 14:43:58 -0800 | [diff] [blame] | 2958 | } |
| 2959 | #endif |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2960 | |
| 2961 | /** |
| 2962 | * hif_dump_ce_registers() - dump ce registers |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2963 | * @scn: hif_opaque_softc pointer. |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2964 | * |
| 2965 | * Output the copy engine registers |
| 2966 | * |
| 2967 | * Return: 0 for success or error code |
| 2968 | */ |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2969 | int hif_dump_ce_registers(struct hif_softc *scn) |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2970 | { |
Komal Seelam | 5584a7c | 2016-02-24 19:22:48 +0530 | [diff] [blame] | 2971 | struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2972 | uint32_t ce_reg_address = CE0_BASE_ADDRESS; |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 2973 | uint32_t ce_reg_values[CE_USEFUL_SIZE >> 2]; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2974 | uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2; |
| 2975 | uint16_t i; |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2976 | QDF_STATUS status; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2977 | |
Houston Hoffman | d6f946c | 2016-04-06 15:16:00 -0700 | [diff] [blame] | 2978 | for (i = 0; i < scn->ce_count; i++, ce_reg_address += CE_OFFSET) { |
| 2979 | if (scn->ce_id_to_state[i] == NULL) { |
| 2980 | HIF_DBG("CE%d not used.", i); |
| 2981 | continue; |
| 2982 | } |
| 2983 | |
Komal Seelam | 644263d | 2016-02-22 20:45:49 +0530 | [diff] [blame] | 2984 | status = hif_diag_read_mem(hif_hdl, ce_reg_address, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 2985 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2986 | ce_reg_word_size * sizeof(uint32_t)); |
| 2987 | |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2988 | if (status != QDF_STATUS_SUCCESS) { |
Manikandan Mohan | afd6e88 | 2017-04-07 17:46:41 -0700 | [diff] [blame] | 2989 | HIF_ERROR("Dumping CE register failed!"); |
| 2990 | return -EACCES; |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2991 | } |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 2992 | HIF_ERROR("CE%d=>\n", i); |
Chouhan, Anurag | fc06aa9 | 2016-03-03 19:05:05 +0530 | [diff] [blame] | 2993 | qdf_trace_hex_dump(QDF_MODULE_ID_HIF, QDF_TRACE_LEVEL_DEBUG, |
Houston Hoffman | 6296c3e | 2016-07-12 18:43:32 -0700 | [diff] [blame] | 2994 | (uint8_t *) &ce_reg_values[0], |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 2995 | ce_reg_word_size * sizeof(uint32_t)); |
Venkateswara Swamy Bandaru | 772377c | 2016-10-03 14:17:28 +0530 | [diff] [blame] | 2996 | qdf_print("ADDR:[0x%08X], SR_WR_INDEX:%d\n", (ce_reg_address |
| 2997 | + SR_WR_INDEX_ADDRESS), |
| 2998 | ce_reg_values[SR_WR_INDEX_ADDRESS/4]); |
| 2999 | qdf_print("ADDR:[0x%08X], CURRENT_SRRI:%d\n", (ce_reg_address |
| 3000 | + CURRENT_SRRI_ADDRESS), |
| 3001 | ce_reg_values[CURRENT_SRRI_ADDRESS/4]); |
| 3002 | qdf_print("ADDR:[0x%08X], DST_WR_INDEX:%d\n", (ce_reg_address |
| 3003 | + DST_WR_INDEX_ADDRESS), |
| 3004 | ce_reg_values[DST_WR_INDEX_ADDRESS/4]); |
| 3005 | qdf_print("ADDR:[0x%08X], CURRENT_DRRI:%d\n", (ce_reg_address |
| 3006 | + CURRENT_DRRI_ADDRESS), |
| 3007 | ce_reg_values[CURRENT_DRRI_ADDRESS/4]); |
| 3008 | qdf_print("---\n"); |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3009 | } |
Govind Singh | 2443fb3 | 2016-01-13 17:44:48 +0530 | [diff] [blame] | 3010 | return 0; |
| 3011 | } |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3012 | #ifdef QCA_NSS_WIFI_OFFLOAD_SUPPORT |
| 3013 | struct hif_pipe_addl_info *hif_get_addl_pipe_info(struct hif_opaque_softc *osc, |
| 3014 | struct hif_pipe_addl_info *hif_info, uint32_t pipe) |
| 3015 | { |
| 3016 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3017 | struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn); |
| 3018 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(osc); |
| 3019 | struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]); |
| 3020 | struct CE_handle *ce_hdl = pipe_info->ce_hdl; |
| 3021 | struct CE_state *ce_state = (struct CE_state *)ce_hdl; |
| 3022 | struct CE_ring_state *src_ring = ce_state->src_ring; |
| 3023 | struct CE_ring_state *dest_ring = ce_state->dest_ring; |
| 3024 | |
| 3025 | if (src_ring) { |
| 3026 | hif_info->ul_pipe.nentries = src_ring->nentries; |
| 3027 | hif_info->ul_pipe.nentries_mask = src_ring->nentries_mask; |
| 3028 | hif_info->ul_pipe.sw_index = src_ring->sw_index; |
| 3029 | hif_info->ul_pipe.write_index = src_ring->write_index; |
| 3030 | hif_info->ul_pipe.hw_index = src_ring->hw_index; |
| 3031 | hif_info->ul_pipe.base_addr_CE_space = |
| 3032 | src_ring->base_addr_CE_space; |
| 3033 | hif_info->ul_pipe.base_addr_owner_space = |
| 3034 | src_ring->base_addr_owner_space; |
| 3035 | } |
| 3036 | |
| 3037 | |
| 3038 | if (dest_ring) { |
| 3039 | hif_info->dl_pipe.nentries = dest_ring->nentries; |
| 3040 | hif_info->dl_pipe.nentries_mask = dest_ring->nentries_mask; |
| 3041 | hif_info->dl_pipe.sw_index = dest_ring->sw_index; |
| 3042 | hif_info->dl_pipe.write_index = dest_ring->write_index; |
| 3043 | hif_info->dl_pipe.hw_index = dest_ring->hw_index; |
| 3044 | hif_info->dl_pipe.base_addr_CE_space = |
| 3045 | dest_ring->base_addr_CE_space; |
| 3046 | hif_info->dl_pipe.base_addr_owner_space = |
| 3047 | dest_ring->base_addr_owner_space; |
| 3048 | } |
| 3049 | |
| 3050 | hif_info->pci_mem = pci_resource_start(sc->pdev, 0); |
| 3051 | hif_info->ctrl_addr = ce_state->ctrl_addr; |
| 3052 | |
| 3053 | return hif_info; |
| 3054 | } |
| 3055 | |
| 3056 | uint32_t hif_set_nss_wifiol_mode(struct hif_opaque_softc *osc, uint32_t mode) |
| 3057 | { |
| 3058 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3059 | |
| 3060 | scn->nss_wifi_ol_mode = mode; |
| 3061 | return 0; |
| 3062 | } |
| 3063 | |
| 3064 | #endif |
| 3065 | |
Venkateswara Swamy Bandaru | 5432c1b | 2016-10-12 19:00:40 +0530 | [diff] [blame] | 3066 | void hif_set_attribute(struct hif_opaque_softc *osc, uint8_t hif_attrib) |
| 3067 | { |
| 3068 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3069 | scn->hif_attribute = hif_attrib; |
| 3070 | } |
| 3071 | |
Houston Hoffman | 8592507 | 2016-05-06 17:02:18 -0700 | [diff] [blame] | 3072 | void hif_disable_interrupt(struct hif_opaque_softc *osc, uint32_t pipe_num) |
| 3073 | { |
| 3074 | struct hif_softc *scn = HIF_GET_SOFTC(osc); |
| 3075 | struct CE_state *CE_state = scn->ce_id_to_state[pipe_num]; |
| 3076 | uint32_t ctrl_addr = CE_state->ctrl_addr; |
| 3077 | |
| 3078 | Q_TARGET_ACCESS_BEGIN(scn); |
| 3079 | CE_COPY_COMPLETE_INTR_DISABLE(scn, ctrl_addr); |
| 3080 | Q_TARGET_ACCESS_END(scn); |
| 3081 | } |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3082 | |
| 3083 | /** |
| 3084 | * hif_fw_event_handler() - hif fw event handler |
| 3085 | * @hif_state: pointer to hif ce state structure |
| 3086 | * |
| 3087 | * Process fw events and raise HTC callback to process fw events. |
| 3088 | * |
| 3089 | * Return: none |
| 3090 | */ |
| 3091 | static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state) |
| 3092 | { |
| 3093 | struct hif_msg_callbacks *msg_callbacks = |
| 3094 | &hif_state->msg_callbacks_current; |
| 3095 | |
| 3096 | if (!msg_callbacks->fwEventHandler) |
| 3097 | return; |
| 3098 | |
| 3099 | msg_callbacks->fwEventHandler(msg_callbacks->Context, |
| 3100 | QDF_STATUS_E_FAILURE); |
| 3101 | } |
| 3102 | |
| 3103 | #ifndef QCA_WIFI_3_0 |
| 3104 | /** |
| 3105 | * hif_fw_interrupt_handler() - FW interrupt handler |
| 3106 | * @irq: irq number |
| 3107 | * @arg: the user pointer |
| 3108 | * |
| 3109 | * Called from the PCI interrupt handler when a |
| 3110 | * firmware-generated interrupt to the Host. |
| 3111 | * |
| 3112 | * Return: status of handled irq |
| 3113 | */ |
| 3114 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 3115 | { |
| 3116 | struct hif_softc *scn = arg; |
| 3117 | struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn); |
| 3118 | uint32_t fw_indicator_address, fw_indicator; |
| 3119 | |
| 3120 | if (Q_TARGET_ACCESS_BEGIN(scn) < 0) |
| 3121 | return ATH_ISR_NOSCHED; |
| 3122 | |
| 3123 | fw_indicator_address = hif_state->fw_indicator_address; |
| 3124 | /* For sudden unplug this will return ~0 */ |
| 3125 | fw_indicator = A_TARGET_READ(scn, fw_indicator_address); |
| 3126 | |
| 3127 | if ((fw_indicator != ~0) && (fw_indicator & FW_IND_EVENT_PENDING)) { |
| 3128 | /* ACK: clear Target-side pending event */ |
| 3129 | A_TARGET_WRITE(scn, fw_indicator_address, |
| 3130 | fw_indicator & ~FW_IND_EVENT_PENDING); |
| 3131 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 3132 | return ATH_ISR_SCHED; |
| 3133 | |
| 3134 | if (hif_state->started) { |
| 3135 | hif_fw_event_handler(hif_state); |
| 3136 | } else { |
| 3137 | /* |
| 3138 | * Probable Target failure before we're prepared |
| 3139 | * to handle it. Generally unexpected. |
| 3140 | */ |
| 3141 | AR_DEBUG_PRINTF(ATH_DEBUG_ERR, |
| 3142 | ("%s: Early firmware event indicated\n", |
| 3143 | __func__)); |
| 3144 | } |
| 3145 | } else { |
| 3146 | if (Q_TARGET_ACCESS_END(scn) < 0) |
| 3147 | return ATH_ISR_SCHED; |
| 3148 | } |
| 3149 | |
| 3150 | return ATH_ISR_SCHED; |
| 3151 | } |
| 3152 | #else |
| 3153 | irqreturn_t hif_fw_interrupt_handler(int irq, void *arg) |
| 3154 | { |
| 3155 | return ATH_ISR_SCHED; |
| 3156 | } |
| 3157 | #endif /* #ifdef QCA_WIFI_3_0 */ |
| 3158 | |
| 3159 | |
| 3160 | /** |
| 3161 | * hif_wlan_disable(): call the platform driver to disable wlan |
| 3162 | * @scn: HIF Context |
| 3163 | * |
| 3164 | * This function passes the con_mode to platform driver to disable |
| 3165 | * wlan. |
| 3166 | * |
| 3167 | * Return: void |
| 3168 | */ |
| 3169 | void hif_wlan_disable(struct hif_softc *scn) |
| 3170 | { |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3171 | enum pld_driver_mode mode; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3172 | uint32_t con_mode = hif_get_conparam(scn); |
| 3173 | |
| 3174 | if (QDF_GLOBAL_FTM_MODE == con_mode) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3175 | mode = PLD_FTM; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3176 | else if (QDF_IS_EPPING_ENABLED(con_mode)) |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3177 | mode = PLD_EPPING; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3178 | else |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3179 | mode = PLD_MISSION; |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3180 | |
Yuanyuan Liu | fd594c2 | 2016-04-25 13:59:19 -0700 | [diff] [blame] | 3181 | pld_wlan_disable(scn->qdf_dev->dev, mode); |
Poddar, Siddarth | e41943f | 2016-04-27 15:33:48 +0530 | [diff] [blame] | 3182 | } |
Dustin Brown | 6bdbda5 | 2016-09-27 15:52:30 -0700 | [diff] [blame] | 3183 | |
Dustin Brown | 6834d32 | 2017-03-20 15:02:48 -0700 | [diff] [blame] | 3184 | int hif_get_wake_ce_id(struct hif_softc *scn, uint8_t *ce_id) |
| 3185 | { |
| 3186 | QDF_STATUS status; |
| 3187 | uint8_t ul_pipe, dl_pipe; |
| 3188 | int ul_is_polled, dl_is_polled; |
| 3189 | |
| 3190 | /* DL pipe for HTC_CTRL_RSVD_SVC should map to the wake CE */ |
| 3191 | status = hif_map_service_to_pipe(GET_HIF_OPAQUE_HDL(scn), |
| 3192 | HTC_CTRL_RSVD_SVC, |
| 3193 | &ul_pipe, &dl_pipe, |
| 3194 | &ul_is_polled, &dl_is_polled); |
| 3195 | if (status) { |
| 3196 | HIF_ERROR("%s: failed to map pipe: %d", __func__, status); |
| 3197 | return qdf_status_to_os_return(status); |
| 3198 | } |
| 3199 | |
| 3200 | *ce_id = dl_pipe; |
| 3201 | |
| 3202 | return 0; |
| 3203 | } |