blob: 28fabc7745786540bb3fff18ee471c36d5ae4dd2 [file] [log] [blame]
Krunal Soni4274f362016-12-14 19:55:25 -08001/*
Amar Singhalef59eee2018-01-02 12:46:35 -08002 * Copyright (c) 2013-2018 The Linux Foundation. All rights reserved.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08003 *
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08004 * Permission to use, copy, modify, and/or distribute this software for
5 * any purpose with or without fee is hereby granted, provided that the
6 * above copyright notice and this permission notice appear in all
7 * copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16 * PERFORMANCE OF THIS SOFTWARE.
17 */
18
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080019#ifndef WMA_H
20#define WMA_H
21
22#include "a_types.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053023#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080024#include "osapi_linux.h"
25#include "htc_packet.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053026#include "i_qdf_event.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080027#include "wmi_services.h"
28#include "wmi_unified.h"
29#include "wmi_version.h"
Anurag Chouhan6d760662016-02-20 16:05:43 +053030#include "qdf_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080031#include "cfg_api.h"
Anurag Chouhance0dc992016-02-16 18:18:03 +053032#include "qdf_status.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080033#include "cds_sched.h"
Varun Reddy Yeturuba1942a2017-06-20 15:32:19 -070034#include "cds_config.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080035#include "sir_mac_prot_def.h"
36#include "wma_types.h"
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080037#include <linux/workqueue.h>
38#include "utils_api.h"
39#include "lim_types.h"
40#include "wmi_unified_api.h"
Dhanashri Atre12a08392016-02-17 13:10:34 -080041#include "cdp_txrx_cmn.h"
Govind Singh8c46db92016-05-10 14:17:16 +053042#include "dbglog.h"
Leo Chang96464902016-10-28 11:10:54 -070043#include "cds_ieee80211_common.h"
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +053044#include "wlan_objmgr_psoc_obj.h"
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -080045#include <cdp_txrx_handle.h>
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -070046#include <wlan_policy_mgr_api.h>
Tushnim Bhattacharyya9e81b4c2017-02-15 17:11:14 -080047
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080048/* Platform specific configuration for max. no. of fragments */
49#define QCA_OL_11AC_TX_MAX_FRAGS 2
50
51/* Private */
52
Rajeev Kumardaf1c612016-04-05 02:56:41 -070053#define WMA_READY_EVENTID_TIMEOUT 6000
54#define WMA_SERVICE_READY_EXT_TIMEOUT 6000
Sandeep Puligilla4a58f7f2017-05-16 16:36:56 -070055#define NAN_CLUSTER_ID_BYTES 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080056
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080057#define WMA_CRASH_INJECT_TIMEOUT 5000
58
Govind Singhefc5ccd2016-04-25 11:11:55 +053059/* MAC ID to PDEV ID mapping is as given below
60 * MAC_ID PDEV_ID
61 * 0 1
62 * 1 2
63 * SOC Level WMI_PDEV_ID_SOC
64 */
65#define WMA_MAC_TO_PDEV_MAP(x) ((x) + (1))
66#define WMA_PDEV_TO_MAC_MAP(x) ((x) - (1))
67
Naveen Rawatb0c5b6b2017-11-27 17:37:40 -080068#define WMA_MAX_SUPPORTED_BSS SIR_MAX_SUPPORTED_BSS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080069
Vignesh Viswanathan56f26252017-08-31 15:26:01 +053070#define WMA_MAX_MGMT_MPDU_LEN 2000
71
Kapil Gupta10800b92017-05-31 19:14:47 +053072#define MAX_PRINT_FAILURE_CNT 50
73
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080074#define WMA_INVALID_VDEV_ID 0xFF
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080075
Dustin Brownef8448d2018-07-09 10:51:13 -070076/* Deprecated logging macros, to be removed. Please do not use in new code */
Nirav Shah790d9432018-07-12 19:42:48 +053077#define WMA_LOGD(params ...) \
78 QDF_TRACE_DEBUG_NO_FL(QDF_MODULE_ID_WMA, params)
79#define WMA_LOGI(params ...) \
80 QDF_TRACE_INFO_NO_FL(QDF_MODULE_ID_WMA, params)
81#define WMA_LOGW(params ...) \
82 QDF_TRACE_WARN_NO_FL(QDF_MODULE_ID_WMA, params)
83#define WMA_LOGE(params ...) \
84 QDF_TRACE_ERROR_NO_FL(QDF_MODULE_ID_WMA, params)
85#define WMA_LOGP(params ...) \
86 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -080087
Dustin Brownef8448d2018-07-09 10:51:13 -070088#define wma_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_WMA, params)
89#define wma_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_WMA, params)
90#define wma_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_WMA, params)
91#define wma_info(params...) QDF_TRACE_INFO(QDF_MODULE_ID_WMA, params)
92#define wma_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_WMA, params)
93
Nirav Shah790d9432018-07-12 19:42:48 +053094#define wma_nofl_alert(params...) \
95 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
96#define wma_nofl_err(params...) \
97 QDF_TRACE_ERROR_NO_FL(QDF_MODULE_ID_WMA, params)
98#define wma_nofl_warn(params...) \
99 QDF_TRACE_WARN_NO_FL(QDF_MODULE_ID_WMA, params)
100#define wma_nofl_info(params...) \
101 QDF_TRACE_INFO_NO_FL(QDF_MODULE_ID_WMA, params)
102#define wma_nofl_debug(params...) \
103 QDF_TRACE_DEBUG_NO_FL(QDF_MODULE_ID_WMA, params)
104
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800105#define WMA_DEBUG_ALWAYS
106
107#ifdef WMA_DEBUG_ALWAYS
Nirav Shah790d9432018-07-12 19:42:48 +0530108#define WMA_LOGA(params ...) \
109 QDF_TRACE_FATAL_NO_FL(QDF_MODULE_ID_WMA, params)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800110#else
Nirav Shah790d9432018-07-12 19:42:48 +0530111#define WMA_LOGA(params ...)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800112#endif
113
Govind Singhd76a5b02016-03-08 15:12:14 +0530114#define WMA_WILDCARD_PDEV_ID 0x0
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800115
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800116#define WMA_HW_DEF_SCAN_MAX_DURATION 30000 /* 30 secs */
117
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800118#define WMA_SCAN_NPROBES_DEFAULT (2)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800119
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800120#define WMA_BCAST_MAC_ADDR (0xFF)
121#define WMA_MCAST_IPV4_MAC_ADDR (0x01)
122#define WMA_MCAST_IPV6_MAC_ADDR (0x33)
Sreelakshmi Konamkie1cd51f2016-08-19 16:58:24 +0530123#define WMA_ICMP_PROTOCOL (0x01)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800124
Himanshu Agarwal82de9042016-07-20 18:11:03 +0530125#define WMA_IS_EAPOL_GET_MIN_LEN 14
126#define WMA_EAPOL_SUBTYPE_GET_MIN_LEN 21
127#define WMA_EAPOL_INFO_GET_MIN_LEN 23
128#define WMA_IS_DHCP_GET_MIN_LEN 38
129#define WMA_DHCP_SUBTYPE_GET_MIN_LEN 0x11D
130#define WMA_DHCP_INFO_GET_MIN_LEN 50
131#define WMA_IS_ARP_GET_MIN_LEN 14
132#define WMA_ARP_SUBTYPE_GET_MIN_LEN 22
133#define WMA_IPV4_PROTO_GET_MIN_LEN 24
134#define WMA_IPV4_PKT_INFO_GET_MIN_LEN 42
135#define WMA_ICMP_SUBTYPE_GET_MIN_LEN 35
136#define WMA_IPV6_PROTO_GET_MIN_LEN 21
137#define WMA_IPV6_PKT_INFO_GET_MIN_LEN 62
138#define WMA_ICMPV6_SUBTYPE_GET_MIN_LEN 55
Jiachao Wu712d4fd2017-08-23 16:52:34 +0800139
140/* Beacon tx rate */
141#define WMA_BEACON_TX_RATE_1_M 10
142#define WMA_BEACON_TX_RATE_2_M 20
143#define WMA_BEACON_TX_RATE_5_5_M 55
144#define WMA_BEACON_TX_RATE_11_M 110
145#define WMA_BEACON_TX_RATE_6_M 60
146#define WMA_BEACON_TX_RATE_9_M 90
147#define WMA_BEACON_TX_RATE_12_M 120
148#define WMA_BEACON_TX_RATE_18_M 180
149#define WMA_BEACON_TX_RATE_24_M 240
150#define WMA_BEACON_TX_RATE_36_M 360
151#define WMA_BEACON_TX_RATE_48_M 480
152#define WMA_BEACON_TX_RATE_54_M 540
153
Himanshu Agarwaldd356df2016-07-20 19:04:39 +0530154/**
155 * ds_mode: distribution system mode
156 * @IEEE80211_NO_DS: NO DS at either side
157 * @IEEE80211_TO_DS: DS at receiver side
158 * @IEEE80211_FROM_DS: DS at sender side
159 * @IEEE80211_DS_TO_DS: DS at both sender and revceiver side
160 */
161enum ds_mode {
162 IEEE80211_NO_DS,
163 IEEE80211_TO_DS,
164 IEEE80211_FROM_DS,
165 IEEE80211_DS_TO_DS
166};
167
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800168/* Roaming default values
169 * All time and period values are in milliseconds.
170 * All rssi values are in dB except for WMA_NOISE_FLOOR_DBM_DEFAULT.
171 */
172
173#define WMA_ROAM_SCAN_CHANNEL_SWITCH_TIME (4)
174#define WMA_NOISE_FLOOR_DBM_DEFAULT (-96)
175#define WMA_ROAM_RSSI_DIFF_DEFAULT (5)
176#define WMA_ROAM_DWELL_TIME_ACTIVE_DEFAULT (100)
177#define WMA_ROAM_DWELL_TIME_PASSIVE_DEFAULT (110)
178#define WMA_ROAM_MIN_REST_TIME_DEFAULT (50)
179#define WMA_ROAM_MAX_REST_TIME_DEFAULT (500)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800180
181#define WMA_INVALID_KEY_IDX 0xff
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800182
183#define WMA_MAX_RF_CHAINS(x) ((1 << x) - 1)
184#define WMA_MIN_RF_CHAINS (1)
Abhishek Singh9100cc82017-04-17 11:03:55 +0530185#define WMA_MAX_NSS (2)
186
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800187
188#ifdef FEATURE_WLAN_EXTSCAN
189#define WMA_MAX_EXTSCAN_MSG_SIZE 1536
190#define WMA_EXTSCAN_REST_TIME 100
191#define WMA_EXTSCAN_MAX_SCAN_TIME 50000
192#define WMA_EXTSCAN_BURST_DURATION 150
193#endif
194
gaoleze5108942017-03-31 16:56:42 +0800195#define WMA_CHAN_START_RESP 0
196#define WMA_CHAN_END_RESP 1
197
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800198#define WMA_BCN_BUF_MAX_SIZE 2500
199#define WMA_NOA_IE_SIZE(num_desc) (2 + (13 * (num_desc)))
200#define WMA_MAX_NOA_DESCRIPTORS 4
201
202#define WMA_TIM_SUPPORTED_PVB_LENGTH ((HAL_NUM_STA / 8) + 1)
203
204#define WMA_WOW_PTRN_MASK_VALID 0xFF
205#define WMA_NUM_BITS_IN_BYTE 8
206
207#define WMA_AP_WOW_DEFAULT_PTRN_MAX 4
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800208
209#define WMA_BSS_STATUS_STARTED 0x1
210#define WMA_BSS_STATUS_STOPPED 0x2
211
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800212#define WMA_TARGET_REQ_TYPE_VDEV_START 0x1
213#define WMA_TARGET_REQ_TYPE_VDEV_STOP 0x2
214#define WMA_TARGET_REQ_TYPE_VDEV_DEL 0x3
215
216#define WMA_PEER_ASSOC_CNF_START 0x01
Sandeep Puligillaafa52892016-10-26 19:03:16 -0700217#define WMA_PEER_ASSOC_TIMEOUT (6000) /* 6 seconds */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800218
Sandeep Puligilla19ddda22016-01-05 12:18:02 -0800219#define WMA_DELETE_STA_RSP_START 0x02
220#define WMA_DELETE_STA_TIMEOUT (6000) /* 6 seconds */
221
222#define WMA_DEL_P2P_SELF_STA_RSP_START 0x03
Sandeep Puligillabbee8172017-04-07 19:26:33 -0700223#define WMA_SET_LINK_PEER_RSP 0x04
Abhishek Singhe8be9a62017-05-30 12:13:29 +0530224#define WMA_DELETE_PEER_RSP 0x05
Tushnim Bhattacharyya86294892017-10-25 16:29:11 -0700225
226#define WMA_PDEV_SET_HW_MODE_RESP 0x06
227
Dustin Brownd0a76562017-10-13 14:48:37 -0700228#define WMA_VDEV_START_REQUEST_TIMEOUT 6000 /* 6s */
229#define WMA_VDEV_STOP_REQUEST_TIMEOUT 6000 /* 6s */
230#define WMA_VDEV_HW_MODE_REQUEST_TIMEOUT 5000 /* 5s */
231#define WMA_VDEV_PLCY_MGR_CMD_TIMEOUT 3000 /* 3s */
232#define WMA_VDEV_SET_KEY_WAKELOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800233
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530234#define WMA_TGT_INVALID_SNR (0)
235
Naveen Rawatf440a132017-05-05 12:27:39 -0700236#define WMA_TGT_IS_VALID_SNR(x) ((x) >= 0 && (x) < WMA_TGT_MAX_SNR)
Hanumanth Reddy Pothula90051782017-05-04 22:14:43 +0530237#define WMA_TGT_IS_INVALID_SNR(x) (!WMA_TGT_IS_VALID_SNR(x))
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800238
239#define WMA_TX_Q_RECHECK_TIMER_WAIT 2 /* 2 ms */
240#define WMA_TX_Q_RECHECK_TIMER_MAX_WAIT 20 /* 20 ms */
241#define WMA_MAX_NUM_ARGS 8
242
243#define WMA_SMPS_MASK_LOWER_16BITS 0xFF
244#define WMA_SMPS_MASK_UPPER_3BITS 0x7
245#define WMA_SMPS_PARAM_VALUE_S 29
246
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800247/*
248 * Setting the Tx Comp Timeout to 1 secs.
249 * TODO: Need to Revist the Timing
250 */
251#define WMA_TX_FRAME_COMPLETE_TIMEOUT 1000
252#define WMA_TX_FRAME_BUFFER_NO_FREE 0
253#define WMA_TX_FRAME_BUFFER_FREE 1
254
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800255/* Default InActivity Time is 200 ms */
256#define POWERSAVE_DEFAULT_INACTIVITY_TIME 200
257
Mukul Sharmaed92f2f2017-04-20 00:06:28 +0530258/* Default WOW InActivity Time is 50 ms */
259#define WOW_POWERSAVE_DEFAULT_INACTIVITY_TIME 50
260
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800261/* Default Listen Interval */
262#define POWERSAVE_DEFAULT_LISTEN_INTERVAL 1
263
264/*
265 * TODO: Add WMI_CMD_ID_MAX as part of WMI_CMD_ID
266 * instead of assigning it to the last valid wmi
267 * cmd+1 to avoid updating this when a command is
268 * added/deleted.
269 */
270#define WMI_CMDID_MAX (WMI_TXBF_CMDID + 1)
271
272#define WMA_NLO_FREQ_THRESH 1000 /* in MHz */
273#define WMA_SEC_TO_MSEC(sec) (sec * 1000) /* sec to msec */
274#define WMA_MSEC_TO_USEC(msec) (msec * 1000) /* msec to usec */
275
276/* Default rssi threshold defined in CFG80211 */
277#define WMA_RSSI_THOLD_DEFAULT -300
278
Dustin Brownd0a76562017-10-13 14:48:37 -0700279#define WMA_AUTH_REQ_RECV_WAKE_LOCK_TIMEOUT WAKELOCK_DURATION_RECOMMENDED
280#define WMA_ASSOC_REQ_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
281#define WMA_DEAUTH_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
282#define WMA_DISASSOC_RECV_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
yeshwanth sriram guntuka37c09822017-01-24 18:30:15 +0530283#define WMA_ROAM_HO_WAKE_LOCK_DURATION (500) /* in msec */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800284#ifdef FEATURE_WLAN_AUTO_SHUTDOWN
Dustin Brownd0a76562017-10-13 14:48:37 -0700285#define WMA_AUTO_SHUTDOWN_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800286#endif
Dustin Brownd0a76562017-10-13 14:48:37 -0700287#define WMA_BMISS_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_RECOMMENDED
288#define WMA_FW_RSP_EVENT_WAKE_LOCK_DURATION WAKELOCK_DURATION_MAX
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800289
290#define WMA_TXMIC_LEN 8
291#define WMA_RXMIC_LEN 8
psimha8696f772018-04-03 17:38:38 -0700292#define WMA_IV_KEY_LEN 16
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800293
294/*
295 * Length = (2 octets for Index and CTWin/Opp PS) and
296 * (13 octets for each NOA Descriptors)
297 */
298
299#define WMA_P2P_NOA_IE_OPP_PS_SET (0x80)
300#define WMA_P2P_NOA_IE_CTWIN_MASK (0x7F)
301
302#define WMA_P2P_IE_ID 0xdd
303#define WMA_P2P_WFA_OUI { 0x50, 0x6f, 0x9a }
304#define WMA_P2P_WFA_VER 0x09 /* ver 1.0 */
305#define WMA_WSC_OUI { 0x00, 0x50, 0xF2 } /* Microsoft WSC OUI byte */
306
Jeff Johnsonc97816c2018-05-12 17:13:23 -0700307/* P2P Sub element definitions (according to table 5 of Wifi's P2P spec) */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800308#define WMA_P2P_SUB_ELEMENT_STATUS 0
309#define WMA_P2P_SUB_ELEMENT_MINOR_REASON 1
310#define WMA_P2P_SUB_ELEMENT_CAPABILITY 2
311#define WMA_P2P_SUB_ELEMENT_DEVICE_ID 3
312#define WMA_P2P_SUB_ELEMENT_GO_INTENT 4
313#define WMA_P2P_SUB_ELEMENT_CONFIGURATION_TIMEOUT 5
314#define WMA_P2P_SUB_ELEMENT_LISTEN_CHANNEL 6
315#define WMA_P2P_SUB_ELEMENT_GROUP_BSSID 7
316#define WMA_P2P_SUB_ELEMENT_EXTENDED_LISTEN_TIMING 8
317#define WMA_P2P_SUB_ELEMENT_INTENDED_INTERFACE_ADDR 9
318#define WMA_P2P_SUB_ELEMENT_MANAGEABILITY 10
319#define WMA_P2P_SUB_ELEMENT_CHANNEL_LIST 11
320#define WMA_P2P_SUB_ELEMENT_NOA 12
321#define WMA_P2P_SUB_ELEMENT_DEVICE_INFO 13
322#define WMA_P2P_SUB_ELEMENT_GROUP_INFO 14
323#define WMA_P2P_SUB_ELEMENT_GROUP_ID 15
324#define WMA_P2P_SUB_ELEMENT_INTERFACE 16
325#define WMA_P2P_SUB_ELEMENT_OP_CHANNEL 17
326#define WMA_P2P_SUB_ELEMENT_INVITATION_FLAGS 18
327#define WMA_P2P_SUB_ELEMENT_VENDOR 221
328
329/* Macros for handling unaligned memory accesses */
330#define P2PIE_PUT_LE16(a, val) \
331 do { \
332 (a)[1] = ((u16) (val)) >> 8; \
333 (a)[0] = ((u16) (val)) & 0xff; \
334 } while (0)
335
336#define P2PIE_PUT_LE32(a, val) \
337 do { \
338 (a)[3] = (u8) ((((u32) (val)) >> 24) & 0xff); \
339 (a)[2] = (u8) ((((u32) (val)) >> 16) & 0xff); \
340 (a)[1] = (u8) ((((u32) (val)) >> 8) & 0xff); \
341 (a)[0] = (u8) (((u32) (val)) & 0xff); \
342 } while (0)
343
344
345#define WMA_DEFAULT_MAX_PSPOLL_BEFORE_WAKE 1
346
347#define WMA_DEFAULT_QPOWER_MAX_PSPOLL_BEFORE_WAKE 1
348#define WMA_DEFAULT_QPOWER_TX_WAKE_THRESHOLD 2
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800349
350#define WMA_VHT_PPS_PAID_MATCH 1
351#define WMA_VHT_PPS_GID_MATCH 2
352#define WMA_VHT_PPS_DELIM_CRC_FAIL 3
353
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800354#define WMA_DEFAULT_HW_MODE_INDEX 0xFFFF
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +0530355#define TWO_THIRD (2/3)
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800356
357/**
Nitesh Shah5b7bae02016-09-28 18:58:33 +0530358 * WMA hardware mode list bit-mask definitions.
359 * Bits 4:0, 31:29 are unused.
360 *
361 * The below definitions are added corresponding to WMI DBS HW mode
362 * list to make it independent of firmware changes for WMI definitions.
363 * Currently these definitions have dependency with BIT positions of
364 * the existing WMI macros. Thus, if the BIT positions are changed for
365 * WMI macros, then these macros' BIT definitions are also need to be
366 * changed.
367 */
368#define WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS (28)
369#define WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS (24)
370#define WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS (20)
371#define WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS (16)
372#define WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS (12)
373#define WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS (8)
374#define WMA_HW_MODE_DBS_MODE_BITPOS (7)
375#define WMA_HW_MODE_AGILE_DFS_MODE_BITPOS (6)
376#define WMA_HW_MODE_SBS_MODE_BITPOS (5)
377
378#define WMA_HW_MODE_MAC0_TX_STREAMS_MASK \
379 (0xf << WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
380#define WMA_HW_MODE_MAC0_RX_STREAMS_MASK \
381 (0xf << WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
382#define WMA_HW_MODE_MAC1_TX_STREAMS_MASK \
383 (0xf << WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
384#define WMA_HW_MODE_MAC1_RX_STREAMS_MASK \
385 (0xf << WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
386#define WMA_HW_MODE_MAC0_BANDWIDTH_MASK \
387 (0xf << WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
388#define WMA_HW_MODE_MAC1_BANDWIDTH_MASK \
389 (0xf << WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
390#define WMA_HW_MODE_DBS_MODE_MASK \
391 (0x1 << WMA_HW_MODE_DBS_MODE_BITPOS)
392#define WMA_HW_MODE_AGILE_DFS_MODE_MASK \
393 (0x1 << WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
394#define WMA_HW_MODE_SBS_MODE_MASK \
395 (0x1 << WMA_HW_MODE_SBS_MODE_BITPOS)
396
397#define WMA_HW_MODE_MAC0_TX_STREAMS_SET(hw_mode, value) \
398 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS, 4, value)
399#define WMA_HW_MODE_MAC0_RX_STREAMS_SET(hw_mode, value) \
400 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS, 4, value)
401#define WMA_HW_MODE_MAC1_TX_STREAMS_SET(hw_mode, value) \
402 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS, 4, value)
403#define WMA_HW_MODE_MAC1_RX_STREAMS_SET(hw_mode, value) \
404 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS, 4, value)
405#define WMA_HW_MODE_MAC0_BANDWIDTH_SET(hw_mode, value) \
406 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS, 4, value)
407#define WMA_HW_MODE_MAC1_BANDWIDTH_SET(hw_mode, value) \
408 WMI_SET_BITS(hw_mode, WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS, 4, value)
409#define WMA_HW_MODE_DBS_MODE_SET(hw_mode, value) \
410 WMI_SET_BITS(hw_mode, WMA_HW_MODE_DBS_MODE_BITPOS, 1, value)
411#define WMA_HW_MODE_AGILE_DFS_SET(hw_mode, value) \
412 WMI_SET_BITS(hw_mode, WMA_HW_MODE_AGILE_DFS_MODE_BITPOS, 1, value)
413#define WMA_HW_MODE_SBS_MODE_SET(hw_mode, value) \
414 WMI_SET_BITS(hw_mode, WMA_HW_MODE_SBS_MODE_BITPOS, 1, value)
415
416#define WMA_HW_MODE_MAC0_TX_STREAMS_GET(hw_mode) \
417 ((hw_mode & WMA_HW_MODE_MAC0_TX_STREAMS_MASK) >> \
418 WMA_HW_MODE_MAC0_TX_STREAMS_BITPOS)
419#define WMA_HW_MODE_MAC0_RX_STREAMS_GET(hw_mode) \
420 ((hw_mode & WMA_HW_MODE_MAC0_RX_STREAMS_MASK) >> \
421 WMA_HW_MODE_MAC0_RX_STREAMS_BITPOS)
422#define WMA_HW_MODE_MAC1_TX_STREAMS_GET(hw_mode) \
423 ((hw_mode & WMA_HW_MODE_MAC1_TX_STREAMS_MASK) >> \
424 WMA_HW_MODE_MAC1_TX_STREAMS_BITPOS)
425#define WMA_HW_MODE_MAC1_RX_STREAMS_GET(hw_mode) \
426 ((hw_mode & WMA_HW_MODE_MAC1_RX_STREAMS_MASK) >> \
427 WMA_HW_MODE_MAC1_RX_STREAMS_BITPOS)
428#define WMA_HW_MODE_MAC0_BANDWIDTH_GET(hw_mode) \
429 ((hw_mode & WMA_HW_MODE_MAC0_BANDWIDTH_MASK) >> \
430 WMA_HW_MODE_MAC0_BANDWIDTH_BITPOS)
431#define WMA_HW_MODE_MAC1_BANDWIDTH_GET(hw_mode) \
432 ((hw_mode & WMA_HW_MODE_MAC1_BANDWIDTH_MASK) >> \
433 WMA_HW_MODE_MAC1_BANDWIDTH_BITPOS)
434#define WMA_HW_MODE_DBS_MODE_GET(hw_mode) \
435 ((hw_mode & WMA_HW_MODE_DBS_MODE_MASK) >> \
436 WMA_HW_MODE_DBS_MODE_BITPOS)
437#define WMA_HW_MODE_AGILE_DFS_GET(hw_mode) \
438 ((hw_mode & WMA_HW_MODE_AGILE_DFS_MODE_MASK) >> \
439 WMA_HW_MODE_AGILE_DFS_MODE_BITPOS)
440#define WMA_HW_MODE_SBS_MODE_GET(hw_mode) \
441 ((hw_mode & WMA_HW_MODE_SBS_MODE_MASK) >> \
442 WMA_HW_MODE_SBS_MODE_BITPOS)
443
Sridhar Selvaraj87309212017-06-28 17:41:50 +0530444/*
445 * PROBE_REQ_TX_DELAY
446 * param to specify probe request Tx delay for scans triggered on this VDEV
447 */
448#define PROBE_REQ_TX_DELAY 10
449
450/* PROBE_REQ_TX_TIME_GAP
451 * param to specify the time gap between each set of probe request transmission.
452 * The number of probe requests in each set depends on the ssid_list and,
453 * bssid_list in the scan request. This parameter will get applied only,
454 * for the scans triggered on this VDEV.
455 */
456#define PROBE_REQ_TX_TIME_GAP 20
Nitesh Shah0f3fce52016-10-13 22:01:41 +0530457
Rajeev Kumar8e3e2832015-11-06 16:02:54 -0800458typedef void (*txFailIndCallback)(uint8_t *peer_mac, uint8_t seqNo);
459
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +0530460typedef void (*tp_wma_packetdump_cb)(qdf_nbuf_t netbuf,
461 uint8_t status, uint8_t vdev_id, uint8_t type);
462
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800463/**
Govind Singhd76a5b02016-03-08 15:12:14 +0530464 * enum wma_rx_exec_ctx - wma rx execution context
465 * @WMA_RX_WORK_CTX: work queue context execution
466 * @WMA_RX_TASKLET_CTX: tasklet context execution
467 * @WMA_RX_SERIALIZER_CTX: MC thread context execution
468 *
469 */
470enum wma_rx_exec_ctx {
471 WMA_RX_WORK_CTX,
472 WMA_RX_TASKLET_CTX,
473 WMA_RX_SERIALIZER_CTX
474};
Krunal Soni2e48d012016-05-02 16:55:26 -0700475
476/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800477 * struct beacon_info - structure to store beacon template
478 * @buf: skb ptr
479 * @len: length
480 * @dma_mapped: is it dma mapped or not
481 * @tim_ie_offset: TIM IE offset
482 * @dtim_count: DTIM count
483 * @seq_no: sequence no
484 * @noa_sub_ie: NOA sub IE
485 * @noa_sub_ie_len: NOA sub IE length
486 * @noa_ie: NOA IE
487 * @p2p_ie_offset: p2p IE offset
488 * @lock: lock
489 */
490struct beacon_info {
Nirav Shahcbc6d722016-03-01 16:24:53 +0530491 qdf_nbuf_t buf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800492 uint32_t len;
493 uint8_t dma_mapped;
494 uint32_t tim_ie_offset;
495 uint8_t dtim_count;
496 uint16_t seq_no;
497 uint8_t noa_sub_ie[2 + WMA_NOA_IE_SIZE(WMA_MAX_NOA_DESCRIPTORS)];
498 uint16_t noa_sub_ie_len;
499 uint8_t *noa_ie;
500 uint16_t p2p_ie_offset;
Anurag Chouhana37b5b72016-02-21 14:53:42 +0530501 qdf_spinlock_t lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800502};
503
504/**
505 * struct beacon_tim_ie - structure to store TIM IE of beacon
506 * @tim_ie: tim ie
507 * @tim_len: tim ie length
508 * @dtim_count: dtim count
509 * @dtim_period: dtim period
510 * @tim_bitctl: tim bit control
511 * @tim_bitmap: tim bitmap
512 */
513struct beacon_tim_ie {
514 uint8_t tim_ie;
515 uint8_t tim_len;
516 uint8_t dtim_count;
517 uint8_t dtim_period;
518 uint8_t tim_bitctl;
519 uint8_t tim_bitmap[1];
520} __ATTRIB_PACK;
521
522/**
523 * struct pps - packet power save parameter
524 * @paid_match_enable: paid match enable
525 * @gid_match_enable: gid match enable
526 * @tim_clear: time clear
527 * @dtim_clear: dtim clear
528 * @eof_delim: eof delim
529 * @mac_match: mac match
530 * @delim_fail: delim fail
531 * @nsts_zero: nsts zero
532 * @rssi_chk: RSSI check
533 * @ebt_5g: ebt 5GHz
534 */
535struct pps {
536 bool paid_match_enable;
537 bool gid_match_enable;
538 bool tim_clear;
539 bool dtim_clear;
540 bool eof_delim;
541 bool mac_match;
542 bool delim_fail;
543 bool nsts_zero;
544 bool rssi_chk;
545 bool ebt_5g;
546};
547
548/**
549 * struct qpower_params - qpower related parameters
550 * @max_ps_poll_cnt: max ps poll count
551 * @max_tx_before_wake: max tx before wake
552 * @spec_ps_poll_wake_interval: ps poll wake interval
553 * @max_spec_nodata_ps_poll: no data ps poll
554 */
555struct qpower_params {
556 uint32_t max_ps_poll_cnt;
557 uint32_t max_tx_before_wake;
558 uint32_t spec_ps_poll_wake_interval;
559 uint32_t max_spec_nodata_ps_poll;
560};
561
562
563/**
564 * struct gtx_config_t - GTX config
565 * @gtxRTMask: for HT and VHT rate masks
566 * @gtxUsrcfg: host request for GTX mask
567 * @gtxPERThreshold: PER Threshold (default: 10%)
568 * @gtxPERMargin: PER margin (default: 2%)
569 * @gtxTPCstep: TCP step (default: 1)
570 * @gtxTPCMin: TCP min (default: 5)
571 * @gtxBWMask: BW mask (20/40/80/160 Mhz)
572 */
573typedef struct {
574 uint32_t gtxRTMask[2];
575 uint32_t gtxUsrcfg;
576 uint32_t gtxPERThreshold;
577 uint32_t gtxPERMargin;
578 uint32_t gtxTPCstep;
579 uint32_t gtxTPCMin;
580 uint32_t gtxBWMask;
581} gtx_config_t;
582
583/**
584 * struct pdev_cli_config_t - store pdev parameters
585 * @ani_enable: ANI is enabled/disable on target
586 * @ani_poll_len: store ANI polling period
587 * @ani_listen_len: store ANI listening period
588 * @ani_ofdm_level: store ANI OFDM immunity level
589 * @ani_cck_level: store ANI CCK immunity level
590 * @cwmenable: Dynamic bw is enable/disable in fw
591 * @txchainmask: tx chain mask
592 * @rxchainmask: rx chain mask
593 * @txpow2g: tx power limit for 2GHz
594 * @txpow5g: tx power limit for 5GHz
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800595 *
596 * This structure stores pdev parameters.
597 * Some of these parameters are set in fw and some
598 * parameters are only maintained in host.
599 */
600typedef struct {
601 uint32_t ani_enable;
602 uint32_t ani_poll_len;
603 uint32_t ani_listen_len;
604 uint32_t ani_ofdm_level;
605 uint32_t ani_cck_level;
606 uint32_t cwmenable;
607 uint32_t cts_cbw;
608 uint32_t txchainmask;
609 uint32_t rxchainmask;
610 uint32_t txpow2g;
611 uint32_t txpow5g;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800612} pdev_cli_config_t;
613
614/**
615 * struct vdev_cli_config_t - store vdev parameters
616 * @nss: nss width
617 * @ldpc: is ldpc is enable/disable
618 * @tx_stbc: TX STBC is enable/disable
619 * @rx_stbc: RX STBC is enable/disable
620 * @shortgi: short gi is enable/disable
621 * @rtscts_en: RTS/CTS is enable/disable
622 * @chwidth: channel width
623 * @tx_rate: tx rate
624 * @ampdu: ampdu size
625 * @amsdu: amsdu size
626 * @erx_adjust: enable/disable early rx enable
627 * @erx_bmiss_num: target bmiss number per sample
628 * @erx_bmiss_cycle: sample cycle
629 * @erx_slop_step: slop_step value
630 * @erx_init_slop: init slop
631 * @erx_adj_pause: pause adjust enable/disable
632 * @erx_dri_sample: enable/disable drift sample
633 * @pps_params: packet power save parameters
634 * @qpower_params: qpower parameters
635 * @gtx_info: GTX offload info
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700636 * @dcm: DCM enable/disable
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700637 * @range_ext: HE range extension enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800638 *
639 * This structure stores vdev parameters.
640 * Some of these parameters are set in fw and some
641 * parameters are only maintained in host.
642 */
643typedef struct {
644 uint32_t nss;
645 uint32_t ldpc;
646 uint32_t tx_stbc;
647 uint32_t rx_stbc;
648 uint32_t shortgi;
649 uint32_t rtscts_en;
650 uint32_t chwidth;
651 uint32_t tx_rate;
652 uint32_t ampdu;
653 uint32_t amsdu;
654 uint32_t erx_adjust;
655 uint32_t erx_bmiss_num;
656 uint32_t erx_bmiss_cycle;
657 uint32_t erx_slop_step;
658 uint32_t erx_init_slop;
659 uint32_t erx_adj_pause;
660 uint32_t erx_dri_sample;
661 struct pps pps_params;
662 struct qpower_params qpower_params;
663 gtx_config_t gtx_info;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700664#ifdef WLAN_FEATURE_11AX
665 uint8_t dcm;
Krishna Kumaar Natarajan150cd012017-03-23 12:29:10 -0700666 uint8_t range_ext;
Krishna Kumaar Natarajan1a71ec72017-03-23 12:26:31 -0700667#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800668} vdev_cli_config_t;
669
670/**
Mukul Sharma5ff3c582016-09-12 15:23:35 +0530671 * struct wma_version_info - Store wmi version info
672 * @major: wmi major version
673 * @minor: wmi minor version
674 * @revision: wmi revision number
675 */
676struct wma_version_info {
677 u_int32_t major;
678 u_int32_t minor;
679 u_int32_t revision;
680};
681
682/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800683 * struct wma_wow - store wow patterns
684 * @magic_ptrn_enable: magic pattern enable/disable
685 * @wow_enable: wow enable/disable
686 * @wow_enable_cmd_sent: is wow enable command sent to fw
687 * @deauth_enable: is deauth wakeup enable/disable
688 * @disassoc_enable: is disassoc wakeup enable/disable
689 * @bmiss_enable: is bmiss wakeup enable/disable
690 * @gtk_pdev_enable: is GTK based wakeup enable/disable
691 * @gtk_err_enable: is GTK error wakeup enable/disable
692 * @lphb_cache: lphb cache
693 *
694 * This structure stores wow patterns and
695 * wow related parameters in host.
696 */
697struct wma_wow {
698 bool magic_ptrn_enable;
699 bool wow_enable;
700 bool wow_enable_cmd_sent;
701 bool deauth_enable;
702 bool disassoc_enable;
703 bool bmiss_enable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800704 bool gtk_err_enable[WMA_MAX_SUPPORTED_BSS];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800705};
706
707#ifdef WLAN_FEATURE_11W
708#define CMAC_IPN_LEN (6)
709#define WMA_IGTK_KEY_INDEX_4 (4)
710#define WMA_IGTK_KEY_INDEX_5 (5)
711
712/**
713 * struct wma_igtk_ipn_t - GTK IPN info
714 * @ipn: IPN info
715 */
716typedef struct {
717 uint8_t ipn[CMAC_IPN_LEN];
718} wma_igtk_ipn_t;
719
720/**
721 * struct wma_igtk_key_t - GTK key
722 * @key_length: key length
723 * @key: key
724 * @key_id: key id
Himanshu Agarwalfc5d6602018-04-06 17:39:37 +0530725 * @key_cipher: key type
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800726 */
727typedef struct {
728 uint16_t key_length;
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530729 uint8_t key[CSR_AES_GMAC_256_KEY_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800730
731 /* IPN is maintained per iGTK keyID
732 * 0th index for iGTK keyID = 4;
733 * 1st index for iGTK KeyID = 5
734 */
735 wma_igtk_ipn_t key_id[2];
Padma, Santhosh Kumar0ab78172017-12-18 19:26:17 +0530736 uint32_t key_cipher;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800737} wma_igtk_key_t;
738#endif
739
740/**
741 * struct vdev_restart_params_t - vdev restart parameters
742 * @vdev_id: vdev id
743 * @ssid: ssid
744 * @flags: flags
745 * @requestor_id: requestor id
746 * @chan: channel
747 * @hidden_ssid_restart_in_progress: hidden ssid restart flag
748 * @ssidHidden: is ssid hidden or not
749 */
750typedef struct {
751 A_UINT32 vdev_id;
752 wmi_ssid ssid;
753 A_UINT32 flags;
754 A_UINT32 requestor_id;
755 A_UINT32 disable_hw_ack;
756 wmi_channel chan;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530757 qdf_atomic_t hidden_ssid_restart_in_progress;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800758 uint8_t ssidHidden;
759} vdev_restart_params_t;
760
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +0530761struct roam_synch_frame_ind {
762 uint32_t bcn_probe_rsp_len;
763 uint8_t *bcn_probe_rsp;
764 uint8_t is_beacon;
765 uint32_t reassoc_req_len;
766 uint8_t *reassoc_req;
767 uint32_t reassoc_rsp_len;
768 uint8_t *reassoc_rsp;
769};
770
771
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800772/**
773 * struct wma_txrx_node - txrx node
774 * @addr: mac address
775 * @bssid: bssid
776 * @handle: wma handle
777 * @beacon: beacon info
778 * @vdev_restart_params: vdev restart parameters
779 * @config: per vdev config parameters
780 * @scan_info: scan info
781 * @type: type
782 * @sub_type: sub type
783 * @nlo_match_evt_received: is nlo match event received or not
784 * @pno_in_progress: is pno in progress or not
785 * @plm_in_progress: is plm in progress or not
786 * @ptrn_match_enable: is pattern match is enable or not
787 * @num_wow_default_patterns: number of default wow patterns configured for vdev
788 * @num_wow_user_patterns: number of user wow patterns configured for vdev
789 * @conn_state: connection state
790 * @beaconInterval: beacon interval
791 * @llbCoexist: 11b coexist
792 * @shortSlotTimeSupported: is short slot time supported or not
793 * @dtimPeriod: DTIM period
794 * @chanmode: channel mode
795 * @vht_capable: VHT capablity flag
796 * @ht_capable: HT capablity flag
797 * @mhz: channel frequency in KHz
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700798 * @chan_width: channel bandwidth
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800799 * @vdev_up: is vdev up or not
800 * @tsfadjust: TSF adjust
801 * @addBssStaContext: add bss context
802 * @aid: association id
803 * @rmfEnabled: Robust Management Frame (RMF) enabled/disabled
804 * @key: GTK key
805 * @uapsd_cached_val: uapsd cached value
806 * @stats_rsp: stats response
807 * @fw_stats_set: fw stats value
808 * @del_staself_req: delete sta self request
809 * @bss_status: bss status
810 * @rate_flags: rate flags
811 * @nss: nss value
812 * @is_channel_switch: is channel switch
813 * @pause_bitmap: pause bitmap
814 * @tx_power: tx power in dbm
815 * @max_tx_power: max tx power in dbm
816 * @nwType: network type (802.11a/b/g/n/ac)
817 * @staKeyParams: sta key parameters
818 * @ps_enabled: is powersave enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800819 * @peer_count: peer count
820 * @roam_synch_in_progress: flag is in progress or not
821 * @plink_status_req: link status request
822 * @psnr_req: snr request
823 * @delay_before_vdev_stop: delay
824 * @tx_streams: number of tx streams can be used by the vdev
825 * @rx_streams: number of rx streams can be used by the vdev
826 * @chain_mask: chain mask can be used by the vdev
827 * @mac_id: the mac on which vdev is on
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530828 * @wep_default_key_idx: wep default index for group key
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +0530829 * @arp_offload_req: cached arp offload request
830 * @ns_offload_req: cached ns offload request
Dustin Brown9d797d62017-01-11 16:39:12 -0800831 * @wow_stats: stat counters for WoW related events
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +0530832 * @rcpi_req: rcpi request
Jeff Johnson0c7b0902018-07-22 20:52:17 -0700833 * @in_bmps: Whether bmps for this interface has been enabled
Dustin Brownec2c92e2017-07-26 11:13:49 -0700834 * @vdev_start_wakelock: wakelock to protect vdev start op with firmware
835 * @vdev_stop_wakelock: wakelock to protect vdev stop op with firmware
Rajeev Kumar155a3e42017-10-10 15:31:17 -0700836 * @vdev_set_key_wakelock: wakelock to protect vdev set key op with firmware
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +0530837 * @channel: channel
Jeff Johnson0c7b0902018-07-22 20:52:17 -0700838 *
839 * It stores parameters per vdev in wma.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800840 */
841struct wma_txrx_node {
842 uint8_t addr[IEEE80211_ADDR_LEN];
843 uint8_t bssid[IEEE80211_ADDR_LEN];
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -0800844 struct cdp_vdev *handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800845 struct beacon_info *beacon;
846 vdev_restart_params_t vdev_restart_params;
847 vdev_cli_config_t config;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800848 uint32_t type;
849 uint32_t sub_type;
Srinivas Girigowda515a9ef2015-12-11 11:00:48 -0800850#ifdef FEATURE_WLAN_ESE
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800851 bool plm_in_progress;
852#endif
853 bool ptrn_match_enable;
854 uint8_t num_wow_default_patterns;
855 uint8_t num_wow_user_patterns;
856 bool conn_state;
857 tSirMacBeaconInterval beaconInterval;
858 uint8_t llbCoexist;
859 uint8_t shortSlotTimeSupported;
860 uint8_t dtimPeriod;
Tushnim Bhattacharyya89710e32018-05-04 13:35:59 -0700861 WMI_HOST_WLAN_PHY_MODE chanmode;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800862 uint8_t vht_capable;
863 uint8_t ht_capable;
864 A_UINT32 mhz;
Tushnim Bhattacharyya7624a182016-03-30 13:30:46 -0700865 enum phy_ch_width chan_width;
Selvaraj, Sridhar171e2252016-06-22 22:33:26 +0530866 bool vdev_active;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800867 uint64_t tsfadjust;
868 void *addBssStaContext;
869 uint8_t aid;
870 uint8_t rmfEnabled;
871#ifdef WLAN_FEATURE_11W
872 wma_igtk_key_t key;
Himanshu Agarwalfc5d6602018-04-06 17:39:37 +0530873 uint32_t ucast_key_cipher;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800874#endif /* WLAN_FEATURE_11W */
875 uint32_t uapsd_cached_val;
876 tAniGetPEStatsRsp *stats_rsp;
877 uint8_t fw_stats_set;
878 void *del_staself_req;
Abhishek Singh0d74f9e2017-09-26 14:02:42 +0530879 bool is_del_sta_defered;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +0530880 qdf_atomic_t bss_status;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800881 uint8_t rate_flags;
882 uint8_t nss;
883 bool is_channel_switch;
884 uint16_t pause_bitmap;
Amar Singhala297bfa2015-10-15 15:07:29 -0700885 int8_t tx_power;
886 int8_t max_tx_power;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800887 uint32_t nwType;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800888 void *staKeyParams;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800889 uint32_t peer_count;
890 bool roam_synch_in_progress;
891 void *plink_status_req;
892 void *psnr_req;
893 uint8_t delay_before_vdev_stop;
894#ifdef FEATURE_WLAN_EXTSCAN
895 bool extscan_in_progress;
896#endif
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800897 uint32_t tx_streams;
898 uint32_t rx_streams;
899 uint32_t chain_mask;
900 uint32_t mac_id;
Varun Reddy Yeturu30bc42c2016-02-04 10:07:30 -0800901 bool roaming_in_progress;
Varun Reddy Yeturu5ab47462016-05-08 18:08:11 -0700902 int32_t roam_synch_delay;
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -0700903 uint8_t nss_2g;
904 uint8_t nss_5g;
Peng Xu8fdaa492016-06-22 10:20:47 -0700905 bool p2p_lo_in_progress;
Masti, Narayanraddiab712a72016-08-04 11:59:11 +0530906 uint8_t wep_default_key_idx;
Mukul Sharma8d2d9ec2016-09-08 13:05:35 +0530907 tSirHostOffloadReq arp_offload_req;
908 tSirHostOffloadReq ns_offload_req;
Bhargav Shaha89d3b42016-04-20 13:04:56 +0530909 bool is_vdev_valid;
Naveen Rawat3ff5cff2018-01-29 14:31:16 -0800910#ifndef QCA_SUPPORT_CP_STATS
Dustin Brown9d797d62017-01-11 16:39:12 -0800911 struct sir_vdev_wow_stats wow_stats;
Naveen Rawat3ff5cff2018-01-29 14:31:16 -0800912#endif
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +0530913 struct sme_rcpi_req *rcpi_req;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -0800914#ifdef WLAN_FEATURE_11AX
915 bool he_capable;
916 uint32_t he_ops;
917#endif
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +0530918 bool in_bmps;
Kiran Kumar Lokeref9dc7912017-06-28 18:10:58 -0700919 struct beacon_filter_param beacon_filter;
920 bool beacon_filter_enabled;
Dustin Brownec2c92e2017-07-26 11:13:49 -0700921 qdf_wake_lock_t vdev_start_wakelock;
922 qdf_wake_lock_t vdev_stop_wakelock;
Rajeev Kumar155a3e42017-10-10 15:31:17 -0700923 qdf_wake_lock_t vdev_set_key_wakelock;
Padma, Santhosh Kumaraa2433e2017-10-06 14:34:46 +0530924 struct roam_synch_frame_ind roam_synch_frame_ind;
Naveen Rawatd7734142017-10-27 10:02:40 -0700925 bool is_waiting_for_key;
Yeshwanth Sriram Guntukaa3f8d572018-03-14 11:10:23 +0530926 uint8_t channel;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800927};
928
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800929/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800930 * struct ibss_power_save_params - IBSS power save parameters
931 * @atimWindowLength: ATIM window length
932 * @isPowerSaveAllowed: is power save allowed
933 * @isPowerCollapseAllowed: is power collapsed allowed
934 * @isAwakeonTxRxEnabled: is awake on tx/rx enabled
935 * @inactivityCount: inactivity count
936 * @txSPEndInactivityTime: tx SP end inactivity time
937 * @ibssPsWarmupTime: IBSS power save warm up time
938 * @ibssPs1RxChainInAtimEnable: IBSS power save rx chain in ATIM enable
939 */
940typedef struct {
941 uint32_t atimWindowLength;
942 uint32_t isPowerSaveAllowed;
943 uint32_t isPowerCollapseAllowed;
944 uint32_t isAwakeonTxRxEnabled;
945 uint32_t inactivityCount;
946 uint32_t txSPEndInactivityTime;
947 uint32_t ibssPsWarmupTime;
948 uint32_t ibssPs1RxChainInAtimEnable;
949} ibss_power_save_params;
950
951/**
Nitesh Shah877ad5d2016-09-22 19:27:58 +0530952 * struct mac_ss_bw_info - hw_mode_list PHY/MAC params for each MAC
953 * @mac_tx_stream: Max TX stream
954 * @mac_rx_stream: Max RX stream
955 * @mac_bw: Max bandwidth
956 */
957struct mac_ss_bw_info {
958 uint32_t mac_tx_stream;
959 uint32_t mac_rx_stream;
960 uint32_t mac_bw;
961};
962
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800963/**
Komal Seelam02d09342016-02-23 18:03:19 +0530964 * struct wma_ini_config - Structure to hold wma ini configuration
965 * @max_no_of_peers: Max Number of supported
966 *
967 * Placeholder for WMA ini parameters.
968 */
969struct wma_ini_config {
970 uint8_t max_no_of_peers;
971};
972
973/**
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +0530974 * struct wmi_valid_channels - Channel details part of WMI_SCAN_CHAN_LIST_CMDID
975 * @num_channels: Number of channels
976 * @channel_list: Channel list
977 */
978struct wma_valid_channels {
979 uint8_t num_channels;
980 uint8_t channel_list[MAX_NUM_CHAN];
981};
982
Krunal Soni2e48d012016-05-02 16:55:26 -0700983/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800984 * struct t_wma_handle - wma context
985 * @wmi_handle: wmi handle
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800986 * @cds_context: cds handle
987 * @mac_context: mac context
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +0530988 * @psoc: psoc context
Jeff Johnson0c7b0902018-07-22 20:52:17 -0700989 * @pdev: physical device global object
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800990 * @wma_resume_event: wma resume event
991 * @target_suspend: target suspend event
992 * @recovery_event: wma FW recovery event
993 * @max_station: max stations
994 * @max_bssid: max bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800995 * @myaddr: current mac address
996 * @hwaddr: mac address from EEPROM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -0800997 * @lpss_support: LPSS feature is supported in target or not
998 * @wmi_ready: wmi status flag
999 * @wlan_init_status: wlan init status
Anurag Chouhanf04e84f2016-03-03 10:12:12 +05301000 * @qdf_dev: qdf device
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001001 * @wmi_service_bitmap: wmi services bitmap received from Target
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001002 * @wmi_service_ext_bitmap: extended wmi services bitmap received from Target
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001003 * @tx_frm_download_comp_cb: Tx Frame Compl Cb registered by umac
1004 * @tx_frm_download_comp_event: Event to wait for tx download completion
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001005 * @tx_queue_empty_event: Dummy event to wait for draining MSDUs left
1006 * in hardware tx queue and before requesting VDEV_STOP. Nobody will
1007 * set this and wait will timeout, and code will poll the pending tx
1008 * descriptors number to be zero.
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001009 * @umac_ota_ack_cb: Ack Complete Callback registered by umac
1010 * @umac_data_ota_ack_cb: ack complete callback
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001011 * @last_umac_data_ota_timestamp: timestamp when OTA of last umac data
1012 * was done
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001013 * @last_umac_data_nbuf: cache nbuf ptr for the last umac data buf
1014 * @needShutdown: is shutdown needed or not
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001015 * @tgt_cfg_update_cb: configuration update callback
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001016 * @reg_cap: regulatory capablities
1017 * @scan_id: scan id
1018 * @interfaces: txrx nodes(per vdev)
1019 * @pdevconfig: pdev related configrations
1020 * @vdev_resp_queue: vdev response queue
1021 * @vdev_respq_lock: vdev response queue lock
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001022 * @wma_hold_req_queue: Queue use to serialize requests to firmware
1023 * @wma_hold_req_q_lock: Mutex for @wma_hold_req_queue
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001024 * @vht_supp_mcs: VHT supported MCS
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001025 * @is_fw_assert: is fw asserted
1026 * @wow: wow related patterns & parameters
1027 * @no_of_suspend_ind: number of suspend indications
1028 * @no_of_resume_ind: number of resume indications
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001029 * @ack_work_ctx: Context for deferred processing of TX ACK
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001030 * @powersave_mode: power save mode
1031 * @ptrn_match_enable_all_vdev: is pattern match is enable/disable
1032 * @pGetRssiReq: get RSSI request
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001033 * @get_one_peer_info: When a "get peer info" request is active, is
1034 * the request for a single peer?
1035 * @get_sta_peer_info: Is a "get peer info" request active?
1036 * @peer_macaddr: When @get_one_peer_info is true, the peer's mac address
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001037 * @thermal_mgmt_info: Thermal mitigation related info
1038 * @roam_offload_enabled: is roam offload enable/disable
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001039 * @ssdp: ssdp flag
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001040 * @enable_mc_list: To Check if Multicast list filtering is enabled in FW
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001041 * @ibss_started: is IBSS started or not
1042 * @ibsskey_info: IBSS key info
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001043 * @hddTxFailCb: tx fail indication callback
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001044 * @extscan_wake_lock: extscan wake lock
1045 * @wow_wake_lock: wow wake lock
Mukul Sharmae44d0542017-05-23 21:50:56 +05301046 * @wow_auth_req_wl: wow wake lock for auth req
1047 * @wow_assoc_req_wl: wow wake lock for assoc req
1048 * @wow_deauth_rec_wl: wow wake lock for deauth req
1049 * @wow_disassoc_rec_wl: wow wake lock for disassoc req
1050 * @wow_ap_assoc_lost_wl: wow wake lock for assoc lost req
1051 * @wow_auto_shutdown_wl: wow wake lock for shutdown req
1052 * @roam_ho_wl: wake lock for roam handoff req
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001053 * @wow_nack: wow negative ack flag
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001054 * @is_wow_bus_suspended: is wow bus suspended flag
1055 * @wma_scan_comp_timer: scan completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001056 * @suitable_ap_hb_failure: better ap found
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001057 * @suitable_ap_hb_failure_rssi: RSSI when suitable_ap_hb_failure
1058 * triggered for later usage to report RSSI at beacon miss scenario
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001059 * @wma_ibss_power_save_params: IBSS Power Save config Parameters
1060 * @IsRArateLimitEnabled: RA rate limiti s enabled or not
1061 * @RArateLimitInterval: RA rate limit interval
1062 * @is_lpass_enabled: Flag to indicate if LPASS feature is enabled or not
1063 * @is_nan_enabled: Flag to indicate if NaN feature is enabled or not
1064 * @staMaxLIModDtim: station max listen interval
1065 * @staModDtim: station mode DTIM
1066 * @staDynamicDtim: station dynamic DTIM
1067 * @enable_mhf_offload: is MHF offload enable/disable
1068 * @last_mhf_entries_timestamp: timestamp when last entries where set
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001069 * @hw_bd_id: hardware board id
1070 * @hw_bd_info: hardware board info
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001071 * @miracast_value: miracast value
1072 * @log_completion_timer: log completion timer
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001073 * @num_dbs_hw_modes: Number of HW modes supported by the FW
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001074 * @hw_mode: DBS HW mode list
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001075 * @old_hw_mode_index: Previous configured HW mode index
1076 * @new_hw_mode_index: Current configured HW mode index
1077 * @peer_authorized_cb: peer authorized hdd callback
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001078 * @wow_unspecified_wake_count: Number of wake events which did not
1079 * correspond to known wake events. Note that known wake events are
1080 * tracked on a per-vdev basis via the struct sir_vdev_wow_stats
1081 * wow_stats in struct wma_txrx_node
1082 * @ocb_config_req: OCB request context
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001083 * @max_scan: maximum scan requests than can be queued
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001084 * @self_gen_frm_pwr: Self-generated frame power
1085 * @tx_chain_mask_cck: Is the CCK tx chain mask enabled
1086 * @service_ready_ext_timer: Timer for service ready extended. Note
1087 * this is a a timer instead of wait event because on receiving the
1088 * service ready event, we will be waiting on the MC thread for the
1089 * service extended ready event which is also processed in MC
1090 * thread. This leads to MC thread being stuck. Alternative was to
1091 * process these events in tasklet/workqueue context. But, this
1092 * leads to race conditions when the events are processed in two
1093 * different context. So, processing ready event and extended ready
1094 * event in the serialized MC thread context with a timer.
1095 * @csr_roam_synch_cb: CSR callback for firmware Roam Sync events
1096 * @pe_roam_synch_cb: pe callback for firmware Roam Sync events
Sandeep Puligilla19ddda22016-01-05 12:18:02 -08001097 * @wmi_cmd_rsp_wake_lock: wmi command response wake lock
1098 * @wmi_cmd_rsp_runtime_lock: wmi command response bus lock
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001099 * @apf_enabled: Is APF enabled in firmware?
1100 * @apf_packet_filter_enable: Is APF filter enabled om host?
1101 * @active_uc_apf_mode: Setting that determines how APF is applied in
1102 * active mode for uc packets
1103 * @active_mc_bc_apf_mode: Setting that determines how APF is applied in
1104 * active mode for MC/BC packets
1105 * @ini_config: Initial configuration from upper layer
1106 * @saved_chan: saved channel list sent as part of
1107 * WMI_SCAN_CHAN_LIST_CMDID
1108 * @nan_datapath_enabled: Is NAN datapath support enabled in firmware?
1109 * @pe_ndp_event_handler: Handler function for NAN Data Path events
1110 * @fw_timeout_crash: Should firmware be reset upon response timeout?
1111 * @sub_20_support: Does target support sub-20MHz bandwidth (aka
1112 * half-rate and quarter-rate)?
1113 * @is_dfs_offloaded: Is dfs and cac timer offloaded?
1114 * @wma_mgmt_tx_packetdump_cb: Callback function for TX packet dump
1115 * @wma_mgmt_rx_packetdump_cb: Callback function for RX packet dump
1116 * @rcpi_enabled: Is RCPI enabled?
1117 * @link_stats_results: Structure for handing link stats from firmware
1118 * @tx_fail_cnt: Number of TX failures
1119 * @he_cap: 802.11ax capabilities
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001120 * @bandcapability: band capability configured through ini
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001121 * @tx_bfee_8ss_enabled: Is Tx Beamformee support for 8x8 enabled?
1122 * @in_imps: Is device in Idle Mode Power Save?
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301123 * @ito_repeat_count: Indicates ito repeated count
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001124 * @wma_fw_time_sync_timer: timer used for firmware time sync
1125 * @critical_events_in_flight: number of suspend-preventing events
1126 * in flight
1127 *
1128 * This structure is the global wma context. It contains global wma
1129 * module parameters and handles of other modules.
1130
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001131 */
1132typedef struct {
1133 void *wmi_handle;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001134 void *cds_context;
1135 void *mac_context;
Selvaraj, Sridhar0672a122016-12-29 16:11:48 +05301136 struct wlan_objmgr_psoc *psoc;
Kiran Kumar Lokerea3de2262017-04-12 12:15:04 -07001137 struct wlan_objmgr_pdev *pdev;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301138 qdf_event_t wma_resume_event;
1139 qdf_event_t target_suspend;
1140 qdf_event_t runtime_suspend;
1141 qdf_event_t recovery_event;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001142 uint16_t max_station;
1143 uint16_t max_bssid;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001144 uint8_t myaddr[IEEE80211_ADDR_LEN];
1145 uint8_t hwaddr[IEEE80211_ADDR_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001146#ifdef WLAN_FEATURE_LPSS
1147 uint8_t lpss_support;
1148#endif
1149 uint8_t ap_arpns_support;
1150 bool wmi_ready;
1151 uint32_t wlan_init_status;
Anurag Chouhandf2b2682016-02-29 14:15:27 +05301152 qdf_device_t qdf_dev;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001153 uint32_t wmi_service_bitmap[WMI_SERVICE_BM_SIZE];
Vignesh Viswanathan731186f2017-09-18 13:47:37 +05301154 uint32_t wmi_service_ext_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32];
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301155 wma_tx_dwnld_comp_callback tx_frm_download_comp_cb;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301156 qdf_event_t tx_frm_download_comp_event;
Anurag Chouhance0dc992016-02-16 18:18:03 +05301157 qdf_event_t tx_queue_empty_event;
Jeff Johnson0c7b0902018-07-22 20:52:17 -07001158 wma_tx_ota_comp_callback
1159 umac_ota_ack_cb[SIR_MAC_MGMT_RESERVED15];
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301160 wma_tx_ota_comp_callback umac_data_ota_ack_cb;
Anurag Chouhan6d760662016-02-20 16:05:43 +05301161 unsigned long last_umac_data_ota_timestamp;
Nirav Shahcbc6d722016-03-01 16:24:53 +05301162 qdf_nbuf_t last_umac_data_nbuf;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001163 bool needShutdown;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001164 wma_tgt_cfg_cb tgt_cfg_update_cb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001165 HAL_REG_CAPABILITIES reg_cap;
1166 uint32_t scan_id;
1167 struct wma_txrx_node *interfaces;
1168 pdev_cli_config_t pdevconfig;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301169 qdf_list_t vdev_resp_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301170 qdf_spinlock_t vdev_respq_lock;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301171 qdf_list_t wma_hold_req_queue;
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301172 qdf_spinlock_t wma_hold_req_q_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001173 uint32_t vht_supp_mcs;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001174 uint8_t is_fw_assert;
1175 struct wma_wow wow;
1176 uint8_t no_of_suspend_ind;
1177 uint8_t no_of_resume_ind;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001178 struct wma_tx_ack_work_ctx *ack_work_ctx;
1179 uint8_t powersave_mode;
1180 bool ptrn_match_enable_all_vdev;
1181 void *pGetRssiReq;
Will Huanga9814592017-05-24 15:47:58 +08001182 bool get_one_peer_info;
1183 bool get_sta_peer_info;
1184 struct qdf_mac_addr peer_macaddr;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001185 t_thermal_mgmt thermal_mgmt_info;
1186 bool roam_offload_enabled;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001187 bool ssdp;
Komal Seelam9764a842016-05-24 11:07:23 +05301188 bool enable_mc_list;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001189 uint8_t ibss_started;
1190 tSetBssKeyParams ibsskey_info;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001191 txFailIndCallback hddTxFailCb;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001192#ifdef FEATURE_WLAN_EXTSCAN
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301193 qdf_wake_lock_t extscan_wake_lock;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001194#endif
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301195 qdf_wake_lock_t wow_wake_lock;
Mukul Sharmae44d0542017-05-23 21:50:56 +05301196 qdf_wake_lock_t wow_auth_req_wl;
1197 qdf_wake_lock_t wow_assoc_req_wl;
1198 qdf_wake_lock_t wow_deauth_rec_wl;
1199 qdf_wake_lock_t wow_disassoc_rec_wl;
1200 qdf_wake_lock_t wow_ap_assoc_lost_wl;
1201 qdf_wake_lock_t wow_auto_shutdown_wl;
1202 qdf_wake_lock_t roam_ho_wl;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001203 int wow_nack;
Anurag Chouhan8e0ccd32016-02-19 15:30:20 +05301204 qdf_atomic_t is_wow_bus_suspended;
Anurag Chouhan210db072016-02-22 18:42:15 +05301205 qdf_mc_timer_t wma_scan_comp_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001206 bool suitable_ap_hb_failure;
Sreelakshmi Konamki58c72432016-11-09 17:06:44 +05301207 uint32_t suitable_ap_hb_failure_rssi;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001208 ibss_power_save_params wma_ibss_power_save_params;
1209#ifdef FEATURE_WLAN_RA_FILTERING
1210 bool IsRArateLimitEnabled;
1211 uint16_t RArateLimitInterval;
1212#endif
1213#ifdef WLAN_FEATURE_LPSS
1214 bool is_lpass_enabled;
1215#endif
1216#ifdef WLAN_FEATURE_NAN
1217 bool is_nan_enabled;
1218#endif
1219 uint8_t staMaxLIModDtim;
1220 uint8_t staModDtim;
1221 uint8_t staDynamicDtim;
Rajeev Kumar8e3e2832015-11-06 16:02:54 -08001222 uint8_t enable_mhf_offload;
1223 unsigned long last_mhf_entries_timestamp;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001224 uint32_t hw_bd_id;
1225 uint32_t hw_bd_info[HW_BD_INFO_SIZE];
1226 uint32_t miracast_value;
Anurag Chouhan210db072016-02-22 18:42:15 +05301227 qdf_mc_timer_t log_completion_timer;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001228 uint32_t num_dbs_hw_modes;
1229 struct dbs_hw_mode_info hw_mode;
1230 uint32_t old_hw_mode_index;
1231 uint32_t new_hw_mode_index;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001232 wma_peer_authorized_fp peer_authorized_cb;
Dustin Brown9d797d62017-01-11 16:39:12 -08001233 uint32_t wow_unspecified_wake_count;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001234 struct sir_ocb_config *ocb_config_req;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001235 uint8_t max_scan;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001236 uint16_t self_gen_frm_pwr;
1237 bool tx_chain_mask_cck;
Anurag Chouhan210db072016-02-22 18:42:15 +05301238 qdf_mc_timer_t service_ready_ext_timer;
Manikandan Mohan1dd8b5d2017-04-18 15:54:09 -07001239
Varun Reddy Yeturu88f123c2017-03-14 18:24:32 -07001240 QDF_STATUS (*csr_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001241 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturuf907f912016-03-21 15:06:22 -07001242 tpSirBssDescription bss_desc_ptr,
1243 enum sir_roam_op_code reason);
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301244 QDF_STATUS (*pe_roam_synch_cb)(tpAniSirGlobal mac,
Varun Reddy Yeturud5939f82015-12-24 18:14:02 -08001245 roam_offload_synch_ind *roam_synch_data,
Varun Reddy Yeturub5d858e2017-12-15 16:08:13 -08001246 tpSirBssDescription bss_desc_ptr,
1247 enum sir_roam_op_code reason);
Anurag Chouhana37b5b72016-02-21 14:53:42 +05301248 qdf_wake_lock_t wmi_cmd_rsp_wake_lock;
1249 qdf_runtime_lock_t wmi_cmd_rsp_runtime_lock;
Nachiket Kukadee547a482018-05-22 16:43:30 +05301250 bool apf_enabled;
1251 bool apf_packet_filter_enable;
1252 enum active_apf_mode active_uc_apf_mode;
1253 enum active_apf_mode active_mc_bc_apf_mode;
Komal Seelam02d09342016-02-23 18:03:19 +05301254 struct wma_ini_config ini_config;
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301255 struct wma_valid_channels saved_chan;
Deepak Dhamdhere13230d32016-05-26 00:46:53 -07001256 bool nan_datapath_enabled;
Naveen Rawat0fc3f692016-06-22 14:30:54 -07001257 QDF_STATUS (*pe_ndp_event_handler)(tpAniSirGlobal mac_ctx,
Rajeev Kumarb60abe42017-01-21 15:39:31 -08001258 struct scheduler_msg *msg);
Sandeep Puligillaafa52892016-10-26 19:03:16 -07001259 bool fw_timeout_crash;
Naveen Rawat64e477e2016-05-20 10:34:56 -07001260 bool sub_20_support;
Arif Hussaind54b62c2018-03-01 13:31:37 -08001261 bool is_dfs_offloaded;
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05301262 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb;
1263 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb;
Rajeev Kumar Sirasanagandla996e5292016-11-22 21:20:33 +05301264 bool rcpi_enabled;
Srinivas Girigowdaad874a82016-10-25 14:08:00 -07001265 tSirLLStatsResults *link_stats_results;
Kapil Gupta10800b92017-05-31 19:14:47 +05301266 uint64_t tx_fail_cnt;
Krishna Kumaar Natarajanf5676502017-03-06 10:28:44 -08001267#ifdef WLAN_FEATURE_11AX
1268 struct he_capability he_cap;
1269#endif
Sandeep Puligilla819d94f2017-10-10 18:33:56 -07001270 uint8_t bandcapability;
Nachiket Kukade8b4bfd82017-05-25 18:34:48 +05301271 bool tx_bfee_8ss_enabled;
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05301272 bool in_imps;
Ashish Kumar Dhanotiya9335d812017-06-30 16:57:20 +05301273 uint8_t ito_repeat_count;
gaurank kathpalia85f8a612018-02-21 18:55:24 +05301274 qdf_mc_timer_t wma_fw_time_sync_timer;
Dustin Brown05557182017-10-12 14:44:49 -07001275 qdf_atomic_t critical_events_in_flight;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001276} t_wma_handle, *tp_wma_handle;
1277
Jeff Johnsonf7ab8142017-09-13 09:04:23 -07001278extern void cds_wma_complete_cback(void);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001279extern void wma_send_regdomain_info_to_fw(uint32_t reg_dmn, uint16_t regdmn2G,
Rajeev Kumar Sirasanagandla873b6d92017-06-06 13:11:17 +05301280 uint16_t regdmn5G, uint8_t ctl2G,
1281 uint8_t ctl5G);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001282/**
1283 * enum frame_index - Frame index
1284 * @GENERIC_NODOWNLD_NOACK_COMP_INDEX: Frame index for no download comp no ack
1285 * @GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX: Frame index for download comp no ack
1286 * @GENERIC_DOWNLD_COMP_ACK_COMP_INDEX: Frame index for download comp and ack
1287 * @GENERIC_NODOWLOAD_ACK_COMP_INDEX: Frame index for no download comp and ack
1288 * @FRAME_INDEX_MAX: maximum frame index
1289 */
1290enum frame_index {
1291 GENERIC_NODOWNLD_NOACK_COMP_INDEX,
1292 GENERIC_DOWNLD_COMP_NOACK_COMP_INDEX,
1293 GENERIC_DOWNLD_COMP_ACK_COMP_INDEX,
1294 GENERIC_NODOWLOAD_ACK_COMP_INDEX,
1295 FRAME_INDEX_MAX
1296};
1297
1298/**
1299 * struct wma_tx_ack_work_ctx - tx ack work context
1300 * @wma_handle: wma handle
1301 * @sub_type: sub type
1302 * @status: status
1303 * @ack_cmp_work: work structure
1304 */
1305struct wma_tx_ack_work_ctx {
1306 tp_wma_handle wma_handle;
1307 uint16_t sub_type;
1308 int32_t status;
Anurag Chouhan42958bb2016-02-19 15:43:11 +05301309 qdf_work_t ack_cmp_work;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001310};
1311
1312/**
1313 * struct wma_target_req - target request parameters
1314 * @event_timeout: event timeout
1315 * @node: list
1316 * @user_data: user data
1317 * @msg_type: message type
1318 * @vdev_id: vdev id
1319 * @type: type
1320 */
1321struct wma_target_req {
Anurag Chouhan210db072016-02-22 18:42:15 +05301322 qdf_mc_timer_t event_timeout;
Anurag Chouhanffb21542016-02-17 14:33:03 +05301323 qdf_list_node_t node;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001324 void *user_data;
1325 uint32_t msg_type;
1326 uint8_t vdev_id;
1327 uint8_t type;
1328};
1329
1330/**
1331 * struct wma_vdev_start_req - vdev start request parameters
1332 * @beacon_intval: beacon interval
1333 * @dtim_period: dtim period
1334 * @max_txpow: max tx power
1335 * @chan_offset: channel offset
1336 * @is_dfs: is dfs supported or not
1337 * @vdev_id: vdev id
1338 * @chan: channel
1339 * @oper_mode: operating mode
1340 * @ssid: ssid
1341 * @hidden_ssid: hidden ssid
1342 * @pmf_enabled: is pmf enabled or not
1343 * @vht_capable: VHT capabality
1344 * @ht_capable: HT capabality
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001345 * @dot11_mode: 802.11 mode
1346 * @is_half_rate: is the channel operating at 10MHz
1347 * @is_quarter_rate: is the channel operating at 5MHz
1348 * @preferred_tx_streams: policy manager indicates the preferred
1349 * number of transmit streams
1350 * @preferred_rx_streams: policy manager indicates the preferred
1351 * number of receive streams
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001352 * @beacon_tx_rate: beacon tx rate
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001353 * @he_capable: HE capability
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001354 * @he_ops: HE operation
Arif Hussain671a1902017-03-17 09:08:32 -07001355 * @cac_duration_ms: cac duration in milliseconds
1356 * @dfs_regdomain: dfs region
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001357 */
1358struct wma_vdev_start_req {
1359 uint32_t beacon_intval;
1360 uint32_t dtim_period;
1361 int32_t max_txpow;
Kiran Kumar Lokere13644672016-02-29 15:40:10 -08001362 enum phy_ch_width chan_width;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001363 bool is_dfs;
1364 uint8_t vdev_id;
1365 uint8_t chan;
1366 uint8_t oper_mode;
1367 tSirMacSSid ssid;
1368 uint8_t hidden_ssid;
1369 uint8_t pmf_enabled;
1370 uint8_t vht_capable;
1371 uint8_t ch_center_freq_seg0;
1372 uint8_t ch_center_freq_seg1;
1373 uint8_t ht_capable;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001374 uint8_t dot11_mode;
1375 bool is_half_rate;
1376 bool is_quarter_rate;
1377 uint32_t preferred_tx_streams;
1378 uint32_t preferred_rx_streams;
Jiachao Wu712d4fd2017-08-23 16:52:34 +08001379 uint16_t beacon_tx_rate;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001380#ifdef WLAN_FEATURE_11AX
Krishna Kumaar Natarajan4f1d7722017-03-03 21:12:51 -08001381 bool he_capable;
Krishna Kumaar Natarajan0103ef82017-02-17 18:15:56 -08001382 uint32_t he_ops;
1383#endif
Arif Hussain671a1902017-03-17 09:08:32 -07001384 uint32_t cac_duration_ms;
1385 uint32_t dfs_regdomain;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001386};
1387
1388/**
1389 * struct wma_set_key_params - set key parameters
1390 * @vdev_id: vdev id
1391 * @def_key_idx: used to see if we have to read the key from cfg
1392 * @key_len: key length
1393 * @peer_mac: peer mac address
1394 * @singl_tid_rc: 1=Single TID based Replay Count, 0=Per TID based RC
1395 * @key_type: key type
1396 * @key_idx: key index
1397 * @unicast: unicast flag
1398 * @key_data: key data
1399 */
1400struct wma_set_key_params {
1401 uint8_t vdev_id;
1402 /* def_key_idx can be used to see if we have to read the key from cfg */
1403 uint32_t def_key_idx;
1404 uint16_t key_len;
1405 uint8_t peer_mac[IEEE80211_ADDR_LEN];
1406 uint8_t singl_tid_rc;
1407 enum eAniEdType key_type;
1408 uint32_t key_idx;
1409 bool unicast;
1410 uint8_t key_data[SIR_MAC_MAX_KEY_LENGTH];
Krunal Soni8afae9b2017-10-20 20:15:54 -07001411 uint8_t key_rsc[SIR_MAC_MAX_KEY_RSC_LEN];
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001412};
1413
1414/**
1415 * struct t_thermal_cmd_params - thermal command parameters
1416 * @minTemp: minimum temprature
1417 * @maxTemp: maximum temprature
1418 * @thermalEnable: thermal enable
1419 */
1420typedef struct {
1421 uint16_t minTemp;
1422 uint16_t maxTemp;
1423 uint8_t thermalEnable;
1424} t_thermal_cmd_params, *tp_thermal_cmd_params;
1425
1426/**
1427 * enum wma_cfg_cmd_id - wma cmd ids
1428 * @WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID: txrx firmware stats enable command
1429 * @WMA_VDEV_TXRX_FWSTATS_RESET_CMDID: txrx firmware stats reset command
1430 * @WMA_VDEV_MCC_SET_TIME_LATENCY: set MCC latency time
1431 * @WMA_VDEV_MCC_SET_TIME_QUOTA: set MCC time quota
1432 * @WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE: set IBSS ATIM window size
1433 * @WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED: set IBSS enable power save
1434 * @WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED: set IBSS power collapse enable
1435 * @WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX: awake IBSS on TX/RX
1436 * @WMA_VDEV_IBSS_SET_INACTIVITY_TIME: set IBSS inactivity time
1437 * @WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME: set IBSS TXSP
1438 * @WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS: set IBSS power save warmup time
1439 * @WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW: set IBSS power save ATIM
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001440 * @WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID: get IPA microcontroller fw stats
Yun Park637d6482016-10-05 10:51:33 -07001441 * @WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID: get IPA uC wifi-sharing stats
1442 * @WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID: set IPA uC quota limit
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001443 *
1444 * wma command ids for configuration request which
1445 * does not involve sending a wmi command.
1446 */
1447enum wma_cfg_cmd_id {
1448 WMA_VDEV_TXRX_FWSTATS_ENABLE_CMDID = WMI_CMDID_MAX,
1449 WMA_VDEV_TXRX_FWSTATS_RESET_CMDID,
1450 WMA_VDEV_MCC_SET_TIME_LATENCY,
1451 WMA_VDEV_MCC_SET_TIME_QUOTA,
1452 WMA_VDEV_IBSS_SET_ATIM_WINDOW_SIZE,
1453 WMA_VDEV_IBSS_SET_POWER_SAVE_ALLOWED,
1454 WMA_VDEV_IBSS_SET_POWER_COLLAPSE_ALLOWED,
1455 WMA_VDEV_IBSS_SET_AWAKE_ON_TX_RX,
1456 WMA_VDEV_IBSS_SET_INACTIVITY_TIME,
1457 WMA_VDEV_IBSS_SET_TXSP_END_INACTIVITY_TIME,
1458 WMA_VDEV_IBSS_PS_SET_WARMUP_TIME_SECS,
1459 WMA_VDEV_IBSS_PS_SET_1RX_CHAIN_IN_ATIM_WINDOW,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001460 WMA_VDEV_TXRX_GET_IPA_UC_FW_STATS_CMDID,
Yun Park637d6482016-10-05 10:51:33 -07001461 WMA_VDEV_TXRX_GET_IPA_UC_SHARING_STATS_CMDID,
1462 WMA_VDEV_TXRX_SET_IPA_UC_QUOTA_CMDID,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001463 WMA_CMD_ID_MAX
1464};
1465
1466/**
1467 * struct wma_trigger_uapsd_params - trigger uapsd parameters
Jeff Johnsonc97816c2018-05-12 17:13:23 -07001468 * @wmm_ac: wmm access category
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001469 * @user_priority: user priority
1470 * @service_interval: service interval
1471 * @suspend_interval: suspend interval
1472 * @delay_interval: delay interval
1473 */
1474typedef struct wma_trigger_uapsd_params {
1475 uint32_t wmm_ac;
1476 uint32_t user_priority;
1477 uint32_t service_interval;
1478 uint32_t suspend_interval;
1479 uint32_t delay_interval;
1480} t_wma_trigger_uapsd_params, *tp_wma_trigger_uapsd_params;
1481
1482/**
1483 * enum uapsd_peer_param_max_sp - U-APSD maximum service period of peer station
1484 * @UAPSD_MAX_SP_LEN_UNLIMITED: unlimited max service period
1485 * @UAPSD_MAX_SP_LEN_2: max service period = 2
1486 * @UAPSD_MAX_SP_LEN_4: max service period = 4
1487 * @UAPSD_MAX_SP_LEN_6: max service period = 6
1488 */
1489enum uapsd_peer_param_max_sp {
1490 UAPSD_MAX_SP_LEN_UNLIMITED = 0,
1491 UAPSD_MAX_SP_LEN_2 = 2,
1492 UAPSD_MAX_SP_LEN_4 = 4,
1493 UAPSD_MAX_SP_LEN_6 = 6
1494};
1495
1496/**
1497 * enum uapsd_peer_param_enabled_ac - U-APSD Enabled AC's of peer station
1498 * @UAPSD_VO_ENABLED: enable uapsd for voice
1499 * @UAPSD_VI_ENABLED: enable uapsd for video
1500 * @UAPSD_BK_ENABLED: enable uapsd for background
1501 * @UAPSD_BE_ENABLED: enable uapsd for best effort
1502 */
1503enum uapsd_peer_param_enabled_ac {
1504 UAPSD_VO_ENABLED = 0x01,
1505 UAPSD_VI_ENABLED = 0x02,
1506 UAPSD_BK_ENABLED = 0x04,
1507 UAPSD_BE_ENABLED = 0x08
1508};
1509
1510/**
Govind Singha471e5e2015-10-12 17:11:14 +05301511 * enum profile_id_t - Firmware profiling index
1512 * @PROF_CPU_IDLE: cpu idle profile
1513 * @PROF_PPDU_PROC: ppdu processing profile
1514 * @PROF_PPDU_POST: ppdu post profile
1515 * @PROF_HTT_TX_INPUT: htt tx input profile
1516 * @PROF_MSDU_ENQ: msdu enqueue profile
1517 * @PROF_PPDU_POST_HAL: ppdu post profile
1518 * @PROF_COMPUTE_TX_TIME: tx time profile
1519 * @PROF_MAX_ID: max profile index
1520 */
1521enum profile_id_t {
1522 PROF_CPU_IDLE,
1523 PROF_PPDU_PROC,
1524 PROF_PPDU_POST,
1525 PROF_HTT_TX_INPUT,
1526 PROF_MSDU_ENQ,
1527 PROF_PPDU_POST_HAL,
1528 PROF_COMPUTE_TX_TIME,
1529 PROF_MAX_ID,
1530};
1531
1532/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001533 * struct p2p_ie - P2P IE structural definition.
1534 * @p2p_id: p2p id
1535 * @p2p_len: p2p length
1536 * @p2p_oui: p2p OUI
1537 * @p2p_oui_type: p2p OUI type
1538 */
1539struct p2p_ie {
1540 uint8_t p2p_id;
1541 uint8_t p2p_len;
1542 uint8_t p2p_oui[3];
1543 uint8_t p2p_oui_type;
1544} __packed;
1545
1546/**
1547 * struct p2p_noa_descriptor - noa descriptor
1548 * @type_count: 255: continuous schedule, 0: reserved
1549 * @duration: Absent period duration in micro seconds
1550 * @interval: Absent period interval in micro seconds
1551 * @start_time: 32 bit tsf time when in starts
1552 */
1553struct p2p_noa_descriptor {
1554 uint8_t type_count;
1555 uint32_t duration;
1556 uint32_t interval;
1557 uint32_t start_time;
1558} __packed;
1559
1560/**
1561 * struct p2p_sub_element_noa - p2p noa element
1562 * @p2p_sub_id: p2p sub id
1563 * @p2p_sub_len: p2p sub length
1564 * @index: identifies instance of NOA su element
1565 * @oppPS: oppPS state of the AP
1566 * @ctwindow: ctwindow in TUs
1567 * @num_descriptors: number of NOA descriptors
1568 * @noa_descriptors: noa descriptors
1569 */
1570struct p2p_sub_element_noa {
1571 uint8_t p2p_sub_id;
1572 uint8_t p2p_sub_len;
1573 uint8_t index; /* identifies instance of NOA su element */
1574 uint8_t oppPS:1, /* oppPS state of the AP */
1575 ctwindow:7; /* ctwindow in TUs */
1576 uint8_t num_descriptors; /* number of NOA descriptors */
1577 struct p2p_noa_descriptor noa_descriptors[WMA_MAX_NOA_DESCRIPTORS];
1578};
1579
1580/**
1581 * struct wma_decap_info_t - decapsulation info
1582 * @hdr: header
1583 * @hdr_len: header length
1584 */
1585struct wma_decap_info_t {
1586 uint8_t hdr[sizeof(struct ieee80211_qosframe_addr4)];
1587 int32_t hdr_len;
1588};
1589
1590/**
1591 * enum packet_power_save - packet power save params
1592 * @WMI_VDEV_PPS_PAID_MATCH: paid match param
1593 * @WMI_VDEV_PPS_GID_MATCH: gid match param
1594 * @WMI_VDEV_PPS_EARLY_TIM_CLEAR: early tim clear param
1595 * @WMI_VDEV_PPS_EARLY_DTIM_CLEAR: early dtim clear param
1596 * @WMI_VDEV_PPS_EOF_PAD_DELIM: eof pad delim param
1597 * @WMI_VDEV_PPS_MACADDR_MISMATCH: macaddr mismatch param
1598 * @WMI_VDEV_PPS_DELIM_CRC_FAIL: delim CRC fail param
1599 * @WMI_VDEV_PPS_GID_NSTS_ZERO: gid nsts zero param
1600 * @WMI_VDEV_PPS_RSSI_CHECK: RSSI check param
1601 * @WMI_VDEV_PPS_5G_EBT: 5G ebt param
1602 */
1603typedef enum {
1604 WMI_VDEV_PPS_PAID_MATCH = 0,
1605 WMI_VDEV_PPS_GID_MATCH = 1,
1606 WMI_VDEV_PPS_EARLY_TIM_CLEAR = 2,
1607 WMI_VDEV_PPS_EARLY_DTIM_CLEAR = 3,
1608 WMI_VDEV_PPS_EOF_PAD_DELIM = 4,
1609 WMI_VDEV_PPS_MACADDR_MISMATCH = 5,
1610 WMI_VDEV_PPS_DELIM_CRC_FAIL = 6,
1611 WMI_VDEV_PPS_GID_NSTS_ZERO = 7,
1612 WMI_VDEV_PPS_RSSI_CHECK = 8,
1613 WMI_VDEV_VHT_SET_GID_MGMT = 9,
1614 WMI_VDEV_PPS_5G_EBT = 10
1615} packet_power_save;
1616
1617/**
1618 * enum green_tx_param - green tx parameters
1619 * @WMI_VDEV_PARAM_GTX_HT_MCS: ht mcs param
1620 * @WMI_VDEV_PARAM_GTX_VHT_MCS: vht mcs param
1621 * @WMI_VDEV_PARAM_GTX_USR_CFG: user cfg param
1622 * @WMI_VDEV_PARAM_GTX_THRE: thre param
1623 * @WMI_VDEV_PARAM_GTX_MARGIN: green tx margin param
1624 * @WMI_VDEV_PARAM_GTX_STEP: green tx step param
1625 * @WMI_VDEV_PARAM_GTX_MINTPC: mintpc param
1626 * @WMI_VDEV_PARAM_GTX_BW_MASK: bandwidth mask
1627 */
1628typedef enum {
1629 WMI_VDEV_PARAM_GTX_HT_MCS,
1630 WMI_VDEV_PARAM_GTX_VHT_MCS,
1631 WMI_VDEV_PARAM_GTX_USR_CFG,
1632 WMI_VDEV_PARAM_GTX_THRE,
1633 WMI_VDEV_PARAM_GTX_MARGIN,
1634 WMI_VDEV_PARAM_GTX_STEP,
1635 WMI_VDEV_PARAM_GTX_MINTPC,
1636 WMI_VDEV_PARAM_GTX_BW_MASK,
1637} green_tx_param;
1638
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001639/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001640 * enum uapsd_ac - U-APSD Access Categories
1641 * @UAPSD_BE: best effort
1642 * @UAPSD_BK: back ground
1643 * @UAPSD_VI: video
1644 * @UAPSD_VO: voice
1645 */
1646enum uapsd_ac {
1647 UAPSD_BE,
1648 UAPSD_BK,
1649 UAPSD_VI,
1650 UAPSD_VO
1651};
1652
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301653QDF_STATUS wma_disable_uapsd_per_ac(tp_wma_handle wma_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001654 uint32_t vdev_id, enum uapsd_ac ac);
1655
1656/**
1657 * enum uapsd_up - U-APSD User Priorities
1658 * @UAPSD_UP_BE: best effort
1659 * @UAPSD_UP_BK: back ground
1660 * @UAPSD_UP_RESV: reserve
1661 * @UAPSD_UP_EE: Excellent Effort
1662 * @UAPSD_UP_CL: Critical Applications
1663 * @UAPSD_UP_VI: video
1664 * @UAPSD_UP_VO: voice
1665 * @UAPSD_UP_NC: Network Control
1666 */
1667enum uapsd_up {
1668 UAPSD_UP_BE,
1669 UAPSD_UP_BK,
1670 UAPSD_UP_RESV,
1671 UAPSD_UP_EE,
1672 UAPSD_UP_CL,
1673 UAPSD_UP_VI,
1674 UAPSD_UP_VO,
1675 UAPSD_UP_NC,
1676 UAPSD_UP_MAX
1677};
1678
1679/**
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001680 * struct wma_roam_invoke_cmd - roam invoke command
1681 * @vdev_id: vdev id
1682 * @bssid: mac address
1683 * @channel: channel
Naveen Rawat664a7cb2017-01-19 17:58:14 -08001684 * @frame_len: frame length, includs mac header, fixed params and ies
1685 * @frame_buf: buffer contaning probe response or beacon
Krunal Soni332f4af2017-06-01 14:36:17 -07001686 * @is_same_bssid: flag to indicate if roaming is requested for same bssid
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001687 */
1688struct wma_roam_invoke_cmd {
1689 uint32_t vdev_id;
1690 uint8_t bssid[IEEE80211_ADDR_LEN];
1691 uint32_t channel;
Naveen Rawat664a7cb2017-01-19 17:58:14 -08001692 uint32_t frame_len;
1693 uint8_t *frame_buf;
Krunal Soni332f4af2017-06-01 14:36:17 -07001694 uint8_t is_same_bssid;
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001695};
1696
1697/**
1698 * struct wma_process_fw_event_params - fw event parameters
1699 * @wmi_handle: wmi handle
1700 * @evt_buf: event buffer
1701 */
1702typedef struct {
1703 void *wmi_handle;
1704 void *evt_buf;
1705} wma_process_fw_event_params;
1706
Govind Singhd76a5b02016-03-08 15:12:14 +05301707int wma_process_fw_event_handler(void *ctx, void *ev, uint8_t rx_ctx);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001708
1709A_UINT32 e_csr_auth_type_to_rsn_authmode(eCsrAuthType authtype,
1710 eCsrEncryptionType encr);
1711A_UINT32 e_csr_encryption_type_to_rsn_cipherset(eCsrEncryptionType encr);
1712
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301713QDF_STATUS wma_trigger_uapsd_params(tp_wma_handle wma_handle, uint32_t vdev_id,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001714 tp_wma_trigger_uapsd_params
1715 trigger_uapsd_params);
1716
1717/* added to get average snr for both data and beacon */
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301718QDF_STATUS wma_send_snr_request(tp_wma_handle wma_handle, void *pGetRssiReq);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001719
1720
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301721QDF_STATUS wma_update_vdev_tbl(tp_wma_handle wma_handle, uint8_t vdev_id,
Leo Chang96464902016-10-28 11:10:54 -07001722 void *tx_rx_vdev_handle,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001723 uint8_t *mac, uint32_t vdev_type, bool add_del);
1724
1725void wma_send_flush_logs_to_fw(tp_wma_handle wma_handle);
1726void wma_log_completion_timeout(void *data);
1727
Qiwei Caie689a262018-07-26 15:50:22 +08001728#ifdef FEATURE_RSSI_MONITOR
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301729QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
Qiwei Caie689a262018-07-26 15:50:22 +08001730 struct rssi_monitor_req *req);
1731#else /* FEATURE_RSSI_MONITOR */
1732static inline
1733QDF_STATUS wma_set_rssi_monitoring(tp_wma_handle wma,
1734 struct rssi_monitor_req *req)
1735{
1736 return QDF_STATUS_SUCCESS;
1737}
1738#endif /* FEATURE_RSSI_MONITOR */
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001739
Manishekar Chandrasekaran7009f252016-04-21 19:14:15 +05301740QDF_STATUS wma_send_pdev_set_pcl_cmd(tp_wma_handle wma_handle,
1741 struct wmi_pcl_chan_weights *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001742
Manishekar Chandrasekarand9640342016-04-27 12:28:26 +05301743QDF_STATUS wma_send_pdev_set_hw_mode_cmd(tp_wma_handle wma_handle,
Tushnim Bhattacharyya51258a72017-03-13 12:55:02 -07001744 struct policy_mgr_hw_mode *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001745
Manishekar Chandrasekaran5d46f702016-04-27 12:50:52 +05301746QDF_STATUS wma_send_pdev_set_dual_mac_config(tp_wma_handle wma_handle,
Srinivas Girigowdaeb6ecf32018-02-15 17:04:22 -08001747 struct policy_mgr_dual_mac_config *msg);
Archana Ramachandrand41c3ed2016-02-10 15:48:06 -08001748QDF_STATUS wma_send_pdev_set_antenna_mode(tp_wma_handle wma_handle,
1749 struct sir_antenna_mode_param *msg);
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001750
1751struct wma_target_req *wma_fill_vdev_req(tp_wma_handle wma,
1752 uint8_t vdev_id,
1753 uint32_t msg_type, uint8_t type,
1754 void *params, uint32_t timeout);
1755struct wma_target_req *wma_fill_hold_req(tp_wma_handle wma,
1756 uint8_t vdev_id, uint32_t msg_type,
1757 uint8_t type, void *params,
1758 uint32_t timeout);
1759
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301760QDF_STATUS wma_vdev_start(tp_wma_handle wma,
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001761 struct wma_vdev_start_req *req, bool isRestart);
1762
1763void wma_remove_vdev_req(tp_wma_handle wma, uint8_t vdev_id,
1764 uint8_t type);
1765
Prakash Dhavali7090c5f2015-11-02 17:55:19 -08001766int wma_mgmt_tx_completion_handler(void *handle, uint8_t *cmpl_event_params,
1767 uint32_t len);
Nirav Shah20489972016-06-16 19:20:28 +05301768int wma_mgmt_tx_bundle_completion_handler(void *handle,
1769 uint8_t *cmpl_event_params, uint32_t len);
Naveen Rawatc0c91cd2015-11-05 14:27:37 -08001770uint32_t wma_get_vht_ch_width(void);
Govind Singhd76a5b02016-03-08 15:12:14 +05301771QDF_STATUS
1772wma_config_debug_module_cmd(wmi_unified_t wmi_handle, A_UINT32 param,
1773 A_UINT32 val, A_UINT32 *module_id_bitmap,
1774 A_UINT32 bitmap_len);
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001775#ifdef FEATURE_LFR_SUBNET_DETECTION
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301776QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001777 struct gateway_param_update_req *req);
1778#else
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301779static inline QDF_STATUS wma_set_gateway_params(tp_wma_handle wma,
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001780 struct gateway_param_update_req *req)
1781{
Anurag Chouhanfb54ab02016-02-18 18:00:46 +05301782 return QDF_STATUS_SUCCESS;
Ravi Joshi61c3c7a2015-11-09 18:41:20 -08001783}
1784#endif /* FEATURE_LFR_SUBNET_DETECTION */
1785
Dhanashri Atre09828f12016-11-13 10:36:58 -08001786QDF_STATUS wma_lro_config_cmd(void *handle,
1787 struct cdp_lro_hash_config *wma_lro_cmd);
1788
Dhanashri Atre1f0cbe42015-11-19 10:56:53 -08001789void
1790wma_indicate_err(enum ol_rx_err_type err_type,
1791 struct ol_error_info *err_info);
Sandeep Puligillae0875662016-02-12 16:09:21 -08001792
jiadcd49ec72017-12-05 13:33:11 +08001793/**
1794 * wma_rx_mic_error_ind() - indicate mic error to the protocol stack
1795 * @scn_handle: pdev handle from osif layer
1796 * @vdev_id: vdev id
1797 * @wh: pointer to ieee80211_frame structure
1798 *
1799 * This function indicates TKIP MIC errors encountered in the RX data path
1800 * to the protocol stack
1801 *
1802 * Return: none
1803 */
1804void wma_rx_mic_error_ind(void *scn_handle, uint16_t vdev_id, void *wh);
1805
Sandeep Puligillae0875662016-02-12 16:09:21 -08001806QDF_STATUS wma_ht40_stop_obss_scan(tp_wma_handle wma_handle,
1807 int32_t vdev_id);
Anurag Chouhanbf5e0e22016-09-12 12:54:09 +05301808
1809void wma_process_fw_test_cmd(WMA_HANDLE handle,
1810 struct set_fwtest_params *wma_fwtest);
1811
Sandeep Puligillae0875662016-02-12 16:09:21 -08001812QDF_STATUS wma_send_ht40_obss_scanind(tp_wma_handle wma,
1813 struct obss_ht40_scanind *req);
Arun Khandavalli2476ef52016-04-26 20:19:43 +05301814
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301815uint32_t wma_get_num_of_setbits_from_bitmask(uint32_t mask);
1816
1817#ifdef FEATURE_WLAN_APF
1818/**
1819 * wma_get_apf_caps_event_handler() - Event handler for get apf capability
1820 * @handle: WMA global handle
1821 * @cmd_param_info: command event data
1822 * @len: Length of @cmd_param_info
1823 *
1824 * Return: 0 on Success or Errno on failure
1825 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301826int wma_get_apf_caps_event_handler(void *handle,
1827 u_int8_t *cmd_param_info,
1828 u_int32_t len);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301829
1830/**
1831 * wma_get_apf_capabilities - Send get apf capability to firmware
1832 * @wma_handle: wma handle
1833 *
1834 * Return: QDF_STATUS enumeration.
1835 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301836QDF_STATUS wma_get_apf_capabilities(tp_wma_handle wma);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301837
1838/**
1839 * wma_set_apf_instructions - Set apf instructions to firmware
1840 * @wma: wma handle
1841 * @apf_set_offload: APF offload information to set to firmware
1842 *
1843 * Return: QDF_STATUS enumeration
1844 */
Nachiket Kukadee547a482018-05-22 16:43:30 +05301845QDF_STATUS
1846wma_set_apf_instructions(tp_wma_handle wma,
1847 struct sir_apf_set_offload *apf_set_offload);
Nachiket Kukade177b5b02018-05-22 20:52:17 +05301848
1849/**
1850 * wma_send_apf_enable_cmd - Send apf enable/disable cmd
1851 * @wma_handle: wma handle
1852 * @vdev_id: vdev id
1853 * @apf_enable: true: Enable APF Int., false: Disable APF Int.
1854 *
1855 * Return: QDF_STATUS enumeration.
1856 */
1857QDF_STATUS wma_send_apf_enable_cmd(WMA_HANDLE handle, uint8_t vdev_id,
1858 bool apf_enable);
1859
1860/**
1861 * wma_send_apf_write_work_memory_cmd - Command to write into the apf work
1862 * memory
1863 * @wma_handle: wma handle
1864 * @write_params: APF parameters for the write operation
1865 *
1866 * Return: QDF_STATUS enumeration.
1867 */
1868QDF_STATUS
1869wma_send_apf_write_work_memory_cmd(WMA_HANDLE handle,
1870 struct wmi_apf_write_memory_params
1871 *write_params);
1872
1873/**
1874 * wma_send_apf_read_work_memory_cmd - Command to get part of apf work memory
1875 * @wma_handle: wma handle
1876 * @callback: HDD callback to receive apf get mem event
1877 * @context: Context for the HDD callback
1878 * @read_params: APF parameters for the get operation
1879 *
1880 * Return: QDF_STATUS enumeration.
1881 */
1882QDF_STATUS
1883wma_send_apf_read_work_memory_cmd(WMA_HANDLE handle,
1884 struct wmi_apf_read_memory_params
1885 *read_params);
1886
1887/**
1888 * wma_apf_read_work_memory_event_handler - Event handler for get apf mem
1889 * operation
1890 * @handle: wma handle
1891 * @evt_buf: Buffer pointer to the event
1892 * @len: Length of the event buffer
1893 *
1894 * Return: status.
1895 */
1896int wma_apf_read_work_memory_event_handler(void *handle, uint8_t *evt_buf,
1897 uint32_t len);
1898#else /* FEATURE_WLAN_APF */
1899static inline QDF_STATUS wma_get_apf_capabilities(tp_wma_handle wma)
1900{
1901 return QDF_STATUS_SUCCESS;
1902}
1903
1904static inline QDF_STATUS
1905wma_set_apf_instructions(tp_wma_handle wma,
1906 struct sir_apf_set_offload *apf_set_offload)
1907{
1908 return QDF_STATUS_SUCCESS;
1909}
1910#endif /* FEATURE_WLAN_APF */
1911
Kiran Kumar Lokere666bf852016-05-02 12:23:02 -07001912void wma_process_set_pdev_ie_req(tp_wma_handle wma,
1913 struct set_ie_param *ie_params);
1914void wma_process_set_pdev_ht_ie_req(tp_wma_handle wma,
1915 struct set_ie_param *ie_params);
1916void wma_process_set_pdev_vht_ie_req(tp_wma_handle wma,
1917 struct set_ie_param *ie_params);
Mukul Sharma3ba26b82017-01-12 21:59:41 +05301918
Deepak Dhamdhere13983f22016-05-31 19:06:09 -07001919void wma_remove_peer(tp_wma_handle wma, u_int8_t *bssid,
Leo Chang96464902016-10-28 11:10:54 -07001920 u_int8_t vdev_id, void *peer,
Deepak Dhamdhere13983f22016-05-31 19:06:09 -07001921 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07001922
Venkata Sharath Chandra Manchala0d44d452016-11-23 17:48:15 -08001923QDF_STATUS wma_create_peer(tp_wma_handle wma, struct cdp_pdev *pdev,
Mukul Sharma00058692017-01-28 19:04:32 +05301924 struct cdp_vdev *vdev, u8 peer_addr[6],
Deepak Dhamdhere0f076bd2016-06-02 11:29:21 -07001925 u_int32_t peer_type, u_int8_t vdev_id,
1926 bool roam_synch_in_progress);
Naveen Rawate82c1f32016-06-22 15:34:36 -07001927
Padma, Santhosh Kumar16dacfb2017-03-21 19:05:40 +05301928/**
1929 * wma_get_cca_stats() - send request to fw to get CCA
1930 * @wmi_hdl: wma handle
1931 * @vdev_id: vdev id
1932 *
1933 * Return: QDF status
1934 */
1935QDF_STATUS wma_get_cca_stats(tp_wma_handle wma_handle,
1936 uint8_t vdev_id);
1937
Komal Seelam02d09342016-02-23 18:03:19 +05301938struct wma_ini_config *wma_get_ini_handle(tp_wma_handle wma_handle);
Abhishek Singh1c676222016-05-09 14:20:28 +05301939WLAN_PHY_MODE wma_chan_phy_mode(u8 chan, enum phy_ch_width chan_width,
Kiran Kumar Lokere1a43bcf2018-05-15 15:51:58 -07001940 u8 dot11_mode);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07001941
1942#ifdef FEATURE_OEM_DATA_SUPPORT
1943QDF_STATUS wma_start_oem_data_req(tp_wma_handle wma_handle,
Krishna Kumaar Natarajanc1fa17d2016-08-03 14:19:20 -07001944 struct oem_data_req *oem_req);
Krishna Kumaar Natarajanc5e06ac2016-06-30 16:49:19 -07001945#endif
Selvaraj, Sridharebda0f22016-08-29 16:05:23 +05301946
1947QDF_STATUS wma_enable_disable_caevent_ind(tp_wma_handle wma_handle,
1948 uint8_t val);
Himanshu Agarwalf65bd4c2016-12-05 17:21:12 +05301949void wma_register_packetdump_callback(
1950 tp_wma_packetdump_cb wma_mgmt_tx_packetdump_cb,
1951 tp_wma_packetdump_cb wma_mgmt_rx_packetdump_cb);
1952void wma_deregister_packetdump_callback(void);
Agrawal, Ashish4e5fa1c2016-09-21 19:03:43 +05301953void wma_update_sta_inactivity_timeout(tp_wma_handle wma,
1954 struct sme_sta_inactivity_timeout *sta_inactivity_timer);
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301955
1956/**
1957 * wma_form_rx_packet() - form rx cds packet
1958 * @buf: buffer
1959 * @mgmt_rx_params: mgmt rx params
1960 * @rx_pkt: cds packet
1961 *
1962 * This functions forms a cds packet from the rx mgmt frame received.
1963 *
1964 * Return: 0 for success or error code
1965 */
1966int wma_form_rx_packet(qdf_nbuf_t buf,
Himanshu Agarwald2e6cde2017-01-10 14:47:04 +05301967 struct mgmt_rx_event_params *mgmt_rx_params,
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05301968 cds_pkt_t *rx_pkt);
1969
1970/**
1971 * wma_mgmt_unified_cmd_send() - send the mgmt tx packet
1972 * @vdev: objmgr vdev
1973 * @buf: buffer
1974 * @desc_id: desc id
1975 * @mgmt_tx_params: mgmt rx params
1976 *
1977 * This functions sends mgmt tx packet to WMI layer.
1978 *
1979 * Return: 0 for success or error code
1980 */
1981QDF_STATUS wma_mgmt_unified_cmd_send(struct wlan_objmgr_vdev *vdev,
1982 qdf_nbuf_t buf, uint32_t desc_id,
1983 void *mgmt_tx_params);
Kapil Gupta4f0c0c12017-02-07 15:21:15 +05301984
1985/**
1986 * wma_chan_info_event_handler() - chan info event handler
1987 * @handle: wma handle
1988 * @event_buf: event handler data
1989 * @len: length of @event_buf
1990 *
1991 * this function will handle the WMI_CHAN_INFO_EVENTID
1992 *
1993 * Return: int
1994 */
1995int wma_chan_info_event_handler(void *handle, uint8_t *event_buf,
1996 uint32_t len);
Mukul Sharmaf9047232017-03-02 16:58:56 +05301997
1998/**
1999 * wma_vdev_set_mlme_state() - Set vdev mlme state
2000 * @wma: wma handle
2001 * @vdev_id: the Id of the vdev to configure
2002 * @state: vdev state
2003 *
2004 * Return: None
2005 */
2006static inline
2007void wma_vdev_set_mlme_state(tp_wma_handle wma, uint8_t vdev_id,
2008 enum wlan_vdev_state state)
2009{
2010 struct wlan_objmgr_vdev *vdev;
2011
2012 if (!wma) {
2013 WMA_LOGE("%s: WMA context is invald!", __func__);
2014 return;
2015 }
2016
2017 vdev = wlan_objmgr_get_vdev_by_id_from_psoc(wma->psoc, vdev_id,
2018 WLAN_LEGACY_WMA_ID);
2019 if (vdev) {
2020 wlan_vdev_obj_lock(vdev);
2021 wlan_vdev_mlme_set_state(vdev, state);
2022 wlan_vdev_obj_unlock(vdev);
2023 wlan_objmgr_vdev_release_ref(vdev, WLAN_LEGACY_WMA_ID);
2024 }
2025}
Mukul Sharma6411bb82017-03-01 15:57:07 +05302026
2027/**
2028 * wma_update_vdev_pause_bitmap() - update vdev pause bitmap
2029 * @vdev_id: the Id of the vdev to configure
2030 * @value: value pause bitmap value
2031 *
2032 * Return: None
2033 */
2034static inline
2035void wma_vdev_update_pause_bitmap(uint8_t vdev_id, uint16_t value)
2036{
2037 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2038 struct wma_txrx_node *iface;
2039
Mukul Sharma6411bb82017-03-01 15:57:07 +05302040 if (!wma) {
2041 WMA_LOGE("%s: WMA context is invald!", __func__);
2042 return;
2043 }
2044
Amar Singhalef59eee2018-01-02 12:46:35 -08002045 if (vdev_id >= wma->max_bssid) {
2046 WMA_LOGE("%s: Invalid vdev_id: %d", __func__, vdev_id);
2047 return;
2048 }
2049
Mukul Sharma6411bb82017-03-01 15:57:07 +05302050 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002051
2052 if (!iface) {
2053 WMA_LOGE("%s: Failed to get iface: NULL",
2054 __func__);
2055 return;
2056 }
2057
2058 if (!iface->handle) {
2059 WMA_LOGE("%s: Failed to get iface handle: NULL",
2060 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302061 return;
2062 }
2063
2064 iface->pause_bitmap = value;
2065}
2066
2067/**
2068 * wma_vdev_get_pause_bitmap() - Get vdev pause bitmap
2069 * @vdev_id: the Id of the vdev to configure
2070 *
2071 * Return: Vdev pause bitmap value else 0 on error
2072 */
2073static inline
2074uint16_t wma_vdev_get_pause_bitmap(uint8_t vdev_id)
2075{
2076 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2077 struct wma_txrx_node *iface;
2078
2079 if (!wma) {
2080 WMA_LOGE("%s: WMA context is invald!", __func__);
2081 return 0;
2082 }
2083
2084 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002085
2086 if (!iface) {
2087 WMA_LOGE("%s: Failed to get iface: NULL",
2088 __func__);
2089 return 0;
2090 }
2091
2092 if (!iface->handle) {
2093 WMA_LOGE("%s: Failed to get iface handle: NULL",
2094 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302095 return 0;
2096 }
2097
2098 return iface->pause_bitmap;
2099}
2100
2101/**
Will Huangad015772018-06-15 11:27:50 +08002102 * wma_vdev_get_dp_handle() - Get vdev datapth handle
2103 * @vdev_id: the Id of the vdev to configure
2104 *
2105 * Return: Vdev datapath handle else NULL on error
2106 */
2107static inline
2108struct cdp_vdev *wma_vdev_get_vdev_dp_handle(uint8_t vdev_id)
2109{
2110 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2111 struct wma_txrx_node *iface;
2112
2113 if (!wma) {
2114 WMA_LOGE("%s: WMA context is invald!", __func__);
2115 return NULL;
2116 }
2117
2118 if (vdev_id >= wma->max_bssid)
2119 return NULL;
2120
2121 iface = &wma->interfaces[vdev_id];
2122
2123 if (!iface) {
2124 WMA_LOGE("%s: Failed to get iface: NULL",
2125 __func__);
2126 return NULL;
2127 }
2128
2129 return iface->handle;
2130}
2131
2132/**
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302133 * wma_vdev_is_device_in_low_pwr_mode - is device in power save mode
2134 * @vdev_id: the Id of the vdev to configure
2135 *
2136 * Return: true if device is in low power mode else false
2137 */
2138static inline bool wma_vdev_is_device_in_low_pwr_mode(uint8_t vdev_id)
2139{
2140 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2141 struct wma_txrx_node *iface;
2142
2143 if (!wma) {
2144 WMA_LOGE("%s: WMA context is invald!", __func__);
2145 return 0;
2146 }
2147
2148 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002149
2150 if (!iface) {
2151 WMA_LOGE("%s: Failed to get iface: NULL",
2152 __func__);
2153 return 0;
2154 }
2155
2156 if (!iface->handle) {
2157 WMA_LOGE("%s: Failed to get iface handle:NULL",
2158 __func__);
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302159 return 0;
2160 }
2161
2162 return iface->in_bmps || wma->in_imps;
2163}
2164
2165/**
Mukul Sharma44746042018-05-24 17:30:52 +05302166 * wma_vdev_get_cfg_int - Get cfg integer value
2167 * @cfg_id: cfg item number
2168 * @value: fill the out value
2169 *
2170 * Note caller must verify return status before using value
2171 *
2172 * Return: QDF_STATUS_SUCCESS when got item from cfg else QDF_STATUS_E_FAILURE
2173 */
2174static inline
2175QDF_STATUS wma_vdev_get_cfg_int(int cfg_id, int *value)
2176{
2177 struct sAniSirGlobal *mac = cds_get_context(QDF_MODULE_ID_PE);
Jeff Johnsone88dd752018-06-07 22:57:54 -07002178
Mukul Sharma44746042018-05-24 17:30:52 +05302179 *value = 0;
2180
Nachiket Kukade37b4e6d2018-06-01 18:44:42 +05302181 if (!mac)
Mukul Sharma44746042018-05-24 17:30:52 +05302182 return QDF_STATUS_E_FAILURE;
Mukul Sharma44746042018-05-24 17:30:52 +05302183
Jeff Johnsone88dd752018-06-07 22:57:54 -07002184 return wlan_cfg_get_int(mac, cfg_id, value);
Mukul Sharma44746042018-05-24 17:30:52 +05302185}
2186
2187/**
Nachiket Kukade37b4e6d2018-06-01 18:44:42 +05302188 * wma_vdev_get_dtim_period - Get dtim period value from mlme
2189 * @vdev_id: vdev index number
2190 * @value: pointer to the value to fill out
2191 *
2192 * Note caller must verify return status before using value
2193 *
2194 * Return: QDF_STATUS_SUCCESS when fetched a valid value from cfg else
2195 * QDF_STATUS_E_FAILURE
2196 */
2197static inline
2198QDF_STATUS wma_vdev_get_dtim_period(uint8_t vdev_id, uint8_t *value)
2199{
2200 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2201 struct wma_txrx_node *iface;
2202 /* set value to zero */
2203 *value = 0;
2204
2205 if (!wma)
2206 return QDF_STATUS_E_FAILURE;
2207
2208 iface = &wma->interfaces[vdev_id];
2209
2210 if (!iface || !iface->handle)
2211 return QDF_STATUS_E_FAILURE;
2212
2213 *value = iface->dtimPeriod;
2214 return QDF_STATUS_SUCCESS;
2215}
2216
2217/**
2218 * wma_vdev_get_beacon_interval - Get beacon interval from mlme
2219 * @vdev_id: vdev index number
2220 * @value: pointer to the value to fill out
2221 *
2222 * Note caller must verify return status before using value
2223 *
2224 * Return: QDF_STATUS_SUCCESS when fetched a valid value from cfg else
2225 * QDF_STATUS_E_FAILURE
2226 */
2227static inline
2228QDF_STATUS wma_vdev_get_beacon_interval(uint8_t vdev_id, uint16_t *value)
2229{
2230 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2231 struct wma_txrx_node *iface;
2232 /* set value to zero */
2233 *value = 0;
2234
2235 if (!wma)
2236 return QDF_STATUS_E_FAILURE;
2237
2238 iface = &wma->interfaces[vdev_id];
2239
2240 if (!iface || !iface->handle)
2241 return QDF_STATUS_E_FAILURE;
2242
2243 *value = iface->beaconInterval;
2244 return QDF_STATUS_SUCCESS;
2245}
2246
2247/**
Mukul Sharma6411bb82017-03-01 15:57:07 +05302248 * wma_vdev_set_pause_bit() - Set a bit in vdev pause bitmap
2249 * @vdev_id: the Id of the vdev to configure
2250 * @bit_pos: set bit position in pause bitmap
2251 *
2252 * Return: None
2253 */
2254static inline
2255void wma_vdev_set_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2256{
2257 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2258 struct wma_txrx_node *iface;
2259
2260 if (!wma) {
2261 WMA_LOGE("%s: WMA context is invald!", __func__);
2262 return;
2263 }
2264
2265 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002266
2267 if (!iface) {
2268 WMA_LOGE("%s: Failed to get iface: NULL",
2269 __func__);
2270 return;
2271 }
2272
2273 if (!iface->handle) {
2274 WMA_LOGE("%s: Failed to get iface handle: NULL",
2275 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302276 return;
2277 }
2278
2279 iface->pause_bitmap |= (1 << bit_pos);
2280}
2281
2282/**
2283 * wma_vdev_clear_pause_bit() - Clear a bit from vdev pause bitmap
2284 * @vdev_id: the Id of the vdev to configure
2285 * @bit_pos: set bit position in pause bitmap
2286 *
2287 * Return: None
2288 */
2289static inline
2290void wma_vdev_clear_pause_bit(uint8_t vdev_id, wmi_tx_pause_type bit_pos)
2291{
2292 tp_wma_handle wma = (tp_wma_handle)cds_get_context(QDF_MODULE_ID_WMA);
2293 struct wma_txrx_node *iface;
2294
2295 if (!wma) {
2296 WMA_LOGE("%s: WMA context is invald!", __func__);
2297 return;
2298 }
2299
2300 iface = &wma->interfaces[vdev_id];
Amar Singhalef59eee2018-01-02 12:46:35 -08002301
2302 if (!iface) {
2303 WMA_LOGE("%s: Failed to get iface: NULL",
2304 __func__);
2305 return;
2306 }
2307
2308 if (!iface->handle) {
2309 WMA_LOGE("%s: Failed to get iface handle: NULL",
2310 __func__);
Mukul Sharma6411bb82017-03-01 15:57:07 +05302311 return;
2312 }
2313
2314 iface->pause_bitmap &= ~(1 << bit_pos);
2315}
2316
Naveen Rawat5c35ae42017-04-18 15:35:07 -07002317/**
2318 * wma_process_roaming_config() - process roam request
2319 * @wma_handle: wma handle
2320 * @roam_req: roam request parameters
2321 *
2322 * Main routine to handle ROAM commands coming from CSR module.
2323 *
2324 * Return: QDF status
2325 */
2326QDF_STATUS wma_process_roaming_config(tp_wma_handle wma_handle,
2327 tSirRoamOffloadScanReq *roam_req);
2328
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002329#ifdef WMI_INTERFACE_EVENT_LOGGING
2330static inline void wma_print_wmi_cmd_log(uint32_t count,
2331 qdf_abstract_print *print,
2332 void *print_priv)
2333{
2334 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2335
Rachit Kankaneb1035622018-01-24 18:41:35 +05302336 if (wma) {
2337 print(print_priv, "Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002338 wmi_print_cmd_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302339 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002340}
2341
2342static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2343 qdf_abstract_print *print,
2344 void *print_priv)
2345{
2346 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2347
Rachit Kankaneb1035622018-01-24 18:41:35 +05302348 if (wma) {
2349 print(print_priv, "Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002350 wmi_print_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2351 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302352 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002353}
2354
2355static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2356 qdf_abstract_print *print,
2357 void *print_priv)
2358{
2359 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2360
Rachit Kankaneb1035622018-01-24 18:41:35 +05302361 if (wma) {
2362 print(print_priv, "Management Command Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002363 wmi_print_mgmt_cmd_log(wma->wmi_handle, count, print,
2364 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302365 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002366}
2367
2368static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2369 qdf_abstract_print *print,
2370 void *print_priv)
2371{
2372 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2373
Rachit Kankaneb1035622018-01-24 18:41:35 +05302374 if (wma) {
2375 print(print_priv,
2376 "Management Command Tx Complete Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002377 wmi_print_mgmt_cmd_tx_cmp_log(wma->wmi_handle, count, print,
2378 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302379 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002380}
2381
2382static inline void wma_print_wmi_event_log(uint32_t count,
2383 qdf_abstract_print *print,
2384 void *print_priv)
2385{
2386 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2387
Rachit Kankaneb1035622018-01-24 18:41:35 +05302388 if (wma) {
2389 print(print_priv, "Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002390 wmi_print_event_log(wma->wmi_handle, count, print, print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302391 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002392}
2393
2394static inline void wma_print_wmi_rx_event_log(uint32_t count,
2395 qdf_abstract_print *print,
2396 void *print_priv)
2397{
2398 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2399
Rachit Kankaneb1035622018-01-24 18:41:35 +05302400 if (wma) {
2401 print(print_priv, "Rx Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002402 wmi_print_rx_event_log(wma->wmi_handle, count, print,
2403 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302404 }
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002405}
2406
2407static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2408 qdf_abstract_print *print,
2409 void *print_priv)
2410{
2411 t_wma_handle *wma = cds_get_context(QDF_MODULE_ID_WMA);
2412
Rachit Kankaneb1035622018-01-24 18:41:35 +05302413 if (wma) {
2414 print(print_priv, "Management Event Log (count %u)", count);
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002415 wmi_print_mgmt_event_log(wma->wmi_handle, count, print,
2416 print_priv);
Rachit Kankaneb1035622018-01-24 18:41:35 +05302417 }
2418}
2419#else
2420
2421static inline void wma_print_wmi_cmd_log(uint32_t count,
2422 qdf_abstract_print *print,
2423 void *print_priv)
2424{
2425}
2426
2427static inline void wma_print_wmi_cmd_tx_cmp_log(uint32_t count,
2428 qdf_abstract_print *print,
2429 void *print_priv)
2430{
2431}
2432
2433static inline void wma_print_wmi_mgmt_cmd_log(uint32_t count,
2434 qdf_abstract_print *print,
2435 void *print_priv)
2436{
2437}
2438
2439static inline void wma_print_wmi_mgmt_cmd_tx_cmp_log(uint32_t count,
2440 qdf_abstract_print *print,
2441 void *print_priv)
2442{
2443}
2444
2445static inline void wma_print_wmi_event_log(uint32_t count,
2446 qdf_abstract_print *print,
2447 void *print_priv)
2448{
2449}
2450
2451static inline void wma_print_wmi_rx_event_log(uint32_t count,
2452 qdf_abstract_print *print,
2453 void *print_priv)
2454{
2455}
2456
2457static inline void wma_print_wmi_mgmt_event_log(uint32_t count,
2458 qdf_abstract_print *print,
2459 void *print_priv)
2460{
Dustin Brown8d2d0f52017-04-03 17:02:08 -07002461}
2462#endif /* WMI_INTERFACE_EVENT_LOGGING */
2463
Sandeep Puligillaf587adf2017-04-27 19:53:21 -07002464/**
2465 * wma_ipa_uc_stat_request() - set ipa config parameters
2466 * @privcmd: private command
2467 *
2468 * Return: None
2469 */
2470void wma_ipa_uc_stat_request(wma_cli_set_cmd_t *privcmd);
2471
lifeng66831662017-05-19 16:01:35 +08002472/**
2473 * wma_set_rx_reorder_timeout_val() - set rx recorder timeout value
2474 * @wma_handle: pointer to wma handle
2475 * @reorder_timeout: rx reorder timeout value
2476 *
2477 * Return: VOS_STATUS_SUCCESS for success or error code.
2478 */
2479QDF_STATUS wma_set_rx_reorder_timeout_val(tp_wma_handle wma_handle,
2480 struct sir_set_rx_reorder_timeout_val *reorder_timeout);
2481
2482/**
2483 * wma_set_rx_blocksize() - set rx blocksize
2484 * @wma_handle: pointer to wma handle
2485 * @peer_rx_blocksize: rx blocksize for peer mac
2486 *
2487 * Return: QDF_STATUS_SUCCESS for success or error code.
2488 */
2489QDF_STATUS wma_set_rx_blocksize(tp_wma_handle wma_handle,
2490 struct sir_peer_set_rx_blocksize *peer_rx_blocksize);
Ashish Kumar Dhanotiyab28338c2017-07-21 20:12:34 +05302491/**
2492 * wma_configure_smps_params() - Configures the smps parameters to set
2493 * @vdev_id: Virtual device for the command
2494 * @param_id: SMPS parameter ID
2495 * @param_val: Value to be set for the parameter
2496 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2497 */
2498QDF_STATUS wma_configure_smps_params(uint32_t vdev_id, uint32_t param_id,
2499 uint32_t param_val);
lifeng66831662017-05-19 16:01:35 +08002500
Ravi Kumar Bokka05c14e52017-03-27 14:48:23 +05302501/*
2502 * wma_chip_power_save_failure_detected_handler() - chip pwr save fail detected
2503 * event handler
2504 * @handle: wma handle
2505 * @cmd_param_info: event handler data
2506 * @len: length of @cmd_param_info
2507 *
2508 * Return: QDF_STATUS_SUCCESS on success; error code otherwise
2509 */
2510int wma_chip_power_save_failure_detected_handler(void *handle,
2511 uint8_t *cmd_param_info,
2512 uint32_t len);
lifengd217d192017-05-09 19:44:16 +08002513
2514/**
2515 * wma_get_chain_rssi() - send wmi cmd to get chain rssi
2516 * @wma_handle: wma handler
2517 * @req_params: requset params
2518 *
2519 * Return: Return QDF_STATUS
2520 */
2521QDF_STATUS wma_get_chain_rssi(tp_wma_handle wma_handle,
2522 struct get_chain_rssi_req_params *req_params);
2523
Nachiket Kukadeaaf8a712017-07-27 19:15:36 +05302524/**
2525 * wma_config_bmiss_bcnt_params() - set bmiss config parameters
2526 * @vdev_id: virtual device for the command
2527 * @first_cnt: bmiss first value
2528 * @final_cnt: bmiss final value
2529 *
2530 * Return: QDF_STATUS_SUCCESS or non-zero on failure
2531 */
2532QDF_STATUS wma_config_bmiss_bcnt_params(uint32_t vdev_id, uint32_t first_cnt,
2533 uint32_t final_cnt);
2534
Naveen Rawatd7734142017-10-27 10:02:40 -07002535/**
2536 * wma_check_and_set_wake_timer(): checks all interfaces and if any interface
2537 * has install_key pending, sets timer pattern in fw to wake up host after
2538 * specified time has elapsed.
2539 * @time: time after which host wants to be awaken.
2540 *
2541 * Return: None
2542 */
2543void wma_check_and_set_wake_timer(uint32_t time);
Min Liu22202b72018-02-12 14:01:24 +08002544
Himanshu Agarwal2fdf77a2016-12-29 11:41:00 +05302545#endif