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Matt Arsenaultd82c1832013-11-10 01:03:59 +00001//===-- AMDGPUAsmPrinter.h - Print AMDGPU assembly code ---------*- C++ -*-===//
Tom Stellard75aadc22012-12-11 21:25:42 +00002//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief AMDGPU Assembly printer class.
12//
13//===----------------------------------------------------------------------===//
14
Matt Arsenault6b6a2c32016-03-11 08:00:27 +000015#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
16#define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
Tom Stellard75aadc22012-12-11 21:25:42 +000017
18#include "llvm/CodeGen/AsmPrinter.h"
Tom Stellarded699252013-10-12 05:02:51 +000019#include <vector>
Tom Stellard75aadc22012-12-11 21:25:42 +000020
21namespace llvm {
22
Matt Arsenault6b6a2c32016-03-11 08:00:27 +000023class AMDGPUAsmPrinter final : public AsmPrinter {
Matt Arsenault89cc49f2013-12-05 05:15:35 +000024private:
25 struct SIProgramInfo {
Matt Arsenaulte500e322014-04-15 22:40:47 +000026 SIProgramInfo() :
Tom Stellard4df465b2014-12-02 21:28:53 +000027 VGPRBlocks(0),
28 SGPRBlocks(0),
Matt Arsenault0989d512014-06-26 17:22:30 +000029 Priority(0),
30 FloatMode(0),
31 Priv(0),
32 DX10Clamp(0),
33 DebugMode(0),
34 IEEEMode(0),
Tom Stellardb02094e2014-07-21 15:45:01 +000035 ScratchSize(0),
Tom Stellard4df465b2014-12-02 21:28:53 +000036 ComputePGMRSrc1(0),
37 LDSBlocks(0),
38 ScratchBlocks(0),
39 ComputePGMRSrc2(0),
40 NumVGPR(0),
41 NumSGPR(0),
Matt Arsenault3f981402014-09-15 15:41:53 +000042 FlatUsed(false),
Konstantin Zhuravlyov1d650262016-09-06 20:22:28 +000043 NumSGPRsForWavesPerEU(0),
44 NumVGPRsForWavesPerEU(0),
Konstantin Zhuravlyov1d99c4d2016-04-26 15:43:14 +000045 ReservedVGPRFirst(0),
46 ReservedVGPRCount(0),
Konstantin Zhuravlyovf2f3d142016-06-25 03:11:28 +000047 DebuggerWavefrontPrivateSegmentOffsetSGPR((uint16_t)-1),
48 DebuggerPrivateSegmentBufferSGPR((uint16_t)-1),
Matt Arsenault3f981402014-09-15 15:41:53 +000049 VCCUsed(false),
Matt Arsenault0989d512014-06-26 17:22:30 +000050 CodeLen(0) {}
Matt Arsenaulte500e322014-04-15 22:40:47 +000051
Matt Arsenault0989d512014-06-26 17:22:30 +000052 // Fields set in PGM_RSRC1 pm4 packet.
Tom Stellard4df465b2014-12-02 21:28:53 +000053 uint32_t VGPRBlocks;
54 uint32_t SGPRBlocks;
Matt Arsenault0989d512014-06-26 17:22:30 +000055 uint32_t Priority;
56 uint32_t FloatMode;
57 uint32_t Priv;
58 uint32_t DX10Clamp;
59 uint32_t DebugMode;
60 uint32_t IEEEMode;
Tom Stellardb02094e2014-07-21 15:45:01 +000061 uint32_t ScratchSize;
Matt Arsenault0989d512014-06-26 17:22:30 +000062
Tom Stellard4df465b2014-12-02 21:28:53 +000063 uint64_t ComputePGMRSrc1;
64
65 // Fields set in PGM_RSRC2 pm4 packet.
66 uint32_t LDSBlocks;
67 uint32_t ScratchBlocks;
68
69 uint64_t ComputePGMRSrc2;
70
71 uint32_t NumVGPR;
72 uint32_t NumSGPR;
73 uint32_t LDSSize;
Matt Arsenault3f981402014-09-15 15:41:53 +000074 bool FlatUsed;
75
Konstantin Zhuravlyov1d650262016-09-06 20:22:28 +000076 // Number of SGPRs that meets number of waves per execution unit request.
77 uint32_t NumSGPRsForWavesPerEU;
78
79 // Number of VGPRs that meets number of waves per execution unit request.
80 uint32_t NumVGPRsForWavesPerEU;
81
Konstantin Zhuravlyov71515e52016-04-26 17:24:40 +000082 // If ReservedVGPRCount is 0 then must be 0. Otherwise, this is the first
83 // fixed VGPR number reserved.
Konstantin Zhuravlyov1d99c4d2016-04-26 15:43:14 +000084 uint16_t ReservedVGPRFirst;
Konstantin Zhuravlyov1d650262016-09-06 20:22:28 +000085
Konstantin Zhuravlyov71515e52016-04-26 17:24:40 +000086 // The number of consecutive VGPRs reserved.
Konstantin Zhuravlyov1d99c4d2016-04-26 15:43:14 +000087 uint16_t ReservedVGPRCount;
88
Konstantin Zhuravlyovf2f3d142016-06-25 03:11:28 +000089 // Fixed SGPR number used to hold wave scratch offset for entire kernel
90 // execution, or uint16_t(-1) if the register is not used or not known.
91 uint16_t DebuggerWavefrontPrivateSegmentOffsetSGPR;
Konstantin Zhuravlyov1d650262016-09-06 20:22:28 +000092
Konstantin Zhuravlyovf2f3d142016-06-25 03:11:28 +000093 // Fixed SGPR number of the first 4 SGPRs used to hold scratch V# for entire
94 // kernel execution, or uint16_t(-1) if the register is not used or not
95 // known.
96 uint16_t DebuggerPrivateSegmentBufferSGPR;
97
Matt Arsenault0989d512014-06-26 17:22:30 +000098 // Bonus information for debugging.
Matt Arsenault3f981402014-09-15 15:41:53 +000099 bool VCCUsed;
Matt Arsenaulte500e322014-04-15 22:40:47 +0000100 uint64_t CodeLen;
Matt Arsenault89cc49f2013-12-05 05:15:35 +0000101 };
102
Matt Arsenaultd32dbb62014-07-13 03:06:43 +0000103 void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF) const;
104 void findNumUsedRegistersSI(const MachineFunction &MF,
Matt Arsenault89cc49f2013-12-05 05:15:35 +0000105 unsigned &NumSGPR,
106 unsigned &NumVGPR) const;
107
108 /// \brief Emit register usage information so that the GPU driver
109 /// can correctly setup the GPU state.
Matt Arsenaultd32dbb62014-07-13 03:06:43 +0000110 void EmitProgramInfoR600(const MachineFunction &MF);
111 void EmitProgramInfoSI(const MachineFunction &MF, const SIProgramInfo &KernelInfo);
Tom Stellardb8fd6ef2014-12-02 22:00:07 +0000112 void EmitAmdKernelCodeT(const MachineFunction &MF,
113 const SIProgramInfo &KernelInfo) const;
Tom Stellard75aadc22012-12-11 21:25:42 +0000114
115public:
David Blaikie94598322015-01-18 20:29:04 +0000116 explicit AMDGPUAsmPrinter(TargetMachine &TM,
117 std::unique_ptr<MCStreamer> Streamer);
Tom Stellard75aadc22012-12-11 21:25:42 +0000118
Craig Topper5656db42014-04-29 07:57:24 +0000119 bool runOnMachineFunction(MachineFunction &MF) override;
Tom Stellard75aadc22012-12-11 21:25:42 +0000120
Mehdi Amini117296c2016-10-01 02:56:57 +0000121 StringRef getPassName() const override;
Tom Stellard75aadc22012-12-11 21:25:42 +0000122
Tom Stellard75aadc22012-12-11 21:25:42 +0000123 /// Implemented in AMDGPUMCInstLower.cpp
Craig Topper5656db42014-04-29 07:57:24 +0000124 void EmitInstruction(const MachineInstr *MI) override;
Tom Stellarded699252013-10-12 05:02:51 +0000125
Tom Stellardf151a452015-06-26 21:14:58 +0000126 void EmitFunctionBodyStart() override;
127
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000128 void EmitFunctionEntryLabel() override;
129
Tom Stellarde3b5aea2015-12-02 17:00:42 +0000130 void EmitGlobalVariable(const GlobalVariable *GV) override;
131
Tom Stellardf4218372016-01-12 17:18:17 +0000132 void EmitStartOfAsmFile(Module &M) override;
133
Matt Arsenault6bc43d82016-10-06 16:20:41 +0000134 bool isBlockOnlyReachableByFallthrough(
135 const MachineBasicBlock *MBB) const override;
136
Tom Stellardd7e6f132015-04-08 01:09:26 +0000137 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
138 unsigned AsmVariant, const char *ExtraCode,
Tom Stellard80e169a2015-04-08 02:07:05 +0000139 raw_ostream &O) override;
Tom Stellardd7e6f132015-04-08 01:09:26 +0000140
Yaxun Liua711cc72016-07-16 05:09:21 +0000141 void emitStartOfRuntimeMetadata(const Module &M);
142
143 void emitRuntimeMetadata(const Function &F);
144
Tom Stellarded699252013-10-12 05:02:51 +0000145protected:
Tom Stellarded699252013-10-12 05:02:51 +0000146 std::vector<std::string> DisasmLines, HexLines;
147 size_t DisasmLineMaxLen;
Tom Stellard75aadc22012-12-11 21:25:42 +0000148};
149
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000150} // End anonymous llvm
Tom Stellard75aadc22012-12-11 21:25:42 +0000151
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000152#endif