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gerrit-public.fairphone.software / toolchain / llvm-project / 296b849163d3f3ed0c342c71c3d5800accda438c / . / llvm / test / CodeGen / AMDGPU / hsa.ll
blob: 14c130a8190edb8e06f3a106bc9189e5364b8307 [file] [log] [blame]
Changpeng Fangb41574a2015-12-22 20:55:23 +0000[diff] [blame]1; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | FileCheck --check-prefix=HSA %s
2; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -mattr=-flat-for-global | FileCheck --check-prefix=HSA-CI %s
3; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo | FileCheck --check-prefix=HSA %s
4; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=carrizo -mattr=-flat-for-global | FileCheck --check-prefix=HSA-VI %s
5; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri -filetype=obj | llvm-readobj -symbols -s -sd | FileCheck --check-prefix=ELF %s
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]6; RUN: llc < %s -mtriple=amdgcn--amdhsa -mcpu=kaveri | llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri | llvm-readobj -symbols -s -sd | FileCheck %s --check-prefix=ELF
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]7
8; The SHT_NOTE section contains the output from the .hsa_code_object_*
9; directives.
10
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]11; ELF: Section {
12; ELF: Name: .hsatext
13; ELF: Type: SHT_PROGBITS (0x1)
14; ELF: Flags [ (0xC00007)
15; ELF: SHF_ALLOC (0x2)
16; ELF: SHF_AMDGPU_HSA_AGENT (0x800000)
17; ELF: SHF_AMDGPU_HSA_CODE (0x400000)
18; ELF: SHF_EXECINSTR (0x4)
19; ELF: SHF_WRITE (0x1)
20; ELF: }
21
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]22; ELF: SHT_NOTE
23; ELF: 0000: 04000000 08000000 01000000 414D4400
24; ELF: 0010: 01000000 00000000 04000000 1B000000
25; ELF: 0020: 03000000 414D4400 04000700 07000000
26; ELF: 0030: 00000000 00000000 414D4400 414D4447
27; ELF: 0040: 50550000
28
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]29; ELF: Symbol {
30; ELF: Name: simple
Matt Arsenault296b8492016-02-12 06:31:30 +0000[diff] [blame^]31; ELF: Size: 288
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]32; ELF: Type: AMDGPU_HSA_KERNEL (0xA)
33; ELF: }
34
Tom Stellard347ac792015-06-26 21:15:07 +0000[diff] [blame]35; HSA: .hsa_code_object_version 1,0
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]36; HSA-CI: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
37; HSA-VI: .hsa_code_object_isa 8,0,1,"AMD","AMDGPU"
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]38
Tom Stellarde135ffd2015-09-25 21:41:28 +0000[diff] [blame]39; HSA: .hsatext
40
Tom Stellard1e1b05d2015-11-06 11:45:14 +0000[diff] [blame]41; HSA: .amdgpu_hsa_kernel simple
Tom Stellardf151a452015-06-26 21:14:58 +0000[diff] [blame]42; HSA: {{^}}simple:
Tom Stellardff7416b2015-06-26 21:58:31 +0000[diff] [blame]43; HSA: .amd_kernel_code_t
Matt Arsenault26f8f3d2015-11-30 21:16:03 +0000[diff] [blame]44; HSA: enable_sgpr_private_segment_buffer = 1
45; HSA: enable_sgpr_kernarg_segment_ptr = 1
Tom Stellardff7416b2015-06-26 21:58:31 +0000[diff] [blame]46; HSA: .end_amd_kernel_code_t
Matt Arsenault26f8f3d2015-11-30 21:16:03 +0000[diff] [blame]47; HSA: s_load_dwordx2 s[{{[0-9]+:[0-9]+}}], s[4:5], 0x0
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]48
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]49; Make sure we are setting the ATC bit:
Tom Stellard4694ed02015-06-26 21:58:42 +0000[diff] [blame]50; HSA-CI: s_mov_b32 s[[HI:[0-9]]], 0x100f000
51; On VI+ we also need to set MTYPE = 2
52; HSA-VI: s_mov_b32 s[[HI:[0-9]]], 0x1100f000
Changpeng Fangb41574a2015-12-22 20:55:23 +0000[diff] [blame]53; Make sure we generate flat store for HSA
54; HSA: flat_store_dword v{{[0-9]+}}
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]55
Tom Stellardad8f5e82016-01-08 14:50:23 +0000[diff] [blame]56; HSA: .Lfunc_end0:
57; HSA: .size simple, .Lfunc_end0-simple
58
Tom Stellard794c8c02014-12-02 17:05:41 +0000[diff] [blame]59define void @simple(i32 addrspace(1)* %out) {
60entry:
61 store i32 0, i32 addrspace(1)* %out
62 ret void
63}