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gerrit-public.fairphone.software / toolchain / llvm-project / 420a216817def01816186910a2e35885c9201951 / . / llvm / test / CodeGen / ARM / atomic-64bit.ll
blob: f18cf22cd6000a4722751d8fb74512469cef24d4 [file] [log] [blame]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]1; RUN: llc < %s -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-LE
2; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-LE
3; RUN: llc < %s -mtriple=armebv7 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-BE
4; RUN: llc < %s -mtriple=thumbebv7-none-linux-gnueabihf | FileCheck %s --check-prefix=CHECK-THUMB --check-prefix=CHECK-THUMB-BE
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]5
6define i64 @test1(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]7; CHECK-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]8; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]9; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]10; CHECK-LE: adds [[REG3:(r[0-9]?[02468])]], [[REG1]]
11; CHECK-LE: adc [[REG4:(r[0-9]?[13579])]], [[REG2]]
12; CHECK-BE: adds [[REG4:(r[0-9]?[13579])]], [[REG2]]
13; CHECK-BE: adc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]14; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]15; CHECK: cmp
16; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]17; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]18
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]19; CHECK-THUMB-LABEL: test1:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]20; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]21; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]22; CHECK-THUMB-LE: adds.w [[REG3:[a-z0-9]+]], [[REG1]]
23; CHECK-THUMB-LE: adc.w [[REG4:[a-z0-9]+]], [[REG2]]
24; CHECK-THUMB-BE: adds.w [[REG4:[a-z0-9]+]], [[REG2]]
25; CHECK-THUMB-BE: adc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]26; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
27; CHECK-THUMB: cmp
28; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]29; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]30
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]31 %r = atomicrmw add i64* %ptr, i64 %val seq_cst
32 ret i64 %r
33}
34
35define i64 @test2(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]36; CHECK-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]37; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]38; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]39; CHECK-LE: subs [[REG3:(r[0-9]?[02468])]], [[REG1]]
40; CHECK-LE: sbc [[REG4:(r[0-9]?[13579])]], [[REG2]]
41; CHECK-BE: subs [[REG4:(r[0-9]?[13579])]], [[REG2]]
42; CHECK-BE: sbc [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]43; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]44; CHECK: cmp
45; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]46; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]47
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]48; CHECK-THUMB-LABEL: test2:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]49; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]50; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]51; CHECK-THUMB-LE: subs.w [[REG3:[a-z0-9]+]], [[REG1]]
52; CHECK-THUMB-LE: sbc.w [[REG4:[a-z0-9]+]], [[REG2]]
53; CHECK-THUMB-BE: subs.w [[REG4:[a-z0-9]+]], [[REG2]]
54; CHECK-THUMB-BE: sbc.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]55; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
56; CHECK-THUMB: cmp
57; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]58; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]59
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]60 %r = atomicrmw sub i64* %ptr, i64 %val seq_cst
61 ret i64 %r
62}
63
64define i64 @test3(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]65; CHECK-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]66; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]67; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]68; CHECK-LE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
69; CHECK-LE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
70; CHECK-BE-DAG: and [[REG4:(r[0-9]?[13579])]], [[REG2]]
71; CHECK-BE-DAG: and [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]72; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]73; CHECK: cmp
74; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]75; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]76
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]77; CHECK-THUMB-LABEL: test3:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]78; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]79; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]80; CHECK-THUMB-LE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
81; CHECK-THUMB-LE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
82; CHECK-THUMB-BE-DAG: and.w [[REG4:[a-z0-9]+]], [[REG2]]
83; CHECK-THUMB-BE-DAG: and.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]84; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
85; CHECK-THUMB: cmp
86; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]87; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]88
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]89 %r = atomicrmw and i64* %ptr, i64 %val seq_cst
90 ret i64 %r
91}
92
93define i64 @test4(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]94; CHECK-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]95; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]96; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]97; CHECK-LE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
98; CHECK-LE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
99; CHECK-BE-DAG: orr [[REG4:(r[0-9]?[13579])]], [[REG2]]
100; CHECK-BE-DAG: orr [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]101; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]102; CHECK: cmp
103; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]104; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]105
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]106; CHECK-THUMB-LABEL: test4:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]107; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]108; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]109; CHECK-THUMB-LE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
110; CHECK-THUMB-LE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
111; CHECK-THUMB-BE-DAG: orr.w [[REG4:[a-z0-9]+]], [[REG2]]
112; CHECK-THUMB-BE-DAG: orr.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]113; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
114; CHECK-THUMB: cmp
115; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]116; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]117
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]118 %r = atomicrmw or i64* %ptr, i64 %val seq_cst
119 ret i64 %r
120}
121
122define i64 @test5(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]123; CHECK-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]124; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]125; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]126; CHECK-LE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
127; CHECK-LE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
128; CHECK-BE-DAG: eor [[REG4:(r[0-9]?[13579])]], [[REG2]]
129; CHECK-BE-DAG: eor [[REG3:(r[0-9]?[02468])]], [[REG1]]
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]130; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]131; CHECK: cmp
132; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]133; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]134
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]135; CHECK-THUMB-LABEL: test5:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]136; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]137; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]138; CHECK-THUMB-LE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
139; CHECK-THUMB-LE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
140; CHECK-THUMB-BE-DAG: eor.w [[REG4:[a-z0-9]+]], [[REG2]]
141; CHECK-THUMB-BE-DAG: eor.w [[REG3:[a-z0-9]+]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]142; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
143; CHECK-THUMB: cmp
144; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]145; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]146
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]147 %r = atomicrmw xor i64* %ptr, i64 %val seq_cst
148 ret i64 %r
149}
150
151define i64 @test6(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]152; CHECK-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]153; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]154; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
155; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]156; CHECK: cmp
157; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]158; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]159
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]160; CHECK-THUMB-LABEL: test6:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]161; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]162; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
163; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
164; CHECK-THUMB: cmp
165; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]166; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]167
Eli Friedmanc3f9c4a2011-08-31 00:31:29 +0000[diff] [blame]168 %r = atomicrmw xchg i64* %ptr, i64 %val seq_cst
169 ret i64 %r
Eli Friedman2c7bb522011-08-31 00:41:05 +0000[diff] [blame]170}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]171
172define i64 @test7(i64* %ptr, i64 %val1, i64 %val2) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]173; CHECK-LABEL: test7:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]174; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]175; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]176; CHECK-LE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG1]], r1
177; CHECK-LE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG2]], r2
178; CHECK-BE-DAG: eor [[MISMATCH_LO:r[0-9]+]], [[REG2]], r2
179; CHECK-BE-DAG: eor [[MISMATCH_HI:r[0-9]+]], [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]180; CHECK: orrs {{r[0-9]+}}, [[MISMATCH_LO]], [[MISMATCH_HI]]
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]181; CHECK: bne
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]182; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]183; CHECK: cmp
184; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]185; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]186
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]187; CHECK-THUMB-LABEL: test7:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]188; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]189; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]190; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG1]], r2
191; CHECK-THUMB-LE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG2]], r3
Tim Northoverb4ddc082014-05-30 10:09:59 +0000[diff] [blame]192; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_HI:[a-z0-9]+]], [[REG1]], r2
193; CHECK-THUMB-BE-DAG: eor.w [[MISMATCH_LO:[a-z0-9]+]], [[REG2]], r3
194; CHECK-THUMB-LE: orrs [[MISMATCH_HI]], [[MISMATCH_LO]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]195; CHECK-THUMB: bne
196; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
197; CHECK-THUMB: cmp
198; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]199; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]200
Tim Northover420a2162014-06-13 14:24:07 +0000[diff] [blame^]201 %pair = cmpxchg i64* %ptr, i64 %val1, i64 %val2 seq_cst seq_cst
202 %r = extractvalue { i64, i1 } %pair, 0
Eli Friedman1ccecbb2011-08-31 17:52:22 +0000[diff] [blame]203 ret i64 %r
204}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]205
Amara Emersonb4ad2f32013-09-26 12:22:36 +0000[diff] [blame]206; Compiles down to a single ldrexd
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]207define i64 @test8(i64* %ptr) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]208; CHECK-LABEL: test8:
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]209; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]210; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]211
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]212; CHECK-THUMB-LABEL: test8:
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]213; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]214; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]215
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]216 %r = load atomic i64* %ptr seq_cst, align 8
217 ret i64 %r
218}
219
220; Compiles down to atomicrmw xchg; there really isn't any more efficient
221; way to write it.
222define void @test9(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]223; CHECK-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]224; CHECK: dmb {{ish$}}
Weiming Zhao8f56f882012-11-16 21:55:34 +0000[diff] [blame]225; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
226; CHECK: strexd {{[a-z0-9]+}}, {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]227; CHECK: cmp
228; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]229; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]230
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]231; CHECK-THUMB-LABEL: test9:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]232; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]233; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
234; CHECK-THUMB: strexd {{[a-z0-9]+}}, {{[a-z0-9]+}}, {{[a-z0-9]+}}
235; CHECK-THUMB: cmp
236; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]237; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]238
Eli Friedman7c3bded2011-08-31 18:26:09 +0000[diff] [blame]239 store atomic i64 %val, i64* %ptr seq_cst, align 8
240 ret void
241}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]242
243define i64 @test10(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]244; CHECK-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]245; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]246; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]247; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
248; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
249; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]250; CHECK-LE: cmp [[REG1]], r1
251; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]252; CHECK: movwls [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]253; CHECK-LE: cmp [[REG2]], r2
254; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]255; CHECK: movwle [[CARRY_HI]], #1
256; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
257; CHECK: cmp [[CARRY_HI]], #0
258; CHECK: movne [[OUT_HI]], [[REG2]]
259; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
260; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]261; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
262; CHECK: cmp
263; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]264; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]265
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]266; CHECK-THUMB-LABEL: test10:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]267; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]268; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]269; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+|lr]], #0
270; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+|lr]], #0
271; CHECK-THUMB-LE: cmp [[REG1]], r2
272; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]273; CHECK-THUMB: movls.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]274; CHECK-THUMB-LE: cmp [[REG2]], r3
275; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]276; CHECK-THUMB: movle [[CARRY_HI]], #1
277; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
278; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
279; CHECK-THUMB: cmp [[CARRY_HI]], #0
280; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
281; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
282; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]283; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
284; CHECK-THUMB: cmp
285; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]286; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]287
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]288 %r = atomicrmw min i64* %ptr, i64 %val seq_cst
289 ret i64 %r
290}
291
292define i64 @test11(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]293; CHECK-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]294; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]295; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]296; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
297; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
298; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]299; CHECK-LE: cmp [[REG1]], r1
300; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]301; CHECK: movwls [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]302; CHECK-LE: cmp [[REG2]], r2
303; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]304; CHECK: movwls [[CARRY_HI]], #1
305; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
306; CHECK: cmp [[CARRY_HI]], #0
307; CHECK: movne [[OUT_HI]], [[REG2]]
308; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
309; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]310; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
311; CHECK: cmp
312; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]313; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]314
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]315; CHECK-THUMB-LABEL: test11:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]316; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]317; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]318; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
319; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]320; CHECK-THUMB-LE: cmp [[REG1]], r2
321; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]322; CHECK-THUMB: movls.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]323; CHECK-THUMB-LE: cmp [[REG2]], r3
324; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]325; CHECK-THUMB: movls [[CARRY_HI]], #1
326; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
327; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
328; CHECK-THUMB: cmp [[CARRY_HI]], #0
329; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
330; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
331; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]332; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
333; CHECK-THUMB: cmp
334; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]335; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]336
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]337 %r = atomicrmw umin i64* %ptr, i64 %val seq_cst
338 ret i64 %r
339}
340
341define i64 @test12(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]342; CHECK-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]343; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]344; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]345; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
346; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
347; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]348; CHECK-LE: cmp [[REG1]], r1
349; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]350; CHECK: movwhi [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]351; CHECK-LE: cmp [[REG2]], r2
352; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]353; CHECK: movwgt [[CARRY_HI]], #1
354; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
355; CHECK: cmp [[CARRY_HI]], #0
356; CHECK: movne [[OUT_HI]], [[REG2]]
357; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
358; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]359; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
360; CHECK: cmp
361; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]362; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]363
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]364; CHECK-THUMB-LABEL: test12:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]365; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]366; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]367; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
368; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]369; CHECK-THUMB-LE: cmp [[REG1]], r2
370; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]371; CHECK-THUMB: movhi.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]372; CHECK-THUMB-LE: cmp [[REG2]], r3
373; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]374; CHECK-THUMB: movgt [[CARRY_HI]], #1
375; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
376; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
377; CHECK-THUMB: cmp [[CARRY_HI]], #0
378; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
379; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
380; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]381; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
382; CHECK-THUMB: cmp
383; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]384; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]385
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]386 %r = atomicrmw max i64* %ptr, i64 %val seq_cst
387 ret i64 %r
388}
389
390define i64 @test13(i64* %ptr, i64 %val) {
Stephen Linf799e3f2013-07-13 20:38:47 +0000[diff] [blame]391; CHECK-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]392; CHECK: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]393; CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], [[REG2:(r[0-9]?[13579])]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]394; CHECK: mov [[CARRY_LO:[a-z0-9]+]], #0
395; CHECK: mov [[CARRY_HI:[a-z0-9]+]], #0
396; CHECK: mov [[OUT_HI:[a-z0-9]+]], r2
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]397; CHECK-LE: cmp [[REG1]], r1
398; CHECK-BE: cmp [[REG2]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]399; CHECK: movwhi [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]400; CHECK-LE: cmp [[REG2]], r2
401; CHECK-BE: cmp [[REG1]], r1
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]402; CHECK: movwhi [[CARRY_HI]], #1
403; CHECK: moveq [[CARRY_HI]], [[CARRY_LO]]
404; CHECK: cmp [[CARRY_HI]], #0
405; CHECK: movne [[OUT_HI]], [[REG2]]
406; CHECK: mov [[OUT_LO:[a-z0-9]+]], r1
407; CHECK: movne [[OUT_LO]], [[REG1]]
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]408; CHECK: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
409; CHECK: cmp
410; CHECK: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]411; CHECK: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]412
Stephen Lind24ab202013-07-14 06:24:09 +0000[diff] [blame]413; CHECK-THUMB-LABEL: test13:
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]414; CHECK-THUMB: dmb {{ish$}}
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]415; CHECK-THUMB: ldrexd [[REG1:[a-z0-9]+]], [[REG2:[a-z0-9]+]]
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]416; CHECK-THUMB: mov.w [[CARRY_LO:[a-z0-9]+]], #0
417; CHECK-THUMB: movs [[CARRY_HI:[a-z0-9]+]], #0
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]418; CHECK-THUMB-LE: cmp [[REG1]], r2
419; CHECK-THUMB-BE: cmp [[REG2]], r3
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]420; CHECK-THUMB: movhi.w [[CARRY_LO]], #1
Christian Pirkerb5728192014-05-08 14:06:24 +0000[diff] [blame]421; CHECK-THUMB-LE: cmp [[REG2]], r3
422; CHECK-THUMB-BE: cmp [[REG1]], r2
Tim Northoverc882eb02014-04-03 11:44:58 +0000[diff] [blame]423; CHECK-THUMB: movhi [[CARRY_HI]], #1
424; CHECK-THUMB: moveq [[CARRY_HI]], [[CARRY_LO]]
425; CHECK-THUMB: mov [[OUT_HI:[a-z0-9]+]], r3
426; CHECK-THUMB: cmp [[CARRY_HI]], #0
427; CHECK-THUMB: mov [[OUT_LO:[a-z0-9]+]], r2
428; CHECK-THUMB: movne [[OUT_HI]], [[REG2]]
429; CHECK-THUMB: movne [[OUT_LO]], [[REG1]]
Tim Northovera0edd3e2013-01-29 09:06:13 +0000[diff] [blame]430; CHECK-THUMB: strexd {{[a-z0-9]+}}, [[REG3]], [[REG4]]
431; CHECK-THUMB: cmp
432; CHECK-THUMB: bne
Tim Northover36b24172013-07-03 09:20:36 +0000[diff] [blame]433; CHECK-THUMB: dmb {{ish$}}
Silviu Baranga93aefa52012-11-29 14:41:25 +0000[diff] [blame]434 %r = atomicrmw umax i64* %ptr, i64 %val seq_cst
435 ret i64 %r
436}
437