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Yi Konga44c4d72014-06-27 21:25:42 +00001/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24#ifndef __ARM_ACLE_H
25#define __ARM_ACLE_H
26
27#ifndef __ARM_ACLE
28#error "ACLE intrinsics support not enabled."
29#endif
30
31#include <stdint.h>
32
Saleem Abdulrasool60df0612014-07-08 05:46:00 +000033#if defined(__cplusplus)
34extern "C" {
35#endif
Yi Kong28d7b022014-07-17 12:45:17 +000036
Yi Kong472e5212014-07-14 15:32:29 +000037/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
Yi Kong28d7b022014-07-17 12:45:17 +000038/* 8.3 Memory barriers */
39#if !defined(_MSC_VER)
40#define __dmb(i) __builtin_arm_dmb(i)
41#define __dsb(i) __builtin_arm_dsb(i)
42#define __isb(i) __builtin_arm_isb(i)
43#endif
44
Yi Kong472e5212014-07-14 15:32:29 +000045/* 8.4 Hints */
Saleem Abdulrasool07257fe2014-07-12 23:27:26 +000046
47#if !defined(_MSC_VER)
48static __inline__ void __attribute__((always_inline, nodebug)) __wfi(void) {
49 __builtin_arm_wfi();
50}
51
52static __inline__ void __attribute__((always_inline, nodebug)) __wfe(void) {
53 __builtin_arm_wfe();
54}
55
56static __inline__ void __attribute__((always_inline, nodebug)) __sev(void) {
57 __builtin_arm_sev();
58}
59
60static __inline__ void __attribute__((always_inline, nodebug)) __sevl(void) {
61 __builtin_arm_sevl();
62}
63
64static __inline__ void __attribute__((always_inline, nodebug)) __yield(void) {
65 __builtin_arm_yield();
66}
67#endif
68
Yi Kong68917462014-08-26 12:48:11 +000069#if __ARM_32BIT_STATE
70#define __dbg(t) __builtin_arm_dbg(t)
71#endif
72
Yi Kong0705e002014-08-26 09:50:54 +000073/* 8.5 Swap */
74static __inline__ uint32_t __attribute__((always_inline, nodebug))
75 __swp(uint32_t x, volatile uint32_t *p) {
76 uint32_t v;
77 do v = __builtin_arm_ldrex(p); while (__builtin_arm_strex(x, p));
78 return v;
79}
80
Yi Kong45a09312014-08-13 23:20:15 +000081/* 8.6 Memory prefetch intrinsics */
82/* 8.6.1 Data prefetch */
83#define __pld(addr) __pldx(0, 0, 0, addr)
84
85#if __ARM_32BIT_STATE
86#define __pldx(access_kind, cache_level, retention_policy, addr) \
87 __builtin_arm_prefetch(addr, access_kind, 1)
88#else
89#define __pldx(access_kind, cache_level, retention_policy, addr) \
90 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
91#endif
92
93/* 8.6.2 Instruction prefetch */
94#define __pli(addr) __plix(0, 0, addr)
95
96#if __ARM_32BIT_STATE
97#define __plix(cache_level, retention_policy, addr) \
98 __builtin_arm_prefetch(addr, 0, 0)
99#else
100#define __plix(cache_level, retention_policy, addr) \
101 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
102#endif
103
Yi Kong472e5212014-07-14 15:32:29 +0000104/* 8.7 NOP */
105static __inline__ void __attribute__((always_inline, nodebug)) __nop(void) {
106 __builtin_arm_nop();
107}
108
Yi Kong4e00ce72014-07-12 22:48:13 +0000109/* 9 DATA-PROCESSING INTRINSICS */
110/* 9.2 Miscellaneous data-processing intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000111static __inline__ uint32_t __attribute__((always_inline, nodebug))
112 __clz(uint32_t t) {
113 return __builtin_clz(t);
114}
115
116static __inline__ unsigned long __attribute__((always_inline, nodebug))
117 __clzl(unsigned long t) {
118 return __builtin_clzl(t);
119}
120
121static __inline__ uint64_t __attribute__((always_inline, nodebug))
122 __clzll(uint64_t t) {
Yi Konga44c4d72014-06-27 21:25:42 +0000123 return __builtin_clzll(t);
Yi Konga44c4d72014-06-27 21:25:42 +0000124}
125
126static __inline__ uint32_t __attribute__((always_inline, nodebug))
127 __rev(uint32_t t) {
128 return __builtin_bswap32(t);
129}
130
131static __inline__ unsigned long __attribute__((always_inline, nodebug))
132 __revl(unsigned long t) {
133#if __SIZEOF_LONG__ == 4
134 return __builtin_bswap32(t);
135#else
136 return __builtin_bswap64(t);
137#endif
138}
139
140static __inline__ uint64_t __attribute__((always_inline, nodebug))
141 __revll(uint64_t t) {
142 return __builtin_bswap64(t);
143}
144
Yi Konga44c4d72014-06-27 21:25:42 +0000145/*
Yi Kong4e00ce72014-07-12 22:48:13 +0000146 * 9.4 Saturating intrinsics
Yi Konga44c4d72014-06-27 21:25:42 +0000147 *
148 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
149 * intrinsics are implemented and the flag is enabled.
150 */
Yi Kong4e00ce72014-07-12 22:48:13 +0000151/* 9.4.1 Width-specified saturation intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000152#if __ARM_32BIT_STATE
153#define __ssat(x, y) __builtin_arm_ssat(x, y)
154#define __usat(x, y) __builtin_arm_usat(x, y)
Yi Kong4e00ce72014-07-12 22:48:13 +0000155#endif
Yi Konga44c4d72014-06-27 21:25:42 +0000156
Yi Kong4e00ce72014-07-12 22:48:13 +0000157/* 9.4.2 Saturating addition and subtraction intrinsics */
158#if __ARM_32BIT_STATE
Yi Konga44c4d72014-06-27 21:25:42 +0000159static __inline__ int32_t __attribute__((always_inline, nodebug))
160 __qadd(int32_t t, int32_t v) {
161 return __builtin_arm_qadd(t, v);
162}
163
164static __inline__ int32_t __attribute__((always_inline, nodebug))
165 __qsub(int32_t t, int32_t v) {
166 return __builtin_arm_qsub(t, v);
167}
Renato Golin47843ef2014-07-03 10:14:52 +0000168
169static __inline__ int32_t __attribute__((always_inline, nodebug))
170__qdbl(int32_t t) {
171 return __builtin_arm_qadd(t, t);
172}
Yi Konga44c4d72014-06-27 21:25:42 +0000173#endif
174
Yi Kong4e00ce72014-07-12 22:48:13 +0000175/* 9.7 CRC32 intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000176#if __ARM_FEATURE_CRC32
177static __inline__ uint32_t __attribute__((always_inline, nodebug))
178 __crc32b(uint32_t a, uint8_t b) {
179 return __builtin_arm_crc32b(a, b);
180}
181
182static __inline__ uint32_t __attribute__((always_inline, nodebug))
183 __crc32h(uint32_t a, uint16_t b) {
184 return __builtin_arm_crc32h(a, b);
185}
186
187static __inline__ uint32_t __attribute__((always_inline, nodebug))
188 __crc32w(uint32_t a, uint32_t b) {
189 return __builtin_arm_crc32w(a, b);
190}
191
192static __inline__ uint32_t __attribute__((always_inline, nodebug))
193 __crc32d(uint32_t a, uint64_t b) {
194 return __builtin_arm_crc32d(a, b);
195}
196
197static __inline__ uint32_t __attribute__((always_inline, nodebug))
198 __crc32cb(uint32_t a, uint8_t b) {
199 return __builtin_arm_crc32cb(a, b);
200}
201
202static __inline__ uint32_t __attribute__((always_inline, nodebug))
203 __crc32ch(uint32_t a, uint16_t b) {
204 return __builtin_arm_crc32ch(a, b);
205}
206
207static __inline__ uint32_t __attribute__((always_inline, nodebug))
208 __crc32cw(uint32_t a, uint32_t b) {
209 return __builtin_arm_crc32cw(a, b);
210}
211
212static __inline__ uint32_t __attribute__((always_inline, nodebug))
213 __crc32cd(uint32_t a, uint64_t b) {
214 return __builtin_arm_crc32cd(a, b);
215}
216#endif
217
Saleem Abdulrasool60df0612014-07-08 05:46:00 +0000218#if defined(__cplusplus)
219}
220#endif
221
Yi Konga44c4d72014-06-27 21:25:42 +0000222#endif /* __ARM_ACLE_H */