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Yi Konga44c4d72014-06-27 21:25:42 +00001/*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24#ifndef __ARM_ACLE_H
25#define __ARM_ACLE_H
26
27#ifndef __ARM_ACLE
28#error "ACLE intrinsics support not enabled."
29#endif
30
31#include <stdint.h>
32
Saleem Abdulrasool60df0612014-07-08 05:46:00 +000033#if defined(__cplusplus)
34extern "C" {
35#endif
Yi Kong28d7b022014-07-17 12:45:17 +000036
Yi Kong472e5212014-07-14 15:32:29 +000037/* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
Yi Kong28d7b022014-07-17 12:45:17 +000038/* 8.3 Memory barriers */
39#if !defined(_MSC_VER)
40#define __dmb(i) __builtin_arm_dmb(i)
41#define __dsb(i) __builtin_arm_dsb(i)
42#define __isb(i) __builtin_arm_isb(i)
43#endif
44
Yi Kong472e5212014-07-14 15:32:29 +000045/* 8.4 Hints */
Saleem Abdulrasool07257fe2014-07-12 23:27:26 +000046
47#if !defined(_MSC_VER)
48static __inline__ void __attribute__((always_inline, nodebug)) __wfi(void) {
49 __builtin_arm_wfi();
50}
51
52static __inline__ void __attribute__((always_inline, nodebug)) __wfe(void) {
53 __builtin_arm_wfe();
54}
55
56static __inline__ void __attribute__((always_inline, nodebug)) __sev(void) {
57 __builtin_arm_sev();
58}
59
60static __inline__ void __attribute__((always_inline, nodebug)) __sevl(void) {
61 __builtin_arm_sevl();
62}
63
64static __inline__ void __attribute__((always_inline, nodebug)) __yield(void) {
65 __builtin_arm_yield();
66}
67#endif
68
Yi Kong68917462014-08-26 12:48:11 +000069#if __ARM_32BIT_STATE
70#define __dbg(t) __builtin_arm_dbg(t)
71#endif
72
Yi Kong0705e002014-08-26 09:50:54 +000073/* 8.5 Swap */
74static __inline__ uint32_t __attribute__((always_inline, nodebug))
75 __swp(uint32_t x, volatile uint32_t *p) {
76 uint32_t v;
77 do v = __builtin_arm_ldrex(p); while (__builtin_arm_strex(x, p));
78 return v;
79}
80
Yi Kong45a09312014-08-13 23:20:15 +000081/* 8.6 Memory prefetch intrinsics */
82/* 8.6.1 Data prefetch */
83#define __pld(addr) __pldx(0, 0, 0, addr)
84
85#if __ARM_32BIT_STATE
86#define __pldx(access_kind, cache_level, retention_policy, addr) \
87 __builtin_arm_prefetch(addr, access_kind, 1)
88#else
89#define __pldx(access_kind, cache_level, retention_policy, addr) \
90 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
91#endif
92
93/* 8.6.2 Instruction prefetch */
94#define __pli(addr) __plix(0, 0, addr)
95
96#if __ARM_32BIT_STATE
97#define __plix(cache_level, retention_policy, addr) \
98 __builtin_arm_prefetch(addr, 0, 0)
99#else
100#define __plix(cache_level, retention_policy, addr) \
101 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
102#endif
103
Yi Kong472e5212014-07-14 15:32:29 +0000104/* 8.7 NOP */
105static __inline__ void __attribute__((always_inline, nodebug)) __nop(void) {
106 __builtin_arm_nop();
107}
108
Yi Kong4e00ce72014-07-12 22:48:13 +0000109/* 9 DATA-PROCESSING INTRINSICS */
110/* 9.2 Miscellaneous data-processing intrinsics */
Yi Kong623393f2014-08-28 09:44:07 +0000111/* ROR */
112static __inline__ uint32_t __attribute__((always_inline, nodebug))
113 __ror(uint32_t x, uint32_t y) {
114 if (y == 0) return y;
115 if (y >= 32) y %= 32;
116 return (x >> y) | (x << (32 - y));
117}
118
119static __inline__ uint64_t __attribute__((always_inline, nodebug))
120 __rorll(uint64_t x, uint32_t y) {
121 if (y == 0) return y;
122 if (y >= 64) y %= 64;
123 return (x >> y) | (x << (64 - y));
124}
125
126static __inline__ unsigned long __attribute__((always_inline, nodebug))
127 __rorl(unsigned long x, uint32_t y) {
128#if __SIZEOF_LONG__ == 4
129 return __ror(x, y);
130#else
131 return __rorll(x, y);
132#endif
133}
134
135
136/* CLZ */
Yi Konga44c4d72014-06-27 21:25:42 +0000137static __inline__ uint32_t __attribute__((always_inline, nodebug))
138 __clz(uint32_t t) {
139 return __builtin_clz(t);
140}
141
142static __inline__ unsigned long __attribute__((always_inline, nodebug))
143 __clzl(unsigned long t) {
144 return __builtin_clzl(t);
145}
146
147static __inline__ uint64_t __attribute__((always_inline, nodebug))
148 __clzll(uint64_t t) {
Yi Konga44c4d72014-06-27 21:25:42 +0000149 return __builtin_clzll(t);
Yi Konga44c4d72014-06-27 21:25:42 +0000150}
151
Yi Kong623393f2014-08-28 09:44:07 +0000152/* REV */
Yi Konga44c4d72014-06-27 21:25:42 +0000153static __inline__ uint32_t __attribute__((always_inline, nodebug))
154 __rev(uint32_t t) {
155 return __builtin_bswap32(t);
156}
157
158static __inline__ unsigned long __attribute__((always_inline, nodebug))
159 __revl(unsigned long t) {
160#if __SIZEOF_LONG__ == 4
161 return __builtin_bswap32(t);
162#else
163 return __builtin_bswap64(t);
164#endif
165}
166
167static __inline__ uint64_t __attribute__((always_inline, nodebug))
168 __revll(uint64_t t) {
169 return __builtin_bswap64(t);
170}
171
Yi Kong623393f2014-08-28 09:44:07 +0000172/* REV16 */
173static __inline__ uint32_t __attribute__((always_inline, nodebug))
174 __rev16(uint32_t t) {
175 return __ror(__rev(t), 16);
176}
177
178static __inline__ unsigned long __attribute__((always_inline, nodebug))
179 __rev16l(unsigned long t) {
180 return __rorl(__revl(t), sizeof(long) / 2);
181}
182
183static __inline__ uint64_t __attribute__((always_inline, nodebug))
184 __rev16ll(uint64_t t) {
185 return __rorll(__revll(t), 32);
186}
187
188/* REVSH */
189static __inline__ int16_t __attribute__((always_inline, nodebug))
190 __revsh(int16_t t) {
191 return __builtin_bswap16(t);
192}
193
194/* RBIT */
195static __inline__ uint32_t __attribute__((always_inline, nodebug))
196 __rbit(uint32_t t) {
197 return __builtin_arm_rbit(t);
198}
199
200static __inline__ uint64_t __attribute__((always_inline, nodebug))
201 __rbitll(uint64_t t) {
202#if __ARM_32BIT_STATE
203 return (((uint64_t) __builtin_arm_rbit(t)) << 32) |
204 __builtin_arm_rbit(t >> 32);
205#else
206 return __builtin_arm_rbit64(t);
207#endif
208}
209
210static __inline__ unsigned long __attribute__((always_inline, nodebug))
211 __rbitl(unsigned long t) {
212#if __SIZEOF_LONG__ == 4
213 return __rbit(t);
214#else
215 return __rbitll(t);
216#endif
217}
218
Yi Konga44c4d72014-06-27 21:25:42 +0000219/*
Yi Kong4e00ce72014-07-12 22:48:13 +0000220 * 9.4 Saturating intrinsics
Yi Konga44c4d72014-06-27 21:25:42 +0000221 *
222 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
223 * intrinsics are implemented and the flag is enabled.
224 */
Yi Kong4e00ce72014-07-12 22:48:13 +0000225/* 9.4.1 Width-specified saturation intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000226#if __ARM_32BIT_STATE
227#define __ssat(x, y) __builtin_arm_ssat(x, y)
228#define __usat(x, y) __builtin_arm_usat(x, y)
Yi Kong4e00ce72014-07-12 22:48:13 +0000229#endif
Yi Konga44c4d72014-06-27 21:25:42 +0000230
Yi Kong4e00ce72014-07-12 22:48:13 +0000231/* 9.4.2 Saturating addition and subtraction intrinsics */
232#if __ARM_32BIT_STATE
Yi Konga44c4d72014-06-27 21:25:42 +0000233static __inline__ int32_t __attribute__((always_inline, nodebug))
234 __qadd(int32_t t, int32_t v) {
235 return __builtin_arm_qadd(t, v);
236}
237
238static __inline__ int32_t __attribute__((always_inline, nodebug))
239 __qsub(int32_t t, int32_t v) {
240 return __builtin_arm_qsub(t, v);
241}
Renato Golin47843ef2014-07-03 10:14:52 +0000242
243static __inline__ int32_t __attribute__((always_inline, nodebug))
244__qdbl(int32_t t) {
245 return __builtin_arm_qadd(t, t);
246}
Yi Konga44c4d72014-06-27 21:25:42 +0000247#endif
248
Yi Kong4e00ce72014-07-12 22:48:13 +0000249/* 9.7 CRC32 intrinsics */
Yi Konga44c4d72014-06-27 21:25:42 +0000250#if __ARM_FEATURE_CRC32
251static __inline__ uint32_t __attribute__((always_inline, nodebug))
252 __crc32b(uint32_t a, uint8_t b) {
253 return __builtin_arm_crc32b(a, b);
254}
255
256static __inline__ uint32_t __attribute__((always_inline, nodebug))
257 __crc32h(uint32_t a, uint16_t b) {
258 return __builtin_arm_crc32h(a, b);
259}
260
261static __inline__ uint32_t __attribute__((always_inline, nodebug))
262 __crc32w(uint32_t a, uint32_t b) {
263 return __builtin_arm_crc32w(a, b);
264}
265
266static __inline__ uint32_t __attribute__((always_inline, nodebug))
267 __crc32d(uint32_t a, uint64_t b) {
268 return __builtin_arm_crc32d(a, b);
269}
270
271static __inline__ uint32_t __attribute__((always_inline, nodebug))
272 __crc32cb(uint32_t a, uint8_t b) {
273 return __builtin_arm_crc32cb(a, b);
274}
275
276static __inline__ uint32_t __attribute__((always_inline, nodebug))
277 __crc32ch(uint32_t a, uint16_t b) {
278 return __builtin_arm_crc32ch(a, b);
279}
280
281static __inline__ uint32_t __attribute__((always_inline, nodebug))
282 __crc32cw(uint32_t a, uint32_t b) {
283 return __builtin_arm_crc32cw(a, b);
284}
285
286static __inline__ uint32_t __attribute__((always_inline, nodebug))
287 __crc32cd(uint32_t a, uint64_t b) {
288 return __builtin_arm_crc32cd(a, b);
289}
290#endif
291
Saleem Abdulrasool60df0612014-07-08 05:46:00 +0000292#if defined(__cplusplus)
293}
294#endif
295
Yi Konga44c4d72014-06-27 21:25:42 +0000296#endif /* __ARM_ACLE_H */