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Tom Stellard75aadc22012-12-11 21:25:42 +00001//=====-- AMDGPUSubtarget.h - Define Subtarget for the AMDIL ---*- C++ -*-====//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//==-----------------------------------------------------------------------===//
9//
10/// \file
11/// \brief AMDGPU specific subclass of TargetSubtarget.
12//
13//===----------------------------------------------------------------------===//
14
Benjamin Kramera7c40ef2014-08-13 16:26:38 +000015#ifndef LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
16#define LLVM_LIB_TARGET_R600_AMDGPUSUBTARGET_H
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000017#include "AMDGPU.h"
Eric Christopherac4b69e2014-07-25 22:22:39 +000018#include "AMDGPUFrameLowering.h"
Tom Stellard2e59a452014-06-13 01:32:00 +000019#include "AMDGPUInstrInfo.h"
Eric Christopherac4b69e2014-07-25 22:22:39 +000020#include "AMDGPUIntrinsicInfo.h"
21#include "AMDGPUSubtarget.h"
22#include "R600ISelLowering.h"
23#include "llvm/IR/DataLayout.h"
Tom Stellard75aadc22012-12-11 21:25:42 +000024#include "llvm/ADT/StringExtras.h"
25#include "llvm/ADT/StringRef.h"
26#include "llvm/Target/TargetSubtargetInfo.h"
27
28#define GET_SUBTARGETINFO_HEADER
29#include "AMDGPUGenSubtargetInfo.inc"
30
Tom Stellard75aadc22012-12-11 21:25:42 +000031namespace llvm {
32
33class AMDGPUSubtarget : public AMDGPUGenSubtargetInfo {
Tom Stellard2e59a452014-06-13 01:32:00 +000034
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000035public:
36 enum Generation {
37 R600 = 0,
38 R700,
39 EVERGREEN,
40 NORTHERN_ISLANDS,
Tom Stellard6e1ee472013-10-29 16:37:28 +000041 SOUTHERN_ISLANDS,
42 SEA_ISLANDS
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000043 };
44
Tom Stellard75aadc22012-12-11 21:25:42 +000045private:
Tom Stellard75aadc22012-12-11 21:25:42 +000046 std::string DevName;
47 bool Is64bit;
Tom Stellard75aadc22012-12-11 21:25:42 +000048 bool DumpCode;
49 bool R600ALUInst;
Vincent Lejeunec2991642013-04-30 00:13:39 +000050 bool HasVertexCache;
Vincent Lejeunef9f4e1e2013-05-17 16:49:55 +000051 short TexVTXClauseSize;
Matt Arsenaultd782d052014-06-27 17:57:00 +000052 Generation Gen;
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000053 bool FP64;
Matt Arsenaultf171cf22014-07-14 23:40:49 +000054 bool FP64Denormals;
55 bool FP32Denormals;
Tom Stellarda6c6e1b2013-06-07 20:37:48 +000056 bool CaymanISA;
Matt Arsenault3f981402014-09-15 15:41:53 +000057 bool FlatAddressSpace;
Tom Stellarded0ceec2013-10-10 17:11:12 +000058 bool EnableIRStructurizer;
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +000059 bool EnablePromoteAlloca;
Tom Stellard783893a2013-11-18 19:43:33 +000060 bool EnableIfCvt;
Matt Arsenault41033282014-10-10 22:01:59 +000061 bool EnableLoadStoreOpt;
Tom Stellard8c347b02014-01-22 21:55:40 +000062 unsigned WavefrontSize;
Tom Stellard348273d2014-01-23 16:18:02 +000063 bool CFALUBug;
Tom Stellard880a80a2014-06-17 16:53:14 +000064 int LocalMemorySize;
Tom Stellard75aadc22012-12-11 21:25:42 +000065
Eric Christopherac4b69e2014-07-25 22:22:39 +000066 const DataLayout DL;
67 AMDGPUFrameLowering FrameLowering;
Eric Christopherac4b69e2014-07-25 22:22:39 +000068 std::unique_ptr<AMDGPUTargetLowering> TLInfo;
69 std::unique_ptr<AMDGPUInstrInfo> InstrInfo;
Tom Stellard75aadc22012-12-11 21:25:42 +000070 InstrItineraryData InstrItins;
71
72public:
Eric Christopherac4b69e2014-07-25 22:22:39 +000073 AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS, TargetMachine &TM);
74 AMDGPUSubtarget &initializeSubtargetDependencies(StringRef GPU, StringRef FS);
Tom Stellard75aadc22012-12-11 21:25:42 +000075
Eric Christopherd9134482014-08-04 21:25:23 +000076 const AMDGPUFrameLowering *getFrameLowering() const override {
77 return &FrameLowering;
78 }
79 const AMDGPUInstrInfo *getInstrInfo() const override {
80 return InstrInfo.get();
81 }
82 const AMDGPURegisterInfo *getRegisterInfo() const override {
Eric Christopherac4b69e2014-07-25 22:22:39 +000083 return &InstrInfo->getRegisterInfo();
Tom Stellard2e59a452014-06-13 01:32:00 +000084 }
Eric Christopherd9134482014-08-04 21:25:23 +000085 AMDGPUTargetLowering *getTargetLowering() const override {
86 return TLInfo.get();
87 }
88 const DataLayout *getDataLayout() const override { return &DL; }
89 const InstrItineraryData *getInstrItineraryData() const override {
90 return &InstrItins;
91 }
Matt Arsenaultd782d052014-06-27 17:57:00 +000092
Craig Topperee7b0f32014-04-30 05:53:27 +000093 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
Tom Stellard75aadc22012-12-11 21:25:42 +000094
Matt Arsenaultd782d052014-06-27 17:57:00 +000095 bool is64bit() const {
96 return Is64bit;
97 }
98
99 bool hasVertexCache() const {
100 return HasVertexCache;
101 }
102
103 short getTexVTXClauseSize() const {
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +0000104 return TexVTXClauseSize;
Matt Arsenaultd782d052014-06-27 17:57:00 +0000105 }
106
107 Generation getGeneration() const {
108 return Gen;
109 }
110
111 bool hasHWFP64() const {
112 return FP64;
113 }
114
115 bool hasCaymanISA() const {
116 return CaymanISA;
117 }
Matt Arsenaultfae02982014-03-17 18:58:11 +0000118
Matt Arsenaultf171cf22014-07-14 23:40:49 +0000119 bool hasFP32Denormals() const {
120 return FP32Denormals;
121 }
122
123 bool hasFP64Denormals() const {
124 return FP64Denormals;
125 }
126
Matt Arsenault3f981402014-09-15 15:41:53 +0000127 bool hasFlatAddressSpace() const {
128 return FlatAddressSpace;
129 }
130
Matt Arsenaultfae02982014-03-17 18:58:11 +0000131 bool hasBFE() const {
132 return (getGeneration() >= EVERGREEN);
133 }
134
Matt Arsenault6e439652014-06-10 19:00:20 +0000135 bool hasBFI() const {
136 return (getGeneration() >= EVERGREEN);
137 }
138
Matt Arsenaultfae02982014-03-17 18:58:11 +0000139 bool hasBFM() const {
140 return hasBFE();
141 }
142
Matt Arsenault60425062014-06-10 19:18:28 +0000143 bool hasBCNT(unsigned Size) const {
144 if (Size == 32)
145 return (getGeneration() >= EVERGREEN);
146
Matt Arsenault3dd43fc2014-07-18 06:07:13 +0000147 if (Size == 64)
148 return (getGeneration() >= SOUTHERN_ISLANDS);
149
150 return false;
Matt Arsenault60425062014-06-10 19:18:28 +0000151 }
152
Tom Stellard50122a52014-04-07 19:45:41 +0000153 bool hasMulU24() const {
154 return (getGeneration() >= EVERGREEN);
155 }
156
157 bool hasMulI24() const {
158 return (getGeneration() >= SOUTHERN_ISLANDS ||
159 hasCaymanISA());
160 }
161
Jan Vesely6ddb8dd2014-07-15 15:51:09 +0000162 bool hasFFBL() const {
163 return (getGeneration() >= EVERGREEN);
164 }
165
166 bool hasFFBH() const {
167 return (getGeneration() >= EVERGREEN);
168 }
169
Matt Arsenaultd782d052014-06-27 17:57:00 +0000170 bool IsIRStructurizerEnabled() const {
171 return EnableIRStructurizer;
172 }
173
Matt Arsenaultd9a23ab2014-07-13 02:08:26 +0000174 bool isPromoteAllocaEnabled() const {
175 return EnablePromoteAlloca;
176 }
177
Matt Arsenaultd782d052014-06-27 17:57:00 +0000178 bool isIfCvtEnabled() const {
179 return EnableIfCvt;
180 }
181
Matt Arsenault41033282014-10-10 22:01:59 +0000182 bool loadStoreOptEnabled() const {
183 return EnableLoadStoreOpt;
184 }
185
Matt Arsenaultd782d052014-06-27 17:57:00 +0000186 unsigned getWavefrontSize() const {
187 return WavefrontSize;
188 }
189
Tom Stellarda40f9712014-01-22 21:55:43 +0000190 unsigned getStackEntrySize() const;
Matt Arsenaultd782d052014-06-27 17:57:00 +0000191
192 bool hasCFAluBug() const {
193 assert(getGeneration() <= NORTHERN_ISLANDS);
194 return CFALUBug;
195 }
196
197 int getLocalMemorySize() const {
198 return LocalMemorySize;
199 }
Tom Stellard75aadc22012-12-11 21:25:42 +0000200
Craig Topper5656db42014-04-29 07:57:24 +0000201 bool enableMachineScheduler() const override {
Andrew Trick978674b2013-09-20 05:14:41 +0000202 return getGeneration() <= NORTHERN_ISLANDS;
203 }
204
Tom Stellard75aadc22012-12-11 21:25:42 +0000205 // Helper functions to simplify if statements
Matt Arsenaultd782d052014-06-27 17:57:00 +0000206 bool isTargetELF() const {
207 return false;
208 }
Tom Stellard75aadc22012-12-11 21:25:42 +0000209
Matt Arsenaultd782d052014-06-27 17:57:00 +0000210 StringRef getDeviceName() const {
211 return DevName;
212 }
213
214 bool dumpCode() const {
215 return DumpCode;
216 }
217 bool r600ALUEncoding() const {
218 return R600ALUInst;
219 }
Tom Stellard75aadc22012-12-11 21:25:42 +0000220};
221
222} // End namespace llvm
223
Benjamin Kramera7c40ef2014-08-13 16:26:38 +0000224#endif