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Adrian Prantlb16d9eb2015-01-12 22:19:22 +00001//===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file contains support for writing dwarf compile unit.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
16
Adrian Prantl092d9482015-01-13 23:39:11 +000017#include "llvm/IR/DebugInfo.h"
Chandler Carruthd9903882015-01-14 11:23:27 +000018#include "llvm/Support/DataTypes.h"
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000019
20namespace llvm {
21
Adrian Prantla4c30d62015-01-12 23:36:56 +000022class AsmPrinter;
Adrian Prantl66f25952015-01-13 00:04:06 +000023class ByteStreamer;
Adrian Prantla4c30d62015-01-12 23:36:56 +000024class TargetRegisterInfo;
Adrian Prantl658676c2015-01-14 01:01:22 +000025class DwarfUnit;
26class DIELoc;
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000027
Adrian Prantl54286bd2016-11-02 16:12:20 +000028/// Holds a DIExpression and keeps track of how many operands have been consumed
29/// so far.
30class DIExpressionCursor {
31 DIExpression::expr_op_iterator Start, End;
32public:
33 DIExpressionCursor(const DIExpression *Expr) {
34 if (!Expr) {
35 assert(Start == End);
36 return;
37 }
38 Start = Expr->expr_op_begin();
39 End = Expr->expr_op_end();
40 }
41
Adrian Prantl8fafb8d2016-12-09 20:43:40 +000042 DIExpressionCursor(ArrayRef<uint64_t> Expr)
43 : Start(Expr.begin()), End(Expr.end()) {}
44
Adrian Prantl54286bd2016-11-02 16:12:20 +000045 /// Consume one operation.
46 Optional<DIExpression::ExprOperand> take() {
47 if (Start == End)
48 return None;
49 return *(Start++);
50 }
51
52 /// Consume N operations.
53 void consume(unsigned N) { std::advance(Start, N); }
54
55 /// Return the current operation.
56 Optional<DIExpression::ExprOperand> peek() const {
57 if (Start == End)
58 return None;
59 return *(Start);
60 }
61
62 /// Return the next operation.
63 Optional<DIExpression::ExprOperand> peekNext() const {
64 if (Start == End)
65 return None;
66
67 auto Next = Start.getNext();
68 if (Next == End)
69 return None;
70
71 return *Next;
72 }
Adrian Prantlf148d692016-11-02 16:20:37 +000073 /// Determine whether there are any operations left in this expression.
Adrian Prantl54286bd2016-11-02 16:12:20 +000074 operator bool() const { return Start != End; }
Adrian Prantl5542da42016-12-22 06:10:41 +000075
76 /// Retrieve the fragment information, if any.
77 Optional<DIExpression::FragmentInfo> getFragmentInfo() const {
78 return DIExpression::getFragmentInfo(Start, End);
79 }
Adrian Prantl54286bd2016-11-02 16:12:20 +000080};
81
Adrian Prantlb16d9eb2015-01-12 22:19:22 +000082/// Base class containing the logic for constructing DWARF expressions
83/// independently of whether they are emitted into a DIE or into a .debug_loc
84/// entry.
85class DwarfExpression {
Adrian Prantl00dbc2a2015-01-12 22:19:26 +000086protected:
Adrian Prantl80e188d2017-03-22 01:15:57 +000087 /// Holds information about all subregisters comprising a register location.
88 struct Register {
89 int DwarfRegNo;
90 unsigned Size;
91 const char *Comment;
92 };
93
94 /// The register location, if any.
95 SmallVector<Register, 2> DwarfRegs;
96
Adrian Prantl8fafb8d2016-12-09 20:43:40 +000097 /// Current Fragment Offset in Bits.
98 uint64_t OffsetInBits = 0;
Adrian Prantl36213092017-03-16 17:42:47 +000099 unsigned DwarfVersion;
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000100
101 /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
102 unsigned SubRegisterSizeInBits = 0;
103 unsigned SubRegisterOffsetInBits = 0;
104
105 /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
106 /// to represent a subregister.
107 void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
108 SubRegisterSizeInBits = SizeInBits;
109 SubRegisterOffsetInBits = OffsetInBits;
110 }
Adrian Prantla4c30d62015-01-12 23:36:56 +0000111
Adrian Prantl981f03e2017-03-16 17:14:56 +0000112 /// Add masking operations to stencil out a subregister.
113 void maskSubRegister();
114
Adrian Prantl172ab662015-01-13 23:11:07 +0000115 /// Output a dwarf operand and an optional assembler comment.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000116 virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000117 /// Emit a raw signed value.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000118 virtual void emitSigned(int64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000119 /// Emit a raw unsigned value.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000120 virtual void emitUnsigned(uint64_t Value) = 0;
Adrian Prantl172ab662015-01-13 23:11:07 +0000121 /// Return whether the given machine register is the frame register in the
122 /// current function.
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000123 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0;
Adrian Prantl00dbc2a2015-01-12 22:19:26 +0000124
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000125 /// Emit a dwarf register operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000126 void addReg(int DwarfReg, const char *Comment = nullptr);
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000127 /// Emit an (double-)indirect dwarf register operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000128 void addRegIndirect(int DwarfReg, int Offset);
Adrian Prantl80e188d2017-03-22 01:15:57 +0000129 /// Emit DW_OP_fbreg <Offset>.
130 void addFBReg(int Offset);
Adrian Prantl956484b2017-03-20 21:35:09 +0000131
132 /// Emit a partial DWARF register operation.
133 ///
134 /// \param MachineReg The register number.
135 /// \param MaxSize If the register must be composed from
136 /// sub-registers this is an upper bound
137 /// for how many bits the emitted DW_OP_piece
138 /// may cover.
139 ///
140 /// If size and offset is zero an operation for the entire register is
141 /// emitted: Some targets do not provide a DWARF register number for every
142 /// register. If this is the case, this function will attempt to emit a DWARF
143 /// register by emitting a fragment of a super-register or by piecing together
144 /// multiple subregisters that alias the register.
145 ///
146 /// \return false if no DWARF register exists for MachineReg.
147 bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
148 unsigned MaxSize = ~1U);
149
150
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000151 /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
152 /// \param OffsetInBits This is an optional offset into the location that
153 /// is at the top of the DWARF stack.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000154 void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
Adrian Prantl941fa752016-12-05 18:04:47 +0000155
Adrian Prantl981f03e2017-03-16 17:14:56 +0000156 /// Emit a shift-right dwarf operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000157 void addShr(unsigned ShiftBy);
Adrian Prantl981f03e2017-03-16 17:14:56 +0000158 /// Emit a bitwise and dwarf operation.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000159 void addAnd(unsigned Mask);
Adrian Prantl941fa752016-12-05 18:04:47 +0000160
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000161 /// Emit a DW_OP_stack_value, if supported.
162 ///
Adrian Prantlf148d692016-11-02 16:20:37 +0000163 /// The proper way to describe a constant value is DW_OP_constu <const>,
164 /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available
165 /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
166 /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
167 /// <const> actually describes a value at a constant addess, not a constant
168 /// value. However, in the past there was no better way to describe a
169 /// constant value, so the producers and consumers started to rely on
170 /// heuristics to disambiguate the value vs. location status of the
171 /// expression. See PR21176 for more details.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000172 void addStackValue();
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000173
Adrian Prantl52884b72017-03-20 21:34:19 +0000174public:
175 DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {}
176 virtual ~DwarfExpression() {};
177
178 /// This needs to be called last to commit any pending changes.
179 void finalize();
180
Adrian Prantl66f25952015-01-13 00:04:06 +0000181 /// Emit a signed constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000182 void addSignedConstant(int64_t Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000183 /// Emit an unsigned constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000184 void addUnsignedConstant(uint64_t Value);
Adrian Prantl3e9c8872016-04-08 00:38:37 +0000185 /// Emit an unsigned constant.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000186 void addUnsignedConstant(const APInt &Value);
Adrian Prantl66f25952015-01-13 00:04:06 +0000187
Adrian Prantlf148d692016-11-02 16:20:37 +0000188 /// Emit a machine register location. As an optimization this may also consume
189 /// the prefix of a DwarfExpression if a more efficient representation for
190 /// combining the register location and the first operation exists.
Duncan P. N. Exon Smith60635e32015-04-21 18:44:06 +0000191 ///
Adrian Prantl941fa752016-12-05 18:04:47 +0000192 /// \param FragmentOffsetInBits If this is one fragment out of a fragmented
193 /// location, this is the offset of the
194 /// fragment inside the entire variable.
195 /// \return false if no DWARF register exists
196 /// for MachineReg.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000197 bool addMachineRegExpression(const TargetRegisterInfo &TRI,
Adrian Prantl54286bd2016-11-02 16:12:20 +0000198 DIExpressionCursor &Expr, unsigned MachineReg,
Adrian Prantl941fa752016-12-05 18:04:47 +0000199 unsigned FragmentOffsetInBits = 0);
Adrian Prantl54286bd2016-11-02 16:12:20 +0000200 /// Emit all remaining operations in the DIExpressionCursor.
Adrian Prantl941fa752016-12-05 18:04:47 +0000201 ///
202 /// \param FragmentOffsetInBits If this is one fragment out of multiple
203 /// locations, this is the offset of the
204 /// fragment inside the entire variable.
Adrian Prantla63b8e82017-03-16 17:42:45 +0000205 void addExpression(DIExpressionCursor &&Expr,
Adrian Prantl941fa752016-12-05 18:04:47 +0000206 unsigned FragmentOffsetInBits = 0);
Adrian Prantl8fafb8d2016-12-09 20:43:40 +0000207
208 /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
209 /// the fragment described by \c Expr.
210 void addFragmentOffset(const DIExpression *Expr);
Adrian Prantl092d9482015-01-13 23:39:11 +0000211};
Adrian Prantl66f25952015-01-13 00:04:06 +0000212
213/// DwarfExpression implementation for .debug_loc entries.
214class DebugLocDwarfExpression : public DwarfExpression {
215 ByteStreamer &BS;
216
Adrian Prantla63b8e82017-03-16 17:42:45 +0000217 void emitOp(uint8_t Op, const char *Comment = nullptr) override;
218 void emitSigned(int64_t Value) override;
219 void emitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000220 bool isFrameRegister(const TargetRegisterInfo &TRI,
221 unsigned MachineReg) override;
Adrian Prantl52884b72017-03-20 21:34:19 +0000222public:
223 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS)
224 : DwarfExpression(DwarfVersion), BS(BS) {}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000225};
Adrian Prantl658676c2015-01-14 01:01:22 +0000226
227/// DwarfExpression implementation for singular DW_AT_location.
228class DIEDwarfExpression : public DwarfExpression {
Adrian Prantl92da14b2015-03-02 22:02:33 +0000229const AsmPrinter &AP;
Adrian Prantl658676c2015-01-14 01:01:22 +0000230 DwarfUnit &DU;
231 DIELoc &DIE;
232
Adrian Prantla63b8e82017-03-16 17:42:45 +0000233 void emitOp(uint8_t Op, const char *Comment = nullptr) override;
234 void emitSigned(int64_t Value) override;
235 void emitUnsigned(uint64_t Value) override;
Peter Collingbourne96c9ae62016-05-20 19:35:17 +0000236 bool isFrameRegister(const TargetRegisterInfo &TRI,
237 unsigned MachineReg) override;
Adrian Prantl52884b72017-03-20 21:34:19 +0000238public:
239 DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE);
Adrian Prantlbceaaa92016-12-20 02:09:43 +0000240 DIELoc *finalize() {
241 DwarfExpression::finalize();
242 return &DIE;
243 }
Adrian Prantl658676c2015-01-14 01:01:22 +0000244};
Alexander Kornienkof00654e2015-06-23 09:49:53 +0000245}
Adrian Prantlb16d9eb2015-01-12 22:19:22 +0000246
247#endif