Matt Arsenault | 70b9282 | 2017-11-12 23:53:44 +0000 | [diff] [blame] | 1 | ; RUN: llc -march=amdgcn -mcpu=tahiti -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=SI %s |
| 2 | ; RUN: llc -march=amdgcn -mcpu=fiji -mattr=-flat-for-global -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN -check-prefix=VI %s |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 3 | |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 4 | ; GCN-LABEL: {{^}}br_cc_f16: |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 5 | ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]] |
| 6 | ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]] |
| 7 | |
Stanislav Mekhanoshin | d4ae470 | 2017-09-19 20:54:38 +0000 | [diff] [blame] | 8 | ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]] |
| 9 | ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]] |
| 10 | ; SI: v_cmp_nlt_f32_e32 vcc, v[[A_F32]], v[[B_F32]] |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 11 | ; VI: v_cmp_nlt_f16_e32 vcc, v[[A_F16]], v[[B_F16]] |
| 12 | ; GCN: s_cbranch_vccnz |
| 13 | |
Matt Arsenault | 8c4a352 | 2018-06-26 19:10:00 +0000 | [diff] [blame] | 14 | ; SI: one{{$}} |
| 15 | ; SI: v_cvt_f16_f32_e32 v[[CVT:[0-9]+]], v[[A_F32]] |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 16 | |
Matt Arsenault | 8c4a352 | 2018-06-26 19:10:00 +0000 | [diff] [blame] | 17 | ; SI: two{{$}} |
| 18 | ; SI: v_cvt_f16_f32_e32 v[[CVT]], v[[B_F32]] |
| 19 | |
| 20 | ; SI: one{{$}} |
| 21 | ; SI: buffer_store_short v[[CVT]] |
| 22 | ; SI: s_endpgm |
| 23 | |
| 24 | |
| 25 | |
| 26 | ; VI: one{{$}} |
| 27 | ; VI: buffer_store_short v[[A_F16]] |
| 28 | ; VI: s_endpgm |
| 29 | |
| 30 | ; VI: two{{$}} |
| 31 | ; VI: buffer_store_short v[[B_F16]] |
| 32 | ; VI: s_endpgm |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 33 | define amdgpu_kernel void @br_cc_f16( |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 34 | half addrspace(1)* %r, |
| 35 | half addrspace(1)* %a, |
| 36 | half addrspace(1)* %b) { |
| 37 | entry: |
Matt Arsenault | 8c4a352 | 2018-06-26 19:10:00 +0000 | [diff] [blame] | 38 | %a.val = load volatile half, half addrspace(1)* %a |
| 39 | %b.val = load volatile half, half addrspace(1)* %b |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 40 | %fcmp = fcmp olt half %a.val, %b.val |
| 41 | br i1 %fcmp, label %one, label %two |
| 42 | |
| 43 | one: |
| 44 | store half %a.val, half addrspace(1)* %r |
| 45 | ret void |
| 46 | |
| 47 | two: |
| 48 | store half %b.val, half addrspace(1)* %r |
| 49 | ret void |
| 50 | } |
| 51 | |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 52 | ; GCN-LABEL: {{^}}br_cc_f16_imm_a: |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 53 | ; GCN: buffer_load_ushort v[[B_F16:[0-9]+]] |
| 54 | |
| 55 | ; SI: v_cvt_f32_f16_e32 v[[B_F32:[0-9]+]], v[[B_F16]] |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 56 | ; SI: v_cmp_nlt_f32_e32 vcc, 0.5, v[[B_F32]] |
| 57 | ; SI: s_cbranch_vccnz |
Matt Arsenault | e96d037 | 2016-12-08 20:14:46 +0000 | [diff] [blame] | 58 | |
Matt Arsenault | 4bd7236 | 2016-12-10 00:39:12 +0000 | [diff] [blame] | 59 | ; VI: v_cmp_nlt_f16_e32 vcc, 0.5, v[[B_F16]] |
Matt Arsenault | ad55ee5 | 2016-12-06 01:02:51 +0000 | [diff] [blame] | 60 | ; VI: s_cbranch_vccnz |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 61 | |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 62 | ; GCN: one{{$}} |
Matt Arsenault | 70b9282 | 2017-11-12 23:53:44 +0000 | [diff] [blame] | 63 | ; GCN: v_mov_b32_e32 v[[A_F16:[0-9]+]], 0x380{{0|1}}{{$}} |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 64 | |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 65 | ; SI: buffer_store_short v[[A_F16]] |
| 66 | ; SI: s_endpgm |
| 67 | |
| 68 | |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 69 | ; GCN: two{{$}} |
| 70 | ; SI: v_cvt_f16_f32_e32 v[[B_F16:[0-9]+]], v[[B_F32]] |
Matt Arsenault | ad55ee5 | 2016-12-06 01:02:51 +0000 | [diff] [blame] | 71 | |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 72 | define amdgpu_kernel void @br_cc_f16_imm_a( |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 73 | half addrspace(1)* %r, |
| 74 | half addrspace(1)* %b) { |
| 75 | entry: |
| 76 | %b.val = load half, half addrspace(1)* %b |
| 77 | %fcmp = fcmp olt half 0xH3800, %b.val |
| 78 | br i1 %fcmp, label %one, label %two |
| 79 | |
| 80 | one: |
| 81 | store half 0xH3800, half addrspace(1)* %r |
| 82 | ret void |
| 83 | |
| 84 | two: |
| 85 | store half %b.val, half addrspace(1)* %r |
| 86 | ret void |
| 87 | } |
| 88 | |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 89 | ; GCN-LABEL: {{^}}br_cc_f16_imm_b: |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 90 | ; GCN: buffer_load_ushort v[[A_F16:[0-9]+]] |
| 91 | |
| 92 | ; SI: v_cvt_f32_f16_e32 v[[A_F32:[0-9]+]], v[[A_F16]] |
Matt Arsenault | 0c68739 | 2017-01-30 16:57:41 +0000 | [diff] [blame] | 93 | ; SI: v_cmp_ngt_f32_e32 vcc, 0.5, v[[A_F32]] |
| 94 | |
Matt Arsenault | 4bd7236 | 2016-12-10 00:39:12 +0000 | [diff] [blame] | 95 | ; VI: v_cmp_ngt_f16_e32 vcc, 0.5, v[[A_F16]] |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 96 | ; GCN: s_cbranch_vccnz |
| 97 | |
| 98 | ; GCN: one{{$}} |
| 99 | ; SI: v_cvt_f16_f32_e32 v[[A_F16:[0-9]+]], v[[A_F32]] |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 100 | |
| 101 | ; GCN: two{{$}} |
Matt Arsenault | 70b9282 | 2017-11-12 23:53:44 +0000 | [diff] [blame] | 102 | ; GCN: v_mov_b32_e32 v[[B_F16:[0-9]+]], 0x3800{{$}} |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 103 | ; GCN: buffer_store_short v[[B_F16]] |
| 104 | ; GCN: s_endpgm |
Matt Arsenault | 3dbeefa | 2017-03-21 21:39:51 +0000 | [diff] [blame] | 105 | define amdgpu_kernel void @br_cc_f16_imm_b( |
Konstantin Zhuravlyov | 662e01d | 2016-11-17 03:49:01 +0000 | [diff] [blame] | 106 | half addrspace(1)* %r, |
| 107 | half addrspace(1)* %a) { |
| 108 | entry: |
| 109 | %a.val = load half, half addrspace(1)* %a |
| 110 | %fcmp = fcmp olt half %a.val, 0xH3800 |
| 111 | br i1 %fcmp, label %one, label %two |
| 112 | |
| 113 | one: |
| 114 | store half %a.val, half addrspace(1)* %r |
| 115 | ret void |
| 116 | |
| 117 | two: |
| 118 | store half 0xH3800, half addrspace(1)* %r |
| 119 | ret void |
| 120 | } |