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gerrit-public.fairphone.software / toolchain / llvm-project / b2d24e23cec654746ee38846b1daae05bfa91c4c / . / llvm / lib / Target / AMDGPU / VOPCInstructions.td
blob: f3482a22d5dcd43d81ff3e4cec16e1205ab35252 [file] [log] [blame]
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]1//===-- VOPCInstructions.td - Vector Instruction Defintions ---------------===//
2//
3// The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9
10//===----------------------------------------------------------------------===//
11// Encodings
12//===----------------------------------------------------------------------===//
13
14class VOPCe <bits<8> op> : Enc32 {
15 bits<9> src0;
16 bits<8> src1;
17
18 let Inst{8-0} = src0;
19 let Inst{16-9} = src1;
20 let Inst{24-17} = op;
21 let Inst{31-25} = 0x3e;
22}
23
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]24class VOPC_SDWAe <bits<8> op, VOPProfile P> : VOP_SDWAe <P> {
25 bits<8> src1;
26
27 let Inst{8-0} = 0xf9; // sdwa
28 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0);
29 let Inst{24-17} = op;
30 let Inst{31-25} = 0x3e; // encoding
31
32 // VOPC disallows dst_sel and dst_unused as they have no effect on destination
33 let Inst{42-40} = SDWA.DWORD;
34 let Inst{44-43} = SDWA.UNUSED_PRESERVE;
35}
36
Sam Koltonf7659d712017-05-23 10:08:55 +0000[diff] [blame]37class VOPC_SDWA9e <bits<8> op, VOPProfile P> : VOP_SDWA9Be <P> {
38 bits<9> src1;
39
40 let Inst{8-0} = 0xf9; // sdwa
41 let Inst{16-9} = !if(P.HasSrc1, src1{7-0}, 0);
42 let Inst{24-17} = op;
43 let Inst{31-25} = 0x3e; // encoding
44 let Inst{63} = !if(P.HasSrc1, src1{8}, 0); // src1_sgpr
45}
46
47
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]48//===----------------------------------------------------------------------===//
49// VOPC classes
50//===----------------------------------------------------------------------===//
51
52// VOPC instructions are a special case because for the 32-bit
53// encoding, we want to display the implicit vcc write as if it were
54// an explicit $dst.
55class VOPC_Profile<list<SchedReadWrite> sched, ValueType vt0, ValueType vt1 = vt0> :
56 VOPProfile <[i1, vt0, vt1, untyped]> {
57 let Asm32 = "vcc, $src0, $src1";
58 // The destination for 32-bit encoding is implicit.
59 let HasDst32 = 0;
60 let Outs64 = (outs VOPDstS64:$sdst);
61 list<SchedReadWrite> Schedule = sched;
62}
63
64class VOPC_Pseudo <string opName, VOPC_Profile P, list<dag> pattern=[]> :
65 InstSI<(outs), P.Ins32, "", pattern>,
66 VOP <opName>,
67 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> {
68
69 let isPseudo = 1;
70 let isCodeGenOnly = 1;
71 let UseNamedOperandTable = 1;
72
73 string Mnemonic = opName;
74 string AsmOperands = P.Asm32;
75
76 let Size = 4;
77 let mayLoad = 0;
78 let mayStore = 0;
79 let hasSideEffects = 0;
80
81 let VALU = 1;
82 let VOPC = 1;
83 let Uses = [EXEC];
84 let Defs = [VCC];
85
86 let SubtargetPredicate = isGCN;
87
88 VOPProfile Pfl = P;
89}
90
91class VOPC_Real <VOPC_Pseudo ps, int EncodingFamily> :
92 InstSI <ps.OutOperandList, ps.InOperandList, ps.PseudoInstr # " " # ps.AsmOperands, []>,
93 SIMCInstr <ps.PseudoInstr, EncodingFamily> {
94
95 let isPseudo = 0;
96 let isCodeGenOnly = 0;
97
Sam Koltona6792a32016-12-22 11:30:48 +0000[diff] [blame]98 let Constraints = ps.Constraints;
99 let DisableEncoding = ps.DisableEncoding;
100
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]101 // copy relevant pseudo op flags
102 let SubtargetPredicate = ps.SubtargetPredicate;
103 let AsmMatchConverter = ps.AsmMatchConverter;
104 let Constraints = ps.Constraints;
105 let DisableEncoding = ps.DisableEncoding;
106 let TSFlags = ps.TSFlags;
Dmitry Preobrazhensky03880f82017-03-03 14:31:06 +0000[diff] [blame]107 let UseNamedOperandTable = ps.UseNamedOperandTable;
108 let Uses = ps.Uses;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]109}
110
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]111class VOPC_SDWA_Pseudo <string OpName, VOPProfile P, list<dag> pattern=[]> :
112 VOP_SDWA_Pseudo <OpName, P, pattern> {
113 let AsmMatchConverter = "cvtSdwaVOPC";
114}
115
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]116// This class is used only with VOPC instructions. Use $sdst for out operand
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]117class VOPCInstAlias <VOP3_Pseudo ps, Instruction inst, VOPProfile p = ps.Pfl> :
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]118 InstAlias <ps.OpName#" "#p.Asm32, (inst)>, PredicateControl {
119
120 field bit isCompare;
121 field bit isCommutable;
122
123 let ResultInst =
124 !if (p.HasDst32,
125 !if (!eq(p.NumSrcArgs, 0),
126 // 1 dst, 0 src
127 (inst p.DstRC:$sdst),
128 !if (!eq(p.NumSrcArgs, 1),
129 // 1 dst, 1 src
130 (inst p.DstRC:$sdst, p.Src0RC32:$src0),
131 !if (!eq(p.NumSrcArgs, 2),
132 // 1 dst, 2 src
133 (inst p.DstRC:$sdst, p.Src0RC32:$src0, p.Src1RC32:$src1),
134 // else - unreachable
135 (inst)))),
136 // else
137 !if (!eq(p.NumSrcArgs, 2),
138 // 0 dst, 2 src
139 (inst p.Src0RC32:$src0, p.Src1RC32:$src1),
140 !if (!eq(p.NumSrcArgs, 1),
141 // 0 dst, 1 src
142 (inst p.Src0RC32:$src1),
143 // else
144 // 0 dst, 0 src
145 (inst))));
146
147 let AsmVariantName = AMDGPUAsmVariants.Default;
148 let SubtargetPredicate = AssemblerPredicate;
149}
150
151multiclass VOPC_Pseudos <string opName,
152 VOPC_Profile P,
153 PatLeaf cond = COND_NULL,
154 string revOp = opName,
155 bit DefExec = 0> {
156
157 def _e32 : VOPC_Pseudo <opName, P>,
158 Commutable_REV<revOp#"_e32", !eq(revOp, opName)> {
159 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
160 let SchedRW = P.Schedule;
161 let isConvergent = DefExec;
162 let isCompare = 1;
163 let isCommutable = 1;
164 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]165
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]166 def _e64 : VOP3_Pseudo<opName, P,
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]167 !if(P.HasModifiers,
168 [(set i1:$sdst,
169 (setcc (P.Src0VT (VOP3Mods0 P.Src0VT:$src0, i32:$src0_modifiers,
170 i1:$clamp, i32:$omod)),
171 (P.Src1VT (VOP3Mods P.Src1VT:$src1, i32:$src1_modifiers)),
172 cond))],
173 [(set i1:$sdst, (setcc P.Src0VT:$src0, P.Src1VT:$src1, cond))])>,
174 Commutable_REV<revOp#"_e64", !eq(revOp, opName)> {
175 let Defs = !if(DefExec, [EXEC], []);
176 let SchedRW = P.Schedule;
177 let isCompare = 1;
178 let isCommutable = 1;
179 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]180
Sam Kolton07dbde22017-01-20 10:01:25 +0000[diff] [blame]181 def _sdwa : VOPC_SDWA_Pseudo <opName, P> {
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]182 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
183 let SchedRW = P.Schedule;
184 let isConvergent = DefExec;
185 let isCompare = 1;
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]186 }
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]187}
188
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]189def VOPC_I1_F16_F16 : VOPC_Profile<[Write32Bit], f16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]190def VOPC_I1_F32_F32 : VOPC_Profile<[Write32Bit], f32>;
191def VOPC_I1_F64_F64 : VOPC_Profile<[WriteDoubleAdd], f64>;
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]192def VOPC_I1_I16_I16 : VOPC_Profile<[Write32Bit], i16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]193def VOPC_I1_I32_I32 : VOPC_Profile<[Write32Bit], i32>;
194def VOPC_I1_I64_I64 : VOPC_Profile<[Write64Bit], i64>;
195
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]196multiclass VOPC_F16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
197 VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
198
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]199multiclass VOPC_F32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
200 VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>;
201
202multiclass VOPC_F64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
203 VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>;
204
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]205multiclass VOPC_I16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
206 VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
207
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]208multiclass VOPC_I32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
209 VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>;
210
211multiclass VOPC_I64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
212 VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>;
213
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]214multiclass VOPCX_F16 <string opName, string revOp = opName> :
215 VOPC_Pseudos <opName, VOPC_I1_F16_F16, COND_NULL, revOp, 1>;
216
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]217multiclass VOPCX_F32 <string opName, string revOp = opName> :
218 VOPC_Pseudos <opName, VOPC_I1_F32_F32, COND_NULL, revOp, 1>;
219
220multiclass VOPCX_F64 <string opName, string revOp = opName> :
221 VOPC_Pseudos <opName, VOPC_I1_F64_F64, COND_NULL, revOp, 1>;
222
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]223multiclass VOPCX_I16 <string opName, string revOp = opName> :
224 VOPC_Pseudos <opName, VOPC_I1_I16_I16, COND_NULL, revOp, 1>;
225
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]226multiclass VOPCX_I32 <string opName, string revOp = opName> :
227 VOPC_Pseudos <opName, VOPC_I1_I32_I32, COND_NULL, revOp, 1>;
228
229multiclass VOPCX_I64 <string opName, string revOp = opName> :
230 VOPC_Pseudos <opName, VOPC_I1_I64_I64, COND_NULL, revOp, 1>;
231
232
233//===----------------------------------------------------------------------===//
234// Compare instructions
235//===----------------------------------------------------------------------===//
236
237defm V_CMP_F_F32 : VOPC_F32 <"v_cmp_f_f32">;
238defm V_CMP_LT_F32 : VOPC_F32 <"v_cmp_lt_f32", COND_OLT, "v_cmp_gt_f32">;
239defm V_CMP_EQ_F32 : VOPC_F32 <"v_cmp_eq_f32", COND_OEQ>;
240defm V_CMP_LE_F32 : VOPC_F32 <"v_cmp_le_f32", COND_OLE, "v_cmp_ge_f32">;
241defm V_CMP_GT_F32 : VOPC_F32 <"v_cmp_gt_f32", COND_OGT>;
242defm V_CMP_LG_F32 : VOPC_F32 <"v_cmp_lg_f32", COND_ONE>;
243defm V_CMP_GE_F32 : VOPC_F32 <"v_cmp_ge_f32", COND_OGE>;
244defm V_CMP_O_F32 : VOPC_F32 <"v_cmp_o_f32", COND_O>;
245defm V_CMP_U_F32 : VOPC_F32 <"v_cmp_u_f32", COND_UO>;
246defm V_CMP_NGE_F32 : VOPC_F32 <"v_cmp_nge_f32", COND_ULT, "v_cmp_nle_f32">;
247defm V_CMP_NLG_F32 : VOPC_F32 <"v_cmp_nlg_f32", COND_UEQ>;
248defm V_CMP_NGT_F32 : VOPC_F32 <"v_cmp_ngt_f32", COND_ULE, "v_cmp_nlt_f32">;
249defm V_CMP_NLE_F32 : VOPC_F32 <"v_cmp_nle_f32", COND_UGT>;
250defm V_CMP_NEQ_F32 : VOPC_F32 <"v_cmp_neq_f32", COND_UNE>;
251defm V_CMP_NLT_F32 : VOPC_F32 <"v_cmp_nlt_f32", COND_UGE>;
252defm V_CMP_TRU_F32 : VOPC_F32 <"v_cmp_tru_f32">;
253
254defm V_CMPX_F_F32 : VOPCX_F32 <"v_cmpx_f_f32">;
255defm V_CMPX_LT_F32 : VOPCX_F32 <"v_cmpx_lt_f32", "v_cmpx_gt_f32">;
256defm V_CMPX_EQ_F32 : VOPCX_F32 <"v_cmpx_eq_f32">;
257defm V_CMPX_LE_F32 : VOPCX_F32 <"v_cmpx_le_f32", "v_cmpx_ge_f32">;
258defm V_CMPX_GT_F32 : VOPCX_F32 <"v_cmpx_gt_f32">;
259defm V_CMPX_LG_F32 : VOPCX_F32 <"v_cmpx_lg_f32">;
260defm V_CMPX_GE_F32 : VOPCX_F32 <"v_cmpx_ge_f32">;
261defm V_CMPX_O_F32 : VOPCX_F32 <"v_cmpx_o_f32">;
262defm V_CMPX_U_F32 : VOPCX_F32 <"v_cmpx_u_f32">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]263defm V_CMPX_NGE_F32 : VOPCX_F32 <"v_cmpx_nge_f32", "v_cmpx_nle_f32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]264defm V_CMPX_NLG_F32 : VOPCX_F32 <"v_cmpx_nlg_f32">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]265defm V_CMPX_NGT_F32 : VOPCX_F32 <"v_cmpx_ngt_f32", "v_cmpx_nlt_f32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]266defm V_CMPX_NLE_F32 : VOPCX_F32 <"v_cmpx_nle_f32">;
267defm V_CMPX_NEQ_F32 : VOPCX_F32 <"v_cmpx_neq_f32">;
268defm V_CMPX_NLT_F32 : VOPCX_F32 <"v_cmpx_nlt_f32">;
269defm V_CMPX_TRU_F32 : VOPCX_F32 <"v_cmpx_tru_f32">;
270
271defm V_CMP_F_F64 : VOPC_F64 <"v_cmp_f_f64">;
272defm V_CMP_LT_F64 : VOPC_F64 <"v_cmp_lt_f64", COND_OLT, "v_cmp_gt_f64">;
273defm V_CMP_EQ_F64 : VOPC_F64 <"v_cmp_eq_f64", COND_OEQ>;
274defm V_CMP_LE_F64 : VOPC_F64 <"v_cmp_le_f64", COND_OLE, "v_cmp_ge_f64">;
275defm V_CMP_GT_F64 : VOPC_F64 <"v_cmp_gt_f64", COND_OGT>;
276defm V_CMP_LG_F64 : VOPC_F64 <"v_cmp_lg_f64", COND_ONE>;
277defm V_CMP_GE_F64 : VOPC_F64 <"v_cmp_ge_f64", COND_OGE>;
278defm V_CMP_O_F64 : VOPC_F64 <"v_cmp_o_f64", COND_O>;
279defm V_CMP_U_F64 : VOPC_F64 <"v_cmp_u_f64", COND_UO>;
280defm V_CMP_NGE_F64 : VOPC_F64 <"v_cmp_nge_f64", COND_ULT, "v_cmp_nle_f64">;
281defm V_CMP_NLG_F64 : VOPC_F64 <"v_cmp_nlg_f64", COND_UEQ>;
282defm V_CMP_NGT_F64 : VOPC_F64 <"v_cmp_ngt_f64", COND_ULE, "v_cmp_nlt_f64">;
283defm V_CMP_NLE_F64 : VOPC_F64 <"v_cmp_nle_f64", COND_UGT>;
284defm V_CMP_NEQ_F64 : VOPC_F64 <"v_cmp_neq_f64", COND_UNE>;
285defm V_CMP_NLT_F64 : VOPC_F64 <"v_cmp_nlt_f64", COND_UGE>;
286defm V_CMP_TRU_F64 : VOPC_F64 <"v_cmp_tru_f64">;
287
288defm V_CMPX_F_F64 : VOPCX_F64 <"v_cmpx_f_f64">;
289defm V_CMPX_LT_F64 : VOPCX_F64 <"v_cmpx_lt_f64", "v_cmpx_gt_f64">;
290defm V_CMPX_EQ_F64 : VOPCX_F64 <"v_cmpx_eq_f64">;
291defm V_CMPX_LE_F64 : VOPCX_F64 <"v_cmpx_le_f64", "v_cmpx_ge_f64">;
292defm V_CMPX_GT_F64 : VOPCX_F64 <"v_cmpx_gt_f64">;
293defm V_CMPX_LG_F64 : VOPCX_F64 <"v_cmpx_lg_f64">;
294defm V_CMPX_GE_F64 : VOPCX_F64 <"v_cmpx_ge_f64">;
295defm V_CMPX_O_F64 : VOPCX_F64 <"v_cmpx_o_f64">;
296defm V_CMPX_U_F64 : VOPCX_F64 <"v_cmpx_u_f64">;
297defm V_CMPX_NGE_F64 : VOPCX_F64 <"v_cmpx_nge_f64", "v_cmpx_nle_f64">;
298defm V_CMPX_NLG_F64 : VOPCX_F64 <"v_cmpx_nlg_f64">;
299defm V_CMPX_NGT_F64 : VOPCX_F64 <"v_cmpx_ngt_f64", "v_cmpx_nlt_f64">;
300defm V_CMPX_NLE_F64 : VOPCX_F64 <"v_cmpx_nle_f64">;
301defm V_CMPX_NEQ_F64 : VOPCX_F64 <"v_cmpx_neq_f64">;
302defm V_CMPX_NLT_F64 : VOPCX_F64 <"v_cmpx_nlt_f64">;
303defm V_CMPX_TRU_F64 : VOPCX_F64 <"v_cmpx_tru_f64">;
304
305let SubtargetPredicate = isSICI in {
306
307defm V_CMPS_F_F32 : VOPC_F32 <"v_cmps_f_f32">;
308defm V_CMPS_LT_F32 : VOPC_F32 <"v_cmps_lt_f32", COND_NULL, "v_cmps_gt_f32">;
309defm V_CMPS_EQ_F32 : VOPC_F32 <"v_cmps_eq_f32">;
310defm V_CMPS_LE_F32 : VOPC_F32 <"v_cmps_le_f32", COND_NULL, "v_cmps_ge_f32">;
311defm V_CMPS_GT_F32 : VOPC_F32 <"v_cmps_gt_f32">;
312defm V_CMPS_LG_F32 : VOPC_F32 <"v_cmps_lg_f32">;
313defm V_CMPS_GE_F32 : VOPC_F32 <"v_cmps_ge_f32">;
314defm V_CMPS_O_F32 : VOPC_F32 <"v_cmps_o_f32">;
315defm V_CMPS_U_F32 : VOPC_F32 <"v_cmps_u_f32">;
316defm V_CMPS_NGE_F32 : VOPC_F32 <"v_cmps_nge_f32", COND_NULL, "v_cmps_nle_f32">;
317defm V_CMPS_NLG_F32 : VOPC_F32 <"v_cmps_nlg_f32">;
318defm V_CMPS_NGT_F32 : VOPC_F32 <"v_cmps_ngt_f32", COND_NULL, "v_cmps_nlt_f32">;
319defm V_CMPS_NLE_F32 : VOPC_F32 <"v_cmps_nle_f32">;
320defm V_CMPS_NEQ_F32 : VOPC_F32 <"v_cmps_neq_f32">;
321defm V_CMPS_NLT_F32 : VOPC_F32 <"v_cmps_nlt_f32">;
322defm V_CMPS_TRU_F32 : VOPC_F32 <"v_cmps_tru_f32">;
323
324defm V_CMPSX_F_F32 : VOPCX_F32 <"v_cmpsx_f_f32">;
325defm V_CMPSX_LT_F32 : VOPCX_F32 <"v_cmpsx_lt_f32", "v_cmpsx_gt_f32">;
326defm V_CMPSX_EQ_F32 : VOPCX_F32 <"v_cmpsx_eq_f32">;
327defm V_CMPSX_LE_F32 : VOPCX_F32 <"v_cmpsx_le_f32", "v_cmpsx_ge_f32">;
328defm V_CMPSX_GT_F32 : VOPCX_F32 <"v_cmpsx_gt_f32">;
329defm V_CMPSX_LG_F32 : VOPCX_F32 <"v_cmpsx_lg_f32">;
330defm V_CMPSX_GE_F32 : VOPCX_F32 <"v_cmpsx_ge_f32">;
331defm V_CMPSX_O_F32 : VOPCX_F32 <"v_cmpsx_o_f32">;
332defm V_CMPSX_U_F32 : VOPCX_F32 <"v_cmpsx_u_f32">;
333defm V_CMPSX_NGE_F32 : VOPCX_F32 <"v_cmpsx_nge_f32", "v_cmpsx_nle_f32">;
334defm V_CMPSX_NLG_F32 : VOPCX_F32 <"v_cmpsx_nlg_f32">;
335defm V_CMPSX_NGT_F32 : VOPCX_F32 <"v_cmpsx_ngt_f32", "v_cmpsx_nlt_f32">;
336defm V_CMPSX_NLE_F32 : VOPCX_F32 <"v_cmpsx_nle_f32">;
337defm V_CMPSX_NEQ_F32 : VOPCX_F32 <"v_cmpsx_neq_f32">;
338defm V_CMPSX_NLT_F32 : VOPCX_F32 <"v_cmpsx_nlt_f32">;
339defm V_CMPSX_TRU_F32 : VOPCX_F32 <"v_cmpsx_tru_f32">;
340
341defm V_CMPS_F_F64 : VOPC_F64 <"v_cmps_f_f64">;
342defm V_CMPS_LT_F64 : VOPC_F64 <"v_cmps_lt_f64", COND_NULL, "v_cmps_gt_f64">;
343defm V_CMPS_EQ_F64 : VOPC_F64 <"v_cmps_eq_f64">;
344defm V_CMPS_LE_F64 : VOPC_F64 <"v_cmps_le_f64", COND_NULL, "v_cmps_ge_f64">;
345defm V_CMPS_GT_F64 : VOPC_F64 <"v_cmps_gt_f64">;
346defm V_CMPS_LG_F64 : VOPC_F64 <"v_cmps_lg_f64">;
347defm V_CMPS_GE_F64 : VOPC_F64 <"v_cmps_ge_f64">;
348defm V_CMPS_O_F64 : VOPC_F64 <"v_cmps_o_f64">;
349defm V_CMPS_U_F64 : VOPC_F64 <"v_cmps_u_f64">;
350defm V_CMPS_NGE_F64 : VOPC_F64 <"v_cmps_nge_f64", COND_NULL, "v_cmps_nle_f64">;
351defm V_CMPS_NLG_F64 : VOPC_F64 <"v_cmps_nlg_f64">;
352defm V_CMPS_NGT_F64 : VOPC_F64 <"v_cmps_ngt_f64", COND_NULL, "v_cmps_nlt_f64">;
353defm V_CMPS_NLE_F64 : VOPC_F64 <"v_cmps_nle_f64">;
354defm V_CMPS_NEQ_F64 : VOPC_F64 <"v_cmps_neq_f64">;
355defm V_CMPS_NLT_F64 : VOPC_F64 <"v_cmps_nlt_f64">;
356defm V_CMPS_TRU_F64 : VOPC_F64 <"v_cmps_tru_f64">;
357
358defm V_CMPSX_F_F64 : VOPCX_F64 <"v_cmpsx_f_f64">;
359defm V_CMPSX_LT_F64 : VOPCX_F64 <"v_cmpsx_lt_f64", "v_cmpsx_gt_f64">;
360defm V_CMPSX_EQ_F64 : VOPCX_F64 <"v_cmpsx_eq_f64">;
361defm V_CMPSX_LE_F64 : VOPCX_F64 <"v_cmpsx_le_f64", "v_cmpsx_ge_f64">;
362defm V_CMPSX_GT_F64 : VOPCX_F64 <"v_cmpsx_gt_f64">;
363defm V_CMPSX_LG_F64 : VOPCX_F64 <"v_cmpsx_lg_f64">;
364defm V_CMPSX_GE_F64 : VOPCX_F64 <"v_cmpsx_ge_f64">;
365defm V_CMPSX_O_F64 : VOPCX_F64 <"v_cmpsx_o_f64">;
366defm V_CMPSX_U_F64 : VOPCX_F64 <"v_cmpsx_u_f64">;
367defm V_CMPSX_NGE_F64 : VOPCX_F64 <"v_cmpsx_nge_f64", "v_cmpsx_nle_f64">;
368defm V_CMPSX_NLG_F64 : VOPCX_F64 <"v_cmpsx_nlg_f64">;
369defm V_CMPSX_NGT_F64 : VOPCX_F64 <"v_cmpsx_ngt_f64", "v_cmpsx_nlt_f64">;
370defm V_CMPSX_NLE_F64 : VOPCX_F64 <"v_cmpsx_nle_f64">;
371defm V_CMPSX_NEQ_F64 : VOPCX_F64 <"v_cmpsx_neq_f64">;
372defm V_CMPSX_NLT_F64 : VOPCX_F64 <"v_cmpsx_nlt_f64">;
373defm V_CMPSX_TRU_F64 : VOPCX_F64 <"v_cmpsx_tru_f64">;
374
375} // End SubtargetPredicate = isSICI
376
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]377let SubtargetPredicate = Has16BitInsts in {
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]378
379defm V_CMP_F_F16 : VOPC_F16 <"v_cmp_f_f16">;
380defm V_CMP_LT_F16 : VOPC_F16 <"v_cmp_lt_f16", COND_OLT, "v_cmp_gt_f16">;
381defm V_CMP_EQ_F16 : VOPC_F16 <"v_cmp_eq_f16", COND_OEQ>;
382defm V_CMP_LE_F16 : VOPC_F16 <"v_cmp_le_f16", COND_OLE, "v_cmp_ge_f16">;
383defm V_CMP_GT_F16 : VOPC_F16 <"v_cmp_gt_f16", COND_OGT>;
384defm V_CMP_LG_F16 : VOPC_F16 <"v_cmp_lg_f16", COND_ONE>;
385defm V_CMP_GE_F16 : VOPC_F16 <"v_cmp_ge_f16", COND_OGE>;
386defm V_CMP_O_F16 : VOPC_F16 <"v_cmp_o_f16", COND_O>;
387defm V_CMP_U_F16 : VOPC_F16 <"v_cmp_u_f16", COND_UO>;
388defm V_CMP_NGE_F16 : VOPC_F16 <"v_cmp_nge_f16", COND_ULT, "v_cmp_nle_f16">;
389defm V_CMP_NLG_F16 : VOPC_F16 <"v_cmp_nlg_f16", COND_UEQ>;
390defm V_CMP_NGT_F16 : VOPC_F16 <"v_cmp_ngt_f16", COND_ULE, "v_cmp_nlt_f16">;
391defm V_CMP_NLE_F16 : VOPC_F16 <"v_cmp_nle_f16", COND_UGT>;
392defm V_CMP_NEQ_F16 : VOPC_F16 <"v_cmp_neq_f16", COND_UNE>;
393defm V_CMP_NLT_F16 : VOPC_F16 <"v_cmp_nlt_f16", COND_UGE>;
394defm V_CMP_TRU_F16 : VOPC_F16 <"v_cmp_tru_f16">;
395
396defm V_CMPX_F_F16 : VOPCX_F16 <"v_cmpx_f_f16">;
397defm V_CMPX_LT_F16 : VOPCX_F16 <"v_cmpx_lt_f16", "v_cmpx_gt_f16">;
398defm V_CMPX_EQ_F16 : VOPCX_F16 <"v_cmpx_eq_f16">;
399defm V_CMPX_LE_F16 : VOPCX_F16 <"v_cmpx_le_f16", "v_cmpx_ge_f16">;
400defm V_CMPX_GT_F16 : VOPCX_F16 <"v_cmpx_gt_f16">;
401defm V_CMPX_LG_F16 : VOPCX_F16 <"v_cmpx_lg_f16">;
402defm V_CMPX_GE_F16 : VOPCX_F16 <"v_cmpx_ge_f16">;
403defm V_CMPX_O_F16 : VOPCX_F16 <"v_cmpx_o_f16">;
404defm V_CMPX_U_F16 : VOPCX_F16 <"v_cmpx_u_f16">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]405defm V_CMPX_NGE_F16 : VOPCX_F16 <"v_cmpx_nge_f16", "v_cmpx_nle_f16">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]406defm V_CMPX_NLG_F16 : VOPCX_F16 <"v_cmpx_nlg_f16">;
Matt Arsenault3de76b92016-12-22 04:39:41 +0000[diff] [blame]407defm V_CMPX_NGT_F16 : VOPCX_F16 <"v_cmpx_ngt_f16", "v_cmpx_nlt_f16">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]408defm V_CMPX_NLE_F16 : VOPCX_F16 <"v_cmpx_nle_f16">;
409defm V_CMPX_NEQ_F16 : VOPCX_F16 <"v_cmpx_neq_f16">;
410defm V_CMPX_NLT_F16 : VOPCX_F16 <"v_cmpx_nlt_f16">;
411defm V_CMPX_TRU_F16 : VOPCX_F16 <"v_cmpx_tru_f16">;
412
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]413defm V_CMP_F_I16 : VOPC_I16 <"v_cmp_f_i16">;
414defm V_CMP_LT_I16 : VOPC_I16 <"v_cmp_lt_i16", COND_SLT, "v_cmp_gt_i16">;
415defm V_CMP_EQ_I16 : VOPC_I16 <"v_cmp_eq_i16">;
416defm V_CMP_LE_I16 : VOPC_I16 <"v_cmp_le_i16", COND_SLE, "v_cmp_ge_i16">;
417defm V_CMP_GT_I16 : VOPC_I16 <"v_cmp_gt_i16", COND_SGT>;
418defm V_CMP_NE_I16 : VOPC_I16 <"v_cmp_ne_i16">;
419defm V_CMP_GE_I16 : VOPC_I16 <"v_cmp_ge_i16", COND_SGE>;
420defm V_CMP_T_I16 : VOPC_I16 <"v_cmp_t_i16">;
421
422defm V_CMP_F_U16 : VOPC_I16 <"v_cmp_f_u16">;
423defm V_CMP_LT_U16 : VOPC_I16 <"v_cmp_lt_u16", COND_ULT, "v_cmp_gt_u16">;
424defm V_CMP_EQ_U16 : VOPC_I16 <"v_cmp_eq_u16", COND_EQ>;
425defm V_CMP_LE_U16 : VOPC_I16 <"v_cmp_le_u16", COND_ULE, "v_cmp_ge_u16">;
426defm V_CMP_GT_U16 : VOPC_I16 <"v_cmp_gt_u16", COND_UGT>;
427defm V_CMP_NE_U16 : VOPC_I16 <"v_cmp_ne_u16", COND_NE>;
428defm V_CMP_GE_U16 : VOPC_I16 <"v_cmp_ge_u16", COND_UGE>;
429defm V_CMP_T_U16 : VOPC_I16 <"v_cmp_t_u16">;
430
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]431defm V_CMPX_F_I16 : VOPCX_I16 <"v_cmpx_f_i16">;
432defm V_CMPX_LT_I16 : VOPCX_I16 <"v_cmpx_lt_i16", "v_cmpx_gt_i16">;
433defm V_CMPX_EQ_I16 : VOPCX_I16 <"v_cmpx_eq_i16">;
434defm V_CMPX_LE_I16 : VOPCX_I16 <"v_cmpx_le_i16", "v_cmpx_ge_i16">;
435defm V_CMPX_GT_I16 : VOPCX_I16 <"v_cmpx_gt_i16">;
436defm V_CMPX_NE_I16 : VOPCX_I16 <"v_cmpx_ne_i16">;
437defm V_CMPX_GE_I16 : VOPCX_I16 <"v_cmpx_ge_i16">;
438defm V_CMPX_T_I16 : VOPCX_I16 <"v_cmpx_t_i16">;
439defm V_CMPX_F_U16 : VOPCX_I16 <"v_cmpx_f_u16">;
440
441defm V_CMPX_LT_U16 : VOPCX_I16 <"v_cmpx_lt_u16", "v_cmpx_gt_u16">;
442defm V_CMPX_EQ_U16 : VOPCX_I16 <"v_cmpx_eq_u16">;
443defm V_CMPX_LE_U16 : VOPCX_I16 <"v_cmpx_le_u16", "v_cmpx_ge_u16">;
444defm V_CMPX_GT_U16 : VOPCX_I16 <"v_cmpx_gt_u16">;
445defm V_CMPX_NE_U16 : VOPCX_I16 <"v_cmpx_ne_u16">;
446defm V_CMPX_GE_U16 : VOPCX_I16 <"v_cmpx_ge_u16">;
447defm V_CMPX_T_U16 : VOPCX_I16 <"v_cmpx_t_u16">;
448
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]449} // End SubtargetPredicate = Has16BitInsts
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]450
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]451defm V_CMP_F_I32 : VOPC_I32 <"v_cmp_f_i32">;
452defm V_CMP_LT_I32 : VOPC_I32 <"v_cmp_lt_i32", COND_SLT, "v_cmp_gt_i32">;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]453defm V_CMP_EQ_I32 : VOPC_I32 <"v_cmp_eq_i32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]454defm V_CMP_LE_I32 : VOPC_I32 <"v_cmp_le_i32", COND_SLE, "v_cmp_ge_i32">;
455defm V_CMP_GT_I32 : VOPC_I32 <"v_cmp_gt_i32", COND_SGT>;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]456defm V_CMP_NE_I32 : VOPC_I32 <"v_cmp_ne_i32">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]457defm V_CMP_GE_I32 : VOPC_I32 <"v_cmp_ge_i32", COND_SGE>;
458defm V_CMP_T_I32 : VOPC_I32 <"v_cmp_t_i32">;
459
460defm V_CMPX_F_I32 : VOPCX_I32 <"v_cmpx_f_i32">;
461defm V_CMPX_LT_I32 : VOPCX_I32 <"v_cmpx_lt_i32", "v_cmpx_gt_i32">;
462defm V_CMPX_EQ_I32 : VOPCX_I32 <"v_cmpx_eq_i32">;
463defm V_CMPX_LE_I32 : VOPCX_I32 <"v_cmpx_le_i32", "v_cmpx_ge_i32">;
464defm V_CMPX_GT_I32 : VOPCX_I32 <"v_cmpx_gt_i32">;
465defm V_CMPX_NE_I32 : VOPCX_I32 <"v_cmpx_ne_i32">;
466defm V_CMPX_GE_I32 : VOPCX_I32 <"v_cmpx_ge_i32">;
467defm V_CMPX_T_I32 : VOPCX_I32 <"v_cmpx_t_i32">;
468
469defm V_CMP_F_I64 : VOPC_I64 <"v_cmp_f_i64">;
470defm V_CMP_LT_I64 : VOPC_I64 <"v_cmp_lt_i64", COND_SLT, "v_cmp_gt_i64">;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]471defm V_CMP_EQ_I64 : VOPC_I64 <"v_cmp_eq_i64">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]472defm V_CMP_LE_I64 : VOPC_I64 <"v_cmp_le_i64", COND_SLE, "v_cmp_ge_i64">;
473defm V_CMP_GT_I64 : VOPC_I64 <"v_cmp_gt_i64", COND_SGT>;
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]474defm V_CMP_NE_I64 : VOPC_I64 <"v_cmp_ne_i64">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]475defm V_CMP_GE_I64 : VOPC_I64 <"v_cmp_ge_i64", COND_SGE>;
476defm V_CMP_T_I64 : VOPC_I64 <"v_cmp_t_i64">;
477
478defm V_CMPX_F_I64 : VOPCX_I64 <"v_cmpx_f_i64">;
479defm V_CMPX_LT_I64 : VOPCX_I64 <"v_cmpx_lt_i64", "v_cmpx_gt_i64">;
480defm V_CMPX_EQ_I64 : VOPCX_I64 <"v_cmpx_eq_i64">;
481defm V_CMPX_LE_I64 : VOPCX_I64 <"v_cmpx_le_i64", "v_cmpx_ge_i64">;
482defm V_CMPX_GT_I64 : VOPCX_I64 <"v_cmpx_gt_i64">;
483defm V_CMPX_NE_I64 : VOPCX_I64 <"v_cmpx_ne_i64">;
484defm V_CMPX_GE_I64 : VOPCX_I64 <"v_cmpx_ge_i64">;
485defm V_CMPX_T_I64 : VOPCX_I64 <"v_cmpx_t_i64">;
486
487defm V_CMP_F_U32 : VOPC_I32 <"v_cmp_f_u32">;
488defm V_CMP_LT_U32 : VOPC_I32 <"v_cmp_lt_u32", COND_ULT, "v_cmp_gt_u32">;
489defm V_CMP_EQ_U32 : VOPC_I32 <"v_cmp_eq_u32", COND_EQ>;
490defm V_CMP_LE_U32 : VOPC_I32 <"v_cmp_le_u32", COND_ULE, "v_cmp_ge_u32">;
491defm V_CMP_GT_U32 : VOPC_I32 <"v_cmp_gt_u32", COND_UGT>;
492defm V_CMP_NE_U32 : VOPC_I32 <"v_cmp_ne_u32", COND_NE>;
493defm V_CMP_GE_U32 : VOPC_I32 <"v_cmp_ge_u32", COND_UGE>;
494defm V_CMP_T_U32 : VOPC_I32 <"v_cmp_t_u32">;
495
496defm V_CMPX_F_U32 : VOPCX_I32 <"v_cmpx_f_u32">;
497defm V_CMPX_LT_U32 : VOPCX_I32 <"v_cmpx_lt_u32", "v_cmpx_gt_u32">;
498defm V_CMPX_EQ_U32 : VOPCX_I32 <"v_cmpx_eq_u32">;
499defm V_CMPX_LE_U32 : VOPCX_I32 <"v_cmpx_le_u32", "v_cmpx_le_u32">;
500defm V_CMPX_GT_U32 : VOPCX_I32 <"v_cmpx_gt_u32">;
501defm V_CMPX_NE_U32 : VOPCX_I32 <"v_cmpx_ne_u32">;
502defm V_CMPX_GE_U32 : VOPCX_I32 <"v_cmpx_ge_u32">;
503defm V_CMPX_T_U32 : VOPCX_I32 <"v_cmpx_t_u32">;
504
505defm V_CMP_F_U64 : VOPC_I64 <"v_cmp_f_u64">;
506defm V_CMP_LT_U64 : VOPC_I64 <"v_cmp_lt_u64", COND_ULT, "v_cmp_gt_u64">;
507defm V_CMP_EQ_U64 : VOPC_I64 <"v_cmp_eq_u64", COND_EQ>;
508defm V_CMP_LE_U64 : VOPC_I64 <"v_cmp_le_u64", COND_ULE, "v_cmp_ge_u64">;
509defm V_CMP_GT_U64 : VOPC_I64 <"v_cmp_gt_u64", COND_UGT>;
510defm V_CMP_NE_U64 : VOPC_I64 <"v_cmp_ne_u64", COND_NE>;
511defm V_CMP_GE_U64 : VOPC_I64 <"v_cmp_ge_u64", COND_UGE>;
512defm V_CMP_T_U64 : VOPC_I64 <"v_cmp_t_u64">;
513
514defm V_CMPX_F_U64 : VOPCX_I64 <"v_cmpx_f_u64">;
515defm V_CMPX_LT_U64 : VOPCX_I64 <"v_cmpx_lt_u64", "v_cmpx_gt_u64">;
516defm V_CMPX_EQ_U64 : VOPCX_I64 <"v_cmpx_eq_u64">;
517defm V_CMPX_LE_U64 : VOPCX_I64 <"v_cmpx_le_u64", "v_cmpx_ge_u64">;
518defm V_CMPX_GT_U64 : VOPCX_I64 <"v_cmpx_gt_u64">;
519defm V_CMPX_NE_U64 : VOPCX_I64 <"v_cmpx_ne_u64">;
520defm V_CMPX_GE_U64 : VOPCX_I64 <"v_cmpx_ge_u64">;
521defm V_CMPX_T_U64 : VOPCX_I64 <"v_cmpx_t_u64">;
522
523//===----------------------------------------------------------------------===//
524// Class instructions
525//===----------------------------------------------------------------------===//
526
527class VOPC_Class_Profile<list<SchedReadWrite> sched, ValueType vt> :
528 VOPC_Profile<sched, vt, i32> {
529 let Ins64 = (ins Src0Mod:$src0_modifiers, Src0RC64:$src0, Src1RC64:$src1);
530 let Asm64 = "$sdst, $src0_modifiers, $src1";
Sam Kolton549c89d2017-06-21 08:53:38 +0000[diff] [blame]531
Sam Kolton9772eb32017-01-11 11:46:30 +0000[diff] [blame]532 let InsSDWA = (ins Src0ModSDWA:$src0_modifiers, Src0SDWA:$src0,
533 Src1ModSDWA:$src1_modifiers, Src1SDWA:$src1,
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]534 clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel);
Sam Kolton549c89d2017-06-21 08:53:38 +0000[diff] [blame]535
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]536 let AsmSDWA = " vcc, $src0_modifiers, $src1_modifiers$clamp $src0_sel $src1_sel";
537 let HasSrc1Mods = 0;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]538 let HasClamp = 0;
539 let HasOMod = 0;
540}
541
542class getVOPCClassPat64 <VOPProfile P> {
543 list<dag> ret =
544 [(set i1:$sdst,
545 (AMDGPUfp_class
546 (P.Src0VT (VOP3Mods0Clamp0OMod P.Src0VT:$src0, i32:$src0_modifiers)),
547 P.Src1VT:$src1))];
548}
549
550// Special case for class instructions which only have modifiers on
551// the 1st source operand.
552multiclass VOPC_Class_Pseudos <string opName, VOPC_Profile p, bit DefExec> {
553 def _e32 : VOPC_Pseudo <opName, p> {
554 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
555 let SchedRW = p.Schedule;
556 let isConvergent = DefExec;
557 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]558
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]559 def _e64 : VOP3_Pseudo<opName, p, getVOPCClassPat64<p>.ret> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]560 let Defs = !if(DefExec, [EXEC], []);
561 let SchedRW = p.Schedule;
562 }
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]563
564 def _sdwa : VOPC_SDWA_Pseudo <opName, p> {
565 let Defs = !if(DefExec, [VCC, EXEC], [VCC]);
566 let SchedRW = p.Schedule;
567 let isConvergent = DefExec;
568 }
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]569}
570
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]571def VOPC_I1_F16_I32 : VOPC_Class_Profile<[Write32Bit], f16>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]572def VOPC_I1_F32_I32 : VOPC_Class_Profile<[Write32Bit], f32>;
573def VOPC_I1_F64_I32 : VOPC_Class_Profile<[WriteDoubleAdd], f64>;
574
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]575multiclass VOPC_CLASS_F16 <string opName> :
576 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 0>;
577
578multiclass VOPCX_CLASS_F16 <string opName> :
Dmitry Preobrazhensky5ac9fd62017-04-12 16:31:18 +0000[diff] [blame]579 VOPC_Class_Pseudos <opName, VOPC_I1_F16_I32, 1>;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]580
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]581multiclass VOPC_CLASS_F32 <string opName> :
582 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 0>;
583
584multiclass VOPCX_CLASS_F32 <string opName> :
585 VOPC_Class_Pseudos <opName, VOPC_I1_F32_I32, 1>;
586
587multiclass VOPC_CLASS_F64 <string opName> :
588 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 0>;
589
590multiclass VOPCX_CLASS_F64 <string opName> :
591 VOPC_Class_Pseudos <opName, VOPC_I1_F64_I32, 1>;
592
593defm V_CMP_CLASS_F32 : VOPC_CLASS_F32 <"v_cmp_class_f32">;
594defm V_CMPX_CLASS_F32 : VOPCX_CLASS_F32 <"v_cmpx_class_f32">;
595defm V_CMP_CLASS_F64 : VOPC_CLASS_F64 <"v_cmp_class_f64">;
596defm V_CMPX_CLASS_F64 : VOPCX_CLASS_F64 <"v_cmpx_class_f64">;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]597defm V_CMP_CLASS_F16 : VOPC_CLASS_F16 <"v_cmp_class_f16">;
598defm V_CMPX_CLASS_F16 : VOPCX_CLASS_F16 <"v_cmpx_class_f16">;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]599
600//===----------------------------------------------------------------------===//
601// V_ICMPIntrinsic Pattern.
602//===----------------------------------------------------------------------===//
603
604let Predicates = [isGCN] in {
605
606class ICMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> : Pat <
607 (AMDGPUsetcc vt:$src0, vt:$src1, cond),
608 (inst $src0, $src1)
609>;
610
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]611def : ICMP_Pattern <COND_EQ, V_CMP_EQ_U32_e64, i32>;
612def : ICMP_Pattern <COND_NE, V_CMP_NE_U32_e64, i32>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]613def : ICMP_Pattern <COND_UGT, V_CMP_GT_U32_e64, i32>;
614def : ICMP_Pattern <COND_UGE, V_CMP_GE_U32_e64, i32>;
615def : ICMP_Pattern <COND_ULT, V_CMP_LT_U32_e64, i32>;
616def : ICMP_Pattern <COND_ULE, V_CMP_LE_U32_e64, i32>;
617def : ICMP_Pattern <COND_SGT, V_CMP_GT_I32_e64, i32>;
618def : ICMP_Pattern <COND_SGE, V_CMP_GE_I32_e64, i32>;
619def : ICMP_Pattern <COND_SLT, V_CMP_LT_I32_e64, i32>;
620def : ICMP_Pattern <COND_SLE, V_CMP_LE_I32_e64, i32>;
621
Matt Arsenault5d8eb252016-09-30 01:50:20 +0000[diff] [blame]622def : ICMP_Pattern <COND_EQ, V_CMP_EQ_U64_e64, i64>;
623def : ICMP_Pattern <COND_NE, V_CMP_NE_U64_e64, i64>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]624def : ICMP_Pattern <COND_UGT, V_CMP_GT_U64_e64, i64>;
625def : ICMP_Pattern <COND_UGE, V_CMP_GE_U64_e64, i64>;
626def : ICMP_Pattern <COND_ULT, V_CMP_LT_U64_e64, i64>;
627def : ICMP_Pattern <COND_ULE, V_CMP_LE_U64_e64, i64>;
628def : ICMP_Pattern <COND_SGT, V_CMP_GT_I64_e64, i64>;
629def : ICMP_Pattern <COND_SGE, V_CMP_GE_I64_e64, i64>;
630def : ICMP_Pattern <COND_SLT, V_CMP_LT_I64_e64, i64>;
631def : ICMP_Pattern <COND_SLE, V_CMP_LE_I64_e64, i64>;
632
633class FCMP_Pattern <PatLeaf cond, Instruction inst, ValueType vt> : Pat <
634 (i64 (AMDGPUsetcc (vt (VOP3Mods vt:$src0, i32:$src0_modifiers)),
635 (vt (VOP3Mods vt:$src1, i32:$src1_modifiers)), cond)),
636 (inst $src0_modifiers, $src0, $src1_modifiers, $src1,
637 DSTCLAMP.NONE, DSTOMOD.NONE)
638>;
639
640def : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F32_e64, f32>;
641def : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F32_e64, f32>;
642def : FCMP_Pattern <COND_OGT, V_CMP_GT_F32_e64, f32>;
643def : FCMP_Pattern <COND_OGE, V_CMP_GE_F32_e64, f32>;
644def : FCMP_Pattern <COND_OLT, V_CMP_LT_F32_e64, f32>;
645def : FCMP_Pattern <COND_OLE, V_CMP_LE_F32_e64, f32>;
646
647def : FCMP_Pattern <COND_OEQ, V_CMP_EQ_F64_e64, f64>;
648def : FCMP_Pattern <COND_ONE, V_CMP_NEQ_F64_e64, f64>;
649def : FCMP_Pattern <COND_OGT, V_CMP_GT_F64_e64, f64>;
650def : FCMP_Pattern <COND_OGE, V_CMP_GE_F64_e64, f64>;
651def : FCMP_Pattern <COND_OLT, V_CMP_LT_F64_e64, f64>;
652def : FCMP_Pattern <COND_OLE, V_CMP_LE_F64_e64, f64>;
653
654def : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F32_e64, f32>;
655def : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F32_e64, f32>;
656def : FCMP_Pattern <COND_UGT, V_CMP_NLE_F32_e64, f32>;
657def : FCMP_Pattern <COND_UGE, V_CMP_NLT_F32_e64, f32>;
658def : FCMP_Pattern <COND_ULT, V_CMP_NGE_F32_e64, f32>;
659def : FCMP_Pattern <COND_ULE, V_CMP_NGT_F32_e64, f32>;
660
661def : FCMP_Pattern <COND_UEQ, V_CMP_NLG_F64_e64, f64>;
662def : FCMP_Pattern <COND_UNE, V_CMP_NEQ_F64_e64, f64>;
663def : FCMP_Pattern <COND_UGT, V_CMP_NLE_F64_e64, f64>;
664def : FCMP_Pattern <COND_UGE, V_CMP_NLT_F64_e64, f64>;
665def : FCMP_Pattern <COND_ULT, V_CMP_NGE_F64_e64, f64>;
666def : FCMP_Pattern <COND_ULE, V_CMP_NGT_F64_e64, f64>;
667
668} // End Predicates = [isGCN]
669
670//===----------------------------------------------------------------------===//
671// Target
672//===----------------------------------------------------------------------===//
673
674//===----------------------------------------------------------------------===//
675// SI
676//===----------------------------------------------------------------------===//
677
678multiclass VOPC_Real_si <bits<9> op> {
679 let AssemblerPredicates = [isSICI], DecoderNamespace = "SICI" in {
680 def _e32_si :
681 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>,
682 VOPCe<op{7-0}>;
683
684 def _e64_si :
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]685 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>,
686 VOP3a_si <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]687 // Encoding used for VOPC instructions encoded as VOP3
688 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
689 bits<8> sdst;
690 let Inst{7-0} = sdst;
691 }
692 }
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]693 def : VOPCInstAlias <!cast<VOP3_Pseudo>(NAME#"_e64"),
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]694 !cast<Instruction>(NAME#"_e32_si")> {
695 let AssemblerPredicate = isSICI;
696 }
697}
698
699defm V_CMP_F_F32 : VOPC_Real_si <0x0>;
700defm V_CMP_LT_F32 : VOPC_Real_si <0x1>;
701defm V_CMP_EQ_F32 : VOPC_Real_si <0x2>;
702defm V_CMP_LE_F32 : VOPC_Real_si <0x3>;
703defm V_CMP_GT_F32 : VOPC_Real_si <0x4>;
704defm V_CMP_LG_F32 : VOPC_Real_si <0x5>;
705defm V_CMP_GE_F32 : VOPC_Real_si <0x6>;
706defm V_CMP_O_F32 : VOPC_Real_si <0x7>;
707defm V_CMP_U_F32 : VOPC_Real_si <0x8>;
708defm V_CMP_NGE_F32 : VOPC_Real_si <0x9>;
709defm V_CMP_NLG_F32 : VOPC_Real_si <0xa>;
710defm V_CMP_NGT_F32 : VOPC_Real_si <0xb>;
711defm V_CMP_NLE_F32 : VOPC_Real_si <0xc>;
712defm V_CMP_NEQ_F32 : VOPC_Real_si <0xd>;
713defm V_CMP_NLT_F32 : VOPC_Real_si <0xe>;
714defm V_CMP_TRU_F32 : VOPC_Real_si <0xf>;
715
716defm V_CMPX_F_F32 : VOPC_Real_si <0x10>;
717defm V_CMPX_LT_F32 : VOPC_Real_si <0x11>;
718defm V_CMPX_EQ_F32 : VOPC_Real_si <0x12>;
719defm V_CMPX_LE_F32 : VOPC_Real_si <0x13>;
720defm V_CMPX_GT_F32 : VOPC_Real_si <0x14>;
721defm V_CMPX_LG_F32 : VOPC_Real_si <0x15>;
722defm V_CMPX_GE_F32 : VOPC_Real_si <0x16>;
723defm V_CMPX_O_F32 : VOPC_Real_si <0x17>;
724defm V_CMPX_U_F32 : VOPC_Real_si <0x18>;
725defm V_CMPX_NGE_F32 : VOPC_Real_si <0x19>;
726defm V_CMPX_NLG_F32 : VOPC_Real_si <0x1a>;
727defm V_CMPX_NGT_F32 : VOPC_Real_si <0x1b>;
728defm V_CMPX_NLE_F32 : VOPC_Real_si <0x1c>;
729defm V_CMPX_NEQ_F32 : VOPC_Real_si <0x1d>;
730defm V_CMPX_NLT_F32 : VOPC_Real_si <0x1e>;
731defm V_CMPX_TRU_F32 : VOPC_Real_si <0x1f>;
732
733defm V_CMP_F_F64 : VOPC_Real_si <0x20>;
734defm V_CMP_LT_F64 : VOPC_Real_si <0x21>;
735defm V_CMP_EQ_F64 : VOPC_Real_si <0x22>;
736defm V_CMP_LE_F64 : VOPC_Real_si <0x23>;
737defm V_CMP_GT_F64 : VOPC_Real_si <0x24>;
738defm V_CMP_LG_F64 : VOPC_Real_si <0x25>;
739defm V_CMP_GE_F64 : VOPC_Real_si <0x26>;
740defm V_CMP_O_F64 : VOPC_Real_si <0x27>;
741defm V_CMP_U_F64 : VOPC_Real_si <0x28>;
742defm V_CMP_NGE_F64 : VOPC_Real_si <0x29>;
743defm V_CMP_NLG_F64 : VOPC_Real_si <0x2a>;
744defm V_CMP_NGT_F64 : VOPC_Real_si <0x2b>;
745defm V_CMP_NLE_F64 : VOPC_Real_si <0x2c>;
746defm V_CMP_NEQ_F64 : VOPC_Real_si <0x2d>;
747defm V_CMP_NLT_F64 : VOPC_Real_si <0x2e>;
748defm V_CMP_TRU_F64 : VOPC_Real_si <0x2f>;
749
750defm V_CMPX_F_F64 : VOPC_Real_si <0x30>;
751defm V_CMPX_LT_F64 : VOPC_Real_si <0x31>;
752defm V_CMPX_EQ_F64 : VOPC_Real_si <0x32>;
753defm V_CMPX_LE_F64 : VOPC_Real_si <0x33>;
754defm V_CMPX_GT_F64 : VOPC_Real_si <0x34>;
755defm V_CMPX_LG_F64 : VOPC_Real_si <0x35>;
756defm V_CMPX_GE_F64 : VOPC_Real_si <0x36>;
757defm V_CMPX_O_F64 : VOPC_Real_si <0x37>;
758defm V_CMPX_U_F64 : VOPC_Real_si <0x38>;
759defm V_CMPX_NGE_F64 : VOPC_Real_si <0x39>;
760defm V_CMPX_NLG_F64 : VOPC_Real_si <0x3a>;
761defm V_CMPX_NGT_F64 : VOPC_Real_si <0x3b>;
762defm V_CMPX_NLE_F64 : VOPC_Real_si <0x3c>;
763defm V_CMPX_NEQ_F64 : VOPC_Real_si <0x3d>;
764defm V_CMPX_NLT_F64 : VOPC_Real_si <0x3e>;
765defm V_CMPX_TRU_F64 : VOPC_Real_si <0x3f>;
766
767defm V_CMPS_F_F32 : VOPC_Real_si <0x40>;
768defm V_CMPS_LT_F32 : VOPC_Real_si <0x41>;
769defm V_CMPS_EQ_F32 : VOPC_Real_si <0x42>;
770defm V_CMPS_LE_F32 : VOPC_Real_si <0x43>;
771defm V_CMPS_GT_F32 : VOPC_Real_si <0x44>;
772defm V_CMPS_LG_F32 : VOPC_Real_si <0x45>;
773defm V_CMPS_GE_F32 : VOPC_Real_si <0x46>;
774defm V_CMPS_O_F32 : VOPC_Real_si <0x47>;
775defm V_CMPS_U_F32 : VOPC_Real_si <0x48>;
776defm V_CMPS_NGE_F32 : VOPC_Real_si <0x49>;
777defm V_CMPS_NLG_F32 : VOPC_Real_si <0x4a>;
778defm V_CMPS_NGT_F32 : VOPC_Real_si <0x4b>;
779defm V_CMPS_NLE_F32 : VOPC_Real_si <0x4c>;
780defm V_CMPS_NEQ_F32 : VOPC_Real_si <0x4d>;
781defm V_CMPS_NLT_F32 : VOPC_Real_si <0x4e>;
782defm V_CMPS_TRU_F32 : VOPC_Real_si <0x4f>;
783
784defm V_CMPSX_F_F32 : VOPC_Real_si <0x50>;
785defm V_CMPSX_LT_F32 : VOPC_Real_si <0x51>;
786defm V_CMPSX_EQ_F32 : VOPC_Real_si <0x52>;
787defm V_CMPSX_LE_F32 : VOPC_Real_si <0x53>;
788defm V_CMPSX_GT_F32 : VOPC_Real_si <0x54>;
789defm V_CMPSX_LG_F32 : VOPC_Real_si <0x55>;
790defm V_CMPSX_GE_F32 : VOPC_Real_si <0x56>;
791defm V_CMPSX_O_F32 : VOPC_Real_si <0x57>;
792defm V_CMPSX_U_F32 : VOPC_Real_si <0x58>;
793defm V_CMPSX_NGE_F32 : VOPC_Real_si <0x59>;
794defm V_CMPSX_NLG_F32 : VOPC_Real_si <0x5a>;
795defm V_CMPSX_NGT_F32 : VOPC_Real_si <0x5b>;
796defm V_CMPSX_NLE_F32 : VOPC_Real_si <0x5c>;
797defm V_CMPSX_NEQ_F32 : VOPC_Real_si <0x5d>;
798defm V_CMPSX_NLT_F32 : VOPC_Real_si <0x5e>;
799defm V_CMPSX_TRU_F32 : VOPC_Real_si <0x5f>;
800
801defm V_CMPS_F_F64 : VOPC_Real_si <0x60>;
802defm V_CMPS_LT_F64 : VOPC_Real_si <0x61>;
803defm V_CMPS_EQ_F64 : VOPC_Real_si <0x62>;
804defm V_CMPS_LE_F64 : VOPC_Real_si <0x63>;
805defm V_CMPS_GT_F64 : VOPC_Real_si <0x64>;
806defm V_CMPS_LG_F64 : VOPC_Real_si <0x65>;
807defm V_CMPS_GE_F64 : VOPC_Real_si <0x66>;
808defm V_CMPS_O_F64 : VOPC_Real_si <0x67>;
809defm V_CMPS_U_F64 : VOPC_Real_si <0x68>;
810defm V_CMPS_NGE_F64 : VOPC_Real_si <0x69>;
811defm V_CMPS_NLG_F64 : VOPC_Real_si <0x6a>;
812defm V_CMPS_NGT_F64 : VOPC_Real_si <0x6b>;
813defm V_CMPS_NLE_F64 : VOPC_Real_si <0x6c>;
814defm V_CMPS_NEQ_F64 : VOPC_Real_si <0x6d>;
815defm V_CMPS_NLT_F64 : VOPC_Real_si <0x6e>;
816defm V_CMPS_TRU_F64 : VOPC_Real_si <0x6f>;
817
818defm V_CMPSX_F_F64 : VOPC_Real_si <0x70>;
819defm V_CMPSX_LT_F64 : VOPC_Real_si <0x71>;
820defm V_CMPSX_EQ_F64 : VOPC_Real_si <0x72>;
821defm V_CMPSX_LE_F64 : VOPC_Real_si <0x73>;
822defm V_CMPSX_GT_F64 : VOPC_Real_si <0x74>;
823defm V_CMPSX_LG_F64 : VOPC_Real_si <0x75>;
824defm V_CMPSX_GE_F64 : VOPC_Real_si <0x76>;
825defm V_CMPSX_O_F64 : VOPC_Real_si <0x77>;
826defm V_CMPSX_U_F64 : VOPC_Real_si <0x78>;
827defm V_CMPSX_NGE_F64 : VOPC_Real_si <0x79>;
828defm V_CMPSX_NLG_F64 : VOPC_Real_si <0x7a>;
829defm V_CMPSX_NGT_F64 : VOPC_Real_si <0x7b>;
830defm V_CMPSX_NLE_F64 : VOPC_Real_si <0x7c>;
831defm V_CMPSX_NEQ_F64 : VOPC_Real_si <0x7d>;
832defm V_CMPSX_NLT_F64 : VOPC_Real_si <0x7e>;
833defm V_CMPSX_TRU_F64 : VOPC_Real_si <0x7f>;
834
835defm V_CMP_F_I32 : VOPC_Real_si <0x80>;
836defm V_CMP_LT_I32 : VOPC_Real_si <0x81>;
837defm V_CMP_EQ_I32 : VOPC_Real_si <0x82>;
838defm V_CMP_LE_I32 : VOPC_Real_si <0x83>;
839defm V_CMP_GT_I32 : VOPC_Real_si <0x84>;
840defm V_CMP_NE_I32 : VOPC_Real_si <0x85>;
841defm V_CMP_GE_I32 : VOPC_Real_si <0x86>;
842defm V_CMP_T_I32 : VOPC_Real_si <0x87>;
843
844defm V_CMPX_F_I32 : VOPC_Real_si <0x90>;
845defm V_CMPX_LT_I32 : VOPC_Real_si <0x91>;
846defm V_CMPX_EQ_I32 : VOPC_Real_si <0x92>;
847defm V_CMPX_LE_I32 : VOPC_Real_si <0x93>;
848defm V_CMPX_GT_I32 : VOPC_Real_si <0x94>;
849defm V_CMPX_NE_I32 : VOPC_Real_si <0x95>;
850defm V_CMPX_GE_I32 : VOPC_Real_si <0x96>;
851defm V_CMPX_T_I32 : VOPC_Real_si <0x97>;
852
853defm V_CMP_F_I64 : VOPC_Real_si <0xa0>;
854defm V_CMP_LT_I64 : VOPC_Real_si <0xa1>;
855defm V_CMP_EQ_I64 : VOPC_Real_si <0xa2>;
856defm V_CMP_LE_I64 : VOPC_Real_si <0xa3>;
857defm V_CMP_GT_I64 : VOPC_Real_si <0xa4>;
858defm V_CMP_NE_I64 : VOPC_Real_si <0xa5>;
859defm V_CMP_GE_I64 : VOPC_Real_si <0xa6>;
860defm V_CMP_T_I64 : VOPC_Real_si <0xa7>;
861
862defm V_CMPX_F_I64 : VOPC_Real_si <0xb0>;
863defm V_CMPX_LT_I64 : VOPC_Real_si <0xb1>;
864defm V_CMPX_EQ_I64 : VOPC_Real_si <0xb2>;
865defm V_CMPX_LE_I64 : VOPC_Real_si <0xb3>;
866defm V_CMPX_GT_I64 : VOPC_Real_si <0xb4>;
867defm V_CMPX_NE_I64 : VOPC_Real_si <0xb5>;
868defm V_CMPX_GE_I64 : VOPC_Real_si <0xb6>;
869defm V_CMPX_T_I64 : VOPC_Real_si <0xb7>;
870
871defm V_CMP_F_U32 : VOPC_Real_si <0xc0>;
872defm V_CMP_LT_U32 : VOPC_Real_si <0xc1>;
873defm V_CMP_EQ_U32 : VOPC_Real_si <0xc2>;
874defm V_CMP_LE_U32 : VOPC_Real_si <0xc3>;
875defm V_CMP_GT_U32 : VOPC_Real_si <0xc4>;
876defm V_CMP_NE_U32 : VOPC_Real_si <0xc5>;
877defm V_CMP_GE_U32 : VOPC_Real_si <0xc6>;
878defm V_CMP_T_U32 : VOPC_Real_si <0xc7>;
879
880defm V_CMPX_F_U32 : VOPC_Real_si <0xd0>;
881defm V_CMPX_LT_U32 : VOPC_Real_si <0xd1>;
882defm V_CMPX_EQ_U32 : VOPC_Real_si <0xd2>;
883defm V_CMPX_LE_U32 : VOPC_Real_si <0xd3>;
884defm V_CMPX_GT_U32 : VOPC_Real_si <0xd4>;
885defm V_CMPX_NE_U32 : VOPC_Real_si <0xd5>;
886defm V_CMPX_GE_U32 : VOPC_Real_si <0xd6>;
887defm V_CMPX_T_U32 : VOPC_Real_si <0xd7>;
888
889defm V_CMP_F_U64 : VOPC_Real_si <0xe0>;
890defm V_CMP_LT_U64 : VOPC_Real_si <0xe1>;
891defm V_CMP_EQ_U64 : VOPC_Real_si <0xe2>;
892defm V_CMP_LE_U64 : VOPC_Real_si <0xe3>;
893defm V_CMP_GT_U64 : VOPC_Real_si <0xe4>;
894defm V_CMP_NE_U64 : VOPC_Real_si <0xe5>;
895defm V_CMP_GE_U64 : VOPC_Real_si <0xe6>;
896defm V_CMP_T_U64 : VOPC_Real_si <0xe7>;
897
898defm V_CMPX_F_U64 : VOPC_Real_si <0xf0>;
899defm V_CMPX_LT_U64 : VOPC_Real_si <0xf1>;
900defm V_CMPX_EQ_U64 : VOPC_Real_si <0xf2>;
901defm V_CMPX_LE_U64 : VOPC_Real_si <0xf3>;
902defm V_CMPX_GT_U64 : VOPC_Real_si <0xf4>;
903defm V_CMPX_NE_U64 : VOPC_Real_si <0xf5>;
904defm V_CMPX_GE_U64 : VOPC_Real_si <0xf6>;
905defm V_CMPX_T_U64 : VOPC_Real_si <0xf7>;
906
907defm V_CMP_CLASS_F32 : VOPC_Real_si <0x88>;
908defm V_CMPX_CLASS_F32 : VOPC_Real_si <0x98>;
909defm V_CMP_CLASS_F64 : VOPC_Real_si <0xa8>;
910defm V_CMPX_CLASS_F64 : VOPC_Real_si <0xb8>;
911
912//===----------------------------------------------------------------------===//
913// VI
914//===----------------------------------------------------------------------===//
915
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]916multiclass VOPC_Real_vi <bits<10> op> {
917 let AssemblerPredicates = [isVI], DecoderNamespace = "VI" in {
918 def _e32_vi :
919 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>,
920 VOPCe<op{7-0}>;
921
922 def _e64_vi :
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]923 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
924 VOP3a_vi <op, !cast<VOP3_Pseudo>(NAME#"_e64").Pfl> {
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]925 // Encoding used for VOPC instructions encoded as VOP3
926 // Differs from VOP3e by destination name (sdst) as VOPC doesn't have vector dst
927 bits<8> sdst;
928 let Inst{7-0} = sdst;
929 }
930 }
931
Sam Koltona568e3d2016-12-22 12:57:41 +0000[diff] [blame]932 def _sdwa_vi :
933 VOP_SDWA_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
934 VOPC_SDWAe <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]935
Sam Koltonf7659d712017-05-23 10:08:55 +0000[diff] [blame]936 def _sdwa_gfx9 :
Sam Kolton549c89d2017-06-21 08:53:38 +0000[diff] [blame]937 VOP_SDWA9_Real <!cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa")>,
938 VOPC_SDWA9e <op{7-0}, !cast<VOPC_SDWA_Pseudo>(NAME#"_sdwa").Pfl>;
Sam Koltonf7659d712017-05-23 10:08:55 +0000[diff] [blame]939
Valery Pykhtin355103f2016-09-23 09:08:07 +0000[diff] [blame]940 def : VOPCInstAlias <!cast<VOP3_Pseudo>(NAME#"_e64"),
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]941 !cast<Instruction>(NAME#"_e32_vi")> {
942 let AssemblerPredicate = isVI;
943 }
944}
945
Valery Pykhtin2828b9b2016-09-19 14:39:49 +0000[diff] [blame]946defm V_CMP_CLASS_F32 : VOPC_Real_vi <0x10>;
947defm V_CMPX_CLASS_F32 : VOPC_Real_vi <0x11>;
948defm V_CMP_CLASS_F64 : VOPC_Real_vi <0x12>;
949defm V_CMPX_CLASS_F64 : VOPC_Real_vi <0x13>;
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]950defm V_CMP_CLASS_F16 : VOPC_Real_vi <0x14>;
951defm V_CMPX_CLASS_F16 : VOPC_Real_vi <0x15>;
952
953defm V_CMP_F_F16 : VOPC_Real_vi <0x20>;
954defm V_CMP_LT_F16 : VOPC_Real_vi <0x21>;
955defm V_CMP_EQ_F16 : VOPC_Real_vi <0x22>;
956defm V_CMP_LE_F16 : VOPC_Real_vi <0x23>;
957defm V_CMP_GT_F16 : VOPC_Real_vi <0x24>;
958defm V_CMP_LG_F16 : VOPC_Real_vi <0x25>;
959defm V_CMP_GE_F16 : VOPC_Real_vi <0x26>;
960defm V_CMP_O_F16 : VOPC_Real_vi <0x27>;
961defm V_CMP_U_F16 : VOPC_Real_vi <0x28>;
962defm V_CMP_NGE_F16 : VOPC_Real_vi <0x29>;
963defm V_CMP_NLG_F16 : VOPC_Real_vi <0x2a>;
964defm V_CMP_NGT_F16 : VOPC_Real_vi <0x2b>;
965defm V_CMP_NLE_F16 : VOPC_Real_vi <0x2c>;
966defm V_CMP_NEQ_F16 : VOPC_Real_vi <0x2d>;
967defm V_CMP_NLT_F16 : VOPC_Real_vi <0x2e>;
968defm V_CMP_TRU_F16 : VOPC_Real_vi <0x2f>;
969
970defm V_CMPX_F_F16 : VOPC_Real_vi <0x30>;
971defm V_CMPX_LT_F16 : VOPC_Real_vi <0x31>;
972defm V_CMPX_EQ_F16 : VOPC_Real_vi <0x32>;
973defm V_CMPX_LE_F16 : VOPC_Real_vi <0x33>;
974defm V_CMPX_GT_F16 : VOPC_Real_vi <0x34>;
975defm V_CMPX_LG_F16 : VOPC_Real_vi <0x35>;
976defm V_CMPX_GE_F16 : VOPC_Real_vi <0x36>;
977defm V_CMPX_O_F16 : VOPC_Real_vi <0x37>;
978defm V_CMPX_U_F16 : VOPC_Real_vi <0x38>;
979defm V_CMPX_NGE_F16 : VOPC_Real_vi <0x39>;
980defm V_CMPX_NLG_F16 : VOPC_Real_vi <0x3a>;
981defm V_CMPX_NGT_F16 : VOPC_Real_vi <0x3b>;
982defm V_CMPX_NLE_F16 : VOPC_Real_vi <0x3c>;
983defm V_CMPX_NEQ_F16 : VOPC_Real_vi <0x3d>;
984defm V_CMPX_NLT_F16 : VOPC_Real_vi <0x3e>;
985defm V_CMPX_TRU_F16 : VOPC_Real_vi <0x3f>;
986
987defm V_CMP_F_F32 : VOPC_Real_vi <0x40>;
988defm V_CMP_LT_F32 : VOPC_Real_vi <0x41>;
989defm V_CMP_EQ_F32 : VOPC_Real_vi <0x42>;
990defm V_CMP_LE_F32 : VOPC_Real_vi <0x43>;
991defm V_CMP_GT_F32 : VOPC_Real_vi <0x44>;
992defm V_CMP_LG_F32 : VOPC_Real_vi <0x45>;
993defm V_CMP_GE_F32 : VOPC_Real_vi <0x46>;
994defm V_CMP_O_F32 : VOPC_Real_vi <0x47>;
995defm V_CMP_U_F32 : VOPC_Real_vi <0x48>;
996defm V_CMP_NGE_F32 : VOPC_Real_vi <0x49>;
997defm V_CMP_NLG_F32 : VOPC_Real_vi <0x4a>;
998defm V_CMP_NGT_F32 : VOPC_Real_vi <0x4b>;
999defm V_CMP_NLE_F32 : VOPC_Real_vi <0x4c>;
1000defm V_CMP_NEQ_F32 : VOPC_Real_vi <0x4d>;
1001defm V_CMP_NLT_F32 : VOPC_Real_vi <0x4e>;
1002defm V_CMP_TRU_F32 : VOPC_Real_vi <0x4f>;
1003
1004defm V_CMPX_F_F32 : VOPC_Real_vi <0x50>;
1005defm V_CMPX_LT_F32 : VOPC_Real_vi <0x51>;
1006defm V_CMPX_EQ_F32 : VOPC_Real_vi <0x52>;
1007defm V_CMPX_LE_F32 : VOPC_Real_vi <0x53>;
1008defm V_CMPX_GT_F32 : VOPC_Real_vi <0x54>;
1009defm V_CMPX_LG_F32 : VOPC_Real_vi <0x55>;
1010defm V_CMPX_GE_F32 : VOPC_Real_vi <0x56>;
1011defm V_CMPX_O_F32 : VOPC_Real_vi <0x57>;
1012defm V_CMPX_U_F32 : VOPC_Real_vi <0x58>;
1013defm V_CMPX_NGE_F32 : VOPC_Real_vi <0x59>;
1014defm V_CMPX_NLG_F32 : VOPC_Real_vi <0x5a>;
1015defm V_CMPX_NGT_F32 : VOPC_Real_vi <0x5b>;
1016defm V_CMPX_NLE_F32 : VOPC_Real_vi <0x5c>;
1017defm V_CMPX_NEQ_F32 : VOPC_Real_vi <0x5d>;
1018defm V_CMPX_NLT_F32 : VOPC_Real_vi <0x5e>;
1019defm V_CMPX_TRU_F32 : VOPC_Real_vi <0x5f>;
1020
1021defm V_CMP_F_F64 : VOPC_Real_vi <0x60>;
1022defm V_CMP_LT_F64 : VOPC_Real_vi <0x61>;
1023defm V_CMP_EQ_F64 : VOPC_Real_vi <0x62>;
1024defm V_CMP_LE_F64 : VOPC_Real_vi <0x63>;
1025defm V_CMP_GT_F64 : VOPC_Real_vi <0x64>;
1026defm V_CMP_LG_F64 : VOPC_Real_vi <0x65>;
1027defm V_CMP_GE_F64 : VOPC_Real_vi <0x66>;
1028defm V_CMP_O_F64 : VOPC_Real_vi <0x67>;
1029defm V_CMP_U_F64 : VOPC_Real_vi <0x68>;
1030defm V_CMP_NGE_F64 : VOPC_Real_vi <0x69>;
1031defm V_CMP_NLG_F64 : VOPC_Real_vi <0x6a>;
1032defm V_CMP_NGT_F64 : VOPC_Real_vi <0x6b>;
1033defm V_CMP_NLE_F64 : VOPC_Real_vi <0x6c>;
1034defm V_CMP_NEQ_F64 : VOPC_Real_vi <0x6d>;
1035defm V_CMP_NLT_F64 : VOPC_Real_vi <0x6e>;
1036defm V_CMP_TRU_F64 : VOPC_Real_vi <0x6f>;
1037
1038defm V_CMPX_F_F64 : VOPC_Real_vi <0x70>;
1039defm V_CMPX_LT_F64 : VOPC_Real_vi <0x71>;
1040defm V_CMPX_EQ_F64 : VOPC_Real_vi <0x72>;
1041defm V_CMPX_LE_F64 : VOPC_Real_vi <0x73>;
1042defm V_CMPX_GT_F64 : VOPC_Real_vi <0x74>;
1043defm V_CMPX_LG_F64 : VOPC_Real_vi <0x75>;
1044defm V_CMPX_GE_F64 : VOPC_Real_vi <0x76>;
1045defm V_CMPX_O_F64 : VOPC_Real_vi <0x77>;
1046defm V_CMPX_U_F64 : VOPC_Real_vi <0x78>;
1047defm V_CMPX_NGE_F64 : VOPC_Real_vi <0x79>;
1048defm V_CMPX_NLG_F64 : VOPC_Real_vi <0x7a>;
1049defm V_CMPX_NGT_F64 : VOPC_Real_vi <0x7b>;
1050defm V_CMPX_NLE_F64 : VOPC_Real_vi <0x7c>;
1051defm V_CMPX_NEQ_F64 : VOPC_Real_vi <0x7d>;
1052defm V_CMPX_NLT_F64 : VOPC_Real_vi <0x7e>;
1053defm V_CMPX_TRU_F64 : VOPC_Real_vi <0x7f>;
1054
Matt Arsenault18f56be2016-12-22 16:27:11 +0000[diff] [blame]1055defm V_CMP_F_I16 : VOPC_Real_vi <0xa0>;
1056defm V_CMP_LT_I16 : VOPC_Real_vi <0xa1>;
1057defm V_CMP_EQ_I16 : VOPC_Real_vi <0xa2>;
1058defm V_CMP_LE_I16 : VOPC_Real_vi <0xa3>;
1059defm V_CMP_GT_I16 : VOPC_Real_vi <0xa4>;
1060defm V_CMP_NE_I16 : VOPC_Real_vi <0xa5>;
1061defm V_CMP_GE_I16 : VOPC_Real_vi <0xa6>;
1062defm V_CMP_T_I16 : VOPC_Real_vi <0xa7>;
1063
1064defm V_CMP_F_U16 : VOPC_Real_vi <0xa8>;
1065defm V_CMP_LT_U16 : VOPC_Real_vi <0xa9>;
1066defm V_CMP_EQ_U16 : VOPC_Real_vi <0xaa>;
1067defm V_CMP_LE_U16 : VOPC_Real_vi <0xab>;
1068defm V_CMP_GT_U16 : VOPC_Real_vi <0xac>;
1069defm V_CMP_NE_U16 : VOPC_Real_vi <0xad>;
1070defm V_CMP_GE_U16 : VOPC_Real_vi <0xae>;
1071defm V_CMP_T_U16 : VOPC_Real_vi <0xaf>;
1072
Matt Arsenault3c97e202016-12-22 16:27:14 +0000[diff] [blame]1073defm V_CMPX_F_I16 : VOPC_Real_vi <0xb0>;
1074defm V_CMPX_LT_I16 : VOPC_Real_vi <0xb1>;
1075defm V_CMPX_EQ_I16 : VOPC_Real_vi <0xb2>;
1076defm V_CMPX_LE_I16 : VOPC_Real_vi <0xb3>;
1077defm V_CMPX_GT_I16 : VOPC_Real_vi <0xb4>;
1078defm V_CMPX_NE_I16 : VOPC_Real_vi <0xb5>;
1079defm V_CMPX_GE_I16 : VOPC_Real_vi <0xb6>;
1080defm V_CMPX_T_I16 : VOPC_Real_vi <0xb7>;
1081
1082defm V_CMPX_F_U16 : VOPC_Real_vi <0xb8>;
1083defm V_CMPX_LT_U16 : VOPC_Real_vi <0xb9>;
1084defm V_CMPX_EQ_U16 : VOPC_Real_vi <0xba>;
1085defm V_CMPX_LE_U16 : VOPC_Real_vi <0xbb>;
1086defm V_CMPX_GT_U16 : VOPC_Real_vi <0xbc>;
1087defm V_CMPX_NE_U16 : VOPC_Real_vi <0xbd>;
1088defm V_CMPX_GE_U16 : VOPC_Real_vi <0xbe>;
1089defm V_CMPX_T_U16 : VOPC_Real_vi <0xbf>;
1090
Konstantin Zhuravlyovf86e4b72016-11-13 07:01:11 +0000[diff] [blame]1091defm V_CMP_F_I32 : VOPC_Real_vi <0xc0>;
1092defm V_CMP_LT_I32 : VOPC_Real_vi <0xc1>;
1093defm V_CMP_EQ_I32 : VOPC_Real_vi <0xc2>;
1094defm V_CMP_LE_I32 : VOPC_Real_vi <0xc3>;
1095defm V_CMP_GT_I32 : VOPC_Real_vi <0xc4>;
1096defm V_CMP_NE_I32 : VOPC_Real_vi <0xc5>;
1097defm V_CMP_GE_I32 : VOPC_Real_vi <0xc6>;
1098defm V_CMP_T_I32 : VOPC_Real_vi <0xc7>;
1099
1100defm V_CMPX_F_I32 : VOPC_Real_vi <0xd0>;
1101defm V_CMPX_LT_I32 : VOPC_Real_vi <0xd1>;
1102defm V_CMPX_EQ_I32 : VOPC_Real_vi <0xd2>;
1103defm V_CMPX_LE_I32 : VOPC_Real_vi <0xd3>;
1104defm V_CMPX_GT_I32 : VOPC_Real_vi <0xd4>;
1105defm V_CMPX_NE_I32 : VOPC_Real_vi <0xd5>;
1106defm V_CMPX_GE_I32 : VOPC_Real_vi <0xd6>;
1107defm V_CMPX_T_I32 : VOPC_Real_vi <0xd7>;
1108
1109defm V_CMP_F_I64 : VOPC_Real_vi <0xe0>;
1110defm V_CMP_LT_I64 : VOPC_Real_vi <0xe1>;
1111defm V_CMP_EQ_I64 : VOPC_Real_vi <0xe2>;
1112defm V_CMP_LE_I64 : VOPC_Real_vi <0xe3>;
1113defm V_CMP_GT_I64 : VOPC_Real_vi <0xe4>;
1114defm V_CMP_NE_I64 : VOPC_Real_vi <0xe5>;
1115defm V_CMP_GE_I64 : VOPC_Real_vi <0xe6>;
1116defm V_CMP_T_I64 : VOPC_Real_vi <0xe7>;
1117
1118defm V_CMPX_F_I64 : VOPC_Real_vi <0xf0>;
1119defm V_CMPX_LT_I64 : VOPC_Real_vi <0xf1>;
1120defm V_CMPX_EQ_I64 : VOPC_Real_vi <0xf2>;
1121defm V_CMPX_LE_I64 : VOPC_Real_vi <0xf3>;
1122defm V_CMPX_GT_I64 : VOPC_Real_vi <0xf4>;
1123defm V_CMPX_NE_I64 : VOPC_Real_vi <0xf5>;
1124defm V_CMPX_GE_I64 : VOPC_Real_vi <0xf6>;
1125defm V_CMPX_T_I64 : VOPC_Real_vi <0xf7>;
1126
1127defm V_CMP_F_U32 : VOPC_Real_vi <0xc8>;
1128defm V_CMP_LT_U32 : VOPC_Real_vi <0xc9>;
1129defm V_CMP_EQ_U32 : VOPC_Real_vi <0xca>;
1130defm V_CMP_LE_U32 : VOPC_Real_vi <0xcb>;
1131defm V_CMP_GT_U32 : VOPC_Real_vi <0xcc>;
1132defm V_CMP_NE_U32 : VOPC_Real_vi <0xcd>;
1133defm V_CMP_GE_U32 : VOPC_Real_vi <0xce>;
1134defm V_CMP_T_U32 : VOPC_Real_vi <0xcf>;
1135
1136defm V_CMPX_F_U32 : VOPC_Real_vi <0xd8>;
1137defm V_CMPX_LT_U32 : VOPC_Real_vi <0xd9>;
1138defm V_CMPX_EQ_U32 : VOPC_Real_vi <0xda>;
1139defm V_CMPX_LE_U32 : VOPC_Real_vi <0xdb>;
1140defm V_CMPX_GT_U32 : VOPC_Real_vi <0xdc>;
1141defm V_CMPX_NE_U32 : VOPC_Real_vi <0xdd>;
1142defm V_CMPX_GE_U32 : VOPC_Real_vi <0xde>;
1143defm V_CMPX_T_U32 : VOPC_Real_vi <0xdf>;
1144
1145defm V_CMP_F_U64 : VOPC_Real_vi <0xe8>;
1146defm V_CMP_LT_U64 : VOPC_Real_vi <0xe9>;
1147defm V_CMP_EQ_U64 : VOPC_Real_vi <0xea>;
1148defm V_CMP_LE_U64 : VOPC_Real_vi <0xeb>;
1149defm V_CMP_GT_U64 : VOPC_Real_vi <0xec>;
1150defm V_CMP_NE_U64 : VOPC_Real_vi <0xed>;
1151defm V_CMP_GE_U64 : VOPC_Real_vi <0xee>;
1152defm V_CMP_T_U64 : VOPC_Real_vi <0xef>;
1153
1154defm V_CMPX_F_U64 : VOPC_Real_vi <0xf8>;
1155defm V_CMPX_LT_U64 : VOPC_Real_vi <0xf9>;
1156defm V_CMPX_EQ_U64 : VOPC_Real_vi <0xfa>;
1157defm V_CMPX_LE_U64 : VOPC_Real_vi <0xfb>;
1158defm V_CMPX_GT_U64 : VOPC_Real_vi <0xfc>;
1159defm V_CMPX_NE_U64 : VOPC_Real_vi <0xfd>;
1160defm V_CMPX_GE_U64 : VOPC_Real_vi <0xfe>;
1161defm V_CMPX_T_U64 : VOPC_Real_vi <0xff>;