Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 1 | //===- AMDGPULegalizerInfo.cpp -----------------------------------*- C++ -*-==// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | /// \file |
| 10 | /// This file implements the targeting of the Machinelegalizer class for |
| 11 | /// AMDGPU. |
| 12 | /// \todo This should be generated by TableGen. |
| 13 | //===----------------------------------------------------------------------===// |
| 14 | |
Yaxun Liu | 0124b54 | 2018-02-13 18:00:25 +0000 | [diff] [blame] | 15 | #include "AMDGPU.h" |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 16 | #include "AMDGPULegalizerInfo.h" |
David Blaikie | b3bde2e | 2017-11-17 01:07:10 +0000 | [diff] [blame] | 17 | #include "llvm/CodeGen/TargetOpcodes.h" |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 18 | #include "llvm/CodeGen/ValueTypes.h" |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 19 | #include "llvm/IR/DerivedTypes.h" |
Chandler Carruth | 6bda14b | 2017-06-06 11:49:48 +0000 | [diff] [blame] | 20 | #include "llvm/IR/Type.h" |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 21 | #include "llvm/Support/Debug.h" |
| 22 | |
| 23 | using namespace llvm; |
Daniel Sanders | 9ade559 | 2018-01-29 17:37:29 +0000 | [diff] [blame] | 24 | using namespace LegalizeActions; |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 25 | |
Matt Arsenault | c3fe46b | 2018-03-08 16:24:16 +0000 | [diff] [blame^] | 26 | AMDGPULegalizerInfo::AMDGPULegalizerInfo(const SISubtarget &ST, |
| 27 | const GCNTargetMachine &TM) { |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 28 | using namespace TargetOpcode; |
| 29 | |
Tom Stellard | e042412 | 2017-06-03 01:13:33 +0000 | [diff] [blame] | 30 | const LLT S1= LLT::scalar(1); |
Tom Stellard | ff63ee0 | 2017-06-19 13:15:45 +0000 | [diff] [blame] | 31 | const LLT V2S16 = LLT::vector(2, 16); |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 32 | const LLT S32 = LLT::scalar(32); |
| 33 | const LLT S64 = LLT::scalar(64); |
Yaxun Liu | 0124b54 | 2018-02-13 18:00:25 +0000 | [diff] [blame] | 34 | const LLT P1 = LLT::pointer(AMDGPUAS::GLOBAL_ADDRESS, 64); |
| 35 | const LLT P2 = LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64); |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 36 | |
Tom Stellard | ee6e645 | 2017-06-12 20:54:56 +0000 | [diff] [blame] | 37 | setAction({G_ADD, S32}, Legal); |
Matt Arsenault | dc14ec0 | 2018-03-01 19:22:05 +0000 | [diff] [blame] | 38 | setAction({G_MUL, S32}, Legal); |
Tom Stellard | af552dc | 2017-06-23 15:17:17 +0000 | [diff] [blame] | 39 | setAction({G_AND, S32}, Legal); |
Matt Arsenault | 3f6a204 | 2018-03-01 19:09:21 +0000 | [diff] [blame] | 40 | setAction({G_OR, S32}, Legal); |
| 41 | setAction({G_XOR, S32}, Legal); |
Tom Stellard | ee6e645 | 2017-06-12 20:54:56 +0000 | [diff] [blame] | 42 | |
Tom Stellard | ff63ee0 | 2017-06-19 13:15:45 +0000 | [diff] [blame] | 43 | setAction({G_BITCAST, V2S16}, Legal); |
| 44 | setAction({G_BITCAST, 1, S32}, Legal); |
| 45 | |
| 46 | setAction({G_BITCAST, S32}, Legal); |
| 47 | setAction({G_BITCAST, 1, V2S16}, Legal); |
| 48 | |
Tom Stellard | e042412 | 2017-06-03 01:13:33 +0000 | [diff] [blame] | 49 | // FIXME: i1 operands to intrinsics should always be legal, but other i1 |
| 50 | // values may not be legal. We need to figure out how to distinguish |
| 51 | // between these two scenarios. |
| 52 | setAction({G_CONSTANT, S1}, Legal); |
Tom Stellard | a0d67c7 | 2017-05-12 16:46:46 +0000 | [diff] [blame] | 53 | setAction({G_CONSTANT, S32}, Legal); |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 54 | setAction({G_CONSTANT, S64}, Legal); |
| 55 | |
Tom Stellard | dde28a8 | 2017-05-26 16:40:03 +0000 | [diff] [blame] | 56 | setAction({G_FCONSTANT, S32}, Legal); |
Matt Arsenault | 2a26a28 | 2018-02-26 17:20:43 +0000 | [diff] [blame] | 57 | setAction({G_FCONSTANT, S64}, Legal); |
Tom Stellard | dde28a8 | 2017-05-26 16:40:03 +0000 | [diff] [blame] | 58 | |
Matt Arsenault | 06cbb27 | 2018-03-01 19:16:52 +0000 | [diff] [blame] | 59 | setAction({G_IMPLICIT_DEF, S32}, Legal); |
| 60 | setAction({G_IMPLICIT_DEF, S64}, Legal); |
| 61 | |
Tom Stellard | d0c6cf2 | 2017-10-27 23:57:41 +0000 | [diff] [blame] | 62 | setAction({G_FADD, S32}, Legal); |
| 63 | |
Matt Arsenault | 8e80a5f | 2018-03-01 19:09:16 +0000 | [diff] [blame] | 64 | setAction({G_FCMP, S1}, Legal); |
| 65 | setAction({G_FCMP, 1, S32}, Legal); |
| 66 | setAction({G_FCMP, 1, S64}, Legal); |
| 67 | |
Tom Stellard | 3337d74 | 2017-08-02 22:56:30 +0000 | [diff] [blame] | 68 | setAction({G_FMUL, S32}, Legal); |
| 69 | |
Matt Arsenault | 0529a8e | 2018-03-01 20:56:21 +0000 | [diff] [blame] | 70 | setAction({G_ZEXT, S64}, Legal); |
| 71 | setAction({G_ZEXT, 1, S32}, Legal); |
| 72 | |
Matt Arsenault | dd022ce | 2018-03-01 19:04:25 +0000 | [diff] [blame] | 73 | setAction({G_FPTOSI, S32}, Legal); |
| 74 | setAction({G_FPTOSI, 1, S32}, Legal); |
| 75 | |
Tom Stellard | 3344576 | 2018-02-07 04:47:59 +0000 | [diff] [blame] | 76 | setAction({G_FPTOUI, S32}, Legal); |
| 77 | setAction({G_FPTOUI, 1, S32}, Legal); |
| 78 | |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 79 | setAction({G_GEP, P1}, Legal); |
| 80 | setAction({G_GEP, P2}, Legal); |
| 81 | setAction({G_GEP, 1, S64}, Legal); |
| 82 | |
Tom Stellard | 8cd60a5 | 2017-06-06 14:16:50 +0000 | [diff] [blame] | 83 | setAction({G_ICMP, S1}, Legal); |
| 84 | setAction({G_ICMP, 1, S32}, Legal); |
| 85 | |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 86 | setAction({G_LOAD, P1}, Legal); |
| 87 | setAction({G_LOAD, P2}, Legal); |
| 88 | setAction({G_LOAD, S32}, Legal); |
| 89 | setAction({G_LOAD, 1, P1}, Legal); |
| 90 | setAction({G_LOAD, 1, P2}, Legal); |
| 91 | |
Tom Stellard | 2860a42 | 2017-06-07 13:54:51 +0000 | [diff] [blame] | 92 | setAction({G_SELECT, S32}, Legal); |
| 93 | setAction({G_SELECT, 1, S1}, Legal); |
| 94 | |
Tom Stellard | eb8f1e2 | 2017-06-26 15:56:52 +0000 | [diff] [blame] | 95 | setAction({G_SHL, S32}, Legal); |
| 96 | |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 97 | setAction({G_STORE, S32}, Legal); |
| 98 | setAction({G_STORE, 1, P1}, Legal); |
| 99 | |
| 100 | // FIXME: When RegBankSelect inserts copies, it will only create new |
| 101 | // registers with scalar types. This means we can end up with |
| 102 | // G_LOAD/G_STORE/G_GEP instruction with scalar types for their pointer |
| 103 | // operands. In assert builds, the instruction selector will assert |
| 104 | // if it sees a generic instruction which isn't legal, so we need to |
| 105 | // tell it that scalar types are legal for pointer operands |
| 106 | setAction({G_GEP, S64}, Legal); |
| 107 | setAction({G_LOAD, 1, S64}, Legal); |
| 108 | setAction({G_STORE, 1, S64}, Legal); |
| 109 | |
Matt Arsenault | 71272e6 | 2018-03-05 16:25:15 +0000 | [diff] [blame] | 110 | // FIXME: Doesn't handle extract of illegal sizes. |
| 111 | getActionDefinitionsBuilder(G_EXTRACT) |
| 112 | .unsupportedIf([=](const LegalityQuery &Query) { |
| 113 | return Query.Types[0].getSizeInBits() >= Query.Types[1].getSizeInBits(); |
| 114 | }) |
| 115 | .legalIf([=](const LegalityQuery &Query) { |
| 116 | const LLT &Ty0 = Query.Types[0]; |
| 117 | const LLT &Ty1 = Query.Types[1]; |
| 118 | return (Ty0.getSizeInBits() % 32 == 0) && |
| 119 | (Ty1.getSizeInBits() % 32 == 0); |
| 120 | }); |
| 121 | |
Tom Stellard | ca16621 | 2017-01-30 21:56:46 +0000 | [diff] [blame] | 122 | computeTables(); |
| 123 | } |