Jia Liu | e1d6196 | 2012-02-19 02:03:36 +0000 | [diff] [blame] | 1 | //===-- X86Subtarget.h - Define Subtarget for the X86 ----------*- C++ -*--===// |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
Chris Lattner | f3ebc3f | 2007-12-29 20:36:04 +0000 | [diff] [blame] | 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
Evan Cheng | 0d639a2 | 2011-07-01 21:01:15 +0000 | [diff] [blame] | 10 | // This file declares the X86 specific subclass of TargetSubtargetInfo. |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 11 | // |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
Benjamin Kramer | a7c40ef | 2014-08-13 16:26:38 +0000 | [diff] [blame] | 14 | #ifndef LLVM_LIB_TARGET_X86_X86SUBTARGET_H |
| 15 | #define LLVM_LIB_TARGET_X86_X86SUBTARGET_H |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 16 | |
Eric Christopher | a08f30b | 2014-06-09 17:08:19 +0000 | [diff] [blame] | 17 | #include "X86FrameLowering.h" |
| 18 | #include "X86ISelLowering.h" |
| 19 | #include "X86InstrInfo.h" |
Eric Christopher | a08f30b | 2014-06-09 17:08:19 +0000 | [diff] [blame] | 20 | #include "X86SelectionDAGInfo.h" |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 21 | #include "llvm/ADT/StringRef.h" |
Eric Christopher | d429846 | 2010-07-05 19:26:33 +0000 | [diff] [blame] | 22 | #include "llvm/ADT/Triple.h" |
Quentin Colombet | 61d71a1 | 2017-08-15 22:31:51 +0000 | [diff] [blame] | 23 | #include "llvm/CodeGen/GlobalISel/CallLowering.h" |
| 24 | #include "llvm/CodeGen/GlobalISel/InstructionSelector.h" |
| 25 | #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" |
| 26 | #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h" |
David Blaikie | b3bde2e | 2017-11-17 01:07:10 +0000 | [diff] [blame] | 27 | #include "llvm/CodeGen/TargetSubtargetInfo.h" |
Chandler Carruth | 9fb823b | 2013-01-02 11:36:10 +0000 | [diff] [blame] | 28 | #include "llvm/IR/CallingConv.h" |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 29 | #include "llvm/MC/MCInstrItineraries.h" |
| 30 | #include "llvm/Target/TargetMachine.h" |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 31 | #include <memory> |
Jim Laskey | 19058c3 | 2005-09-01 21:38:21 +0000 | [diff] [blame] | 32 | |
Evan Cheng | 54b68e3 | 2011-07-01 20:45:01 +0000 | [diff] [blame] | 33 | #define GET_SUBTARGETINFO_HEADER |
Evan Cheng | c9c090d | 2011-07-01 22:36:09 +0000 | [diff] [blame] | 34 | #include "X86GenSubtargetInfo.inc" |
Evan Cheng | 54b68e3 | 2011-07-01 20:45:01 +0000 | [diff] [blame] | 35 | |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 36 | namespace llvm { |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 37 | |
Anton Korobeynikov | 6dbdfe2 | 2006-11-30 22:42:55 +0000 | [diff] [blame] | 38 | class GlobalValue; |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 39 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 40 | /// The X86 backend supports a number of different styles of PIC. |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 41 | /// |
Duncan Sands | 595a442 | 2008-11-28 09:29:37 +0000 | [diff] [blame] | 42 | namespace PICStyles { |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 43 | |
Anton Korobeynikov | a0554d9 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 44 | enum Style { |
Rafael Espindola | 0d34826 | 2016-06-20 23:41:56 +0000 | [diff] [blame] | 45 | StubPIC, // Used on i386-darwin in pic mode. |
| 46 | GOT, // Used on 32 bit elf on when in pic mode. |
| 47 | RIPRel, // Used on X86-64 when in pic mode. |
| 48 | None // Set when not in pic mode. |
Anton Korobeynikov | a0554d9 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 49 | }; |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 50 | |
| 51 | } // end namespace PICStyles |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 52 | |
Craig Topper | ec82847 | 2014-03-31 06:53:13 +0000 | [diff] [blame] | 53 | class X86Subtarget final : public X86GenSubtargetInfo { |
Mohammed Agabaria | 115f68e | 2017-11-20 08:18:12 +0000 | [diff] [blame] | 54 | public: |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 55 | enum X86ProcFamilyEnum { |
Mohammed Agabaria | 115f68e | 2017-11-20 08:18:12 +0000 | [diff] [blame] | 56 | Others, |
Mohammed Agabaria | e9aebf2 | 2017-09-13 09:00:27 +0000 | [diff] [blame] | 57 | IntelAtom, |
| 58 | IntelSLM, |
| 59 | IntelGLM, |
| 60 | IntelHaswell, |
| 61 | IntelBroadwell, |
| 62 | IntelSkylake, |
| 63 | IntelKNL, |
| 64 | IntelSKX, |
Craig Topper | 81037f3 | 2017-11-19 01:12:00 +0000 | [diff] [blame] | 65 | IntelCannonlake, |
| 66 | IntelIcelake, |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 67 | }; |
| 68 | |
Mohammed Agabaria | 115f68e | 2017-11-20 08:18:12 +0000 | [diff] [blame] | 69 | protected: |
| 70 | enum X86SSEEnum { |
| 71 | NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F |
| 72 | }; |
| 73 | |
| 74 | enum X863DNowEnum { |
| 75 | NoThreeDNow, MMX, ThreeDNow, ThreeDNowA |
| 76 | }; |
| 77 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 78 | /// X86 processor family: Intel Atom, and others |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 79 | X86ProcFamilyEnum X86ProcFamily; |
Chad Rosier | 24c19d2 | 2012-08-01 18:39:17 +0000 | [diff] [blame] | 80 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 81 | /// Which PIC style to use |
Duncan Sands | 595a442 | 2008-11-28 09:29:37 +0000 | [diff] [blame] | 82 | PICStyles::Style PICStyle; |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 83 | |
Rafael Espindola | ab03eb0 | 2016-05-19 22:07:57 +0000 | [diff] [blame] | 84 | const TargetMachine &TM; |
Rafael Espindola | 46107b9 | 2016-05-19 18:49:29 +0000 | [diff] [blame] | 85 | |
Eric Christopher | 11e5983 | 2015-10-08 20:10:06 +0000 | [diff] [blame] | 86 | /// SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported. |
Evan Cheng | cde9e30 | 2006-01-27 08:10:46 +0000 | [diff] [blame] | 87 | X86SSEEnum X86SSELevel; |
| 88 | |
Eric Christopher | 57a6e13 | 2015-11-14 03:04:00 +0000 | [diff] [blame] | 89 | /// MMX, 3DNow, 3DNow Athlon, or none supported. |
Evan Cheng | ff1beda | 2006-10-06 09:17:41 +0000 | [diff] [blame] | 90 | X863DNowEnum X863DNowLevel; |
| 91 | |
Andrey Turetskiy | 6a3d561 | 2016-03-23 11:13:54 +0000 | [diff] [blame] | 92 | /// True if the processor supports X87 instructions. |
| 93 | bool HasX87; |
| 94 | |
Craig Topper | 505f38a | 2018-01-10 22:07:16 +0000 | [diff] [blame] | 95 | /// True if this processor has NOPL instruction |
| 96 | /// (generally pentium pro+). |
| 97 | bool HasNOPL; |
| 98 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 99 | /// True if this processor has conditional move instructions |
Chris Lattner | cc8c581 | 2009-09-02 05:53:04 +0000 | [diff] [blame] | 100 | /// (generally pentium pro+). |
| 101 | bool HasCMov; |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 102 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 103 | /// True if the processor supports X86-64 instructions. |
Evan Cheng | 11b0a5d | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 104 | bool HasX86_64; |
Evan Cheng | 4c91aa3 | 2009-01-02 05:35:45 +0000 | [diff] [blame] | 105 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 106 | /// True if the processor supports POPCNT. |
Benjamin Kramer | 2f48923 | 2010-12-04 20:32:23 +0000 | [diff] [blame] | 107 | bool HasPOPCNT; |
| 108 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 109 | /// True if the processor supports SSE4A instructions. |
Stefanus Du Toit | 96180b5 | 2009-05-26 21:04:35 +0000 | [diff] [blame] | 110 | bool HasSSE4A; |
| 111 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 112 | /// Target has AES instructions |
Eric Christopher | 2ef6318 | 2010-04-02 21:54:27 +0000 | [diff] [blame] | 113 | bool HasAES; |
Coby Tayree | 2a1c02f | 2017-11-21 09:11:41 +0000 | [diff] [blame] | 114 | bool HasVAES; |
Eric Christopher | 2ef6318 | 2010-04-02 21:54:27 +0000 | [diff] [blame] | 115 | |
Craig Topper | 09b6598 | 2015-10-16 06:03:09 +0000 | [diff] [blame] | 116 | /// Target has FXSAVE/FXRESTOR instructions |
| 117 | bool HasFXSR; |
| 118 | |
Amjad Aboud | 1db6d7a | 2015-10-12 11:47:46 +0000 | [diff] [blame] | 119 | /// Target has XSAVE instructions |
| 120 | bool HasXSAVE; |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 121 | |
Amjad Aboud | 1db6d7a | 2015-10-12 11:47:46 +0000 | [diff] [blame] | 122 | /// Target has XSAVEOPT instructions |
| 123 | bool HasXSAVEOPT; |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 124 | |
Amjad Aboud | 1db6d7a | 2015-10-12 11:47:46 +0000 | [diff] [blame] | 125 | /// Target has XSAVEC instructions |
| 126 | bool HasXSAVEC; |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 127 | |
Amjad Aboud | 1db6d7a | 2015-10-12 11:47:46 +0000 | [diff] [blame] | 128 | /// Target has XSAVES instructions |
| 129 | bool HasXSAVES; |
| 130 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 131 | /// Target has carry-less multiplication |
Benjamin Kramer | a0396e4 | 2012-05-31 14:34:17 +0000 | [diff] [blame] | 132 | bool HasPCLMUL; |
Coby Tayree | 7ca5e587 | 2017-11-21 09:30:33 +0000 | [diff] [blame] | 133 | bool HasVPCLMULQDQ; |
Bruno Cardoso Lopes | 09dc24b | 2010-07-23 01:17:51 +0000 | [diff] [blame] | 134 | |
Coby Tayree | d8b17be | 2017-11-26 09:36:41 +0000 | [diff] [blame] | 135 | /// Target has Galois Field Arithmetic instructions |
| 136 | bool HasGFNI; |
| 137 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 138 | /// Target has 3-operand fused multiply-add |
Craig Topper | 79dbb0c | 2012-06-03 18:58:46 +0000 | [diff] [blame] | 139 | bool HasFMA; |
David Greene | 8f6f72c | 2009-06-26 22:46:54 +0000 | [diff] [blame] | 140 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 141 | /// Target has 4-operand fused multiply-add |
David Greene | 8f6f72c | 2009-06-26 22:46:54 +0000 | [diff] [blame] | 142 | bool HasFMA4; |
| 143 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 144 | /// Target has XOP instructions |
Jan Sjödin | 1280eb1 | 2011-12-02 15:14:37 +0000 | [diff] [blame] | 145 | bool HasXOP; |
| 146 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 147 | /// Target has TBM instructions. |
Yunzhong Gao | dd36e93 | 2013-09-24 18:21:52 +0000 | [diff] [blame] | 148 | bool HasTBM; |
| 149 | |
Simon Pilgrim | 99b925b | 2017-05-03 15:51:39 +0000 | [diff] [blame] | 150 | /// Target has LWP instructions |
| 151 | bool HasLWP; |
| 152 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 153 | /// True if the processor has the MOVBE instruction. |
Craig Topper | 786bdb9 | 2011-10-03 17:28:23 +0000 | [diff] [blame] | 154 | bool HasMOVBE; |
| 155 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 156 | /// True if the processor has the RDRAND instruction. |
Craig Topper | 786bdb9 | 2011-10-03 17:28:23 +0000 | [diff] [blame] | 157 | bool HasRDRAND; |
| 158 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 159 | /// Processor has 16-bit floating point conversion instructions. |
Craig Topper | fe9179f | 2011-10-09 07:31:39 +0000 | [diff] [blame] | 160 | bool HasF16C; |
| 161 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 162 | /// Processor has FS/GS base insturctions. |
Craig Topper | 228d913 | 2011-10-30 19:57:21 +0000 | [diff] [blame] | 163 | bool HasFSGSBase; |
| 164 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 165 | /// Processor has LZCNT instruction. |
Craig Topper | 271064e | 2011-10-11 06:44:02 +0000 | [diff] [blame] | 166 | bool HasLZCNT; |
| 167 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 168 | /// Processor has BMI1 instructions. |
Craig Topper | 3657fe4 | 2011-10-14 03:21:46 +0000 | [diff] [blame] | 169 | bool HasBMI; |
| 170 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 171 | /// Processor has BMI2 instructions. |
Craig Topper | aea148c | 2011-10-16 07:55:05 +0000 | [diff] [blame] | 172 | bool HasBMI2; |
| 173 | |
Michael Zuckerman | 97b6a692 | 2016-01-17 13:42:12 +0000 | [diff] [blame] | 174 | /// Processor has VBMI instructions. |
| 175 | bool HasVBMI; |
| 176 | |
Coby Tayree | 71e37cc | 2017-11-21 09:48:44 +0000 | [diff] [blame] | 177 | /// Processor has VBMI2 instructions. |
| 178 | bool HasVBMI2; |
| 179 | |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 180 | /// Processor has Integer Fused Multiply Add |
| 181 | bool HasIFMA; |
| 182 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 183 | /// Processor has RTM instructions. |
Michael Liao | 73cffdd | 2012-11-08 07:28:54 +0000 | [diff] [blame] | 184 | bool HasRTM; |
| 185 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 186 | /// Processor has ADX instructions. |
Kay Tiong Khoo | f809c64 | 2013-02-14 19:08:21 +0000 | [diff] [blame] | 187 | bool HasADX; |
| 188 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 189 | /// Processor has SHA instructions. |
Ben Langmuir | 1650175 | 2013-09-12 15:51:31 +0000 | [diff] [blame] | 190 | bool HasSHA; |
| 191 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 192 | /// Processor has PRFCHW instructions. |
Michael Liao | 5173ee0 | 2013-03-26 17:47:11 +0000 | [diff] [blame] | 193 | bool HasPRFCHW; |
| 194 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 195 | /// Processor has RDSEED instructions. |
Michael Liao | a486a11 | 2013-03-28 23:41:26 +0000 | [diff] [blame] | 196 | bool HasRDSEED; |
| 197 | |
Hans Wennborg | 5000ce8 | 2015-12-04 23:00:33 +0000 | [diff] [blame] | 198 | /// Processor has LAHF/SAHF instructions. |
| 199 | bool HasLAHFSAHF; |
| 200 | |
Ashutosh Nema | 348af9c | 2016-05-18 11:59:12 +0000 | [diff] [blame] | 201 | /// Processor has MONITORX/MWAITX instructions. |
| 202 | bool HasMWAITX; |
| 203 | |
Craig Topper | 50f3d14 | 2017-02-09 04:27:34 +0000 | [diff] [blame] | 204 | /// Processor has Cache Line Zero instruction |
| 205 | bool HasCLZERO; |
| 206 | |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 207 | /// Processor has Prefetch with intent to Write instruction |
Craig Topper | e268598 | 2017-12-22 02:30:30 +0000 | [diff] [blame] | 208 | bool HasPREFETCHWT1; |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 209 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 210 | /// True if SHLD instructions are slow. |
Ekaterina Romanova | d5fa554 | 2013-11-21 23:21:26 +0000 | [diff] [blame] | 211 | bool IsSHLDSlow; |
| 212 | |
Zvi Rackover | 8bc7e4d | 2016-12-06 19:35:20 +0000 | [diff] [blame] | 213 | /// True if the PMULLD instruction is slow compared to PMULLW/PMULHW and |
| 214 | // PMULUDQ. |
| 215 | bool IsPMULLDSlow; |
| 216 | |
Sanjay Patel | 3014567 | 2015-09-01 20:51:51 +0000 | [diff] [blame] | 217 | /// True if unaligned memory accesses of 16-bytes are slow. |
| 218 | bool IsUAMem16Slow; |
Evan Cheng | 738b0f9 | 2010-04-01 05:58:17 +0000 | [diff] [blame] | 219 | |
Sanjay Patel | 9e916dc | 2015-08-21 20:17:26 +0000 | [diff] [blame] | 220 | /// True if unaligned memory accesses of 32-bytes are slow. |
Sanjay Patel | 501890e | 2014-11-21 17:40:04 +0000 | [diff] [blame] | 221 | bool IsUAMem32Slow; |
Michael Liao | 5bf9578 | 2014-12-04 05:20:33 +0000 | [diff] [blame] | 222 | |
Sanjay Patel | ffd039b | 2015-02-03 17:13:04 +0000 | [diff] [blame] | 223 | /// True if SSE operations can have unaligned memory operands. |
| 224 | /// This may require setting a configuration bit in the processor. |
| 225 | bool HasSSEUnalignedMem; |
David Greene | 206351a | 2010-01-11 16:29:42 +0000 | [diff] [blame] | 226 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 227 | /// True if this processor has the CMPXCHG16B instruction; |
Eli Friedman | 5e57042 | 2011-08-26 21:21:21 +0000 | [diff] [blame] | 228 | /// this is true for most x86-64 chips, but not the first AMD chips. |
| 229 | bool HasCmpxchg16b; |
| 230 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 231 | /// True if the LEA instruction should be used for adjusting |
Evan Cheng | 1b81fdd | 2012-02-07 22:50:41 +0000 | [diff] [blame] | 232 | /// the stack pointer. This is an optimization for Intel Atom processors. |
| 233 | bool UseLeaForSP; |
| 234 | |
Simon Pilgrim | fd5df63 | 2017-12-19 13:16:43 +0000 | [diff] [blame] | 235 | /// True if its preferable to combine to a single shuffle using a variable |
| 236 | /// mask over multiple fixed shuffles. |
| 237 | bool HasFastVariableShuffle; |
| 238 | |
Yunzhong Gao | 0de36ec | 2016-02-12 23:37:57 +0000 | [diff] [blame] | 239 | /// True if there is no performance penalty to writing only the lower parts |
Amjad Aboud | 4f97751 | 2017-03-03 09:03:24 +0000 | [diff] [blame] | 240 | /// of a YMM or ZMM register without clearing the upper part. |
| 241 | bool HasFastPartialYMMorZMMWrite; |
Yunzhong Gao | 0de36ec | 2016-02-12 23:37:57 +0000 | [diff] [blame] | 242 | |
Craig Topper | ea37e20 | 2017-11-25 18:09:37 +0000 | [diff] [blame] | 243 | /// True if gather is reasonably fast. This is true for Skylake client and |
| 244 | /// all AVX-512 CPUs. |
| 245 | bool HasFastGather; |
| 246 | |
Nikolai Bozhenov | f679530 | 2016-08-04 12:47:28 +0000 | [diff] [blame] | 247 | /// True if hardware SQRTSS instruction is at least as fast (latency) as |
| 248 | /// RSQRTSS followed by a Newton-Raphson iteration. |
| 249 | bool HasFastScalarFSQRT; |
| 250 | |
| 251 | /// True if hardware SQRTPS/VSQRTPS instructions are at least as fast |
| 252 | /// (throughput) as RSQRTPS/VRSQRTPS followed by a Newton-Raphson iteration. |
| 253 | bool HasFastVectorFSQRT; |
| 254 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 255 | /// True if 8-bit divisions are significantly faster than |
Alexey Volkov | fd1731d | 2014-11-21 11:19:34 +0000 | [diff] [blame] | 256 | /// 32-bit divisions and should be used when possible. |
| 257 | bool HasSlowDivide32; |
| 258 | |
Nikolai Bozhenov | 6bdf92c | 2017-01-12 19:34:15 +0000 | [diff] [blame] | 259 | /// True if 32-bit divides are significantly faster than |
Alexey Volkov | fd1731d | 2014-11-21 11:19:34 +0000 | [diff] [blame] | 260 | /// 64-bit divisions and should be used when possible. |
| 261 | bool HasSlowDivide64; |
Preston Gurd | cdf540d | 2012-09-04 18:22:17 +0000 | [diff] [blame] | 262 | |
Pierre Gousseau | b6d652a | 2016-10-14 16:41:38 +0000 | [diff] [blame] | 263 | /// True if LZCNT instruction is fast. |
| 264 | bool HasFastLZCNT; |
| 265 | |
Craig Topper | d88389a | 2017-02-21 06:39:13 +0000 | [diff] [blame] | 266 | /// True if SHLD based rotate is fast. |
| 267 | bool HasFastSHLDRotate; |
| 268 | |
Craig Topper | 641e2af | 2017-08-30 04:34:48 +0000 | [diff] [blame] | 269 | /// True if the processor supports macrofusion. |
| 270 | bool HasMacroFusion; |
| 271 | |
Clement Courbet | 203fc17 | 2017-04-21 09:20:50 +0000 | [diff] [blame] | 272 | /// True if the processor has enhanced REP MOVSB/STOSB. |
| 273 | bool HasERMSB; |
Clement Courbet | 1ce3b82 | 2017-04-21 09:20:39 +0000 | [diff] [blame] | 274 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 275 | /// True if the short functions should be padded to prevent |
Preston Gurd | a01daac | 2013-01-08 18:27:24 +0000 | [diff] [blame] | 276 | /// a stall when returning too early. |
| 277 | bool PadShortFunctions; |
| 278 | |
Craig Topper | 62c47a2 | 2017-08-29 05:14:27 +0000 | [diff] [blame] | 279 | /// True if two memory operand instructions should use a temporary register |
| 280 | /// instead. |
| 281 | bool SlowTwoMemOps; |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 282 | |
| 283 | /// True if the LEA instruction inputs have to be ready at address generation |
| 284 | /// (AG) time. |
Preston Gurd | 8b7ab4b | 2013-04-25 20:29:37 +0000 | [diff] [blame] | 285 | bool LEAUsesAG; |
Preston Gurd | 663e6f9 | 2013-03-27 19:14:02 +0000 | [diff] [blame] | 286 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 287 | /// True if the LEA instruction with certain arguments is slow |
Alexey Volkov | 6226de6 | 2014-05-20 08:55:50 +0000 | [diff] [blame] | 288 | bool SlowLEA; |
| 289 | |
Lama Saba | 2ea271b | 2017-05-18 08:11:50 +0000 | [diff] [blame] | 290 | /// True if the LEA instruction has all three source operands: base, index, |
| 291 | /// and offset or if the LEA instruction uses base and index registers where |
| 292 | /// the base is EBP, RBP,or R13 |
| 293 | bool Slow3OpsLEA; |
| 294 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 295 | /// True if INC and DEC instructions are slow when writing to flags |
Alexey Volkov | 5260dba | 2014-06-09 11:40:41 +0000 | [diff] [blame] | 296 | bool SlowIncDec; |
| 297 | |
Elena Demikhovsky | 8cfb43f | 2013-07-24 11:02:47 +0000 | [diff] [blame] | 298 | /// Processor has AVX-512 PreFetch Instructions |
| 299 | bool HasPFI; |
Robert Khasanov | bfa0131 | 2014-07-21 14:54:21 +0000 | [diff] [blame] | 300 | |
Elena Demikhovsky | 8cfb43f | 2013-07-24 11:02:47 +0000 | [diff] [blame] | 301 | /// Processor has AVX-512 Exponential and Reciprocal Instructions |
| 302 | bool HasERI; |
Robert Khasanov | bfa0131 | 2014-07-21 14:54:21 +0000 | [diff] [blame] | 303 | |
Elena Demikhovsky | 8cfb43f | 2013-07-24 11:02:47 +0000 | [diff] [blame] | 304 | /// Processor has AVX-512 Conflict Detection Instructions |
| 305 | bool HasCDI; |
Robert Khasanov | bfa0131 | 2014-07-21 14:54:21 +0000 | [diff] [blame] | 306 | |
Oren Ben Simhon | 7bf27f0 | 2017-05-25 13:45:23 +0000 | [diff] [blame] | 307 | /// Processor has AVX-512 population count Instructions |
| 308 | bool HasVPOPCNTDQ; |
| 309 | |
Robert Khasanov | bfa0131 | 2014-07-21 14:54:21 +0000 | [diff] [blame] | 310 | /// Processor has AVX-512 Doubleword and Quadword instructions |
| 311 | bool HasDQI; |
| 312 | |
| 313 | /// Processor has AVX-512 Byte and Word instructions |
| 314 | bool HasBWI; |
| 315 | |
| 316 | /// Processor has AVX-512 Vector Length eXtenstions |
| 317 | bool HasVLX; |
| 318 | |
Asaf Badouh | 5acf66f | 2015-12-15 13:35:29 +0000 | [diff] [blame] | 319 | /// Processor has PKU extenstions |
| 320 | bool HasPKU; |
| 321 | |
Coby Tayree | 3880f2a | 2017-11-21 10:04:28 +0000 | [diff] [blame] | 322 | /// Processor has AVX-512 Vector Neural Network Instructions |
| 323 | bool HasVNNI; |
| 324 | |
Coby Tayree | 5c7fe5d | 2017-11-21 10:32:42 +0000 | [diff] [blame] | 325 | /// Processor has AVX-512 Bit Algorithms instructions |
| 326 | bool HasBITALG; |
| 327 | |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 328 | /// Processor supports MPX - Memory Protection Extensions |
Elena Demikhovsky | f7e641c | 2015-06-03 10:30:57 +0000 | [diff] [blame] | 329 | bool HasMPX; |
| 330 | |
Oren Ben Simhon | fa582b0 | 2017-11-26 13:02:45 +0000 | [diff] [blame] | 331 | /// Processor supports CET SHSTK - Control-Flow Enforcement Technology |
| 332 | /// using Shadow Stack |
| 333 | bool HasSHSTK; |
| 334 | |
| 335 | /// Processor supports CET IBT - Control-Flow Enforcement Technology |
| 336 | /// using Indirect Branch Tracking |
| 337 | bool HasIBT; |
| 338 | |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 339 | /// Processor has Software Guard Extensions |
| 340 | bool HasSGX; |
| 341 | |
| 342 | /// Processor supports Flush Cache Line instruction |
| 343 | bool HasCLFLUSHOPT; |
| 344 | |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 345 | /// Processor supports Cache Line Write Back instruction |
| 346 | bool HasCLWB; |
| 347 | |
Craig Topper | 84b26b9 | 2018-01-18 23:52:31 +0000 | [diff] [blame] | 348 | /// Processor support RDPID instruction |
| 349 | bool HasRDPID; |
| 350 | |
Eric Christopher | 824f42f | 2015-05-12 01:26:05 +0000 | [diff] [blame] | 351 | /// Use software floating point for code generation. |
| 352 | bool UseSoftFloat; |
| 353 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 354 | /// The minimum alignment known to hold of the stack frame on |
Chris Lattner | 351817b | 2005-07-12 02:36:10 +0000 | [diff] [blame] | 355 | /// entry to the function and which must be maintained by every function. |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 356 | unsigned stackAlignment; |
Jeff Cohen | 33a030e | 2005-07-27 05:53:44 +0000 | [diff] [blame] | 357 | |
Rafael Espindola | 063f177 | 2007-10-31 11:52:06 +0000 | [diff] [blame] | 358 | /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops. |
Evan Cheng | 763cdfd | 2007-08-01 23:45:51 +0000 | [diff] [blame] | 359 | /// |
Rafael Espindola | 063f177 | 2007-10-31 11:52:06 +0000 | [diff] [blame] | 360 | unsigned MaxInlineSizeThreshold; |
NAKAMURA Takumi | 0544fe7 | 2011-02-17 12:23:50 +0000 | [diff] [blame] | 361 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 362 | /// What processor and OS we're targeting. |
Eric Christopher | d429846 | 2010-07-05 19:26:33 +0000 | [diff] [blame] | 363 | Triple TargetTriple; |
Chad Rosier | 24c19d2 | 2012-08-01 18:39:17 +0000 | [diff] [blame] | 364 | |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 365 | /// Instruction itineraries for scheduling |
| 366 | InstrItineraryData InstrItins; |
Evan Cheng | 03c1e6f | 2006-02-16 00:21:07 +0000 | [diff] [blame] | 367 | |
Quentin Colombet | 61d71a1 | 2017-08-15 22:31:51 +0000 | [diff] [blame] | 368 | /// GlobalISel related APIs. |
| 369 | std::unique_ptr<CallLowering> CallLoweringInfo; |
| 370 | std::unique_ptr<LegalizerInfo> Legalizer; |
| 371 | std::unique_ptr<RegisterBankInfo> RegBankInfo; |
| 372 | std::unique_ptr<InstructionSelector> InstSelector; |
Eric Christopher | e950b67 | 2014-08-09 04:38:53 +0000 | [diff] [blame] | 373 | |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 374 | private: |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 375 | /// Override the stack alignment. |
Bill Wendling | aef9c37 | 2013-02-15 22:31:27 +0000 | [diff] [blame] | 376 | unsigned StackAlignOverride; |
| 377 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 378 | /// True if compiling for 64-bit, false for 16-bit or 32-bit. |
Evan Cheng | 13bcc6c | 2011-07-07 21:06:52 +0000 | [diff] [blame] | 379 | bool In64BitMode; |
Evan Cheng | 11b0a5d | 2006-09-08 06:48:29 +0000 | [diff] [blame] | 380 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 381 | /// True if compiling for 32-bit, false for 16-bit or 64-bit. |
Craig Topper | 3c80d62 | 2014-01-06 04:55:54 +0000 | [diff] [blame] | 382 | bool In32BitMode; |
| 383 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 384 | /// True if compiling for 16-bit, false for 32-bit or 64-bit. |
Craig Topper | 3c80d62 | 2014-01-06 04:55:54 +0000 | [diff] [blame] | 385 | bool In16BitMode; |
| 386 | |
Mohammed Agabaria | e9aebf2 | 2017-09-13 09:00:27 +0000 | [diff] [blame] | 387 | /// Contains the Overhead of gather\scatter instructions |
| 388 | int GatherOverhead; |
| 389 | int ScatterOverhead; |
| 390 | |
Eric Christopher | a08f30b | 2014-06-09 17:08:19 +0000 | [diff] [blame] | 391 | X86SelectionDAGInfo TSInfo; |
Eric Christopher | 1a21203 | 2014-06-11 00:25:19 +0000 | [diff] [blame] | 392 | // Ordering here is important. X86InstrInfo initializes X86RegisterInfo which |
| 393 | // X86TargetLowering needs. |
| 394 | X86InstrInfo InstrInfo; |
| 395 | X86TargetLowering TLInfo; |
| 396 | X86FrameLowering FrameLowering; |
Eric Christopher | a08f30b | 2014-06-09 17:08:19 +0000 | [diff] [blame] | 397 | |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 398 | public: |
Jeff Cohen | 33a030e | 2005-07-27 05:53:44 +0000 | [diff] [blame] | 399 | /// This constructor initializes the data members to match that |
Daniel Dunbar | 31b44e8 | 2009-08-02 22:11:08 +0000 | [diff] [blame] | 400 | /// of the specified triple. |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 401 | /// |
David Majnemer | ca29023 | 2016-05-20 18:16:06 +0000 | [diff] [blame] | 402 | X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS, |
Daniel Sanders | a1b2db79 | 2017-05-19 11:08:33 +0000 | [diff] [blame] | 403 | const X86TargetMachine &TM, unsigned StackAlignOverride); |
Eric Christopher | a08f30b | 2014-06-09 17:08:19 +0000 | [diff] [blame] | 404 | |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 405 | const X86TargetLowering *getTargetLowering() const override { |
| 406 | return &TLInfo; |
| 407 | } |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 408 | |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 409 | const X86InstrInfo *getInstrInfo() const override { return &InstrInfo; } |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 410 | |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 411 | const X86FrameLowering *getFrameLowering() const override { |
| 412 | return &FrameLowering; |
| 413 | } |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 414 | |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 415 | const X86SelectionDAGInfo *getSelectionDAGInfo() const override { |
| 416 | return &TSInfo; |
| 417 | } |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 418 | |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 419 | const X86RegisterInfo *getRegisterInfo() const override { |
| 420 | return &getInstrInfo()->getRegisterInfo(); |
| 421 | } |
Chris Lattner | 351817b | 2005-07-12 02:36:10 +0000 | [diff] [blame] | 422 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 423 | /// Returns the minimum alignment known to hold of the |
Chris Lattner | 351817b | 2005-07-12 02:36:10 +0000 | [diff] [blame] | 424 | /// stack frame on entry to the function and which must be maintained by every |
| 425 | /// function for this subtarget. |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 426 | unsigned getStackAlignment() const { return stackAlignment; } |
Jeff Cohen | 33a030e | 2005-07-27 05:53:44 +0000 | [diff] [blame] | 427 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 428 | /// Returns the maximum memset / memcpy size |
Rafael Espindola | 063f177 | 2007-10-31 11:52:06 +0000 | [diff] [blame] | 429 | /// that still makes it profitable to inline the call. |
| 430 | unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; } |
Anton Korobeynikov | 5b96cde | 2006-11-21 00:01:06 +0000 | [diff] [blame] | 431 | |
| 432 | /// ParseSubtargetFeatures - Parses features string setting specified |
Evan Cheng | ff1beda | 2006-10-06 09:17:41 +0000 | [diff] [blame] | 433 | /// subtarget options. Definition of function is auto generated by tblgen. |
Evan Cheng | 1a72add6 | 2011-07-07 07:07:08 +0000 | [diff] [blame] | 434 | void ParseSubtargetFeatures(StringRef CPU, StringRef FS); |
Evan Cheng | ff1beda | 2006-10-06 09:17:41 +0000 | [diff] [blame] | 435 | |
Zvi Rackover | 76dbf26 | 2016-11-15 06:34:33 +0000 | [diff] [blame] | 436 | /// Methods used by Global ISel |
| 437 | const CallLowering *getCallLowering() const override; |
| 438 | const InstructionSelector *getInstructionSelector() const override; |
| 439 | const LegalizerInfo *getLegalizerInfo() const override; |
| 440 | const RegisterBankInfo *getRegBankInfo() const override; |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 441 | |
Bill Wendling | 61375d8 | 2013-02-16 01:36:26 +0000 | [diff] [blame] | 442 | private: |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 443 | /// Initialize the full set of dependencies so we can use an initializer |
Eric Christopher | 1a21203 | 2014-06-11 00:25:19 +0000 | [diff] [blame] | 444 | /// list for X86Subtarget. |
| 445 | X86Subtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS); |
Bill Wendling | 61375d8 | 2013-02-16 01:36:26 +0000 | [diff] [blame] | 446 | void initializeEnvironment(); |
Eric Christopher | b68e253 | 2014-09-03 20:36:31 +0000 | [diff] [blame] | 447 | void initSubtargetFeatures(StringRef CPU, StringRef FS); |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 448 | |
Bill Wendling | 61375d8 | 2013-02-16 01:36:26 +0000 | [diff] [blame] | 449 | public: |
Eli Bendersky | 597fc12 | 2013-01-25 22:07:43 +0000 | [diff] [blame] | 450 | /// Is this x86_64? (disregarding specific ABI / programming model) |
| 451 | bool is64Bit() const { |
| 452 | return In64BitMode; |
| 453 | } |
| 454 | |
Craig Topper | 3c80d62 | 2014-01-06 04:55:54 +0000 | [diff] [blame] | 455 | bool is32Bit() const { |
| 456 | return In32BitMode; |
| 457 | } |
| 458 | |
| 459 | bool is16Bit() const { |
| 460 | return In16BitMode; |
| 461 | } |
| 462 | |
Eli Bendersky | 597fc12 | 2013-01-25 22:07:43 +0000 | [diff] [blame] | 463 | /// Is this x86_64 with the ILP32 programming model (x32 ABI)? |
| 464 | bool isTarget64BitILP32() const { |
Rafael Espindola | ddb913c | 2013-12-19 00:44:37 +0000 | [diff] [blame] | 465 | return In64BitMode && (TargetTriple.getEnvironment() == Triple::GNUX32 || |
Simon Pilgrim | a279410 | 2014-11-22 19:12:10 +0000 | [diff] [blame] | 466 | TargetTriple.isOSNaCl()); |
Eli Bendersky | 597fc12 | 2013-01-25 22:07:43 +0000 | [diff] [blame] | 467 | } |
| 468 | |
| 469 | /// Is this x86_64 with the LP64 programming model (standard AMD64, no x32)? |
| 470 | bool isTarget64BitLP64() const { |
Pavel Chupin | f55eb45 | 2014-08-07 09:41:19 +0000 | [diff] [blame] | 471 | return In64BitMode && (TargetTriple.getEnvironment() != Triple::GNUX32 && |
Simon Pilgrim | a279410 | 2014-11-22 19:12:10 +0000 | [diff] [blame] | 472 | !TargetTriple.isOSNaCl()); |
Eli Bendersky | 597fc12 | 2013-01-25 22:07:43 +0000 | [diff] [blame] | 473 | } |
Evan Cheng | 54c13da | 2006-01-26 09:53:06 +0000 | [diff] [blame] | 474 | |
Duncan Sands | 595a442 | 2008-11-28 09:29:37 +0000 | [diff] [blame] | 475 | PICStyles::Style getPICStyle() const { return PICStyle; } |
| 476 | void setPICStyle(PICStyles::Style Style) { PICStyle = Style; } |
Anton Korobeynikov | a0554d9 | 2007-01-12 19:20:47 +0000 | [diff] [blame] | 477 | |
Andrey Turetskiy | 6a3d561 | 2016-03-23 11:13:54 +0000 | [diff] [blame] | 478 | bool hasX87() const { return HasX87; } |
Craig Topper | 505f38a | 2018-01-10 22:07:16 +0000 | [diff] [blame] | 479 | bool hasNOPL() const { return HasNOPL; } |
Chris Lattner | a30d4ce | 2010-03-14 18:31:44 +0000 | [diff] [blame] | 480 | bool hasCMov() const { return HasCMov; } |
Craig Topper | eb8f9e9 | 2012-01-10 06:30:56 +0000 | [diff] [blame] | 481 | bool hasSSE1() const { return X86SSELevel >= SSE1; } |
| 482 | bool hasSSE2() const { return X86SSELevel >= SSE2; } |
| 483 | bool hasSSE3() const { return X86SSELevel >= SSE3; } |
| 484 | bool hasSSSE3() const { return X86SSELevel >= SSSE3; } |
| 485 | bool hasSSE41() const { return X86SSELevel >= SSE41; } |
| 486 | bool hasSSE42() const { return X86SSELevel >= SSE42; } |
Craig Topper | b0c0f72 | 2012-01-10 06:54:16 +0000 | [diff] [blame] | 487 | bool hasAVX() const { return X86SSELevel >= AVX; } |
| 488 | bool hasAVX2() const { return X86SSELevel >= AVX2; } |
Craig Topper | 5c94bb8 | 2013-08-21 03:57:57 +0000 | [diff] [blame] | 489 | bool hasAVX512() const { return X86SSELevel >= AVX512F; } |
Elena Demikhovsky | eace43b | 2012-11-29 12:44:59 +0000 | [diff] [blame] | 490 | bool hasFp256() const { return hasAVX(); } |
| 491 | bool hasInt256() const { return hasAVX2(); } |
Stefanus Du Toit | 96180b5 | 2009-05-26 21:04:35 +0000 | [diff] [blame] | 492 | bool hasSSE4A() const { return HasSSE4A; } |
Eric Christopher | 57a6e13 | 2015-11-14 03:04:00 +0000 | [diff] [blame] | 493 | bool hasMMX() const { return X863DNowLevel >= MMX; } |
Evan Cheng | ff1beda | 2006-10-06 09:17:41 +0000 | [diff] [blame] | 494 | bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } |
| 495 | bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } |
Benjamin Kramer | 2f48923 | 2010-12-04 20:32:23 +0000 | [diff] [blame] | 496 | bool hasPOPCNT() const { return HasPOPCNT; } |
Eric Christopher | 2ef6318 | 2010-04-02 21:54:27 +0000 | [diff] [blame] | 497 | bool hasAES() const { return HasAES; } |
Coby Tayree | 2a1c02f | 2017-11-21 09:11:41 +0000 | [diff] [blame] | 498 | bool hasVAES() const { return HasVAES; } |
Craig Topper | 09b6598 | 2015-10-16 06:03:09 +0000 | [diff] [blame] | 499 | bool hasFXSR() const { return HasFXSR; } |
Amjad Aboud | 1db6d7a | 2015-10-12 11:47:46 +0000 | [diff] [blame] | 500 | bool hasXSAVE() const { return HasXSAVE; } |
| 501 | bool hasXSAVEOPT() const { return HasXSAVEOPT; } |
| 502 | bool hasXSAVEC() const { return HasXSAVEC; } |
| 503 | bool hasXSAVES() const { return HasXSAVES; } |
Benjamin Kramer | a0396e4 | 2012-05-31 14:34:17 +0000 | [diff] [blame] | 504 | bool hasPCLMUL() const { return HasPCLMUL; } |
Coby Tayree | 7ca5e587 | 2017-11-21 09:30:33 +0000 | [diff] [blame] | 505 | bool hasVPCLMULQDQ() const { return HasVPCLMULQDQ; } |
Coby Tayree | d8b17be | 2017-11-26 09:36:41 +0000 | [diff] [blame] | 506 | bool hasGFNI() const { return HasGFNI; } |
Simon Pilgrim | db26b3d | 2015-11-30 22:22:06 +0000 | [diff] [blame] | 507 | // Prefer FMA4 to FMA - its better for commutation/memory folding and |
| 508 | // has equal or better performance on all supported targets. |
Craig Topper | e485631 | 2017-11-25 18:32:43 +0000 | [diff] [blame] | 509 | bool hasFMA() const { return HasFMA; } |
Simon Pilgrim | db26b3d | 2015-11-30 22:22:06 +0000 | [diff] [blame] | 510 | bool hasFMA4() const { return HasFMA4; } |
Craig Topper | a8d4097 | 2017-03-17 07:37:31 +0000 | [diff] [blame] | 511 | bool hasAnyFMA() const { return hasFMA() || hasFMA4(); } |
Jan Sjödin | 1280eb1 | 2011-12-02 15:14:37 +0000 | [diff] [blame] | 512 | bool hasXOP() const { return HasXOP; } |
Yunzhong Gao | dd36e93 | 2013-09-24 18:21:52 +0000 | [diff] [blame] | 513 | bool hasTBM() const { return HasTBM; } |
Simon Pilgrim | 99b925b | 2017-05-03 15:51:39 +0000 | [diff] [blame] | 514 | bool hasLWP() const { return HasLWP; } |
Craig Topper | 786bdb9 | 2011-10-03 17:28:23 +0000 | [diff] [blame] | 515 | bool hasMOVBE() const { return HasMOVBE; } |
| 516 | bool hasRDRAND() const { return HasRDRAND; } |
Craig Topper | fe9179f | 2011-10-09 07:31:39 +0000 | [diff] [blame] | 517 | bool hasF16C() const { return HasF16C; } |
Craig Topper | 228d913 | 2011-10-30 19:57:21 +0000 | [diff] [blame] | 518 | bool hasFSGSBase() const { return HasFSGSBase; } |
Craig Topper | 271064e | 2011-10-11 06:44:02 +0000 | [diff] [blame] | 519 | bool hasLZCNT() const { return HasLZCNT; } |
Craig Topper | 3657fe4 | 2011-10-14 03:21:46 +0000 | [diff] [blame] | 520 | bool hasBMI() const { return HasBMI; } |
Craig Topper | aea148c | 2011-10-16 07:55:05 +0000 | [diff] [blame] | 521 | bool hasBMI2() const { return HasBMI2; } |
Michael Zuckerman | 97b6a692 | 2016-01-17 13:42:12 +0000 | [diff] [blame] | 522 | bool hasVBMI() const { return HasVBMI; } |
Coby Tayree | 71e37cc | 2017-11-21 09:48:44 +0000 | [diff] [blame] | 523 | bool hasVBMI2() const { return HasVBMI2; } |
Elena Demikhovsky | 29cde35 | 2016-01-24 10:41:28 +0000 | [diff] [blame] | 524 | bool hasIFMA() const { return HasIFMA; } |
Michael Liao | 73cffdd | 2012-11-08 07:28:54 +0000 | [diff] [blame] | 525 | bool hasRTM() const { return HasRTM; } |
Kay Tiong Khoo | f809c64 | 2013-02-14 19:08:21 +0000 | [diff] [blame] | 526 | bool hasADX() const { return HasADX; } |
Ben Langmuir | 1650175 | 2013-09-12 15:51:31 +0000 | [diff] [blame] | 527 | bool hasSHA() const { return HasSHA; } |
Craig Topper | e268598 | 2017-12-22 02:30:30 +0000 | [diff] [blame] | 528 | bool hasPRFCHW() const { return HasPRFCHW || HasPREFETCHWT1; } |
| 529 | bool hasPREFETCHWT1() const { return HasPREFETCHWT1; } |
| 530 | bool hasSSEPrefetch() const { |
| 531 | // We implicitly enable these when we have a write prefix supporting cache |
| 532 | // level OR if we have prfchw, but don't already have a read prefetch from |
| 533 | // 3dnow. |
| 534 | return hasSSE1() || (hasPRFCHW() && !has3DNow()) || hasPREFETCHWT1(); |
| 535 | } |
Michael Liao | a486a11 | 2013-03-28 23:41:26 +0000 | [diff] [blame] | 536 | bool hasRDSEED() const { return HasRDSEED; } |
Hans Wennborg | 5000ce8 | 2015-12-04 23:00:33 +0000 | [diff] [blame] | 537 | bool hasLAHFSAHF() const { return HasLAHFSAHF; } |
Ashutosh Nema | 348af9c | 2016-05-18 11:59:12 +0000 | [diff] [blame] | 538 | bool hasMWAITX() const { return HasMWAITX; } |
Craig Topper | 50f3d14 | 2017-02-09 04:27:34 +0000 | [diff] [blame] | 539 | bool hasCLZERO() const { return HasCLZERO; } |
Ekaterina Romanova | d5fa554 | 2013-11-21 23:21:26 +0000 | [diff] [blame] | 540 | bool isSHLDSlow() const { return IsSHLDSlow; } |
Zvi Rackover | 8bc7e4d | 2016-12-06 19:35:20 +0000 | [diff] [blame] | 541 | bool isPMULLDSlow() const { return IsPMULLDSlow; } |
Sanjay Patel | 3014567 | 2015-09-01 20:51:51 +0000 | [diff] [blame] | 542 | bool isUnalignedMem16Slow() const { return IsUAMem16Slow; } |
Sanjay Patel | 501890e | 2014-11-21 17:40:04 +0000 | [diff] [blame] | 543 | bool isUnalignedMem32Slow() const { return IsUAMem32Slow; } |
Mohammed Agabaria | e9aebf2 | 2017-09-13 09:00:27 +0000 | [diff] [blame] | 544 | int getGatherOverhead() const { return GatherOverhead; } |
| 545 | int getScatterOverhead() const { return ScatterOverhead; } |
Sanjay Patel | ffd039b | 2015-02-03 17:13:04 +0000 | [diff] [blame] | 546 | bool hasSSEUnalignedMem() const { return HasSSEUnalignedMem; } |
Eli Friedman | 5e57042 | 2011-08-26 21:21:21 +0000 | [diff] [blame] | 547 | bool hasCmpxchg16b() const { return HasCmpxchg16b; } |
Evan Cheng | 1b81fdd | 2012-02-07 22:50:41 +0000 | [diff] [blame] | 548 | bool useLeaForSP() const { return UseLeaForSP; } |
Simon Pilgrim | fd5df63 | 2017-12-19 13:16:43 +0000 | [diff] [blame] | 549 | bool hasFastVariableShuffle() const { |
| 550 | return HasFastVariableShuffle; |
| 551 | } |
Amjad Aboud | 4f97751 | 2017-03-03 09:03:24 +0000 | [diff] [blame] | 552 | bool hasFastPartialYMMorZMMWrite() const { |
| 553 | return HasFastPartialYMMorZMMWrite; |
| 554 | } |
Craig Topper | ea37e20 | 2017-11-25 18:09:37 +0000 | [diff] [blame] | 555 | bool hasFastGather() const { return HasFastGather; } |
Nikolai Bozhenov | f679530 | 2016-08-04 12:47:28 +0000 | [diff] [blame] | 556 | bool hasFastScalarFSQRT() const { return HasFastScalarFSQRT; } |
| 557 | bool hasFastVectorFSQRT() const { return HasFastVectorFSQRT; } |
Pierre Gousseau | b6d652a | 2016-10-14 16:41:38 +0000 | [diff] [blame] | 558 | bool hasFastLZCNT() const { return HasFastLZCNT; } |
Craig Topper | d88389a | 2017-02-21 06:39:13 +0000 | [diff] [blame] | 559 | bool hasFastSHLDRotate() const { return HasFastSHLDRotate; } |
Craig Topper | 641e2af | 2017-08-30 04:34:48 +0000 | [diff] [blame] | 560 | bool hasMacroFusion() const { return HasMacroFusion; } |
Clement Courbet | 203fc17 | 2017-04-21 09:20:50 +0000 | [diff] [blame] | 561 | bool hasERMSB() const { return HasERMSB; } |
Alexey Volkov | fd1731d | 2014-11-21 11:19:34 +0000 | [diff] [blame] | 562 | bool hasSlowDivide32() const { return HasSlowDivide32; } |
| 563 | bool hasSlowDivide64() const { return HasSlowDivide64; } |
Preston Gurd | a01daac | 2013-01-08 18:27:24 +0000 | [diff] [blame] | 564 | bool padShortFunctions() const { return PadShortFunctions; } |
Craig Topper | 62c47a2 | 2017-08-29 05:14:27 +0000 | [diff] [blame] | 565 | bool slowTwoMemOps() const { return SlowTwoMemOps; } |
Preston Gurd | 8b7ab4b | 2013-04-25 20:29:37 +0000 | [diff] [blame] | 566 | bool LEAusesAG() const { return LEAUsesAG; } |
Alexey Volkov | 6226de6 | 2014-05-20 08:55:50 +0000 | [diff] [blame] | 567 | bool slowLEA() const { return SlowLEA; } |
Lama Saba | 2ea271b | 2017-05-18 08:11:50 +0000 | [diff] [blame] | 568 | bool slow3OpsLEA() const { return Slow3OpsLEA; } |
Alexey Volkov | 5260dba | 2014-06-09 11:40:41 +0000 | [diff] [blame] | 569 | bool slowIncDec() const { return SlowIncDec; } |
Elena Demikhovsky | 8cfb43f | 2013-07-24 11:02:47 +0000 | [diff] [blame] | 570 | bool hasCDI() const { return HasCDI; } |
Oren Ben Simhon | 7bf27f0 | 2017-05-25 13:45:23 +0000 | [diff] [blame] | 571 | bool hasVPOPCNTDQ() const { return HasVPOPCNTDQ; } |
Elena Demikhovsky | 8cfb43f | 2013-07-24 11:02:47 +0000 | [diff] [blame] | 572 | bool hasPFI() const { return HasPFI; } |
| 573 | bool hasERI() const { return HasERI; } |
Robert Khasanov | bfa0131 | 2014-07-21 14:54:21 +0000 | [diff] [blame] | 574 | bool hasDQI() const { return HasDQI; } |
| 575 | bool hasBWI() const { return HasBWI; } |
| 576 | bool hasVLX() const { return HasVLX; } |
Asaf Badouh | 5acf66f | 2015-12-15 13:35:29 +0000 | [diff] [blame] | 577 | bool hasPKU() const { return HasPKU; } |
Coby Tayree | 3880f2a | 2017-11-21 10:04:28 +0000 | [diff] [blame] | 578 | bool hasVNNI() const { return HasVNNI; } |
Coby Tayree | 5c7fe5d | 2017-11-21 10:32:42 +0000 | [diff] [blame] | 579 | bool hasBITALG() const { return HasBITALG; } |
Elena Demikhovsky | f7e641c | 2015-06-03 10:30:57 +0000 | [diff] [blame] | 580 | bool hasMPX() const { return HasMPX; } |
Oren Ben Simhon | fa582b0 | 2017-11-26 13:02:45 +0000 | [diff] [blame] | 581 | bool hasSHSTK() const { return HasSHSTK; } |
| 582 | bool hasIBT() const { return HasIBT; } |
Craig Topper | 3fd463a | 2017-02-08 05:45:46 +0000 | [diff] [blame] | 583 | bool hasCLFLUSHOPT() const { return HasCLFLUSHOPT; } |
Craig Topper | 559f61e | 2017-08-29 23:13:36 +0000 | [diff] [blame] | 584 | bool hasCLWB() const { return HasCLWB; } |
Craig Topper | 84b26b9 | 2018-01-18 23:52:31 +0000 | [diff] [blame] | 585 | bool hasRDPID() const { return HasRDPID; } |
Evan Cheng | 4c91aa3 | 2009-01-02 05:35:45 +0000 | [diff] [blame] | 586 | |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 587 | bool isXRaySupported() const override { return is64Bit(); } |
Dean Michael Berris | 46401544 | 2016-09-19 00:54:35 +0000 | [diff] [blame] | 588 | |
Mohammed Agabaria | e9aebf2 | 2017-09-13 09:00:27 +0000 | [diff] [blame] | 589 | X86ProcFamilyEnum getProcFamily() const { return X86ProcFamily; } |
| 590 | |
| 591 | /// TODO: to be removed later and replaced with suitable properties |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 592 | bool isAtom() const { return X86ProcFamily == IntelAtom; } |
Alexey Volkov | 6226de6 | 2014-05-20 08:55:50 +0000 | [diff] [blame] | 593 | bool isSLM() const { return X86ProcFamily == IntelSLM; } |
Eric Christopher | 824f42f | 2015-05-12 01:26:05 +0000 | [diff] [blame] | 594 | bool useSoftFloat() const { return UseSoftFloat; } |
Andrew Trick | 8523b16 | 2012-02-01 23:20:51 +0000 | [diff] [blame] | 595 | |
Sanjay Patel | e9bf993 | 2016-02-13 17:26:29 +0000 | [diff] [blame] | 596 | /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for |
| 597 | /// no-sse2). There isn't any reason to disable it if the target processor |
| 598 | /// supports it. |
| 599 | bool hasMFence() const { return hasSSE2() || is64Bit(); } |
| 600 | |
Daniel Dunbar | 44b5303 | 2011-04-19 21:01:47 +0000 | [diff] [blame] | 601 | const Triple &getTargetTriple() const { return TargetTriple; } |
| 602 | |
Daniel Dunbar | 2b9b0e3 | 2011-04-19 21:14:45 +0000 | [diff] [blame] | 603 | bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); } |
Simon Pilgrim | a279410 | 2014-11-22 19:12:10 +0000 | [diff] [blame] | 604 | bool isTargetFreeBSD() const { return TargetTriple.isOSFreeBSD(); } |
Rafael Espindola | 44eae72 | 2014-12-29 15:47:28 +0000 | [diff] [blame] | 605 | bool isTargetDragonFly() const { return TargetTriple.isOSDragonFly(); } |
Simon Pilgrim | a279410 | 2014-11-22 19:12:10 +0000 | [diff] [blame] | 606 | bool isTargetSolaris() const { return TargetTriple.isOSSolaris(); } |
Paul Robinson | 78a6953 | 2016-11-30 23:14:27 +0000 | [diff] [blame] | 607 | bool isTargetPS4() const { return TargetTriple.isPS4CPU(); } |
Tim Northover | 9653eb5 | 2013-12-10 16:57:43 +0000 | [diff] [blame] | 608 | |
| 609 | bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); } |
| 610 | bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); } |
Eric Christopher | 2189515 | 2014-12-05 00:22:38 +0000 | [diff] [blame] | 611 | bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); } |
Tim Northover | 9653eb5 | 2013-12-10 16:57:43 +0000 | [diff] [blame] | 612 | |
Cameron Esfahani | 943908b | 2013-08-29 20:23:14 +0000 | [diff] [blame] | 613 | bool isTargetLinux() const { return TargetTriple.isOSLinux(); } |
Marcin Koscielnicki | 0275fac | 2016-05-05 11:35:51 +0000 | [diff] [blame] | 614 | bool isTargetKFreeBSD() const { return TargetTriple.isOSKFreeBSD(); } |
| 615 | bool isTargetGlibc() const { return TargetTriple.isOSGlibc(); } |
Evgeniy Stepanov | 5fe279e | 2015-10-08 21:21:24 +0000 | [diff] [blame] | 616 | bool isTargetAndroid() const { return TargetTriple.isAndroid(); } |
Cameron Esfahani | 943908b | 2013-08-29 20:23:14 +0000 | [diff] [blame] | 617 | bool isTargetNaCl() const { return TargetTriple.isOSNaCl(); } |
Nick Lewycky | 73df7e3 | 2011-09-05 21:51:43 +0000 | [diff] [blame] | 618 | bool isTargetNaCl32() const { return isTargetNaCl() && !is64Bit(); } |
| 619 | bool isTargetNaCl64() const { return isTargetNaCl() && is64Bit(); } |
Michael Kuperstein | e1194bd | 2015-10-27 07:23:59 +0000 | [diff] [blame] | 620 | bool isTargetMCU() const { return TargetTriple.isOSIAMCU(); } |
Petr Hosek | a7d5916 | 2017-02-24 03:10:10 +0000 | [diff] [blame] | 621 | bool isTargetFuchsia() const { return TargetTriple.isOSFuchsia(); } |
Yaron Keren | 2895496 | 2014-04-02 04:27:51 +0000 | [diff] [blame] | 622 | |
| 623 | bool isTargetWindowsMSVC() const { |
| 624 | return TargetTriple.isWindowsMSVCEnvironment(); |
| 625 | } |
| 626 | |
Yaron Keren | 136fe7d | 2014-04-01 18:15:34 +0000 | [diff] [blame] | 627 | bool isTargetKnownWindowsMSVC() const { |
NAKAMURA Takumi | 09717bd | 2014-03-30 04:35:00 +0000 | [diff] [blame] | 628 | return TargetTriple.isKnownWindowsMSVCEnvironment(); |
Saleem Abdulrasool | edbdd2e | 2014-03-27 22:50:05 +0000 | [diff] [blame] | 629 | } |
Yaron Keren | 2895496 | 2014-04-02 04:27:51 +0000 | [diff] [blame] | 630 | |
Pat Gavlin | b399095 | 2015-08-14 22:41:43 +0000 | [diff] [blame] | 631 | bool isTargetWindowsCoreCLR() const { |
| 632 | return TargetTriple.isWindowsCoreCLREnvironment(); |
| 633 | } |
| 634 | |
Yaron Keren | 2895496 | 2014-04-02 04:27:51 +0000 | [diff] [blame] | 635 | bool isTargetWindowsCygwin() const { |
Saleem Abdulrasool | edbdd2e | 2014-03-27 22:50:05 +0000 | [diff] [blame] | 636 | return TargetTriple.isWindowsCygwinEnvironment(); |
| 637 | } |
Yaron Keren | 2895496 | 2014-04-02 04:27:51 +0000 | [diff] [blame] | 638 | |
| 639 | bool isTargetWindowsGNU() const { |
| 640 | return TargetTriple.isWindowsGNUEnvironment(); |
| 641 | } |
| 642 | |
Saleem Abdulrasool | 2f3b3f3 | 2014-11-20 18:01:26 +0000 | [diff] [blame] | 643 | bool isTargetWindowsItanium() const { |
| 644 | return TargetTriple.isWindowsItaniumEnvironment(); |
| 645 | } |
| 646 | |
Chandler Carruth | ebd90c5 | 2012-02-05 08:26:40 +0000 | [diff] [blame] | 647 | bool isTargetCygMing() const { return TargetTriple.isOSCygMing(); } |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 648 | |
Yaron Keren | 79bb266 | 2013-10-23 23:37:01 +0000 | [diff] [blame] | 649 | bool isOSWindows() const { return TargetTriple.isOSWindows(); } |
| 650 | |
Reid Kleckner | 9cdd4df | 2017-10-11 21:24:33 +0000 | [diff] [blame] | 651 | bool isTargetWin64() const { return In64BitMode && isOSWindows(); } |
Evan Cheng | d22a4a1 | 2011-02-01 01:14:13 +0000 | [diff] [blame] | 652 | |
Reid Kleckner | 9cdd4df | 2017-10-11 21:24:33 +0000 | [diff] [blame] | 653 | bool isTargetWin32() const { return !In64BitMode && isOSWindows(); } |
Anton Korobeynikov | a5a6455 | 2010-09-02 23:03:46 +0000 | [diff] [blame] | 654 | |
Duncan Sands | 595a442 | 2008-11-28 09:29:37 +0000 | [diff] [blame] | 655 | bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; } |
Duncan Sands | 595a442 | 2008-11-28 09:29:37 +0000 | [diff] [blame] | 656 | bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; } |
Chris Lattner | e2f524f | 2009-07-10 20:47:30 +0000 | [diff] [blame] | 657 | |
Chris Lattner | 21c2940 | 2009-07-10 21:00:45 +0000 | [diff] [blame] | 658 | bool isPICStyleStubPIC() const { |
Chris Lattner | ba4d733 | 2009-07-10 20:58:47 +0000 | [diff] [blame] | 659 | return PICStyle == PICStyles::StubPIC; |
| 660 | } |
| 661 | |
Rafael Espindola | f9e348b | 2016-06-27 21:33:08 +0000 | [diff] [blame] | 662 | bool isPositionIndependent() const { return TM.isPositionIndependent(); } |
Davide Italiano | ef5d8be | 2016-06-18 00:03:20 +0000 | [diff] [blame] | 663 | |
Charles Davis | e8f297c | 2013-07-12 06:02:35 +0000 | [diff] [blame] | 664 | bool isCallingConvWin64(CallingConv::ID CC) const { |
Reid Kleckner | 4f21df2 | 2015-07-08 21:03:47 +0000 | [diff] [blame] | 665 | switch (CC) { |
| 666 | // On Win64, all these conventions just use the default convention. |
| 667 | case CallingConv::C: |
| 668 | case CallingConv::Fast: |
Saleem Abdulrasool | aff96d9 | 2017-09-20 21:00:40 +0000 | [diff] [blame] | 669 | case CallingConv::Swift: |
Reid Kleckner | 4f21df2 | 2015-07-08 21:03:47 +0000 | [diff] [blame] | 670 | case CallingConv::X86_FastCall: |
| 671 | case CallingConv::X86_StdCall: |
| 672 | case CallingConv::X86_ThisCall: |
| 673 | case CallingConv::X86_VectorCall: |
| 674 | case CallingConv::Intel_OCL_BI: |
| 675 | return isTargetWin64(); |
| 676 | // This convention allows using the Win64 convention on other targets. |
Martin Storsjo | 2f24e93 | 2017-07-17 20:05:19 +0000 | [diff] [blame] | 677 | case CallingConv::Win64: |
Reid Kleckner | 4f21df2 | 2015-07-08 21:03:47 +0000 | [diff] [blame] | 678 | return true; |
| 679 | // This convention allows using the SysV convention on Windows targets. |
| 680 | case CallingConv::X86_64_SysV: |
| 681 | return false; |
| 682 | // Otherwise, who knows what this is. |
| 683 | default: |
| 684 | return false; |
| 685 | } |
Charles Davis | e8f297c | 2013-07-12 06:02:35 +0000 | [diff] [blame] | 686 | } |
Mikhail Glushenkov | abd56bd | 2010-02-28 22:54:30 +0000 | [diff] [blame] | 687 | |
Rafael Espindola | cb2d266 | 2016-05-19 18:34:20 +0000 | [diff] [blame] | 688 | /// Classify a global variable reference for the current subtarget according |
| 689 | /// to how we should reference it in a non-pcrel context. |
Rafael Espindola | c7e9813 | 2016-05-20 12:20:10 +0000 | [diff] [blame] | 690 | unsigned char classifyLocalReference(const GlobalValue *GV) const; |
| 691 | |
| 692 | unsigned char classifyGlobalReference(const GlobalValue *GV, |
| 693 | const Module &M) const; |
Rafael Espindola | ab03eb0 | 2016-05-19 22:07:57 +0000 | [diff] [blame] | 694 | unsigned char classifyGlobalReference(const GlobalValue *GV) const; |
Anton Korobeynikov | 93acb49 | 2006-12-20 01:03:20 +0000 | [diff] [blame] | 695 | |
Rafael Espindola | cb2d266 | 2016-05-19 18:34:20 +0000 | [diff] [blame] | 696 | /// Classify a global function reference for the current subtarget. |
Rafael Espindola | c7e9813 | 2016-05-20 12:20:10 +0000 | [diff] [blame] | 697 | unsigned char classifyGlobalFunctionReference(const GlobalValue *GV, |
| 698 | const Module &M) const; |
Rafael Espindola | 46107b9 | 2016-05-19 18:49:29 +0000 | [diff] [blame] | 699 | unsigned char classifyGlobalFunctionReference(const GlobalValue *GV) const; |
Asaf Badouh | 89406d1 | 2016-04-20 08:32:57 +0000 | [diff] [blame] | 700 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 701 | /// Classify a blockaddress reference for the current subtarget according to |
| 702 | /// how we should reference it in a non-pcrel context. |
Rafael Espindola | cb2d266 | 2016-05-19 18:34:20 +0000 | [diff] [blame] | 703 | unsigned char classifyBlockAddressReference() const; |
Dan Gohman | 7a661179 | 2009-11-20 23:18:13 +0000 | [diff] [blame] | 704 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 705 | /// Return true if the subtarget allows calls to immediate address. |
Rafael Espindola | 46107b9 | 2016-05-19 18:49:29 +0000 | [diff] [blame] | 706 | bool isLegalToCallImmediateAddr() const; |
Evan Cheng | 9609833 | 2009-05-20 04:53:57 +0000 | [diff] [blame] | 707 | |
Andrew Trick | e97d8d6 | 2013-10-15 23:33:07 +0000 | [diff] [blame] | 708 | /// Enable the MachineScheduler pass for all X86 subtargets. |
Craig Topper | 7315602 | 2014-03-02 09:09:27 +0000 | [diff] [blame] | 709 | bool enableMachineScheduler() const override { return true; } |
Andrew Trick | e97d8d6 | 2013-10-15 23:33:07 +0000 | [diff] [blame] | 710 | |
Andrew V. Tischenko | 75745d0 | 2017-04-14 07:44:23 +0000 | [diff] [blame] | 711 | // TODO: Update the regression tests and return true. |
| 712 | bool supportPrintSchedInfo() const override { return false; } |
| 713 | |
Eric Christopher | 6b0fcfe | 2014-05-21 23:40:26 +0000 | [diff] [blame] | 714 | bool enableEarlyIfConversion() const override; |
| 715 | |
Sanjay Patel | e63abfe | 2015-02-03 18:47:32 +0000 | [diff] [blame] | 716 | /// Return the instruction itineraries based on the subtarget selection. |
Eric Christopher | d913448 | 2014-08-04 21:25:23 +0000 | [diff] [blame] | 717 | const InstrItineraryData *getInstrItineraryData() const override { |
| 718 | return &InstrItins; |
| 719 | } |
Sanjay Patel | a2f658d | 2014-07-15 22:39:58 +0000 | [diff] [blame] | 720 | |
| 721 | AntiDepBreakMode getAntiDepBreakMode() const override { |
| 722 | return TargetSubtargetInfo::ANTIDEP_CRITICAL; |
| 723 | } |
Marina Yatsina | f9371d8 | 2017-10-22 17:59:38 +0000 | [diff] [blame] | 724 | |
Benjamin Kramer | a7c822a | 2017-10-22 19:16:31 +0000 | [diff] [blame] | 725 | bool enableAdvancedRASplitCost() const override { return true; } |
Evan Cheng | 47455a7 | 2009-09-03 04:37:05 +0000 | [diff] [blame] | 726 | }; |
Evan Cheng | a8b4aea | 2006-10-16 21:00:37 +0000 | [diff] [blame] | 727 | |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 728 | } // end namespace llvm |
Nate Begeman | f26625e | 2005-07-12 01:41:54 +0000 | [diff] [blame] | 729 | |
Eugene Zelenko | fbd13c5 | 2017-02-02 22:55:55 +0000 | [diff] [blame] | 730 | #endif // LLVM_LIB_TARGET_X86_X86SUBTARGET_H |