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Nate Begeman6cca84e2005-10-16 05:39:50 +00001//===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
Misha Brukmanb4402432005-04-21 23:30:14 +00002//
Chris Lattner8296c4c2004-11-23 06:02:06 +00003// The LLVM Compiler Infrastructure
4//
Chris Lattnerf3ebc3f2007-12-29 20:36:04 +00005// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
Misha Brukmanb4402432005-04-21 23:30:14 +00007//
Chris Lattner8296c4c2004-11-23 06:02:06 +00008//===----------------------------------------------------------------------===//
9//
10// This file implements the JIT interfaces for the 32-bit PowerPC target.
11//
12//===----------------------------------------------------------------------===//
13
Chris Lattner0aa794b2005-10-14 23:53:41 +000014#include "PPCJITInfo.h"
Chris Lattner6f3b9542005-10-14 23:59:06 +000015#include "PPCRelocations.h"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +000016#include "PPCTargetMachine.h"
Chandler Carruth9fb823b2013-01-02 11:36:10 +000017#include "llvm/IR/Function.h"
Evan Chengf6acb342006-07-25 20:40:54 +000018#include "llvm/Support/Debug.h"
Torok Edwinfb8d6d52009-07-08 20:53:28 +000019#include "llvm/Support/ErrorHandling.h"
Chandler Carruthed0881b2012-12-03 16:50:05 +000020#include "llvm/Support/Memory.h"
Torok Edwinfb8d6d52009-07-08 20:53:28 +000021#include "llvm/Support/raw_ostream.h"
Chris Lattner8296c4c2004-11-23 06:02:06 +000022using namespace llvm;
23
Chandler Carruth84e68b22014-04-22 02:41:26 +000024#define DEBUG_TYPE "jit"
25
Chris Lattner8296c4c2004-11-23 06:02:06 +000026static TargetJITInfo::JITCompilerFn JITCompilerFunction;
27
28#define BUILD_ADDIS(RD,RS,IMM16) \
29 ((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
30#define BUILD_ORI(RD,RS,UIMM16) \
31 ((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
Nate Begeman18f03292006-08-29 02:30:59 +000032#define BUILD_ORIS(RD,RS,UIMM16) \
33 ((25 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
34#define BUILD_RLDICR(RD,RS,SH,ME) \
35 ((30 << 26) | ((RS) << 21) | ((RD) << 16) | (((SH) & 31) << 11) | \
Chris Lattner13535c22006-12-07 23:44:07 +000036 (((ME) & 63) << 6) | (1 << 2) | ((((SH) >> 5) & 1) << 1))
Chris Lattner8296c4c2004-11-23 06:02:06 +000037#define BUILD_MTSPR(RS,SPR) \
38 ((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
39#define BUILD_BCCTRx(BO,BI,LINK) \
40 ((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
Nate Begeman18f03292006-08-29 02:30:59 +000041#define BUILD_B(TARGET, LINK) \
42 ((18 << 26) | (((TARGET) & 0x00FFFFFF) << 2) | ((LINK) & 1))
Chris Lattner8296c4c2004-11-23 06:02:06 +000043
44// Pseudo-ops
45#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
Nate Begeman18f03292006-08-29 02:30:59 +000046#define BUILD_SLDI(RD,RS,IMM6) BUILD_RLDICR(RD,RS,IMM6,63-IMM6)
Chris Lattner8296c4c2004-11-23 06:02:06 +000047#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
48#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
49
Nate Begeman18f03292006-08-29 02:30:59 +000050static void EmitBranchToAt(uint64_t At, uint64_t To, bool isCall, bool is64Bit){
51 intptr_t Offset = ((intptr_t)To - (intptr_t)At) >> 2;
52 unsigned *AtI = (unsigned*)(intptr_t)At;
Chris Lattner8296c4c2004-11-23 06:02:06 +000053
Nate Begeman18f03292006-08-29 02:30:59 +000054 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
55 AtI[0] = BUILD_B(Offset, isCall); // b/bl target
56 } else if (!is64Bit) {
57 AtI[0] = BUILD_LIS(12, To >> 16); // lis r12, hi16(address)
58 AtI[1] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
59 AtI[2] = BUILD_MTCTR(12); // mtctr r12
60 AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
61 } else {
62 AtI[0] = BUILD_LIS(12, To >> 48); // lis r12, hi16(address)
63 AtI[1] = BUILD_ORI(12, 12, To >> 32); // ori r12, r12, lo16(address)
64 AtI[2] = BUILD_SLDI(12, 12, 32); // sldi r12, r12, 32
65 AtI[3] = BUILD_ORIS(12, 12, To >> 16); // oris r12, r12, hi16(address)
66 AtI[4] = BUILD_ORI(12, 12, To); // ori r12, r12, lo16(address)
67 AtI[5] = BUILD_MTCTR(12); // mtctr r12
68 AtI[6] = BUILD_BCTR(isCall); // bctr/bctrl
69 }
Chris Lattner8296c4c2004-11-23 06:02:06 +000070}
71
Chris Lattner078b6f22004-11-24 21:01:46 +000072extern "C" void PPC32CompilationCallback();
Nate Begeman18f03292006-08-29 02:30:59 +000073extern "C" void PPC64CompilationCallback();
Chris Lattner078b6f22004-11-24 21:01:46 +000074
Bill Schmidt40f78a22013-07-28 03:23:32 +000075// The first clause of the preprocessor directive looks wrong, but it is
76// necessary when compiling this code on non-PowerPC hosts.
Bill Schmidt20573222013-07-28 02:13:24 +000077#if (!defined(__ppc__) && !defined(__powerpc__)) || defined(__powerpc64__) || defined(__ppc64__)
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +000078void PPC32CompilationCallback() {
79 llvm_unreachable("This is not a 32bit PowerPC, you can't execute this!");
80}
81#elif !defined(__ELF__)
Chris Lattner078b6f22004-11-24 21:01:46 +000082// CompilationCallback stub - We can't use a C function with inline assembly in
83// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
84// write our own wrapper, which does things our way, so we have complete control
85// over register saving and restoring.
86asm(
87 ".text\n"
88 ".align 2\n"
89 ".globl _PPC32CompilationCallback\n"
90"_PPC32CompilationCallback:\n"
Nate Begeman01364fb2006-05-02 04:50:05 +000091 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
92 // FIXME: need to save v[0-19] for altivec?
Nate Begeman18f03292006-08-29 02:30:59 +000093 // FIXME: could shrink frame
Nate Begeman01364fb2006-05-02 04:50:05 +000094 // Set up a proper stack frame
Jim Laskeye95909a2006-12-11 18:10:54 +000095 // FIXME Layout
Roman Divacky6874b262011-06-15 15:29:47 +000096 // PowerPC32 ABI linkage - 24 bytes
Jim Laskeye95909a2006-12-11 18:10:54 +000097 // parameters - 32 bytes
98 // 13 double registers - 104 bytes
99 // 8 int registers - 32 bytes
Jim Laskey6af22202006-12-10 13:09:42 +0000100 "mflr r0\n"
Jim Laskeye95909a2006-12-11 18:10:54 +0000101 "stw r0, 8(r1)\n"
102 "stwu r1, -208(r1)\n"
Nate Begeman01364fb2006-05-02 04:50:05 +0000103 // Save all int arg registers
104 "stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
105 "stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
106 "stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
107 "stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
Chris Lattner078b6f22004-11-24 21:01:46 +0000108 // Save all call-clobbered FP regs.
Nate Begeman01364fb2006-05-02 04:50:05 +0000109 "stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
110 "stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
111 "stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
112 "stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
113 "stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
114 "stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
115 "stfd f1, 72(r1)\n"
116 // Arguments to Compilation Callback:
117 // r3 - our lr (address of the call instruction in stub plus 4)
118 // r4 - stub's lr (address of instruction that called the stub plus 4)
Chris Lattner09fecf92006-12-08 04:54:03 +0000119 // r5 - is64Bit - always 0.
Nate Begeman01364fb2006-05-02 04:50:05 +0000120 "mr r3, r0\n"
121 "lwz r2, 208(r1)\n" // stub's frame
122 "lwz r4, 8(r2)\n" // stub's lr
Nate Begeman18f03292006-08-29 02:30:59 +0000123 "li r5, 0\n" // 0 == 32 bit
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000124 "bl _LLVMPPCCompilationCallback\n"
Nate Begeman01364fb2006-05-02 04:50:05 +0000125 "mtctr r3\n"
126 // Restore all int arg registers
127 "lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
128 "lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
129 "lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
130 "lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
131 // Restore all FP arg registers
132 "lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
133 "lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
134 "lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
135 "lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
136 "lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
137 "lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
138 "lfd f1, 72(r1)\n"
139 // Pop 3 frames off the stack and branch to target
140 "lwz r1, 208(r1)\n"
141 "lwz r2, 8(r1)\n"
142 "mtlr r2\n"
143 "bctr\n"
Chris Lattner078b6f22004-11-24 21:01:46 +0000144 );
Chris Lattner249edb82007-02-25 05:04:13 +0000145
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000146#else
147// ELF PPC 32 support
Chris Lattner249edb82007-02-25 05:04:13 +0000148
149// CompilationCallback stub - We can't use a C function with inline assembly in
150// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
151// write our own wrapper, which does things our way, so we have complete control
152// over register saving and restoring.
153asm(
154 ".text\n"
155 ".align 2\n"
156 ".globl PPC32CompilationCallback\n"
157"PPC32CompilationCallback:\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000158 // Make space for 8 ints r[3-10] and 8 doubles f[1-8] and the
Chris Lattner249edb82007-02-25 05:04:13 +0000159 // FIXME: need to save v[0-19] for altivec?
160 // FIXME: could shrink frame
161 // Set up a proper stack frame
162 // FIXME Layout
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000163 // 8 double registers - 64 bytes
Chris Lattner249edb82007-02-25 05:04:13 +0000164 // 8 int registers - 32 bytes
165 "mflr 0\n"
166 "stw 0, 4(1)\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000167 "stwu 1, -104(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000168 // Save all int arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000169 "stw 10, 100(1)\n" "stw 9, 96(1)\n"
170 "stw 8, 92(1)\n" "stw 7, 88(1)\n"
171 "stw 6, 84(1)\n" "stw 5, 80(1)\n"
172 "stw 4, 76(1)\n" "stw 3, 72(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000173 // Save all call-clobbered FP regs.
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000174 "stfd 8, 64(1)\n"
175 "stfd 7, 56(1)\n" "stfd 6, 48(1)\n"
176 "stfd 5, 40(1)\n" "stfd 4, 32(1)\n"
177 "stfd 3, 24(1)\n" "stfd 2, 16(1)\n"
178 "stfd 1, 8(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000179 // Arguments to Compilation Callback:
180 // r3 - our lr (address of the call instruction in stub plus 4)
181 // r4 - stub's lr (address of instruction that called the stub plus 4)
182 // r5 - is64Bit - always 0.
183 "mr 3, 0\n"
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000184 "lwz 5, 104(1)\n" // stub's frame
185 "lwz 4, 4(5)\n" // stub's lr
Chris Lattner249edb82007-02-25 05:04:13 +0000186 "li 5, 0\n" // 0 == 32 bit
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000187 "bl LLVMPPCCompilationCallback\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000188 "mtctr 3\n"
189 // Restore all int arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000190 "lwz 10, 100(1)\n" "lwz 9, 96(1)\n"
191 "lwz 8, 92(1)\n" "lwz 7, 88(1)\n"
192 "lwz 6, 84(1)\n" "lwz 5, 80(1)\n"
193 "lwz 4, 76(1)\n" "lwz 3, 72(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000194 // Restore all FP arg registers
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000195 "lfd 8, 64(1)\n"
196 "lfd 7, 56(1)\n" "lfd 6, 48(1)\n"
197 "lfd 5, 40(1)\n" "lfd 4, 32(1)\n"
198 "lfd 3, 24(1)\n" "lfd 2, 16(1)\n"
199 "lfd 1, 8(1)\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000200 // Pop 3 frames off the stack and branch to target
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000201 "lwz 1, 104(1)\n"
202 "lwz 0, 4(1)\n"
203 "mtlr 0\n"
Chris Lattner249edb82007-02-25 05:04:13 +0000204 "bctr\n"
205 );
Nate Begeman61776062004-11-23 21:34:18 +0000206#endif
207
David Fang75ca7ce2013-07-24 07:52:16 +0000208#if !defined(__powerpc64__) && !defined(__ppc64__)
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000209void PPC64CompilationCallback() {
210 llvm_unreachable("This is not a 64bit PowerPC, you can't execute this!");
211}
212#else
213# ifdef __ELF__
Roman Divacky6874b262011-06-15 15:29:47 +0000214asm(
215 ".text\n"
216 ".align 2\n"
217 ".globl PPC64CompilationCallback\n"
Will Schmidt114777e2014-03-24 16:04:15 +0000218#if _CALL_ELF == 2
219 ".type PPC64CompilationCallback,@function\n"
220"PPC64CompilationCallback:\n"
221#else
Roman Divackye07cc042012-05-09 18:24:23 +0000222 ".section \".opd\",\"aw\",@progbits\n"
Roman Divacky6874b262011-06-15 15:29:47 +0000223 ".align 3\n"
224"PPC64CompilationCallback:\n"
225 ".quad .L.PPC64CompilationCallback,.TOC.@tocbase,0\n"
226 ".size PPC64CompilationCallback,24\n"
227 ".previous\n"
228 ".align 4\n"
229 ".type PPC64CompilationCallback,@function\n"
230".L.PPC64CompilationCallback:\n"
Will Schmidt114777e2014-03-24 16:04:15 +0000231#endif
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000232# else
Nate Begeman18f03292006-08-29 02:30:59 +0000233asm(
234 ".text\n"
235 ".align 2\n"
236 ".globl _PPC64CompilationCallback\n"
237"_PPC64CompilationCallback:\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000238# endif
Nate Begeman18f03292006-08-29 02:30:59 +0000239 // Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
240 // FIXME: need to save v[0-19] for altivec?
241 // Set up a proper stack frame
Jim Laskeye95909a2006-12-11 18:10:54 +0000242 // Layout
243 // PowerPC64 ABI linkage - 48 bytes
244 // parameters - 64 bytes
245 // 13 double registers - 104 bytes
246 // 8 int registers - 64 bytes
Roman Divacky6874b262011-06-15 15:29:47 +0000247 "mflr 0\n"
248 "std 0, 16(1)\n"
249 "stdu 1, -280(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000250 // Save all int arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000251 "std 10, 272(1)\n" "std 9, 264(1)\n"
252 "std 8, 256(1)\n" "std 7, 248(1)\n"
253 "std 6, 240(1)\n" "std 5, 232(1)\n"
254 "std 4, 224(1)\n" "std 3, 216(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000255 // Save all call-clobbered FP regs.
Roman Divacky6874b262011-06-15 15:29:47 +0000256 "stfd 13, 208(1)\n" "stfd 12, 200(1)\n"
257 "stfd 11, 192(1)\n" "stfd 10, 184(1)\n"
258 "stfd 9, 176(1)\n" "stfd 8, 168(1)\n"
259 "stfd 7, 160(1)\n" "stfd 6, 152(1)\n"
260 "stfd 5, 144(1)\n" "stfd 4, 136(1)\n"
261 "stfd 3, 128(1)\n" "stfd 2, 120(1)\n"
262 "stfd 1, 112(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000263 // Arguments to Compilation Callback:
264 // r3 - our lr (address of the call instruction in stub plus 4)
265 // r4 - stub's lr (address of instruction that called the stub plus 4)
Chris Lattner09fecf92006-12-08 04:54:03 +0000266 // r5 - is64Bit - always 1.
Roman Divacky6874b262011-06-15 15:29:47 +0000267 "mr 3, 0\n" // return address (still in r0)
268 "ld 5, 280(1)\n" // stub's frame
269 "ld 4, 16(5)\n" // stub's lr
270 "li 5, 1\n" // 1 == 64 bit
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000271# ifdef __ELF__
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000272 "bl LLVMPPCCompilationCallback\n"
Roman Divacky6874b262011-06-15 15:29:47 +0000273 "nop\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000274# else
Rafael Espindola9b7d4002013-02-15 14:08:43 +0000275 "bl _LLVMPPCCompilationCallback\n"
Joerg Sonnenberger8e01ae82013-07-13 17:59:55 +0000276# endif
Roman Divacky6874b262011-06-15 15:29:47 +0000277 "mtctr 3\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000278 // Restore all int arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000279 "ld 10, 272(1)\n" "ld 9, 264(1)\n"
280 "ld 8, 256(1)\n" "ld 7, 248(1)\n"
281 "ld 6, 240(1)\n" "ld 5, 232(1)\n"
282 "ld 4, 224(1)\n" "ld 3, 216(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000283 // Restore all FP arg registers
Roman Divacky6874b262011-06-15 15:29:47 +0000284 "lfd 13, 208(1)\n" "lfd 12, 200(1)\n"
285 "lfd 11, 192(1)\n" "lfd 10, 184(1)\n"
286 "lfd 9, 176(1)\n" "lfd 8, 168(1)\n"
287 "lfd 7, 160(1)\n" "lfd 6, 152(1)\n"
288 "lfd 5, 144(1)\n" "lfd 4, 136(1)\n"
289 "lfd 3, 128(1)\n" "lfd 2, 120(1)\n"
290 "lfd 1, 112(1)\n"
Nate Begeman18f03292006-08-29 02:30:59 +0000291 // Pop 3 frames off the stack and branch to target
Roman Divacky6874b262011-06-15 15:29:47 +0000292 "ld 1, 280(1)\n"
293 "ld 0, 16(1)\n"
294 "mtlr 0\n"
295 // XXX: any special TOC handling in the ELF case for JIT?
Nate Begeman18f03292006-08-29 02:30:59 +0000296 "bctr\n"
297 );
Nate Begeman18f03292006-08-29 02:30:59 +0000298#endif
299
Anton Korobeynikov325e9262012-04-03 06:59:28 +0000300extern "C" {
Benjamin Kramerde712b72013-02-17 14:30:32 +0000301LLVM_LIBRARY_VISIBILITY void *
Rafael Espindola91cbcbb2013-02-15 14:15:59 +0000302LLVMPPCCompilationCallback(unsigned *StubCallAddrPlus4,
303 unsigned *OrigCallAddrPlus4,
304 bool is64Bit) {
Nate Begeman318bb962006-04-25 04:45:59 +0000305 // Adjust the pointer to the address of the call instruction in the stub
306 // emitted by emitFunctionStub, rather than the instruction after it.
307 unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
308 unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
Chris Lattner4ff11752004-11-23 06:55:05 +0000309
Nate Begeman318bb962006-04-25 04:45:59 +0000310 void *Target = JITCompilerFunction(StubCallAddr);
Chris Lattner4ff11752004-11-23 06:55:05 +0000311
Nate Begeman318bb962006-04-25 04:45:59 +0000312 // Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
313 // it to branch directly to the destination. If so, rewrite it so it does not
314 // need to go through the stub anymore.
315 unsigned OrigCallInst = *OrigCallAddr;
316 if ((OrigCallInst >> 26) == 18) { // Direct call.
317 intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
318
Chris Lattner4ff11752004-11-23 06:55:05 +0000319 if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
Chris Lattner659d72e2004-11-24 18:00:02 +0000320 // Clear the original target out.
Nate Begeman318bb962006-04-25 04:45:59 +0000321 OrigCallInst &= (63 << 26) | 3;
Chris Lattner659d72e2004-11-24 18:00:02 +0000322 // Fill in the new target.
Nate Begeman318bb962006-04-25 04:45:59 +0000323 OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
Chris Lattner659d72e2004-11-24 18:00:02 +0000324 // Replace the call.
Nate Begeman318bb962006-04-25 04:45:59 +0000325 *OrigCallAddr = OrigCallInst;
Chris Lattner4ff11752004-11-23 06:55:05 +0000326 }
327 }
Misha Brukmanb4402432005-04-21 23:30:14 +0000328
Nate Begeman318bb962006-04-25 04:45:59 +0000329 // Assert that we are coming from a stub that was created with our
330 // emitFunctionStub.
Nate Begeman18f03292006-08-29 02:30:59 +0000331 if ((*StubCallAddr >> 26) == 18)
332 StubCallAddr -= 3;
333 else {
Nate Begeman318bb962006-04-25 04:45:59 +0000334 assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
Nate Begeman18f03292006-08-29 02:30:59 +0000335 StubCallAddr -= is64Bit ? 9 : 6;
336 }
Chris Lattner4ff11752004-11-23 06:55:05 +0000337
338 // Rewrite the stub with an unconditional branch to the target, for any users
339 // who took the address of the stub.
Nate Begeman18f03292006-08-29 02:30:59 +0000340 EmitBranchToAt((intptr_t)StubCallAddr, (intptr_t)Target, false, is64Bit);
Jeffrey Yasskin3aa70b22010-01-14 23:15:26 +0000341 sys::Memory::InvalidateInstructionCache(StubCallAddr, 7*4);
Chris Lattner4ff11752004-11-23 06:55:05 +0000342
Nate Begeman318bb962006-04-25 04:45:59 +0000343 // Put the address of the target function to call and the address to return to
344 // after calling the target function in a place that is easy to get on the
345 // stack after we restore all regs.
Nate Begeman18f03292006-08-29 02:30:59 +0000346 return Target;
Chris Lattner4ff11752004-11-23 06:55:05 +0000347}
Anton Korobeynikov325e9262012-04-03 06:59:28 +0000348}
Chris Lattner4ff11752004-11-23 06:55:05 +0000349
350
351
Misha Brukmanb4402432005-04-21 23:30:14 +0000352TargetJITInfo::LazyResolverFn
Nate Begeman6cca84e2005-10-16 05:39:50 +0000353PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
Chris Lattner4ff11752004-11-23 06:55:05 +0000354 JITCompilerFunction = Fn;
Nate Begeman18f03292006-08-29 02:30:59 +0000355 return is64Bit ? PPC64CompilationCallback : PPC32CompilationCallback;
Chris Lattner4ff11752004-11-23 06:55:05 +0000356}
357
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000358TargetJITInfo::StubLayout PPCJITInfo::getStubLayout() {
359 // The stub contains up to 10 4-byte instructions, aligned at 4 bytes: 3
360 // instructions to save the caller's address if this is a lazy-compilation
361 // stub, plus a 1-, 4-, or 7-instruction sequence to load an arbitrary address
362 // into a register and jump through it.
363 StubLayout Result = {10*4, 4};
364 return Result;
365}
366
Rafael Espindola05b5a462013-07-26 22:13:57 +0000367#if (defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)) && \
368defined(__APPLE__)
Chris Lattner919ad972008-01-25 16:41:09 +0000369extern "C" void sys_icache_invalidate(const void *Addr, size_t len);
370#endif
371
Nicolas Geoffraya7557df2008-04-16 20:46:05 +0000372void *PPCJITInfo::emitFunctionStub(const Function* F, void *Fn,
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000373 JITCodeEmitter &JCE) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000374 // If this is just a call to an external function, emit a branch instead of a
375 // call. The code is the same except for one bit of the last instruction.
Nate Begeman18f03292006-08-29 02:30:59 +0000376 if (Fn != (void*)(intptr_t)PPC32CompilationCallback &&
377 Fn != (void*)(intptr_t)PPC64CompilationCallback) {
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000378 void *Addr = (void*)JCE.getCurrentPCValue();
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000379 JCE.emitWordBE(0);
380 JCE.emitWordBE(0);
381 JCE.emitWordBE(0);
382 JCE.emitWordBE(0);
383 JCE.emitWordBE(0);
384 JCE.emitWordBE(0);
385 JCE.emitWordBE(0);
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000386 EmitBranchToAt((intptr_t)Addr, (intptr_t)Fn, false, is64Bit);
387 sys::Memory::InvalidateInstructionCache(Addr, 7*4);
388 return Addr;
Chris Lattner8296c4c2004-11-23 06:02:06 +0000389 }
390
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000391 void *Addr = (void*)JCE.getCurrentPCValue();
Nate Begeman18f03292006-08-29 02:30:59 +0000392 if (is64Bit) {
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000393 JCE.emitWordBE(0xf821ffb1); // stdu r1,-80(r1)
394 JCE.emitWordBE(0x7d6802a6); // mflr r11
395 JCE.emitWordBE(0xf9610060); // std r11, 96(r1)
Eric Christopher54367e02014-06-12 22:19:51 +0000396 } else if (Subtarget.isDarwinABI()){
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000397 JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
398 JCE.emitWordBE(0x7d6802a6); // mflr r11
399 JCE.emitWordBE(0x91610028); // stw r11, 40(r1)
Nicolas Geoffraycff3e122007-05-29 16:33:18 +0000400 } else {
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000401 JCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
402 JCE.emitWordBE(0x7d6802a6); // mflr r11
403 JCE.emitWordBE(0x91610024); // stw r11, 36(r1)
Nate Begeman18f03292006-08-29 02:30:59 +0000404 }
Bruno Cardoso Lopesa194c3a2009-05-30 20:51:52 +0000405 intptr_t BranchAddr = (intptr_t)JCE.getCurrentPCValue();
406 JCE.emitWordBE(0);
407 JCE.emitWordBE(0);
408 JCE.emitWordBE(0);
409 JCE.emitWordBE(0);
410 JCE.emitWordBE(0);
411 JCE.emitWordBE(0);
412 JCE.emitWordBE(0);
Chris Lattner919ad972008-01-25 16:41:09 +0000413 EmitBranchToAt(BranchAddr, (intptr_t)Fn, true, is64Bit);
Jeffrey Yasskinf2ad5712009-11-23 23:35:19 +0000414 sys::Memory::InvalidateInstructionCache(Addr, 10*4);
415 return Addr;
Chris Lattner8296c4c2004-11-23 06:02:06 +0000416}
417
418
Nate Begeman6cca84e2005-10-16 05:39:50 +0000419void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
420 unsigned NumRelocs, unsigned char* GOTBase) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000421 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
422 unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
423 intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
424 switch ((PPC::RelocationType)MR->getRelocationType()) {
Torok Edwinfbcc6632009-07-14 16:55:14 +0000425 default: llvm_unreachable("Unknown relocation type!");
Chris Lattner8296c4c2004-11-23 06:02:06 +0000426 case PPC::reloc_pcrel_bx:
427 // PC-relative relocation for b and bl instructions.
428 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
429 assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
430 "Relocation out of range!");
431 *RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
432 break;
Evan Cheng78bf1072006-07-27 18:21:10 +0000433 case PPC::reloc_pcrel_bcx:
434 // PC-relative relocation for BLT,BLE,BEQ,BGE,BGT,BNE, or other
435 // bcx instructions.
436 ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
437 assert(ResultPtr >= -(1 << 13) && ResultPtr < (1 << 13) &&
438 "Relocation out of range!");
439 *RelocPos |= (ResultPtr & ((1 << 14)-1)) << 2;
440 break;
Chris Lattnerdd516792004-11-24 22:30:08 +0000441 case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
Chris Lattner5b17dee2006-07-12 21:23:20 +0000442 case PPC::reloc_absolute_low: { // low bits of ref -> low 16 of instr
Chris Lattner8296c4c2004-11-23 06:02:06 +0000443 ResultPtr += MR->getConstantVal();
444
Chris Lattnerdd516792004-11-24 22:30:08 +0000445 // If this is a high-part access, get the high-part.
Nate Begeman69df6132006-09-08 22:42:09 +0000446 if (MR->getRelocationType() == PPC::reloc_absolute_high) {
Chris Lattner8296c4c2004-11-23 06:02:06 +0000447 // If the low part will have a carry (really a borrow) from the low
448 // 16-bits into the high 16, add a bit to borrow from.
449 if (((int)ResultPtr << 16) < 0)
450 ResultPtr += 1 << 16;
451 ResultPtr >>= 16;
452 }
453
454 // Do the addition then mask, so the addition does not overflow the 16-bit
455 // immediate section of the instruction.
456 unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
457 unsigned HighBits = *RelocPos & ~65535;
458 *RelocPos = LowBits | HighBits; // Slam into low 16-bits
459 break;
460 }
Chris Lattner5b17dee2006-07-12 21:23:20 +0000461 case PPC::reloc_absolute_low_ix: { // low bits of ref -> low 14 of instr
462 ResultPtr += MR->getConstantVal();
463 // Do the addition then mask, so the addition does not overflow the 16-bit
464 // immediate section of the instruction.
465 unsigned LowBits = (*RelocPos + ResultPtr) & 0xFFFC;
466 unsigned HighBits = *RelocPos & 0xFFFF0003;
467 *RelocPos = LowBits | HighBits; // Slam into low 14-bits.
468 break;
469 }
470 }
Chris Lattner8296c4c2004-11-23 06:02:06 +0000471 }
472}
473
Nate Begeman6cca84e2005-10-16 05:39:50 +0000474void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
Nate Begeman18f03292006-08-29 02:30:59 +0000475 EmitBranchToAt((intptr_t)Old, (intptr_t)New, false, is64Bit);
Jeffrey Yasskin3aa70b22010-01-14 23:15:26 +0000476 sys::Memory::InvalidateInstructionCache(Old, 7*4);
Chris Lattner8296c4c2004-11-23 06:02:06 +0000477}