Blame - llvm/lib/Target/R600/AMDGPU.td - toolchain/llvm-project

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Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	1	//===-- AMDIL.td - AMDIL Tablegen files --- tablegen --------------------===//
				2	//
				3	// The LLVM Compiler Infrastructure
				4	//
				5	// This file is distributed under the University of Illinois Open Source
				6	// License. See LICENSE.TXT for details.
				7	//
				8	//==-----------------------------------------------------------------------===//
				9
Tom Stellard	bc5b537	2014-06-13 16:38:59 +0000	[diff] [blame]	10	include "llvm/Target/Target.td"
Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	11
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	12	//===----------------------------------------------------------------------===//
				13	// Subtarget Features
				14	//===----------------------------------------------------------------------===//
				15
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	16	// Debugging Features
				17
				18	def FeatureDumpCode : SubtargetFeature <"DumpCode",
				19	"DumpCode",
				20	"true",
				21	"Dump MachineInstrs in the CodeEmitter">;
				22
Tom Stellard	66df8a2	2013-11-18 19:43:44 +0000	[diff] [blame]	23	def FeatureIRStructurizer : SubtargetFeature <"disable-irstructurizer",
Tom Stellard	ed0ceec	2013-10-10 17:11:12 +0000	[diff] [blame]	24	"EnableIRStructurizer",
Tom Stellard	66df8a2	2013-11-18 19:43:44 +0000	[diff] [blame]	25	"false",
				26	"Disable IR Structurizer">;
Tom Stellard	ed0ceec	2013-10-10 17:11:12 +0000	[diff] [blame]	27
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	28	// Target features
				29
Tom Stellard	783893a	2013-11-18 19:43:33 +0000	[diff] [blame]	30	def FeatureIfCvt : SubtargetFeature <"disable-ifcvt",
				31	"EnableIfCvt",
				32	"false",
				33	"Disable the if conversion pass">;
				34
Matt Arsenault	f5e2997	2014-06-20 06:50:05 +0000	[diff] [blame^]	35	def FeatureFP64 : SubtargetFeature<"fp64",
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	36	"FP64",
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	37	"true",
Matt Arsenault	f5e2997	2014-06-20 06:50:05 +0000	[diff] [blame^]	38	"Enable double precision operations">;
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	39
				40	def Feature64BitPtr : SubtargetFeature<"64BitPtr",
				41	"Is64bit",
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	42	"true",
Matt Arsenault	f5e2997	2014-06-20 06:50:05 +0000	[diff] [blame^]	43	"Specify if 64-bit addressing should be used">;
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	44
				45	def FeatureR600ALUInst : SubtargetFeature<"R600ALUInst",
				46	"R600ALUInst",
				47	"false",
Matt Arsenault	f5e2997	2014-06-20 06:50:05 +0000	[diff] [blame^]	48	"Older version of ALU instructions encoding">;
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	49
				50	def FeatureVertexCache : SubtargetFeature<"HasVertexCache",
				51	"HasVertexCache",
				52	"true",
Matt Arsenault	f5e2997	2014-06-20 06:50:05 +0000	[diff] [blame^]	53	"Specify use of dedicated vertex cache">;
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	54
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	55	def FeatureCaymanISA : SubtargetFeature<"caymanISA",
				56	"CaymanISA",
				57	"true",
				58	"Use Cayman ISA">;
				59
Tom Stellard	348273d	2014-01-23 16:18:02 +0000	[diff] [blame]	60	def FeatureCFALUBug : SubtargetFeature<"cfalubug",
				61	"CFALUBug",
				62	"true",
				63	"GPU has CF_ALU bug">;
				64
Tom Stellard	3498e4f	2013-06-07 20:28:55 +0000	[diff] [blame]	65	class SubtargetFeatureFetchLimit <string Value> :
				66	SubtargetFeature <"fetch"#Value,
				67	"TexVTXClauseSize",
				68	Value,
				69	"Limit the maximum number of fetches in a clause to "#Value>;
Tom Stellard	9979277	2013-06-07 20:28:49 +0000	[diff] [blame]	70
Tom Stellard	3498e4f	2013-06-07 20:28:55 +0000	[diff] [blame]	71	def FeatureFetchLimit8 : SubtargetFeatureFetchLimit <"8">;
				72	def FeatureFetchLimit16 : SubtargetFeatureFetchLimit <"16">;
				73
Tom Stellard	8c347b0	2014-01-22 21:55:40 +0000	[diff] [blame]	74	class SubtargetFeatureWavefrontSize <int Value> : SubtargetFeature<
				75	"wavefrontsize"#Value,
				76	"WavefrontSize",
				77	!cast<string>(Value),
				78	"The number of threads per wavefront">;
				79
				80	def FeatureWavefrontSize16 : SubtargetFeatureWavefrontSize<16>;
				81	def FeatureWavefrontSize32 : SubtargetFeatureWavefrontSize<32>;
				82	def FeatureWavefrontSize64 : SubtargetFeatureWavefrontSize<64>;
				83
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	84	class SubtargetFeatureLocalMemorySize <int Value> : SubtargetFeature<
				85	"localmemorysize"#Value,
				86	"LocalMemorySize",
				87	!cast<string>(Value),
				88	"The size of local memory in bytes">;
				89
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	90	class SubtargetFeatureGeneration <string Value,
				91	list<SubtargetFeature> Implies> :
				92	SubtargetFeature <Value, "Gen", "AMDGPUSubtarget::"#Value,
				93	Value#" GPU generation", Implies>;
				94
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	95	def FeatureLocalMemorySize0 : SubtargetFeatureLocalMemorySize<0>;
				96	def FeatureLocalMemorySize32768 : SubtargetFeatureLocalMemorySize<32768>;
				97	def FeatureLocalMemorySize65536 : SubtargetFeatureLocalMemorySize<65536>;
				98
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	99	def FeatureR600 : SubtargetFeatureGeneration<"R600",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	100	[FeatureR600ALUInst, FeatureFetchLimit8, FeatureLocalMemorySize0]>;
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	101
				102	def FeatureR700 : SubtargetFeatureGeneration<"R700",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	103	[FeatureFetchLimit16, FeatureLocalMemorySize0]>;
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	104
				105	def FeatureEvergreen : SubtargetFeatureGeneration<"EVERGREEN",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	106	[FeatureFetchLimit16, FeatureLocalMemorySize32768]>;
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	107
				108	def FeatureNorthernIslands : SubtargetFeatureGeneration<"NORTHERN_ISLANDS",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	109	[FeatureFetchLimit16, FeatureWavefrontSize64,
				110	FeatureLocalMemorySize32768]
				111	>;
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	112
				113	def FeatureSouthernIslands : SubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	114	[Feature64BitPtr, FeatureFP64, FeatureLocalMemorySize32768]>;
Tom Stellard	a6c6e1b	2013-06-07 20:37:48 +0000	[diff] [blame]	115
Tom Stellard	6e1ee47	2013-10-29 16:37:28 +0000	[diff] [blame]	116	def FeatureSeaIslands : SubtargetFeatureGeneration<"SEA_ISLANDS",
Tom Stellard	880a80a	2014-06-17 16:53:14 +0000	[diff] [blame]	117	[Feature64BitPtr, FeatureFP64, FeatureLocalMemorySize65536]>;
Tom Stellard	3498e4f	2013-06-07 20:28:55 +0000	[diff] [blame]	118	//===----------------------------------------------------------------------===//
Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	119
				120	def AMDGPUInstrInfo : InstrInfo {
				121	let guessInstructionProperties = 1;
				122	}
				123
Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	124	def AMDGPU : Target {
				125	// Pull in Instruction Info:
				126	let InstructionSet = AMDGPUInstrInfo;
Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	127	}
				128
Tom Stellard	bc5b537	2014-06-13 16:38:59 +0000	[diff] [blame]	129	// Dummy Instruction itineraries for pseudo instructions
				130	def ALU_NULL : FuncUnit;
				131	def NullALU : InstrItinClass;
				132
Tom Stellard	0e70de5	2014-05-16 20:56:45 +0000	[diff] [blame]	133	//===----------------------------------------------------------------------===//
				134	// Predicate helper class
				135	//===----------------------------------------------------------------------===//
				136
				137	class PredicateControl {
				138	Predicate SubtargetPredicate;
				139	list<Predicate> OtherPredicates = [];
				140	list<Predicate> Predicates = !listconcat([SubtargetPredicate],
				141	OtherPredicates);
				142	}
				143
Tom Stellard	75aadc2	2012-12-11 21:25:42 +0000	[diff] [blame]	144	// Include AMDGPU TD files
				145	include "R600Schedule.td"
				146	include "SISchedule.td"
				147	include "Processors.td"
				148	include "AMDGPUInstrInfo.td"
				149	include "AMDGPUIntrinsics.td"
				150	include "AMDGPURegisterInfo.td"
				151	include "AMDGPUInstructions.td"
Christian Konig	2c8f6d5	2013-03-07 09:03:52 +0000	[diff] [blame]	152	include "AMDGPUCallingConv.td"