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Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Amit Blay5e4ec192011-10-20 09:16:54 +020025#include <linux/usb/android.h>
26#include <linux/usb/msm_hsusb.h>
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070027#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
Jay Chokshieb5d0d52011-09-28 17:16:20 -070028#include <linux/leds.h>
29#include <linux/leds-pm8xxx.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070030#include "timer.h"
31#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070032#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060033#include "cpuidle.h"
34#include "pm.h"
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -070035#include "acpuclock.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070036
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070037static struct pm8xxx_adc_amux pm8018_adc_channels_data[] = {
38 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
39 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
40 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
41 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
42 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
43 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
44 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
45 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
46 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV2,
47 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
48 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
49 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
50 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
51 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
52 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
53 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
54 {"pa_therm0", ADC_MPP_1_AMUX3, CHAN_PATH_SCALING1, AMUX_RSV1,
55 ADC_DECIMATION_TYPE2, ADC_SCALE_PA_THERM},
56};
57
58static struct pm8xxx_adc_properties pm8018_adc_data = {
59 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
60 .bitresolution = 15,
61 .bipolar = 0,
62};
63
64static struct pm8xxx_adc_platform_data pm8018_adc_pdata = {
65 .adc_channel = pm8018_adc_channels_data,
66 .adc_num_board_channel = ARRAY_SIZE(pm8018_adc_channels_data),
67 .adc_prop = &pm8018_adc_data,
68};
69
David Collinsfb88c432011-08-25 15:12:47 -070070static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
71 .irq_base = PM8018_IRQ_BASE,
72 .devirq = MSM_GPIO_TO_INT(87),
73 .irq_trigger_flag = IRQF_TRIGGER_LOW,
74};
75
76static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
77 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
78};
79
80static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
81 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
82};
83
84static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
85 .rtc_write_enable = false,
Ashay Jaiswaldb5e6dc2011-10-12 11:02:47 +053086 .rtc_alarm_powerup = false,
David Collinsfb88c432011-08-25 15:12:47 -070087};
88
89static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
90 .pull_up = 1,
91 .kpd_trigger_delay_us = 970,
92 .wakeup = 1,
93};
94
95static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
96 .priority = 0,
97};
98
Jay Chokshieb5d0d52011-09-28 17:16:20 -070099#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
100#define PM8XXX_LED_PWM_PERIOD_US 1000
101
102/**
103 * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
104 * driven using PWM feature.
105 */
106#define PM8XXX_PWM_CHANNEL_NONE -1
107
108static struct led_info pm8018_led_info[] = {
109 [0] = {
110 .name = "led:kb",
111 },
112};
113
114static struct led_platform_data pm8018_led_core_pdata = {
115 .num_leds = ARRAY_SIZE(pm8018_led_info),
116 .leds = pm8018_led_info,
117};
118
119static struct pm8xxx_led_config pm8018_led_configs[] = {
120 [0] = {
121 .id = PM8XXX_ID_LED_KB_LIGHT,
122 .mode = PM8XXX_LED_MODE_PWM3,
123 .max_current = PM8018_LED_KB_MAX_CURRENT,
124 .pwm_channel = 2,
125 .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
126 },
127};
128
129static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
130 .led_core = &pm8018_led_core_pdata,
131 .configs = pm8018_led_configs,
132 .num_configs = ARRAY_SIZE(pm8018_led_configs),
133};
134
David Collinsfb88c432011-08-25 15:12:47 -0700135static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
136 .irq_pdata = &pm8xxx_irq_pdata,
137 .gpio_pdata = &pm8xxx_gpio_pdata,
138 .mpp_pdata = &pm8xxx_mpp_pdata,
139 .rtc_pdata = &pm8xxx_rtc_pdata,
140 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
141 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -0700142 .regulator_pdatas = msm_pm8018_regulator_pdata,
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -0700143 .adc_pdata = &pm8018_adc_pdata,
Jay Chokshieb5d0d52011-09-28 17:16:20 -0700144 .leds_pdata = &pm8xxx_leds_pdata,
David Collinsfb88c432011-08-25 15:12:47 -0700145};
146
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700147static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
148 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
149 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -0700150 .name = PM8018_CORE_DEV_NAME,
151 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700152 },
153};
154
David Collinsbea297a2011-09-28 13:11:14 -0700155static struct platform_device msm9615_device_rpm_regulator __devinitdata = {
156 .name = "rpm-regulator",
157 .id = -1,
158 .dev = {
159 .platform_data = &msm_rpm_regulator_9615_pdata,
160 },
161};
162
David Collins0f9942a2011-10-31 09:47:34 -0700163static struct platform_device msm9615_device_ext_2p95v_vreg = {
164 .name = GPIO_REGULATOR_DEV_NAME,
165 .id = 18,
166 .dev = {
167 .platform_data =
168 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
169 },
170};
171
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700172static struct gpiomux_setting ps_hold = {
173 .func = GPIOMUX_FUNC_1,
174 .drv = GPIOMUX_DRV_8MA,
175 .pull = GPIOMUX_PULL_NONE,
176};
177
Rohit Vaswani09666872011-08-23 17:41:54 -0700178static struct gpiomux_setting gsbi4 = {
179 .func = GPIOMUX_FUNC_1,
180 .drv = GPIOMUX_DRV_8MA,
181 .pull = GPIOMUX_PULL_NONE,
182};
183
Harini Jayaramaneba52672011-09-08 15:13:00 -0600184static struct gpiomux_setting gsbi5 = {
185 .func = GPIOMUX_FUNC_1,
186 .drv = GPIOMUX_DRV_8MA,
187 .pull = GPIOMUX_PULL_NONE,
188};
189
Harini Jayaraman738c9312011-09-08 15:22:38 -0600190static struct gpiomux_setting gsbi3 = {
191 .func = GPIOMUX_FUNC_1,
192 .drv = GPIOMUX_DRV_8MA,
193 .pull = GPIOMUX_PULL_NONE,
194};
195
196static struct gpiomux_setting gsbi3_cs1_config = {
197 .func = GPIOMUX_FUNC_4,
198 .drv = GPIOMUX_DRV_8MA,
199 .pull = GPIOMUX_PULL_NONE,
200};
201
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700202struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
203 {
204 .gpio = 83,
205 .settings = {
206 [GPIOMUX_SUSPENDED] = &ps_hold,
207 },
208 },
209};
210
Rohit Vaswani09666872011-08-23 17:41:54 -0700211struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
212 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600213 .gpio = 8, /* GSBI3 QUP SPI_CLK */
214 .settings = {
215 [GPIOMUX_SUSPENDED] = &gsbi3,
216 },
217 },
218 {
219 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
220 .settings = {
221 [GPIOMUX_SUSPENDED] = &gsbi3,
222 },
223 },
224 {
225 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
226 .settings = {
227 [GPIOMUX_SUSPENDED] = &gsbi3,
228 },
229 },
230 {
231 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
232 .settings = {
233 [GPIOMUX_SUSPENDED] = &gsbi3,
234 },
235 },
236 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700237 .gpio = 12, /* GSBI4 UART */
238 .settings = {
239 [GPIOMUX_SUSPENDED] = &gsbi4,
240 },
241 },
242 {
243 .gpio = 13, /* GSBI4 UART */
244 .settings = {
245 [GPIOMUX_SUSPENDED] = &gsbi4,
246 },
247 },
248 {
249 .gpio = 14, /* GSBI4 UART */
250 .settings = {
251 [GPIOMUX_SUSPENDED] = &gsbi4,
252 },
253 },
254 {
255 .gpio = 15, /* GSBI4 UART */
256 .settings = {
257 [GPIOMUX_SUSPENDED] = &gsbi4,
258 },
259 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600260 {
261 .gpio = 16, /* GSBI5 I2C QUP SCL */
262 .settings = {
263 [GPIOMUX_SUSPENDED] = &gsbi5,
264 },
265 },
266 {
267 .gpio = 17, /* GSBI5 I2C QUP SDA */
268 .settings = {
269 [GPIOMUX_SUSPENDED] = &gsbi5,
270 },
271 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600272 {
273 /* GPIO 19 can be used for I2C/UART on GSBI5 */
274 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
275 .settings = {
276 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
277 },
278 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700279};
280
Krishna Kondadd794462011-10-01 00:19:29 -0700281#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
282 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
283
Krishna Konda7186bfe2011-10-17 15:36:54 -0700284#define GPIO_SDC1_HW_DET 80
Krishna Konda3b78ea72011-10-18 16:09:19 -0700285#define GPIO_SDC2_DAT1_WAKEUP 26
Krishna Kondadd794462011-10-01 00:19:29 -0700286
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -0700287/* MDM9x15 has 2 SDCC controllers */
Krishna Kondadd794462011-10-01 00:19:29 -0700288enum sdcc_controllers {
289 SDCC1,
290 SDCC2,
291 MAX_SDCC_CONTROLLER
292};
293
294#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
Krishna Kondafea60182011-11-01 16:01:34 -0700295/* All SDCC controllers requires VDD/VCC voltage */
296static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
297 /* SDCC1 : External card slot connected */
298 [SDCC1] = {
299 .name = "sdc_vdd",
300 /*
301 * This is a gpio-regulator and does not support
302 * regulator_set_voltage and regulator_set_optimum_mode
303 */
Krishna Kondafea60182011-11-01 16:01:34 -0700304 .high_vol_level = 2950000,
305 .low_vol_level = 2950000,
306 .hpm_uA = 600000, /* 600mA */
307 }
308};
309
310/* All SDCC controllers may require voting for VDD PAD voltage */
311static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
312 /* SDCC1 : External card slot connected */
313 [SDCC1] = {
314 .name = "sdc_vddp",
Krishna Kondafea60182011-11-01 16:01:34 -0700315 .high_vol_level = 2950000,
316 .low_vol_level = 1850000,
317 .always_on = true,
318 .lpm_sup = true,
319 /* Max. Active current required is 16 mA */
320 .hpm_uA = 16000,
321 /*
322 * Sleep current required is ~300 uA. But min. vote can be
323 * in terms of mA (min. 1 mA). So let's vote for 2 mA
324 * during sleep.
325 */
326 .lpm_uA = 2000,
327 }
328};
329
330static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
331 /* SDCC1 : External card slot connected */
332 [SDCC1] = {
333 .vdd_data = &mmc_vdd_reg_data[SDCC1],
334 .vddp_data = &mmc_vddp_reg_data[SDCC1],
335 }
336};
337
Krishna Kondadd794462011-10-01 00:19:29 -0700338/* SDC1 pad data */
339static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
340 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
341 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
342 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
343};
344
345static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
346 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
347 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
348 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
349};
350
351static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
352 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
353 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
354 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
355};
356
357static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
358 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
359 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
360 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
361};
362
363static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
364 [SDCC1] = {
365 .on = sdc1_pad_pull_on_cfg,
366 .off = sdc1_pad_pull_off_cfg,
367 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
368 },
369};
370
371static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
372 [SDCC1] = {
373 .on = sdc1_pad_drv_on_cfg,
374 .off = sdc1_pad_drv_off_cfg,
375 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
376 },
377};
378
379static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
380 [SDCC1] = {
381 .pull = &mmc_pad_pull_data[SDCC1],
382 .drv = &mmc_pad_drv_data[SDCC1]
383 },
384};
385#endif
386
Krishna Konda71aef182011-10-01 02:27:51 -0700387#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
388static struct gpiomux_setting sdcc2_clk_actv_cfg = {
389 .func = GPIOMUX_FUNC_1,
390 .drv = GPIOMUX_DRV_16MA,
391 .pull = GPIOMUX_PULL_NONE,
392};
393
394static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
395 .func = GPIOMUX_FUNC_1,
396 .drv = GPIOMUX_DRV_8MA,
397 .pull = GPIOMUX_PULL_UP,
398};
399
400static struct gpiomux_setting sdcc2_suspend_cfg = {
401 .func = GPIOMUX_FUNC_1,
402 .drv = GPIOMUX_DRV_2MA,
403 .pull = GPIOMUX_PULL_DOWN,
404};
405
406static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
407 {
408 /* SDC2_DATA_0 */
409 .gpio = 25,
410 .settings = {
411 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
412 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
413 },
414 },
415 {
416 /* SDC2_DATA_1 */
417 .gpio = 26,
418 .settings = {
419 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda0b10fa12011-11-07 22:47:41 -0800420 [GPIOMUX_SUSPENDED] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda71aef182011-10-01 02:27:51 -0700421 },
422 },
423 {
424 /* SDC2_DATA_2 */
425 .gpio = 27,
426 .settings = {
427 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
428 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
429 },
430 },
431 {
432 /* SDC2_DATA_3 */
433 .gpio = 28,
434 .settings = {
435 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
436 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
437 },
438 },
439 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800440 /* SDC2_CMD */
Krishna Konda71aef182011-10-01 02:27:51 -0700441 .gpio = 29,
442 .settings = {
443 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
444 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
445 },
446 },
447 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800448 /* SDC2_CLK */
Krishna Konda71aef182011-10-01 02:27:51 -0700449 .gpio = 30,
450 .settings = {
451 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
452 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
453 },
454 },
455};
456
457static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
458 {25, "sdc2_dat_0"},
459 {26, "sdc2_dat_1"},
460 {27, "sdc2_dat_2"},
461 {28, "sdc2_dat_3"},
462 {29, "sdc2_cmd"},
463 {30, "sdc2_clk"},
464};
465
466static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
467 [SDCC2] = {
468 .gpio = sdc2_gpio_cfg,
469 .size = ARRAY_SIZE(sdc2_gpio_cfg),
470 },
471};
472#else
473static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
474#endif
475
476static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700477#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
478 [SDCC1] = {
479 .is_gpio = 0,
480 .pad_data = &mmc_pad_data[SDCC1],
481 },
482#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700483#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
484 [SDCC2] = {
485 .is_gpio = 1,
486 .gpio_data = &mmc_gpio_data[SDCC2],
487 },
488#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700489};
490
491#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
492static unsigned int sdc1_sup_clk_rates[] = {
493 400000, 24000000, 48000000
494};
495
496static struct mmc_platform_data sdc1_data = {
497 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
498 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
499 .sup_clk_table = sdc1_sup_clk_rates,
500 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
Krishna Kondafea60182011-11-01 16:01:34 -0700501 .pclk_src_dfab = true,
Krishna Kondafea60182011-11-01 16:01:34 -0700502 .vreg_data = &mmc_slot_vreg_data[SDCC1],
Krishna Kondadd794462011-10-01 00:19:29 -0700503 .pin_data = &mmc_slot_pin_data[SDCC1],
Krishna Konda7186bfe2011-10-17 15:36:54 -0700504#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
505 .status_gpio = GPIO_SDC1_HW_DET,
506 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
507 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
508#endif
Krishna Kondadbcf9702011-11-07 18:45:48 -0800509 .xpc_cap = 1,
510 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
511 MMC_CAP_MAX_CURRENT_400)
Krishna Kondadd794462011-10-01 00:19:29 -0700512};
513static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
514#else
515static struct mmc_platform_data *msm9615_sdc1_pdata;
516#endif
517
Krishna Konda71aef182011-10-01 02:27:51 -0700518#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
519static unsigned int sdc2_sup_clk_rates[] = {
520 400000, 24000000, 48000000
521};
522
523static struct mmc_platform_data sdc2_data = {
524 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
525 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
526 .sup_clk_table = sdc2_sup_clk_rates,
527 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
Krishna Konda890b1d12011-10-18 16:05:37 -0700528 .pclk_src_dfab = 1,
Krishna Konda71aef182011-10-01 02:27:51 -0700529 .pin_data = &mmc_slot_pin_data[SDCC2],
Krishna Konda3b78ea72011-10-18 16:09:19 -0700530#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
531 .sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
532#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700533};
534static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
535#else
536static struct mmc_platform_data *msm9615_sdc2_pdata;
537#endif
538
Krishna Kondadd794462011-10-01 00:19:29 -0700539static void __init msm9615_init_mmc(void)
540{
Krishna Kondadd794462011-10-01 00:19:29 -0700541 if (msm9615_sdc1_pdata) {
Krishna Kondafea60182011-11-01 16:01:34 -0700542 /* SDC1: External card slot for SD/MMC cards */
543 msm_add_sdcc(1, msm9615_sdc1_pdata);
Krishna Kondadd794462011-10-01 00:19:29 -0700544 }
Krishna Konda71aef182011-10-01 02:27:51 -0700545
546 if (msm9615_sdc2_pdata) {
547 msm_gpiomux_install(msm9615_sdcc2_configs,
548 ARRAY_SIZE(msm9615_sdcc2_configs));
549
Krishna Kondafea60182011-11-01 16:01:34 -0700550 /* SDC2: External card slot used for WLAN */
Krishna Konda71aef182011-10-01 02:27:51 -0700551 msm_add_sdcc(2, msm9615_sdc2_pdata);
552 }
Krishna Kondadd794462011-10-01 00:19:29 -0700553}
554#else
555static void __init msm9615_init_mmc(void) { }
556#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600557static struct msm_cpuidle_state msm_cstates[] __initdata = {
558 {0, 0, "C0", "WFI",
559 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
560
561 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
562 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
563
564 {0, 2, "C2", "POWER_COLLAPSE",
565 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
566};
567static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
568 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
569 .idle_supported = 1,
570 .suspend_supported = 1,
571 .idle_enabled = 0,
572 .suspend_enabled = 0,
573 },
574 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
575 .idle_supported = 1,
576 .suspend_supported = 1,
577 .idle_enabled = 0,
578 .suspend_enabled = 0,
579 },
580 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
581 .idle_supported = 1,
582 .suspend_supported = 1,
583 .idle_enabled = 1,
584 .suspend_enabled = 1,
585 },
586};
Krishna Kondadd794462011-10-01 00:19:29 -0700587
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700588static int __init gpiomux_init(void)
589{
590 int rc;
591
592 rc = msm_gpiomux_init(NR_GPIO_IRQS);
593 if (rc) {
594 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
595 return rc;
596 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700597 msm_gpiomux_install(msm9615_gsbi_configs,
598 ARRAY_SIZE(msm9615_gsbi_configs));
599
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700600 msm_gpiomux_install(msm9615_ps_hold_config,
601 ARRAY_SIZE(msm9615_ps_hold_config));
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700602 return 0;
603}
604
Harini Jayaraman738c9312011-09-08 15:22:38 -0600605static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
606 .max_clock_speed = 24000000,
607};
608
Harini Jayaramaneba52672011-09-08 15:13:00 -0600609static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
610 .clk_freq = 100000,
611 .src_clk_rate = 24000000,
612};
613
Amit Blay5e4ec192011-10-20 09:16:54 +0200614static struct msm_otg_platform_data msm_otg_pdata = {
615 .mode = USB_PERIPHERAL,
616 .otg_control = OTG_NO_CONTROL,
617 .phy_type = SNPS_28NM_INTEGRATED_PHY,
618 .pclk_src_name = "dfab_usb_hs_clk",
619};
620
621static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
622{
623 return 0;
624}
625
626static struct android_usb_platform_data android_usb_pdata = {
627 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
628};
629
630static struct platform_device android_usb_device = {
631 .name = "android_usb",
632 .id = -1,
633 .dev = {
634 .platform_data = &android_usb_pdata,
635 },
636};
637
Rohit Vaswani149f0a72011-11-09 15:21:28 -0800638static struct platform_device msm_wlan_ar6000_pm_device = {
639 .name = "wlan_ar6000_pm_dev",
640 .id = -1,
641};
642
643static int __init msm9615_init_ar6000pm(void)
644{
645 return platform_device_register(&msm_wlan_ar6000_pm_device);
646}
647
Amit Blay5e4ec192011-10-20 09:16:54 +0200648static struct platform_device *common_devices[] = {
649 &msm9615_device_dmov,
650 &msm_device_smd,
651 &msm_device_otg,
652 &msm_device_gadget_peripheral,
653 &android_usb_device,
654 &msm9615_device_uart_gsbi4,
David Collins0f9942a2011-10-31 09:47:34 -0700655 &msm9615_device_ext_2p95v_vreg,
Amit Blay5e4ec192011-10-20 09:16:54 +0200656 &msm9615_device_ssbi_pmic1,
657 &msm9615_device_qup_i2c_gsbi5,
658 &msm9615_device_qup_spi_gsbi3,
659 &msm_device_sps,
660 &msm9615_device_tsens,
661 &msm_device_nand,
Eric Holmberg0c96e702011-11-08 18:04:31 -0700662 &msm_device_bam_dmux,
Amit Blay5e4ec192011-10-20 09:16:54 +0200663 &msm_rpm_device,
664#ifdef CONFIG_HW_RANDOM_MSM
665 &msm_device_rng,
666#endif
667
668#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
669 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700670 &msm9615_qcrypto_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200671#endif
672
673#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
674 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700675 &msm9615_qcedev_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200676#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -0700677 &msm9615_device_watchdog,
Amit Blay5e4ec192011-10-20 09:16:54 +0200678};
679
Harini Jayaramaneba52672011-09-08 15:13:00 -0600680static void __init msm9615_i2c_init(void)
681{
682 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
683 &msm9615_i2c_qup_gsbi5_pdata;
684}
685
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700686static void __init msm9615_common_init(void)
687{
688 msm9615_device_init();
689 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600690 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700691 regulator_suppress_info_printing();
David Collinsbea297a2011-09-28 13:11:14 -0700692 platform_device_register(&msm9615_device_rpm_regulator);
Harini Jayaraman738c9312011-09-08 15:22:38 -0600693 msm9615_device_qup_spi_gsbi3.dev.platform_data =
694 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700695 msm9615_device_ssbi_pmic1.dev.platform_data =
696 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700697 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Amit Blay5e4ec192011-10-20 09:16:54 +0200698
699 msm_device_otg.dev.platform_data = &msm_otg_pdata;
Rohit Vaswani09666872011-08-23 17:41:54 -0700700 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700701
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -0700702 msm_clock_init(&msm9615_clock_init_data);
703 acpuclk_init(&acpuclk_9615_soc_data);
704
Rohit Vaswani149f0a72011-11-09 15:21:28 -0800705 /* Ensure ar6000pm device is registered before MMC/SDC */
706 msm9615_init_ar6000pm();
707
Krishna Kondadd794462011-10-01 00:19:29 -0700708 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600709 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
710 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
711 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
712 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700713}
714
715static void __init msm9615_cdp_init(void)
716{
717 msm9615_common_init();
718}
719
720static void __init msm9615_mtp_init(void)
721{
722 msm9615_common_init();
723}
724
725MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
726 .map_io = msm9615_map_io,
727 .init_irq = msm9615_init_irq,
728 .timer = &msm_timer,
729 .init_machine = msm9615_cdp_init,
730MACHINE_END
731
732MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
733 .map_io = msm9615_map_io,
734 .init_irq = msm9615_init_irq,
735 .timer = &msm_timer,
736 .init_machine = msm9615_mtp_init,
737MACHINE_END