Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #define pr_fmt(fmt) "%s: " fmt, __func__ |
| 14 | |
| 15 | #include <linux/kernel.h> |
| 16 | #include <linux/of.h> |
| 17 | #include <linux/err.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/slab.h> |
| 20 | #include <linux/delay.h> |
| 21 | #include <linux/mutex.h> |
| 22 | #include <linux/types.h> |
| 23 | #include <linux/hwmon.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/debugfs.h> |
| 26 | #include <linux/spmi.h> |
| 27 | #include <linux/of_irq.h> |
| 28 | #include <linux/interrupt.h> |
| 29 | #include <linux/completion.h> |
| 30 | #include <linux/hwmon-sysfs.h> |
| 31 | #include <linux/qpnp/qpnp-adc.h> |
| 32 | #include <linux/platform_device.h> |
| 33 | |
| 34 | /* QPNP VADC register definition */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 35 | #define QPNP_VADC_REVISION1 0x0 |
| 36 | #define QPNP_VADC_REVISION2 0x1 |
| 37 | #define QPNP_VADC_REVISION3 0x2 |
| 38 | #define QPNP_VADC_REVISION4 0x3 |
| 39 | #define QPNP_VADC_PERPH_TYPE 0x4 |
| 40 | #define QPNP_VADC_PERH_SUBTYPE 0x5 |
| 41 | |
| 42 | #define QPNP_VADC_SUPPORTED_REVISION2 1 |
| 43 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 44 | #define QPNP_VADC_STATUS1 0x8 |
| 45 | #define QPNP_VADC_STATUS1_OP_MODE 4 |
| 46 | #define QPNP_VADC_STATUS1_MEAS_INTERVAL_EN_STS BIT(2) |
| 47 | #define QPNP_VADC_STATUS1_REQ_STS BIT(1) |
| 48 | #define QPNP_VADC_STATUS1_EOC BIT(0) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 49 | #define QPNP_VADC_STATUS1_REQ_STS_EOC_MASK 0x3 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 50 | #define QPNP_VADC_STATUS2 0x9 |
| 51 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE 6 |
| 52 | #define QPNP_VADC_STATUS2_FIFO_NOT_EMPTY_FLAG BIT(1) |
| 53 | #define QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS BIT(0) |
| 54 | #define QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT 4 |
| 55 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 56 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 57 | #define QPNP_VADC_MODE_CTL 0x40 |
| 58 | #define QPNP_VADC_OP_MODE_SHIFT 4 |
| 59 | #define QPNP_VADC_VREF_XO_THM_FORCE BIT(2) |
| 60 | #define QPNP_VADC_AMUX_TRIM_EN BIT(1) |
| 61 | #define QPNP_VADC_ADC_TRIM_EN BIT(0) |
| 62 | #define QPNP_VADC_EN_CTL1 0x46 |
| 63 | #define QPNP_VADC_ADC_EN BIT(7) |
| 64 | #define QPNP_VADC_ADC_CH_SEL_CTL 0x48 |
| 65 | #define QPNP_VADC_ADC_DIG_PARAM 0x50 |
| 66 | #define QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT 3 |
| 67 | #define QPNP_VADC_HW_SETTLE_DELAY 0x51 |
| 68 | #define QPNP_VADC_CONV_REQ 0x52 |
| 69 | #define QPNP_VADC_CONV_REQ_SET BIT(7) |
| 70 | #define QPNP_VADC_CONV_SEQ_CTL 0x54 |
| 71 | #define QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT 4 |
| 72 | #define QPNP_VADC_CONV_SEQ_TRIG_CTL 0x55 |
| 73 | #define QPNP_VADC_CONV_SEQ_FALLING_EDGE 0x0 |
| 74 | #define QPNP_VADC_CONV_SEQ_RISING_EDGE 0x1 |
| 75 | #define QPNP_VADC_CONV_SEQ_EDGE_SHIFT 7 |
| 76 | #define QPNP_VADC_FAST_AVG_CTL 0x5a |
| 77 | |
| 78 | #define QPNP_VADC_M0_LOW_THR_LSB 0x5c |
| 79 | #define QPNP_VADC_M0_LOW_THR_MSB 0x5d |
| 80 | #define QPNP_VADC_M0_HIGH_THR_LSB 0x5e |
| 81 | #define QPNP_VADC_M0_HIGH_THR_MSB 0x5f |
| 82 | #define QPNP_VADC_M1_LOW_THR_LSB 0x69 |
| 83 | #define QPNP_VADC_M1_LOW_THR_MSB 0x6a |
| 84 | #define QPNP_VADC_M1_HIGH_THR_LSB 0x6b |
| 85 | #define QPNP_VADC_M1_HIGH_THR_MSB 0x6c |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 86 | #define QPNP_VADC_ACCESS 0xd0 |
| 87 | #define QPNP_VADC_ACCESS_DATA 0xa5 |
| 88 | #define QPNP_VADC_PERH_RESET_CTL3 0xda |
| 89 | #define QPNP_FOLLOW_OTST2_RB BIT(3) |
| 90 | #define QPNP_FOLLOW_WARM_RB BIT(2) |
| 91 | #define QPNP_FOLLOW_SHUTDOWN1_RB BIT(1) |
| 92 | #define QPNP_FOLLOW_SHUTDOWN2_RB BIT(0) |
| 93 | |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 94 | #define QPNP_INT_TEST_VAL 0xE1 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 95 | |
| 96 | #define QPNP_VADC_DATA0 0x60 |
| 97 | #define QPNP_VADC_DATA1 0x61 |
| 98 | #define QPNP_VADC_CONV_TIMEOUT_ERR 2 |
| 99 | #define QPNP_VADC_CONV_TIME_MIN 2000 |
| 100 | #define QPNP_VADC_CONV_TIME_MAX 2100 |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 101 | #define QPNP_ADC_COMPLETION_TIMEOUT HZ |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 102 | #define QPNP_VADC_ERR_COUNT 5 |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 103 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 104 | struct qpnp_vadc_drv { |
| 105 | struct qpnp_adc_drv *adc; |
| 106 | struct dentry *dent; |
| 107 | struct device *vadc_hwmon; |
| 108 | bool vadc_init_calib; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 109 | bool vadc_initialized; |
| 110 | int max_channels_available; |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 111 | bool vadc_iadc_sync_lock; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 112 | u8 id; |
| 113 | struct sensor_device_attribute sens_attr[0]; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 114 | }; |
| 115 | |
| 116 | struct qpnp_vadc_drv *qpnp_vadc; |
| 117 | |
| 118 | static struct qpnp_vadc_scale_fn vadc_scale_fn[] = { |
| 119 | [SCALE_DEFAULT] = {qpnp_adc_scale_default}, |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 120 | [SCALE_BATT_THERM] = {qpnp_adc_scale_batt_therm}, |
| 121 | [SCALE_PMIC_THERM] = {qpnp_adc_scale_pmic_therm}, |
| 122 | [SCALE_XOTHERM] = {qpnp_adc_tdkntcg_therm}, |
Siddartha Mohanadoss | e77edf1 | 2012-09-13 14:26:32 -0700 | [diff] [blame] | 123 | [SCALE_THERM_100K_PULLUP] = {qpnp_adc_scale_therm_pu2}, |
| 124 | [SCALE_THERM_150K_PULLUP] = {qpnp_adc_scale_therm_pu1}, |
Siddartha Mohanadoss | b99cfa9 | 2013-05-01 20:19:58 -0700 | [diff] [blame] | 125 | [SCALE_QRD_BATT_THERM] = {qpnp_adc_scale_qrd_batt_therm}, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 126 | }; |
| 127 | |
| 128 | static int32_t qpnp_vadc_read_reg(int16_t reg, u8 *data) |
| 129 | { |
| 130 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 131 | int rc; |
| 132 | |
| 133 | rc = spmi_ext_register_readl(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 134 | (vadc->adc->offset + reg), data, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 135 | if (rc < 0) { |
| 136 | pr_err("qpnp adc read reg %d failed with %d\n", reg, rc); |
| 137 | return rc; |
| 138 | } |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static int32_t qpnp_vadc_write_reg(int16_t reg, u8 data) |
| 144 | { |
| 145 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 146 | int rc; |
| 147 | u8 *buf; |
| 148 | |
| 149 | buf = &data; |
| 150 | |
| 151 | rc = spmi_ext_register_writel(vadc->adc->spmi->ctrl, vadc->adc->slave, |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 152 | (vadc->adc->offset + reg), buf, 1); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 153 | if (rc < 0) { |
| 154 | pr_err("qpnp adc write reg %d failed with %d\n", reg, rc); |
| 155 | return rc; |
| 156 | } |
| 157 | |
| 158 | return 0; |
| 159 | } |
| 160 | |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 161 | static int32_t qpnp_vadc_warm_rst_configure(void) |
| 162 | { |
| 163 | int rc = 0; |
| 164 | u8 data = 0; |
| 165 | |
| 166 | rc = qpnp_vadc_write_reg(QPNP_VADC_ACCESS, QPNP_VADC_ACCESS_DATA); |
| 167 | if (rc < 0) { |
| 168 | pr_err("VADC write access failed\n"); |
| 169 | return rc; |
| 170 | } |
| 171 | |
| 172 | rc = qpnp_vadc_read_reg(QPNP_VADC_PERH_RESET_CTL3, &data); |
| 173 | if (rc < 0) { |
| 174 | pr_err("VADC perh reset ctl3 read failed\n"); |
| 175 | return rc; |
| 176 | } |
| 177 | |
| 178 | rc = qpnp_vadc_write_reg(QPNP_VADC_ACCESS, QPNP_VADC_ACCESS_DATA); |
| 179 | if (rc < 0) { |
| 180 | pr_err("VADC write access failed\n"); |
| 181 | return rc; |
| 182 | } |
| 183 | |
| 184 | data |= QPNP_FOLLOW_WARM_RB; |
| 185 | |
| 186 | rc = qpnp_vadc_write_reg(QPNP_VADC_PERH_RESET_CTL3, data); |
| 187 | if (rc < 0) { |
| 188 | pr_err("VADC perh reset ctl3 write failed\n"); |
| 189 | return rc; |
| 190 | } |
| 191 | |
| 192 | return 0; |
| 193 | } |
| 194 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 195 | static int32_t qpnp_vadc_enable(bool state) |
| 196 | { |
| 197 | int rc = 0; |
| 198 | u8 data = 0; |
| 199 | |
| 200 | data = QPNP_VADC_ADC_EN; |
| 201 | if (state) { |
| 202 | rc = qpnp_vadc_write_reg(QPNP_VADC_EN_CTL1, |
| 203 | data); |
| 204 | if (rc < 0) { |
| 205 | pr_err("VADC enable failed\n"); |
| 206 | return rc; |
| 207 | } |
| 208 | } else { |
| 209 | rc = qpnp_vadc_write_reg(QPNP_VADC_EN_CTL1, |
| 210 | (~data & QPNP_VADC_ADC_EN)); |
| 211 | if (rc < 0) { |
| 212 | pr_err("VADC disable failed\n"); |
| 213 | return rc; |
| 214 | } |
| 215 | } |
| 216 | |
| 217 | return 0; |
| 218 | } |
| 219 | |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 220 | static int32_t qpnp_vadc_status_debug(void) |
| 221 | { |
| 222 | int rc = 0; |
| 223 | u8 mode = 0, status1 = 0, chan = 0, dig = 0, en = 0, status2 = 0; |
| 224 | |
| 225 | rc = qpnp_vadc_read_reg(QPNP_VADC_MODE_CTL, &mode); |
| 226 | if (rc < 0) { |
| 227 | pr_err("mode ctl register read failed with %d\n", rc); |
| 228 | return rc; |
| 229 | } |
| 230 | |
| 231 | rc = qpnp_vadc_read_reg(QPNP_VADC_ADC_DIG_PARAM, &dig); |
| 232 | if (rc < 0) { |
| 233 | pr_err("digital param read failed with %d\n", rc); |
| 234 | return rc; |
| 235 | } |
| 236 | |
| 237 | rc = qpnp_vadc_read_reg(QPNP_VADC_ADC_CH_SEL_CTL, &chan); |
| 238 | if (rc < 0) { |
| 239 | pr_err("channel read failed with %d\n", rc); |
| 240 | return rc; |
| 241 | } |
| 242 | |
| 243 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 244 | if (rc < 0) { |
| 245 | pr_err("status1 read failed with %d\n", rc); |
| 246 | return rc; |
| 247 | } |
| 248 | |
| 249 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS2, &status2); |
| 250 | if (rc < 0) { |
| 251 | pr_err("status2 read failed with %d\n", rc); |
| 252 | return rc; |
| 253 | } |
| 254 | |
| 255 | rc = qpnp_vadc_read_reg(QPNP_VADC_EN_CTL1, &en); |
| 256 | if (rc < 0) { |
| 257 | pr_err("en read failed with %d\n", rc); |
| 258 | return rc; |
| 259 | } |
| 260 | |
| 261 | pr_err("EOC not set - status1/2:%x/%x, dig:%x, ch:%x, mode:%x, en:%x\n", |
| 262 | status1, status2, dig, chan, mode, en); |
| 263 | |
| 264 | rc = qpnp_vadc_enable(false); |
| 265 | if (rc < 0) { |
| 266 | pr_err("VADC disable failed with %d\n", rc); |
| 267 | return rc; |
| 268 | } |
| 269 | |
| 270 | return 0; |
| 271 | } |
Siddartha Mohanadoss | 8dbb5c2 | 2012-12-11 14:50:45 -0800 | [diff] [blame] | 272 | static int32_t qpnp_vadc_configure( |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 273 | struct qpnp_adc_amux_properties *chan_prop) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 274 | { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 275 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 276 | u8 decimation = 0, conv_sequence = 0, conv_sequence_trig = 0; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 277 | u8 mode_ctrl = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 278 | int rc = 0; |
| 279 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 280 | /* Mode selection */ |
Siddartha Mohanadoss | 429b449 | 2012-12-11 13:29:58 -0800 | [diff] [blame] | 281 | mode_ctrl |= ((chan_prop->mode_sel << QPNP_VADC_OP_MODE_SHIFT) | |
| 282 | (QPNP_VADC_ADC_TRIM_EN | QPNP_VADC_AMUX_TRIM_EN)); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 283 | rc = qpnp_vadc_write_reg(QPNP_VADC_MODE_CTL, mode_ctrl); |
| 284 | if (rc < 0) { |
| 285 | pr_err("Mode configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 286 | return rc; |
| 287 | } |
| 288 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 289 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 290 | /* Channel selection */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 291 | rc = qpnp_vadc_write_reg(QPNP_VADC_ADC_CH_SEL_CTL, |
| 292 | chan_prop->amux_channel); |
| 293 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 294 | pr_err("Channel configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 295 | return rc; |
| 296 | } |
| 297 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 298 | /* Digital parameter setup */ |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 299 | decimation = chan_prop->decimation << |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 300 | QPNP_VADC_ADC_DIG_DEC_RATIO_SEL_SHIFT; |
| 301 | rc = qpnp_vadc_write_reg(QPNP_VADC_ADC_DIG_PARAM, decimation); |
| 302 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 303 | pr_err("Digital parameter configure write error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 304 | return rc; |
| 305 | } |
| 306 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 307 | /* HW settling time delay */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 308 | rc = qpnp_vadc_write_reg(QPNP_VADC_HW_SETTLE_DELAY, |
| 309 | chan_prop->hw_settle_time); |
| 310 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 311 | pr_err("HW settling time setup error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 312 | return rc; |
| 313 | } |
| 314 | |
| 315 | if (chan_prop->mode_sel == (ADC_OP_NORMAL_MODE << |
| 316 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 317 | /* Normal measurement mode */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 318 | rc = qpnp_vadc_write_reg(QPNP_VADC_FAST_AVG_CTL, |
| 319 | chan_prop->fast_avg_setup); |
| 320 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 321 | pr_err("Fast averaging configure error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 322 | return rc; |
| 323 | } |
| 324 | } else if (chan_prop->mode_sel == (ADC_OP_CONVERSION_SEQUENCER << |
| 325 | QPNP_VADC_OP_MODE_SHIFT)) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 326 | /* Conversion sequence mode */ |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 327 | conv_sequence = ((ADC_SEQ_HOLD_100US << |
| 328 | QPNP_VADC_CONV_SEQ_HOLDOFF_SHIFT) | |
| 329 | ADC_CONV_SEQ_TIMEOUT_5MS); |
| 330 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_SEQ_CTL, |
| 331 | conv_sequence); |
| 332 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 333 | pr_err("Conversion sequence error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 334 | return rc; |
| 335 | } |
| 336 | |
| 337 | conv_sequence_trig = ((QPNP_VADC_CONV_SEQ_RISING_EDGE << |
| 338 | QPNP_VADC_CONV_SEQ_EDGE_SHIFT) | |
| 339 | chan_prop->trigger_channel); |
| 340 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_SEQ_TRIG_CTL, |
| 341 | conv_sequence_trig); |
| 342 | if (rc < 0) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 343 | pr_err("Conversion trigger error\n"); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 344 | return rc; |
| 345 | } |
| 346 | } |
| 347 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 348 | INIT_COMPLETION(vadc->adc->adc_rslt_completion); |
| 349 | |
| 350 | rc = qpnp_vadc_enable(true); |
| 351 | if (rc) |
| 352 | return rc; |
| 353 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 354 | if (!vadc->vadc_iadc_sync_lock) { |
| 355 | /* Request conversion */ |
| 356 | rc = qpnp_vadc_write_reg(QPNP_VADC_CONV_REQ, |
| 357 | QPNP_VADC_CONV_REQ_SET); |
| 358 | if (rc < 0) { |
| 359 | pr_err("Request conversion failed\n"); |
| 360 | return rc; |
| 361 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 362 | } |
| 363 | |
| 364 | return 0; |
| 365 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 366 | |
| 367 | static int32_t qpnp_vadc_read_conversion_result(int32_t *data) |
| 368 | { |
| 369 | uint8_t rslt_lsb, rslt_msb; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 370 | int rc = 0, status = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 371 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 372 | status = qpnp_vadc_read_reg(QPNP_VADC_DATA0, &rslt_lsb); |
| 373 | if (status < 0) { |
| 374 | pr_err("qpnp adc result read failed for data0\n"); |
| 375 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 376 | } |
| 377 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 378 | status = qpnp_vadc_read_reg(QPNP_VADC_DATA1, &rslt_msb); |
| 379 | if (status < 0) { |
| 380 | pr_err("qpnp adc result read failed for data1\n"); |
| 381 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 382 | } |
| 383 | |
| 384 | *data = (rslt_msb << 8) | rslt_lsb; |
| 385 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 386 | status = qpnp_vadc_check_result(data); |
| 387 | if (status < 0) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 388 | pr_err("VADC data check failed\n"); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 389 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 390 | } |
| 391 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 392 | fail: |
| 393 | rc = qpnp_vadc_enable(false); |
| 394 | if (rc) |
| 395 | return rc; |
| 396 | |
| 397 | return status; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 398 | } |
| 399 | |
| 400 | static int32_t qpnp_vadc_read_status(int mode_sel) |
| 401 | { |
| 402 | u8 status1, status2, status2_conv_seq_state; |
| 403 | u8 status_err = QPNP_VADC_CONV_TIMEOUT_ERR; |
| 404 | int rc; |
| 405 | |
| 406 | switch (mode_sel) { |
| 407 | case (ADC_OP_CONVERSION_SEQUENCER << QPNP_VADC_OP_MODE_SHIFT): |
| 408 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 409 | if (rc) { |
| 410 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 411 | return rc; |
| 412 | } |
| 413 | |
| 414 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS2, &status2); |
| 415 | if (rc) { |
| 416 | pr_err("qpnp_vadc read mask interrupt failed\n"); |
| 417 | return rc; |
| 418 | } |
| 419 | |
| 420 | if (!(status2 & ~QPNP_VADC_STATUS2_CONV_SEQ_TIMEOUT_STS) && |
| 421 | (status1 & (~QPNP_VADC_STATUS1_REQ_STS | |
| 422 | QPNP_VADC_STATUS1_EOC))) { |
| 423 | rc = status_err; |
| 424 | return rc; |
| 425 | } |
| 426 | |
| 427 | status2_conv_seq_state = status2 >> |
| 428 | QPNP_VADC_STATUS2_CONV_SEQ_STATE_SHIFT; |
| 429 | if (status2_conv_seq_state != ADC_CONV_SEQ_IDLE) { |
| 430 | pr_err("qpnp vadc seq error with status %d\n", |
| 431 | status2); |
| 432 | rc = -EINVAL; |
| 433 | return rc; |
| 434 | } |
| 435 | } |
| 436 | |
| 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | static void qpnp_vadc_work(struct work_struct *work) |
| 441 | { |
| 442 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 443 | |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 444 | if (!vadc || !vadc->vadc_initialized) |
| 445 | return; |
| 446 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 447 | complete(&vadc->adc->adc_rslt_completion); |
| 448 | |
| 449 | return; |
| 450 | } |
| 451 | DECLARE_WORK(trigger_completion_work, qpnp_vadc_work); |
| 452 | |
| 453 | static irqreturn_t qpnp_vadc_isr(int irq, void *dev_id) |
| 454 | { |
| 455 | schedule_work(&trigger_completion_work); |
| 456 | |
| 457 | return IRQ_HANDLED; |
| 458 | } |
| 459 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 460 | static int32_t qpnp_vadc_version_check(void) |
| 461 | { |
| 462 | uint8_t revision; |
| 463 | int rc; |
| 464 | |
| 465 | rc = qpnp_vadc_read_reg(QPNP_VADC_REVISION2, &revision); |
| 466 | if (rc < 0) { |
| 467 | pr_err("qpnp adc result read failed with %d\n", rc); |
| 468 | return rc; |
| 469 | } |
| 470 | |
| 471 | if (revision < QPNP_VADC_SUPPORTED_REVISION2) { |
| 472 | pr_err("VADC Version not supported\n"); |
| 473 | return -EINVAL; |
| 474 | } |
| 475 | |
| 476 | return 0; |
| 477 | } |
| 478 | |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 479 | static int32_t qpnp_vbat_sns_comp(int64_t *result, u8 id, int64_t die_temp) |
| 480 | { |
| 481 | int64_t temp_var = 0; |
Xiaozhe Shi | 62ad5e1 | 2013-05-13 12:37:41 -0700 | [diff] [blame] | 482 | int64_t old = *result; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 483 | |
| 484 | if (die_temp < 25000) |
| 485 | return 0; |
| 486 | |
| 487 | switch (id) { |
| 488 | case COMP_ID_TSMC: |
| 489 | temp_var = (((die_temp * |
| 490 | (-QPNP_VBAT_SNS_COEFF_1_TYPEB)) |
| 491 | + QPNP_VBAT_SNS_COEFF_2_TYPEB)); |
| 492 | break; |
| 493 | default: |
| 494 | case COMP_ID_GF: |
| 495 | temp_var = (((die_temp * |
| 496 | (-QPNP_VBAT_SNS_COEFF_1_TYPEA)) |
| 497 | + QPNP_VBAT_SNS_COEFF_2_TYPEA)); |
| 498 | break; |
| 499 | } |
| 500 | |
| 501 | temp_var = div64_s64(temp_var, QPNP_VBAT_SNS_COEFF_3); |
| 502 | |
| 503 | temp_var = 1000000 + temp_var; |
| 504 | |
| 505 | *result = *result * temp_var; |
| 506 | |
| 507 | *result = div64_s64(*result, 1000000); |
Xiaozhe Shi | 62ad5e1 | 2013-05-13 12:37:41 -0700 | [diff] [blame] | 508 | pr_debug("%lld compensated into %lld\n", old, *result); |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 509 | |
| 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | int32_t qpnp_vbat_sns_comp_result(int64_t *result) |
| 514 | { |
| 515 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 516 | struct qpnp_vadc_result die_temp_result; |
| 517 | int rc = 0; |
| 518 | |
| 519 | rc = qpnp_vadc_conv_seq_request(ADC_SEQ_NONE, |
| 520 | DIE_TEMP, &die_temp_result); |
| 521 | if (rc < 0) { |
| 522 | pr_err("Error reading die_temp\n"); |
| 523 | return rc; |
| 524 | } |
| 525 | |
| 526 | rc = qpnp_vbat_sns_comp(result, vadc->id, |
| 527 | die_temp_result.physical); |
| 528 | if (rc < 0) |
| 529 | pr_err("Error with vbat compensation\n"); |
| 530 | |
| 531 | return rc; |
| 532 | } |
| 533 | EXPORT_SYMBOL(qpnp_vbat_sns_comp_result); |
| 534 | |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 535 | static void qpnp_vadc_625mv_channel_sel(uint32_t *ref_channel_sel) |
| 536 | { |
| 537 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 538 | uint32_t dt_index = 0; |
| 539 | |
| 540 | /* Check if the buffered 625mV channel exists */ |
| 541 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 542 | != SPARE1) && (dt_index < vadc->max_channels_available)) |
| 543 | dt_index++; |
| 544 | |
| 545 | if (dt_index >= vadc->max_channels_available) { |
| 546 | pr_debug("Use default 625mV ref channel\n"); |
| 547 | *ref_channel_sel = REF_625MV; |
| 548 | } else { |
| 549 | pr_debug("Use buffered 625mV ref channel\n"); |
| 550 | *ref_channel_sel = SPARE1; |
| 551 | } |
| 552 | } |
| 553 | |
| 554 | static int32_t qpnp_vadc_calib_device(void) |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 555 | { |
| 556 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | c4a6af1 | 2012-07-13 18:50:12 -0700 | [diff] [blame] | 557 | struct qpnp_adc_amux_properties conv; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 558 | int rc, calib_read_1, calib_read_2, count = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 559 | u8 status1 = 0; |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 560 | uint32_t ref_channel_sel = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 561 | |
| 562 | conv.amux_channel = REF_125V; |
| 563 | conv.decimation = DECIMATION_TYPE2; |
| 564 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 565 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 566 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 567 | |
| 568 | rc = qpnp_vadc_configure(&conv); |
| 569 | if (rc) { |
| 570 | pr_err("qpnp_vadc configure failed with %d\n", rc); |
| 571 | goto calib_fail; |
| 572 | } |
| 573 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 574 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 575 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 576 | if (rc < 0) |
| 577 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 578 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 579 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 580 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 581 | count++; |
| 582 | if (count > QPNP_VADC_ERR_COUNT) { |
| 583 | rc = -ENODEV; |
| 584 | goto calib_fail; |
| 585 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 586 | } |
| 587 | |
| 588 | rc = qpnp_vadc_read_conversion_result(&calib_read_1); |
| 589 | if (rc) { |
| 590 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 591 | goto calib_fail; |
| 592 | } |
| 593 | |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 594 | qpnp_vadc_625mv_channel_sel(&ref_channel_sel); |
| 595 | conv.amux_channel = ref_channel_sel; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 596 | conv.decimation = DECIMATION_TYPE2; |
| 597 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 598 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 599 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 600 | rc = qpnp_vadc_configure(&conv); |
| 601 | if (rc) { |
| 602 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 603 | goto calib_fail; |
| 604 | } |
| 605 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 606 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 607 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 608 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 609 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 610 | if (rc < 0) |
| 611 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 612 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 613 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 614 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 615 | count++; |
| 616 | if (count > QPNP_VADC_ERR_COUNT) { |
| 617 | rc = -ENODEV; |
| 618 | goto calib_fail; |
| 619 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 620 | } |
| 621 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 622 | rc = qpnp_vadc_read_conversion_result(&calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 623 | if (rc) { |
| 624 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 625 | goto calib_fail; |
| 626 | } |
| 627 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 628 | pr_debug("absolute reference raw: 625mV:0x%x 1.25V:0x%x\n", |
| 629 | calib_read_1, calib_read_2); |
| 630 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 631 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy = |
| 632 | (calib_read_1 - calib_read_2); |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 633 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 634 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx |
| 635 | = QPNP_ADC_625_UV; |
| 636 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_vref = |
| 637 | calib_read_1; |
| 638 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd = |
| 639 | calib_read_2; |
| 640 | /* Ratiometric Calibration */ |
| 641 | conv.amux_channel = VDD_VADC; |
| 642 | conv.decimation = DECIMATION_TYPE2; |
| 643 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 644 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 645 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 646 | rc = qpnp_vadc_configure(&conv); |
| 647 | if (rc) { |
| 648 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 649 | goto calib_fail; |
| 650 | } |
| 651 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 652 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 653 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 654 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 655 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 656 | if (rc < 0) |
| 657 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 658 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 659 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 660 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 661 | count++; |
| 662 | if (count > QPNP_VADC_ERR_COUNT) { |
| 663 | rc = -ENODEV; |
| 664 | goto calib_fail; |
| 665 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 666 | } |
| 667 | |
| 668 | rc = qpnp_vadc_read_conversion_result(&calib_read_1); |
| 669 | if (rc) { |
| 670 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 671 | goto calib_fail; |
| 672 | } |
| 673 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 674 | conv.amux_channel = GND_REF; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 675 | conv.decimation = DECIMATION_TYPE2; |
| 676 | conv.mode_sel = ADC_OP_NORMAL_MODE << QPNP_VADC_OP_MODE_SHIFT; |
| 677 | conv.hw_settle_time = ADC_CHANNEL_HW_SETTLE_DELAY_0US; |
| 678 | conv.fast_avg_setup = ADC_FAST_AVG_SAMPLE_1; |
| 679 | rc = qpnp_vadc_configure(&conv); |
| 680 | if (rc) { |
| 681 | pr_err("qpnp adc configure failed with %d\n", rc); |
| 682 | goto calib_fail; |
| 683 | } |
| 684 | |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 685 | status1 = 0; |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 686 | count = 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 687 | while (status1 != QPNP_VADC_STATUS1_EOC) { |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 688 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 689 | if (rc < 0) |
| 690 | return rc; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 691 | status1 &= QPNP_VADC_STATUS1_REQ_STS_EOC_MASK; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 692 | usleep_range(QPNP_VADC_CONV_TIME_MIN, |
| 693 | QPNP_VADC_CONV_TIME_MAX); |
Siddartha Mohanadoss | 73ae69b | 2013-04-03 17:34:03 -0700 | [diff] [blame] | 694 | count++; |
| 695 | if (count > QPNP_VADC_ERR_COUNT) { |
| 696 | rc = -ENODEV; |
| 697 | goto calib_fail; |
| 698 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 699 | } |
| 700 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 701 | rc = qpnp_vadc_read_conversion_result(&calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 702 | if (rc) { |
| 703 | pr_err("qpnp adc read adc failed with %d\n", rc); |
| 704 | goto calib_fail; |
| 705 | } |
| 706 | |
Siddartha Mohanadoss | b2a4237 | 2013-03-26 15:53:41 -0700 | [diff] [blame] | 707 | pr_debug("ratiometric reference raw: VDD:0x%x GND:0x%x\n", |
| 708 | calib_read_1, calib_read_2); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 709 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy = |
| 710 | (calib_read_1 - calib_read_2); |
| 711 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx = |
| 712 | vadc->adc->adc_prop->adc_vdd_reference; |
| 713 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_vref = |
| 714 | calib_read_1; |
| 715 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd = |
| 716 | calib_read_2; |
| 717 | |
| 718 | calib_fail: |
| 719 | return rc; |
| 720 | } |
| 721 | |
Siddartha Mohanadoss | d0f4fd1 | 2012-11-20 16:28:40 -0800 | [diff] [blame] | 722 | int32_t qpnp_get_vadc_gain_and_offset(struct qpnp_vadc_linear_graph *param, |
| 723 | enum qpnp_adc_calib_type calib_type) |
| 724 | { |
| 725 | |
| 726 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 727 | |
| 728 | switch (calib_type) { |
| 729 | case CALIB_RATIOMETRIC: |
| 730 | param->dy = |
| 731 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dy; |
| 732 | param->dx = |
| 733 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].dx; |
| 734 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 735 | param->adc_gnd = |
| 736 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_RATIOMETRIC].adc_gnd; |
| 737 | break; |
| 738 | case CALIB_ABSOLUTE: |
| 739 | param->dy = |
| 740 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dy; |
| 741 | param->dx = |
| 742 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].dx; |
| 743 | param->adc_vref = vadc->adc->adc_prop->adc_vdd_reference; |
| 744 | param->adc_gnd = |
| 745 | vadc->adc->amux_prop->chan_prop->adc_graph[CALIB_ABSOLUTE].adc_gnd; |
| 746 | break; |
| 747 | default: |
| 748 | return -EINVAL; |
| 749 | } |
| 750 | |
| 751 | return 0; |
| 752 | } |
| 753 | EXPORT_SYMBOL(qpnp_get_vadc_gain_and_offset); |
| 754 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 755 | int32_t qpnp_vadc_is_ready(void) |
| 756 | { |
| 757 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 758 | |
| 759 | if (!vadc || !vadc->vadc_initialized) |
| 760 | return -EPROBE_DEFER; |
| 761 | else |
| 762 | return 0; |
| 763 | } |
| 764 | EXPORT_SYMBOL(qpnp_vadc_is_ready); |
| 765 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 766 | int32_t qpnp_vadc_conv_seq_request(enum qpnp_vadc_trigger trigger_channel, |
| 767 | enum qpnp_vadc_channels channel, |
| 768 | struct qpnp_vadc_result *result) |
| 769 | { |
| 770 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 771 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 772 | uint32_t ref_channel; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 773 | |
| 774 | if (!vadc || !vadc->vadc_initialized) |
| 775 | return -EPROBE_DEFER; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 776 | |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 777 | mutex_lock(&vadc->adc->adc_lock); |
| 778 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 779 | if (!vadc->vadc_init_calib) { |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 780 | rc = qpnp_vadc_version_check(); |
| 781 | if (rc) |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 782 | goto fail_unlock; |
| 783 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 784 | rc = qpnp_vadc_calib_device(); |
| 785 | if (rc) { |
| 786 | pr_err("Calibration failed\n"); |
Siddartha Mohanadoss | 64bc4f5 | 2012-12-19 20:26:32 -0800 | [diff] [blame] | 787 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 788 | } else |
| 789 | vadc->vadc_init_calib = true; |
| 790 | } |
| 791 | |
Siddartha Mohanadoss | 9edb61e | 2013-04-29 13:52:52 -0700 | [diff] [blame] | 792 | if (channel == REF_625MV) { |
| 793 | qpnp_vadc_625mv_channel_sel(&ref_channel); |
| 794 | channel = ref_channel; |
| 795 | } |
| 796 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 797 | vadc->adc->amux_prop->amux_channel = channel; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 798 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 799 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 800 | != channel) && (dt_index < vadc->max_channels_available)) |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 801 | dt_index++; |
| 802 | |
Siddartha Mohanadoss | 7126ce8 | 2012-12-11 14:33:11 -0800 | [diff] [blame] | 803 | if (dt_index >= vadc->max_channels_available) { |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 804 | pr_err("not a valid VADC channel\n"); |
| 805 | rc = -EINVAL; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 806 | goto fail_unlock; |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 807 | } |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 808 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 809 | vadc->adc->amux_prop->decimation = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 810 | vadc->adc->adc_channels[dt_index].adc_decimation; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 811 | vadc->adc->amux_prop->hw_settle_time = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 812 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 813 | vadc->adc->amux_prop->fast_avg_setup = |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 814 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 815 | |
| 816 | if (trigger_channel < ADC_SEQ_NONE) |
| 817 | vadc->adc->amux_prop->mode_sel = (ADC_OP_CONVERSION_SEQUENCER |
| 818 | << QPNP_VADC_OP_MODE_SHIFT); |
| 819 | else if (trigger_channel == ADC_SEQ_NONE) |
| 820 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 821 | << QPNP_VADC_OP_MODE_SHIFT); |
| 822 | else { |
| 823 | pr_err("Invalid trigger channel:%d\n", trigger_channel); |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 824 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 825 | } |
| 826 | |
| 827 | vadc->adc->amux_prop->trigger_channel = trigger_channel; |
| 828 | |
| 829 | rc = qpnp_vadc_configure(vadc->adc->amux_prop); |
| 830 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 831 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 832 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 833 | } |
| 834 | |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 835 | rc = wait_for_completion_timeout(&vadc->adc->adc_rslt_completion, |
| 836 | QPNP_ADC_COMPLETION_TIMEOUT); |
| 837 | if (!rc) { |
| 838 | u8 status1 = 0; |
| 839 | rc = qpnp_vadc_read_reg(QPNP_VADC_STATUS1, &status1); |
| 840 | if (rc < 0) |
| 841 | goto fail_unlock; |
| 842 | status1 &= (QPNP_VADC_STATUS1_REQ_STS | QPNP_VADC_STATUS1_EOC); |
| 843 | if (status1 == QPNP_VADC_STATUS1_EOC) |
| 844 | pr_debug("End of conversion status set\n"); |
| 845 | else { |
Siddartha Mohanadoss | 9cb2c65 | 2012-12-14 19:18:18 -0800 | [diff] [blame] | 846 | rc = qpnp_vadc_status_debug(); |
| 847 | if (rc < 0) |
| 848 | pr_err("VADC disable failed\n"); |
Siddartha Mohanadoss | 1a0d203 | 2012-11-01 11:22:29 -0700 | [diff] [blame] | 849 | rc = -EINVAL; |
| 850 | goto fail_unlock; |
| 851 | } |
| 852 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 853 | |
| 854 | if (trigger_channel < ADC_SEQ_NONE) { |
| 855 | rc = qpnp_vadc_read_status(vadc->adc->amux_prop->mode_sel); |
| 856 | if (rc) |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 857 | pr_debug("Conversion sequence timed out - %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 858 | } |
| 859 | |
| 860 | rc = qpnp_vadc_read_conversion_result(&result->adc_code); |
| 861 | if (rc) { |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 862 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 863 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 864 | } |
| 865 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 866 | amux_prescaling = |
| 867 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 868 | |
Siddartha Mohanadoss | 630def0 | 2013-06-27 14:53:38 -0700 | [diff] [blame^] | 869 | if (amux_prescaling >= PATH_SCALING_NONE) { |
| 870 | rc = -EINVAL; |
| 871 | goto fail_unlock; |
| 872 | } |
| 873 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 874 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 875 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 876 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 877 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 878 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 879 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 880 | if (scale_type >= SCALE_NONE) { |
| 881 | rc = -EBADF; |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 882 | goto fail_unlock; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 883 | } |
| 884 | |
| 885 | vadc_scale_fn[scale_type].chan(result->adc_code, |
| 886 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 887 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 888 | fail_unlock: |
| 889 | mutex_unlock(&vadc->adc->adc_lock); |
| 890 | |
| 891 | return rc; |
| 892 | } |
| 893 | EXPORT_SYMBOL(qpnp_vadc_conv_seq_request); |
| 894 | |
| 895 | int32_t qpnp_vadc_read(enum qpnp_vadc_channels channel, |
| 896 | struct qpnp_vadc_result *result) |
| 897 | { |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 898 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 899 | enum qpnp_vadc_channels; |
| 900 | struct qpnp_vadc_result die_temp_result; |
| 901 | int rc = 0; |
| 902 | |
| 903 | if (channel == VBAT_SNS) { |
| 904 | rc = qpnp_vadc_conv_seq_request(ADC_SEQ_NONE, |
| 905 | channel, result); |
| 906 | if (rc < 0) { |
| 907 | pr_err("Error reading vbatt\n"); |
| 908 | return rc; |
| 909 | } |
| 910 | |
| 911 | rc = qpnp_vadc_conv_seq_request(ADC_SEQ_NONE, |
| 912 | DIE_TEMP, &die_temp_result); |
| 913 | if (rc < 0) { |
| 914 | pr_err("Error reading die_temp\n"); |
| 915 | return rc; |
| 916 | } |
| 917 | |
| 918 | rc = qpnp_vbat_sns_comp(&result->physical, vadc->id, |
| 919 | die_temp_result.physical); |
| 920 | if (rc < 0) |
| 921 | pr_err("Error with vbat compensation\n"); |
| 922 | |
| 923 | return 0; |
| 924 | } else |
| 925 | return qpnp_vadc_conv_seq_request(ADC_SEQ_NONE, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 926 | channel, result); |
| 927 | } |
Siddartha Mohanadoss | 271d00f | 2013-03-26 18:24:14 -0700 | [diff] [blame] | 928 | EXPORT_SYMBOL(qpnp_vadc_read); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 929 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 930 | static void qpnp_vadc_lock(void) |
| 931 | { |
| 932 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 933 | |
| 934 | mutex_lock(&vadc->adc->adc_lock); |
| 935 | } |
| 936 | |
| 937 | static void qpnp_vadc_unlock(void) |
| 938 | { |
| 939 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 940 | |
| 941 | mutex_unlock(&vadc->adc->adc_lock); |
| 942 | } |
| 943 | |
| 944 | int32_t qpnp_vadc_iadc_sync_request(enum qpnp_vadc_channels channel) |
| 945 | { |
| 946 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 947 | int rc = 0, dt_index = 0; |
| 948 | |
| 949 | if (!vadc || !vadc->vadc_initialized) |
| 950 | return -EPROBE_DEFER; |
| 951 | |
| 952 | qpnp_vadc_lock(); |
| 953 | |
| 954 | if (!vadc->vadc_init_calib) { |
| 955 | rc = qpnp_vadc_version_check(); |
| 956 | if (rc) |
| 957 | goto fail; |
| 958 | |
| 959 | rc = qpnp_vadc_calib_device(); |
| 960 | if (rc) { |
| 961 | pr_err("Calibration failed\n"); |
| 962 | goto fail; |
| 963 | } else |
| 964 | vadc->vadc_init_calib = true; |
| 965 | } |
| 966 | |
| 967 | vadc->adc->amux_prop->amux_channel = channel; |
| 968 | |
| 969 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 970 | != channel) && (dt_index < vadc->max_channels_available)) |
| 971 | dt_index++; |
| 972 | |
| 973 | if (dt_index >= vadc->max_channels_available) { |
| 974 | pr_err("not a valid VADC channel\n"); |
| 975 | rc = -EINVAL; |
| 976 | goto fail; |
| 977 | } |
| 978 | |
| 979 | vadc->adc->amux_prop->decimation = |
| 980 | vadc->adc->adc_channels[dt_index].adc_decimation; |
| 981 | vadc->adc->amux_prop->hw_settle_time = |
| 982 | vadc->adc->adc_channels[dt_index].hw_settle_time; |
| 983 | vadc->adc->amux_prop->fast_avg_setup = |
| 984 | vadc->adc->adc_channels[dt_index].fast_avg_setup; |
| 985 | vadc->adc->amux_prop->mode_sel = (ADC_OP_NORMAL_MODE |
| 986 | << QPNP_VADC_OP_MODE_SHIFT); |
| 987 | vadc->vadc_iadc_sync_lock = true; |
| 988 | |
| 989 | rc = qpnp_vadc_configure(vadc->adc->amux_prop); |
| 990 | if (rc) { |
| 991 | pr_err("qpnp vadc configure failed with %d\n", rc); |
| 992 | goto fail; |
| 993 | } |
| 994 | |
| 995 | return rc; |
| 996 | fail: |
| 997 | vadc->vadc_iadc_sync_lock = false; |
| 998 | qpnp_vadc_unlock(); |
| 999 | return rc; |
| 1000 | } |
| 1001 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_request); |
| 1002 | |
| 1003 | int32_t qpnp_vadc_iadc_sync_complete_request(enum qpnp_vadc_channels channel, |
| 1004 | struct qpnp_vadc_result *result) |
| 1005 | { |
| 1006 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 1007 | int rc = 0, scale_type, amux_prescaling, dt_index = 0; |
| 1008 | |
| 1009 | vadc->adc->amux_prop->amux_channel = channel; |
| 1010 | |
| 1011 | while ((vadc->adc->adc_channels[dt_index].channel_num |
| 1012 | != channel) && (dt_index < vadc->max_channels_available)) |
| 1013 | dt_index++; |
| 1014 | |
| 1015 | rc = qpnp_vadc_read_conversion_result(&result->adc_code); |
| 1016 | if (rc) { |
| 1017 | pr_err("qpnp vadc read adc code failed with %d\n", rc); |
| 1018 | goto fail; |
| 1019 | } |
| 1020 | |
| 1021 | amux_prescaling = |
| 1022 | vadc->adc->adc_channels[dt_index].chan_path_prescaling; |
| 1023 | |
Siddartha Mohanadoss | 630def0 | 2013-06-27 14:53:38 -0700 | [diff] [blame^] | 1024 | if (amux_prescaling >= PATH_SCALING_NONE) { |
| 1025 | rc = -EINVAL; |
| 1026 | goto fail; |
| 1027 | } |
| 1028 | |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1029 | vadc->adc->amux_prop->chan_prop->offset_gain_numerator = |
| 1030 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].num; |
| 1031 | vadc->adc->amux_prop->chan_prop->offset_gain_denominator = |
| 1032 | qpnp_vadc_amux_scaling_ratio[amux_prescaling].den; |
| 1033 | |
| 1034 | scale_type = vadc->adc->adc_channels[dt_index].adc_scale_fn; |
| 1035 | if (scale_type >= SCALE_NONE) { |
| 1036 | rc = -EBADF; |
| 1037 | goto fail; |
| 1038 | } |
| 1039 | |
| 1040 | vadc_scale_fn[scale_type].chan(result->adc_code, |
| 1041 | vadc->adc->adc_prop, vadc->adc->amux_prop->chan_prop, result); |
| 1042 | |
| 1043 | fail: |
| 1044 | vadc->vadc_iadc_sync_lock = false; |
| 1045 | qpnp_vadc_unlock(); |
| 1046 | return rc; |
| 1047 | } |
| 1048 | EXPORT_SYMBOL(qpnp_vadc_iadc_sync_complete_request); |
| 1049 | |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1050 | static ssize_t qpnp_adc_show(struct device *dev, |
| 1051 | struct device_attribute *devattr, char *buf) |
| 1052 | { |
| 1053 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
| 1054 | struct qpnp_vadc_result result; |
| 1055 | int rc = -1; |
| 1056 | |
| 1057 | rc = qpnp_vadc_read(attr->index, &result); |
| 1058 | |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1059 | if (rc) { |
| 1060 | pr_err("VADC read error with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1061 | return 0; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1062 | } |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1063 | |
| 1064 | return snprintf(buf, QPNP_ADC_HWMON_NAME_LENGTH, |
| 1065 | "Result:%lld Raw:%d\n", result.physical, result.adc_code); |
| 1066 | } |
| 1067 | |
| 1068 | static struct sensor_device_attribute qpnp_adc_attr = |
| 1069 | SENSOR_ATTR(NULL, S_IRUGO, qpnp_adc_show, NULL, 0); |
| 1070 | |
| 1071 | static int32_t qpnp_vadc_init_hwmon(struct spmi_device *spmi) |
| 1072 | { |
| 1073 | struct qpnp_vadc_drv *vadc = qpnp_vadc; |
| 1074 | struct device_node *child; |
| 1075 | struct device_node *node = spmi->dev.of_node; |
| 1076 | int rc = 0, i = 0, channel; |
| 1077 | |
| 1078 | for_each_child_of_node(node, child) { |
| 1079 | channel = vadc->adc->adc_channels[i].channel_num; |
| 1080 | qpnp_adc_attr.index = vadc->adc->adc_channels[i].channel_num; |
| 1081 | qpnp_adc_attr.dev_attr.attr.name = |
| 1082 | vadc->adc->adc_channels[i].name; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1083 | memcpy(&vadc->sens_attr[i], &qpnp_adc_attr, |
| 1084 | sizeof(qpnp_adc_attr)); |
Stephen Boyd | d733796 | 2012-10-30 11:10:46 -0700 | [diff] [blame] | 1085 | sysfs_attr_init(&vadc->sens_attr[i].dev_attr.attr); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1086 | rc = device_create_file(&spmi->dev, |
| 1087 | &vadc->sens_attr[i].dev_attr); |
| 1088 | if (rc) { |
| 1089 | dev_err(&spmi->dev, |
| 1090 | "device_create_file failed for dev %s\n", |
| 1091 | vadc->adc->adc_channels[i].name); |
| 1092 | goto hwmon_err_sens; |
| 1093 | } |
| 1094 | i++; |
| 1095 | } |
| 1096 | |
| 1097 | return 0; |
| 1098 | hwmon_err_sens: |
Siddartha Mohanadoss | ae1da73 | 2012-08-08 16:39:02 -0700 | [diff] [blame] | 1099 | pr_err("Init HWMON failed for qpnp_adc with %d\n", rc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1100 | return rc; |
| 1101 | } |
| 1102 | |
| 1103 | static int __devinit qpnp_vadc_probe(struct spmi_device *spmi) |
| 1104 | { |
| 1105 | struct qpnp_vadc_drv *vadc; |
| 1106 | struct qpnp_adc_drv *adc_qpnp; |
| 1107 | struct device_node *node = spmi->dev.of_node; |
| 1108 | struct device_node *child; |
| 1109 | int rc, count_adc_channel_list = 0; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1110 | u8 fab_id = 0; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1111 | |
| 1112 | if (!node) |
| 1113 | return -EINVAL; |
| 1114 | |
| 1115 | if (qpnp_vadc) { |
| 1116 | pr_err("VADC already in use\n"); |
| 1117 | return -EBUSY; |
| 1118 | } |
| 1119 | |
| 1120 | for_each_child_of_node(node, child) |
| 1121 | count_adc_channel_list++; |
| 1122 | |
| 1123 | if (!count_adc_channel_list) { |
| 1124 | pr_err("No channel listing\n"); |
| 1125 | return -EINVAL; |
| 1126 | } |
| 1127 | |
| 1128 | vadc = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_vadc_drv) + |
| 1129 | (sizeof(struct sensor_device_attribute) * |
| 1130 | count_adc_channel_list), GFP_KERNEL); |
| 1131 | if (!vadc) { |
| 1132 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
| 1133 | return -ENOMEM; |
| 1134 | } |
| 1135 | |
| 1136 | adc_qpnp = devm_kzalloc(&spmi->dev, sizeof(struct qpnp_adc_drv), |
| 1137 | GFP_KERNEL); |
| 1138 | if (!adc_qpnp) { |
| 1139 | dev_err(&spmi->dev, "Unable to allocate memory\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1140 | rc = -ENOMEM; |
| 1141 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1142 | } |
| 1143 | |
| 1144 | vadc->adc = adc_qpnp; |
| 1145 | |
| 1146 | rc = qpnp_adc_get_devicetree_data(spmi, vadc->adc); |
| 1147 | if (rc) { |
| 1148 | dev_err(&spmi->dev, "failed to read device tree\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1149 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1150 | } |
Stephen Boyd | beab450 | 2013-04-25 10:18:17 -0700 | [diff] [blame] | 1151 | mutex_init(&vadc->adc->adc_lock); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1152 | |
Siddartha Mohanadoss | 1210995 | 2012-11-20 14:57:51 -0800 | [diff] [blame] | 1153 | rc = devm_request_irq(&spmi->dev, vadc->adc->adc_irq_eoc, |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1154 | qpnp_vadc_isr, IRQF_TRIGGER_RISING, |
| 1155 | "qpnp_vadc_interrupt", vadc); |
| 1156 | if (rc) { |
| 1157 | dev_err(&spmi->dev, |
| 1158 | "failed to request adc irq with error %d\n", rc); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1159 | goto fail; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1160 | } else { |
Siddartha Mohanadoss | 1210995 | 2012-11-20 14:57:51 -0800 | [diff] [blame] | 1161 | enable_irq_wake(vadc->adc->adc_irq_eoc); |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1162 | } |
| 1163 | |
| 1164 | qpnp_vadc = vadc; |
| 1165 | dev_set_drvdata(&spmi->dev, vadc); |
| 1166 | rc = qpnp_vadc_init_hwmon(spmi); |
| 1167 | if (rc) { |
| 1168 | dev_err(&spmi->dev, "failed to initialize qpnp hwmon adc\n"); |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1169 | goto fail; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1170 | } |
| 1171 | vadc->vadc_hwmon = hwmon_device_register(&vadc->adc->spmi->dev); |
| 1172 | vadc->vadc_init_calib = false; |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1173 | vadc->max_channels_available = count_adc_channel_list; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1174 | rc = qpnp_vadc_read_reg(QPNP_INT_TEST_VAL, &fab_id); |
| 1175 | if (rc < 0) { |
| 1176 | pr_err("qpnp adc comp id failed with %d\n", rc); |
Stepan Moskovchenko | 831229d | 2013-06-21 20:11:11 -0700 | [diff] [blame] | 1177 | goto fail; |
Siddartha Mohanadoss | 4e64f8c | 2013-04-08 15:57:32 -0700 | [diff] [blame] | 1178 | } |
| 1179 | vadc->id = fab_id; |
| 1180 | |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 1181 | rc = qpnp_vadc_warm_rst_configure(); |
| 1182 | if (rc < 0) { |
| 1183 | pr_err("Setting perp reset on warm reset failed %d\n", rc); |
Stepan Moskovchenko | 831229d | 2013-06-21 20:11:11 -0700 | [diff] [blame] | 1184 | goto fail; |
Siddartha Mohanadoss | 2255946 | 2013-05-15 15:30:28 -0700 | [diff] [blame] | 1185 | } |
| 1186 | |
Siddartha Mohanadoss | 0ee2812 | 2012-11-01 10:35:01 -0700 | [diff] [blame] | 1187 | vadc->vadc_initialized = true; |
Siddartha Mohanadoss | a32ea2a | 2013-02-12 09:58:31 -0800 | [diff] [blame] | 1188 | vadc->vadc_iadc_sync_lock = false; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1189 | |
| 1190 | return 0; |
Siddartha Mohanadoss | b60f646 | 2012-11-20 18:06:51 -0800 | [diff] [blame] | 1191 | fail: |
| 1192 | qpnp_vadc = NULL; |
| 1193 | return rc; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1194 | } |
| 1195 | |
| 1196 | static int __devexit qpnp_vadc_remove(struct spmi_device *spmi) |
| 1197 | { |
| 1198 | struct qpnp_vadc_drv *vadc = dev_get_drvdata(&spmi->dev); |
| 1199 | struct device_node *node = spmi->dev.of_node; |
| 1200 | struct device_node *child; |
| 1201 | int i = 0; |
| 1202 | |
| 1203 | for_each_child_of_node(node, child) { |
| 1204 | device_remove_file(&spmi->dev, |
| 1205 | &vadc->sens_attr[i].dev_attr); |
| 1206 | i++; |
| 1207 | } |
Siddartha Mohanadoss | 5ace110 | 2012-08-20 23:18:10 -0700 | [diff] [blame] | 1208 | vadc->vadc_initialized = false; |
Siddartha Mohanadoss | 7b116e1 | 2012-06-05 23:27:46 -0700 | [diff] [blame] | 1209 | dev_set_drvdata(&spmi->dev, NULL); |
| 1210 | |
| 1211 | return 0; |
| 1212 | } |
| 1213 | |
| 1214 | static const struct of_device_id qpnp_vadc_match_table[] = { |
| 1215 | { .compatible = "qcom,qpnp-vadc", |
| 1216 | }, |
| 1217 | {} |
| 1218 | }; |
| 1219 | |
| 1220 | static struct spmi_driver qpnp_vadc_driver = { |
| 1221 | .driver = { |
| 1222 | .name = "qcom,qpnp-vadc", |
| 1223 | .of_match_table = qpnp_vadc_match_table, |
| 1224 | }, |
| 1225 | .probe = qpnp_vadc_probe, |
| 1226 | .remove = qpnp_vadc_remove, |
| 1227 | }; |
| 1228 | |
| 1229 | static int __init qpnp_vadc_init(void) |
| 1230 | { |
| 1231 | return spmi_driver_register(&qpnp_vadc_driver); |
| 1232 | } |
| 1233 | module_init(qpnp_vadc_init); |
| 1234 | |
| 1235 | static void __exit qpnp_vadc_exit(void) |
| 1236 | { |
| 1237 | spmi_driver_unregister(&qpnp_vadc_driver); |
| 1238 | } |
| 1239 | module_exit(qpnp_vadc_exit); |
| 1240 | |
| 1241 | MODULE_DESCRIPTION("QPNP PMIC Voltage ADC driver"); |
| 1242 | MODULE_LICENSE("GPL v2"); |