blob: eddd4ed02f91466cf8206f44a0578183c310a621 [file] [log] [blame]
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -07001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
Harini Jayaramaneba52672011-09-08 15:13:00 -060015#include <linux/i2c.h>
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -070016#include <linux/msm_ssbi.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070017#include <asm/mach-types.h>
18#include <asm/mach/arch.h>
Krishna Kondadd794462011-10-01 00:19:29 -070019#include <asm/mach/mmc.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070020#include <mach/board.h>
21#include <mach/msm_iomap.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Harini Jayaraman738c9312011-09-08 15:22:38 -060024#include <mach/msm_spi.h>
Amit Blay5e4ec192011-10-20 09:16:54 +020025#include <linux/usb/android.h>
26#include <linux/usb/msm_hsusb.h>
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070027#include <linux/mfd/pm8xxx/pm8xxx-adc.h>
Jay Chokshieb5d0d52011-09-28 17:16:20 -070028#include <linux/leds.h>
29#include <linux/leds-pm8xxx.h>
Gagan Mac7a827642011-09-22 19:42:21 -060030#include <mach/msm_bus_board.h>
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070031#include "timer.h"
32#include "devices.h"
David Collinsfb88c432011-08-25 15:12:47 -070033#include "board-9615.h"
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -060034#include "cpuidle.h"
35#include "pm.h"
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -070036#include "acpuclock.h"
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -070037
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -070038static struct pm8xxx_adc_amux pm8018_adc_channels_data[] = {
39 {"vcoin", CHANNEL_VCOIN, CHAN_PATH_SCALING2, AMUX_RSV1,
40 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
41 {"vbat", CHANNEL_VBAT, CHAN_PATH_SCALING2, AMUX_RSV1,
42 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
43 {"vph_pwr", CHANNEL_VPH_PWR, CHAN_PATH_SCALING2, AMUX_RSV1,
44 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
45 {"batt_therm", CHANNEL_BATT_THERM, CHAN_PATH_SCALING1, AMUX_RSV2,
46 ADC_DECIMATION_TYPE2, ADC_SCALE_BATT_THERM},
47 {"batt_id", CHANNEL_BATT_ID, CHAN_PATH_SCALING1, AMUX_RSV2,
48 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
49 {"pmic_therm", CHANNEL_DIE_TEMP, CHAN_PATH_SCALING1, AMUX_RSV1,
50 ADC_DECIMATION_TYPE2, ADC_SCALE_PMIC_THERM},
51 {"625mv", CHANNEL_625MV, CHAN_PATH_SCALING1, AMUX_RSV1,
52 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
53 {"125v", CHANNEL_125V, CHAN_PATH_SCALING1, AMUX_RSV1,
54 ADC_DECIMATION_TYPE2, ADC_SCALE_DEFAULT},
55 {"pa_therm0", ADC_MPP_1_AMUX3, CHAN_PATH_SCALING1, AMUX_RSV1,
56 ADC_DECIMATION_TYPE2, ADC_SCALE_PA_THERM},
57};
58
59static struct pm8xxx_adc_properties pm8018_adc_data = {
60 .adc_vdd_reference = 1800, /* milli-voltage for this adc */
61 .bitresolution = 15,
62 .bipolar = 0,
63};
64
65static struct pm8xxx_adc_platform_data pm8018_adc_pdata = {
66 .adc_channel = pm8018_adc_channels_data,
67 .adc_num_board_channel = ARRAY_SIZE(pm8018_adc_channels_data),
68 .adc_prop = &pm8018_adc_data,
69};
70
David Collinsfb88c432011-08-25 15:12:47 -070071static struct pm8xxx_irq_platform_data pm8xxx_irq_pdata __devinitdata = {
72 .irq_base = PM8018_IRQ_BASE,
73 .devirq = MSM_GPIO_TO_INT(87),
74 .irq_trigger_flag = IRQF_TRIGGER_LOW,
75};
76
77static struct pm8xxx_gpio_platform_data pm8xxx_gpio_pdata __devinitdata = {
78 .gpio_base = PM8018_GPIO_PM_TO_SYS(1),
79};
80
81static struct pm8xxx_mpp_platform_data pm8xxx_mpp_pdata __devinitdata = {
82 .mpp_base = PM8018_MPP_PM_TO_SYS(1),
83};
84
85static struct pm8xxx_rtc_platform_data pm8xxx_rtc_pdata __devinitdata = {
86 .rtc_write_enable = false,
Ashay Jaiswaldb5e6dc2011-10-12 11:02:47 +053087 .rtc_alarm_powerup = false,
David Collinsfb88c432011-08-25 15:12:47 -070088};
89
90static struct pm8xxx_pwrkey_platform_data pm8xxx_pwrkey_pdata = {
91 .pull_up = 1,
92 .kpd_trigger_delay_us = 970,
93 .wakeup = 1,
94};
95
96static struct pm8xxx_misc_platform_data pm8xxx_misc_pdata = {
97 .priority = 0,
98};
99
Jay Chokshieb5d0d52011-09-28 17:16:20 -0700100#define PM8018_LED_KB_MAX_CURRENT 20 /* I = 20mA */
101#define PM8XXX_LED_PWM_PERIOD_US 1000
102
103/**
104 * PM8XXX_PWM_CHANNEL_NONE shall be used when LED shall not be
105 * driven using PWM feature.
106 */
107#define PM8XXX_PWM_CHANNEL_NONE -1
108
109static struct led_info pm8018_led_info[] = {
110 [0] = {
111 .name = "led:kb",
112 },
113};
114
115static struct led_platform_data pm8018_led_core_pdata = {
116 .num_leds = ARRAY_SIZE(pm8018_led_info),
117 .leds = pm8018_led_info,
118};
119
120static struct pm8xxx_led_config pm8018_led_configs[] = {
121 [0] = {
122 .id = PM8XXX_ID_LED_KB_LIGHT,
123 .mode = PM8XXX_LED_MODE_PWM3,
124 .max_current = PM8018_LED_KB_MAX_CURRENT,
125 .pwm_channel = 2,
126 .pwm_period_us = PM8XXX_LED_PWM_PERIOD_US,
127 },
128};
129
130static struct pm8xxx_led_platform_data pm8xxx_leds_pdata = {
131 .led_core = &pm8018_led_core_pdata,
132 .configs = pm8018_led_configs,
133 .num_configs = ARRAY_SIZE(pm8018_led_configs),
134};
135
David Collinsfb88c432011-08-25 15:12:47 -0700136static struct pm8018_platform_data pm8018_platform_data __devinitdata = {
137 .irq_pdata = &pm8xxx_irq_pdata,
138 .gpio_pdata = &pm8xxx_gpio_pdata,
139 .mpp_pdata = &pm8xxx_mpp_pdata,
140 .rtc_pdata = &pm8xxx_rtc_pdata,
141 .pwrkey_pdata = &pm8xxx_pwrkey_pdata,
142 .misc_pdata = &pm8xxx_misc_pdata,
David Collins00b31e62011-08-31 20:00:10 -0700143 .regulator_pdatas = msm_pm8018_regulator_pdata,
Siddartha Mohanadoss5f60b452011-10-05 11:49:00 -0700144 .adc_pdata = &pm8018_adc_pdata,
Jay Chokshieb5d0d52011-09-28 17:16:20 -0700145 .leds_pdata = &pm8xxx_leds_pdata,
David Collinsfb88c432011-08-25 15:12:47 -0700146};
147
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700148static struct msm_ssbi_platform_data msm9615_ssbi_pm8018_pdata __devinitdata = {
149 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
150 .slave = {
David Collinsfb88c432011-08-25 15:12:47 -0700151 .name = PM8018_CORE_DEV_NAME,
152 .platform_data = &pm8018_platform_data,
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700153 },
154};
155
David Collinsbea297a2011-09-28 13:11:14 -0700156static struct platform_device msm9615_device_rpm_regulator __devinitdata = {
157 .name = "rpm-regulator",
158 .id = -1,
159 .dev = {
160 .platform_data = &msm_rpm_regulator_9615_pdata,
161 },
162};
163
David Collins0f9942a2011-10-31 09:47:34 -0700164static struct platform_device msm9615_device_ext_2p95v_vreg = {
165 .name = GPIO_REGULATOR_DEV_NAME,
166 .id = 18,
167 .dev = {
168 .platform_data =
169 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_2P95V],
170 },
171};
172
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700173static struct gpiomux_setting ps_hold = {
174 .func = GPIOMUX_FUNC_1,
175 .drv = GPIOMUX_DRV_8MA,
176 .pull = GPIOMUX_PULL_NONE,
177};
178
Rohit Vaswani09666872011-08-23 17:41:54 -0700179static struct gpiomux_setting gsbi4 = {
180 .func = GPIOMUX_FUNC_1,
181 .drv = GPIOMUX_DRV_8MA,
182 .pull = GPIOMUX_PULL_NONE,
183};
184
Harini Jayaramaneba52672011-09-08 15:13:00 -0600185static struct gpiomux_setting gsbi5 = {
186 .func = GPIOMUX_FUNC_1,
187 .drv = GPIOMUX_DRV_8MA,
188 .pull = GPIOMUX_PULL_NONE,
189};
190
Harini Jayaraman738c9312011-09-08 15:22:38 -0600191static struct gpiomux_setting gsbi3 = {
192 .func = GPIOMUX_FUNC_1,
193 .drv = GPIOMUX_DRV_8MA,
194 .pull = GPIOMUX_PULL_NONE,
195};
196
197static struct gpiomux_setting gsbi3_cs1_config = {
198 .func = GPIOMUX_FUNC_4,
199 .drv = GPIOMUX_DRV_8MA,
200 .pull = GPIOMUX_PULL_NONE,
201};
202
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700203struct msm_gpiomux_config msm9615_ps_hold_config[] __initdata = {
204 {
205 .gpio = 83,
206 .settings = {
207 [GPIOMUX_SUSPENDED] = &ps_hold,
208 },
209 },
210};
211
Rohit Vaswani09666872011-08-23 17:41:54 -0700212struct msm_gpiomux_config msm9615_gsbi_configs[] __initdata = {
213 {
Harini Jayaraman738c9312011-09-08 15:22:38 -0600214 .gpio = 8, /* GSBI3 QUP SPI_CLK */
215 .settings = {
216 [GPIOMUX_SUSPENDED] = &gsbi3,
217 },
218 },
219 {
220 .gpio = 9, /* GSBI3 QUP SPI_CS_N */
221 .settings = {
222 [GPIOMUX_SUSPENDED] = &gsbi3,
223 },
224 },
225 {
226 .gpio = 10, /* GSBI3 QUP SPI_DATA_MISO */
227 .settings = {
228 [GPIOMUX_SUSPENDED] = &gsbi3,
229 },
230 },
231 {
232 .gpio = 11, /* GSBI3 QUP SPI_DATA_MOSI */
233 .settings = {
234 [GPIOMUX_SUSPENDED] = &gsbi3,
235 },
236 },
237 {
Rohit Vaswani09666872011-08-23 17:41:54 -0700238 .gpio = 12, /* GSBI4 UART */
239 .settings = {
240 [GPIOMUX_SUSPENDED] = &gsbi4,
241 },
242 },
243 {
244 .gpio = 13, /* GSBI4 UART */
245 .settings = {
246 [GPIOMUX_SUSPENDED] = &gsbi4,
247 },
248 },
249 {
250 .gpio = 14, /* GSBI4 UART */
251 .settings = {
252 [GPIOMUX_SUSPENDED] = &gsbi4,
253 },
254 },
255 {
256 .gpio = 15, /* GSBI4 UART */
257 .settings = {
258 [GPIOMUX_SUSPENDED] = &gsbi4,
259 },
260 },
Harini Jayaramaneba52672011-09-08 15:13:00 -0600261 {
262 .gpio = 16, /* GSBI5 I2C QUP SCL */
263 .settings = {
264 [GPIOMUX_SUSPENDED] = &gsbi5,
265 },
266 },
267 {
268 .gpio = 17, /* GSBI5 I2C QUP SDA */
269 .settings = {
270 [GPIOMUX_SUSPENDED] = &gsbi5,
271 },
272 },
Harini Jayaraman738c9312011-09-08 15:22:38 -0600273 {
274 /* GPIO 19 can be used for I2C/UART on GSBI5 */
275 .gpio = 19, /* GSBI3 QUP SPI_CS_1 */
276 .settings = {
277 [GPIOMUX_SUSPENDED] = &gsbi3_cs1_config,
278 },
279 },
Rohit Vaswani09666872011-08-23 17:41:54 -0700280};
281
Krishna Kondadd794462011-10-01 00:19:29 -0700282#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
283 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT))
284
Krishna Konda7186bfe2011-10-17 15:36:54 -0700285#define GPIO_SDC1_HW_DET 80
Krishna Konda3b78ea72011-10-18 16:09:19 -0700286#define GPIO_SDC2_DAT1_WAKEUP 26
Krishna Kondadd794462011-10-01 00:19:29 -0700287
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -0700288/* MDM9x15 has 2 SDCC controllers */
Krishna Kondadd794462011-10-01 00:19:29 -0700289enum sdcc_controllers {
290 SDCC1,
291 SDCC2,
292 MAX_SDCC_CONTROLLER
293};
294
295#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
Krishna Kondafea60182011-11-01 16:01:34 -0700296/* All SDCC controllers requires VDD/VCC voltage */
297static struct msm_mmc_reg_data mmc_vdd_reg_data[MAX_SDCC_CONTROLLER] = {
298 /* SDCC1 : External card slot connected */
299 [SDCC1] = {
300 .name = "sdc_vdd",
301 /*
302 * This is a gpio-regulator and does not support
303 * regulator_set_voltage and regulator_set_optimum_mode
304 */
Krishna Kondafea60182011-11-01 16:01:34 -0700305 .high_vol_level = 2950000,
306 .low_vol_level = 2950000,
307 .hpm_uA = 600000, /* 600mA */
308 }
309};
310
311/* All SDCC controllers may require voting for VDD PAD voltage */
312static struct msm_mmc_reg_data mmc_vddp_reg_data[MAX_SDCC_CONTROLLER] = {
313 /* SDCC1 : External card slot connected */
314 [SDCC1] = {
315 .name = "sdc_vddp",
Krishna Kondafea60182011-11-01 16:01:34 -0700316 .high_vol_level = 2950000,
317 .low_vol_level = 1850000,
318 .always_on = true,
319 .lpm_sup = true,
320 /* Max. Active current required is 16 mA */
321 .hpm_uA = 16000,
322 /*
323 * Sleep current required is ~300 uA. But min. vote can be
324 * in terms of mA (min. 1 mA). So let's vote for 2 mA
325 * during sleep.
326 */
327 .lpm_uA = 2000,
328 }
329};
330
331static struct msm_mmc_slot_reg_data mmc_slot_vreg_data[MAX_SDCC_CONTROLLER] = {
332 /* SDCC1 : External card slot connected */
333 [SDCC1] = {
334 .vdd_data = &mmc_vdd_reg_data[SDCC1],
335 .vddp_data = &mmc_vddp_reg_data[SDCC1],
336 }
337};
338
Krishna Kondadd794462011-10-01 00:19:29 -0700339/* SDC1 pad data */
340static struct msm_mmc_pad_drv sdc1_pad_drv_on_cfg[] = {
341 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_16MA},
342 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_10MA},
343 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_10MA}
344};
345
346static struct msm_mmc_pad_drv sdc1_pad_drv_off_cfg[] = {
347 {TLMM_HDRV_SDC1_CLK, GPIO_CFG_2MA},
348 {TLMM_HDRV_SDC1_CMD, GPIO_CFG_2MA},
349 {TLMM_HDRV_SDC1_DATA, GPIO_CFG_2MA}
350};
351
352static struct msm_mmc_pad_pull sdc1_pad_pull_on_cfg[] = {
353 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
354 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_UP},
355 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_UP}
356};
357
358static struct msm_mmc_pad_pull sdc1_pad_pull_off_cfg[] = {
359 {TLMM_PULL_SDC1_CLK, GPIO_CFG_NO_PULL},
360 {TLMM_PULL_SDC1_CMD, GPIO_CFG_PULL_DOWN},
361 {TLMM_PULL_SDC1_DATA, GPIO_CFG_PULL_DOWN}
362};
363
364static struct msm_mmc_pad_pull_data mmc_pad_pull_data[MAX_SDCC_CONTROLLER] = {
365 [SDCC1] = {
366 .on = sdc1_pad_pull_on_cfg,
367 .off = sdc1_pad_pull_off_cfg,
368 .size = ARRAY_SIZE(sdc1_pad_pull_on_cfg)
369 },
370};
371
372static struct msm_mmc_pad_drv_data mmc_pad_drv_data[MAX_SDCC_CONTROLLER] = {
373 [SDCC1] = {
374 .on = sdc1_pad_drv_on_cfg,
375 .off = sdc1_pad_drv_off_cfg,
376 .size = ARRAY_SIZE(sdc1_pad_drv_on_cfg)
377 },
378};
379
380static struct msm_mmc_pad_data mmc_pad_data[MAX_SDCC_CONTROLLER] = {
381 [SDCC1] = {
382 .pull = &mmc_pad_pull_data[SDCC1],
383 .drv = &mmc_pad_drv_data[SDCC1]
384 },
385};
386#endif
387
Krishna Konda71aef182011-10-01 02:27:51 -0700388#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
389static struct gpiomux_setting sdcc2_clk_actv_cfg = {
390 .func = GPIOMUX_FUNC_1,
391 .drv = GPIOMUX_DRV_16MA,
392 .pull = GPIOMUX_PULL_NONE,
393};
394
395static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
396 .func = GPIOMUX_FUNC_1,
397 .drv = GPIOMUX_DRV_8MA,
398 .pull = GPIOMUX_PULL_UP,
399};
400
401static struct gpiomux_setting sdcc2_suspend_cfg = {
402 .func = GPIOMUX_FUNC_1,
403 .drv = GPIOMUX_DRV_2MA,
404 .pull = GPIOMUX_PULL_DOWN,
405};
406
407static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
408 {
409 /* SDC2_DATA_0 */
410 .gpio = 25,
411 .settings = {
412 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
413 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
414 },
415 },
416 {
417 /* SDC2_DATA_1 */
418 .gpio = 26,
419 .settings = {
420 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda0b10fa12011-11-07 22:47:41 -0800421 [GPIOMUX_SUSPENDED] = &sdcc2_cmd_data_0_3_actv_cfg,
Krishna Konda71aef182011-10-01 02:27:51 -0700422 },
423 },
424 {
425 /* SDC2_DATA_2 */
426 .gpio = 27,
427 .settings = {
428 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
429 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
430 },
431 },
432 {
433 /* SDC2_DATA_3 */
434 .gpio = 28,
435 .settings = {
436 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
437 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
438 },
439 },
440 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800441 /* SDC2_CMD */
Krishna Konda71aef182011-10-01 02:27:51 -0700442 .gpio = 29,
443 .settings = {
444 [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
445 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
446 },
447 },
448 {
Krishna Konda0b10fa12011-11-07 22:47:41 -0800449 /* SDC2_CLK */
Krishna Konda71aef182011-10-01 02:27:51 -0700450 .gpio = 30,
451 .settings = {
452 [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
453 [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
454 },
455 },
456};
457
458static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
459 {25, "sdc2_dat_0"},
460 {26, "sdc2_dat_1"},
461 {27, "sdc2_dat_2"},
462 {28, "sdc2_dat_3"},
463 {29, "sdc2_cmd"},
464 {30, "sdc2_clk"},
465};
466
467static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
468 [SDCC2] = {
469 .gpio = sdc2_gpio_cfg,
470 .size = ARRAY_SIZE(sdc2_gpio_cfg),
471 },
472};
473#else
474static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
475#endif
476
477static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
Krishna Kondadd794462011-10-01 00:19:29 -0700478#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
479 [SDCC1] = {
480 .is_gpio = 0,
481 .pad_data = &mmc_pad_data[SDCC1],
482 },
483#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700484#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
485 [SDCC2] = {
486 .is_gpio = 1,
487 .gpio_data = &mmc_gpio_data[SDCC2],
488 },
489#endif
Krishna Kondadd794462011-10-01 00:19:29 -0700490};
491
492#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
493static unsigned int sdc1_sup_clk_rates[] = {
494 400000, 24000000, 48000000
495};
496
497static struct mmc_platform_data sdc1_data = {
498 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
499 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
500 .sup_clk_table = sdc1_sup_clk_rates,
501 .sup_clk_cnt = ARRAY_SIZE(sdc1_sup_clk_rates),
Krishna Kondafea60182011-11-01 16:01:34 -0700502 .pclk_src_dfab = true,
Krishna Kondafea60182011-11-01 16:01:34 -0700503 .vreg_data = &mmc_slot_vreg_data[SDCC1],
Krishna Kondadd794462011-10-01 00:19:29 -0700504 .pin_data = &mmc_slot_pin_data[SDCC1],
Krishna Konda7186bfe2011-10-17 15:36:54 -0700505#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
506 .status_gpio = GPIO_SDC1_HW_DET,
507 .status_irq = MSM_GPIO_TO_INT(GPIO_SDC1_HW_DET),
508 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
509#endif
Krishna Kondadbcf9702011-11-07 18:45:48 -0800510 .xpc_cap = 1,
511 .uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
512 MMC_CAP_MAX_CURRENT_400)
Krishna Kondadd794462011-10-01 00:19:29 -0700513};
514static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
515#else
516static struct mmc_platform_data *msm9615_sdc1_pdata;
517#endif
518
Krishna Konda71aef182011-10-01 02:27:51 -0700519#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
520static unsigned int sdc2_sup_clk_rates[] = {
521 400000, 24000000, 48000000
522};
523
524static struct mmc_platform_data sdc2_data = {
525 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
526 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
527 .sup_clk_table = sdc2_sup_clk_rates,
528 .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
Krishna Konda890b1d12011-10-18 16:05:37 -0700529 .pclk_src_dfab = 1,
Krishna Konda71aef182011-10-01 02:27:51 -0700530 .pin_data = &mmc_slot_pin_data[SDCC2],
Krishna Konda3b78ea72011-10-18 16:09:19 -0700531#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
532 .sdiowakeup_irq = MSM_GPIO_TO_INT(GPIO_SDC2_DAT1_WAKEUP),
533#endif
Krishna Konda71aef182011-10-01 02:27:51 -0700534};
535static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
536#else
537static struct mmc_platform_data *msm9615_sdc2_pdata;
538#endif
539
Krishna Kondadd794462011-10-01 00:19:29 -0700540static void __init msm9615_init_mmc(void)
541{
Krishna Kondadd794462011-10-01 00:19:29 -0700542 if (msm9615_sdc1_pdata) {
Krishna Kondafea60182011-11-01 16:01:34 -0700543 /* SDC1: External card slot for SD/MMC cards */
544 msm_add_sdcc(1, msm9615_sdc1_pdata);
Krishna Kondadd794462011-10-01 00:19:29 -0700545 }
Krishna Konda71aef182011-10-01 02:27:51 -0700546
547 if (msm9615_sdc2_pdata) {
548 msm_gpiomux_install(msm9615_sdcc2_configs,
549 ARRAY_SIZE(msm9615_sdcc2_configs));
550
Krishna Kondafea60182011-11-01 16:01:34 -0700551 /* SDC2: External card slot used for WLAN */
Krishna Konda71aef182011-10-01 02:27:51 -0700552 msm_add_sdcc(2, msm9615_sdc2_pdata);
553 }
Krishna Kondadd794462011-10-01 00:19:29 -0700554}
555#else
556static void __init msm9615_init_mmc(void) { }
557#endif
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600558static struct msm_cpuidle_state msm_cstates[] __initdata = {
559 {0, 0, "C0", "WFI",
560 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
561
562 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
563 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
564
565 {0, 2, "C2", "POWER_COLLAPSE",
566 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
567};
568static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR] = {
569 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
570 .idle_supported = 1,
571 .suspend_supported = 1,
572 .idle_enabled = 0,
573 .suspend_enabled = 0,
574 },
575 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
576 .idle_supported = 1,
577 .suspend_supported = 1,
578 .idle_enabled = 0,
579 .suspend_enabled = 0,
580 },
581 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
582 .idle_supported = 1,
583 .suspend_supported = 1,
584 .idle_enabled = 1,
585 .suspend_enabled = 1,
586 },
587};
Krishna Kondadd794462011-10-01 00:19:29 -0700588
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700589static int __init gpiomux_init(void)
590{
591 int rc;
592
593 rc = msm_gpiomux_init(NR_GPIO_IRQS);
594 if (rc) {
595 pr_err(KERN_ERR "msm_gpiomux_init failed %d\n", rc);
596 return rc;
597 }
Rohit Vaswani09666872011-08-23 17:41:54 -0700598 msm_gpiomux_install(msm9615_gsbi_configs,
599 ARRAY_SIZE(msm9615_gsbi_configs));
600
Rohit Vaswanif688fa62011-10-13 18:13:10 -0700601 msm_gpiomux_install(msm9615_ps_hold_config,
602 ARRAY_SIZE(msm9615_ps_hold_config));
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700603 return 0;
604}
605
Gagan Mac7a827642011-09-22 19:42:21 -0600606static void __init msm9615_init_buses(void)
607{
608#ifdef CONFIG_MSM_BUS_SCALING
609 msm_bus_rpm_set_mt_mask();
610 msm_bus_9615_sys_fabric_pdata.rpm_enabled = 1;
611 msm_bus_9615_sys_fabric.dev.platform_data =
612 &msm_bus_9615_sys_fabric_pdata;
613 msm_bus_def_fab.dev.platform_data = &msm_bus_9615_def_fab_pdata;
614#endif
615}
616
Harini Jayaraman738c9312011-09-08 15:22:38 -0600617static struct msm_spi_platform_data msm9615_qup_spi_gsbi3_pdata = {
618 .max_clock_speed = 24000000,
619};
620
Harini Jayaramaneba52672011-09-08 15:13:00 -0600621static struct msm_i2c_platform_data msm9615_i2c_qup_gsbi5_pdata = {
622 .clk_freq = 100000,
623 .src_clk_rate = 24000000,
624};
625
Amit Blay5e4ec192011-10-20 09:16:54 +0200626static struct msm_otg_platform_data msm_otg_pdata = {
627 .mode = USB_PERIPHERAL,
628 .otg_control = OTG_NO_CONTROL,
629 .phy_type = SNPS_28NM_INTEGRATED_PHY,
630 .pclk_src_name = "dfab_usb_hs_clk",
631};
632
633static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
634{
635 return 0;
636}
637
638static struct android_usb_platform_data android_usb_pdata = {
639 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
640};
641
642static struct platform_device android_usb_device = {
643 .name = "android_usb",
644 .id = -1,
645 .dev = {
646 .platform_data = &android_usb_pdata,
647 },
648};
649
Rohit Vaswani149f0a72011-11-09 15:21:28 -0800650static struct platform_device msm_wlan_ar6000_pm_device = {
651 .name = "wlan_ar6000_pm_dev",
652 .id = -1,
653};
654
655static int __init msm9615_init_ar6000pm(void)
656{
657 return platform_device_register(&msm_wlan_ar6000_pm_device);
658}
659
Amit Blay5e4ec192011-10-20 09:16:54 +0200660static struct platform_device *common_devices[] = {
661 &msm9615_device_dmov,
662 &msm_device_smd,
663 &msm_device_otg,
664 &msm_device_gadget_peripheral,
665 &android_usb_device,
666 &msm9615_device_uart_gsbi4,
David Collins0f9942a2011-10-31 09:47:34 -0700667 &msm9615_device_ext_2p95v_vreg,
Amit Blay5e4ec192011-10-20 09:16:54 +0200668 &msm9615_device_ssbi_pmic1,
669 &msm9615_device_qup_i2c_gsbi5,
670 &msm9615_device_qup_spi_gsbi3,
671 &msm_device_sps,
672 &msm9615_device_tsens,
673 &msm_device_nand,
Eric Holmberg0c96e702011-11-08 18:04:31 -0700674 &msm_device_bam_dmux,
Amit Blay5e4ec192011-10-20 09:16:54 +0200675 &msm_rpm_device,
676#ifdef CONFIG_HW_RANDOM_MSM
677 &msm_device_rng,
678#endif
679
680#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
681 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700682 &msm9615_qcrypto_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200683#endif
684
685#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
686 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
Ramesh Masavarapuaa28b5b2011-10-21 10:26:03 -0700687 &msm9615_qcedev_device,
Amit Blay5e4ec192011-10-20 09:16:54 +0200688#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -0700689 &msm9615_device_watchdog,
Gagan Mac7a827642011-09-22 19:42:21 -0600690 &msm_bus_9615_sys_fabric,
691 &msm_bus_def_fab,
Amit Blay5e4ec192011-10-20 09:16:54 +0200692};
693
Harini Jayaramaneba52672011-09-08 15:13:00 -0600694static void __init msm9615_i2c_init(void)
695{
696 msm9615_device_qup_i2c_gsbi5.dev.platform_data =
697 &msm9615_i2c_qup_gsbi5_pdata;
698}
699
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700700static void __init msm9615_common_init(void)
701{
702 msm9615_device_init();
703 gpiomux_init();
Harini Jayaramaneba52672011-09-08 15:13:00 -0600704 msm9615_i2c_init();
David Collins00b31e62011-08-31 20:00:10 -0700705 regulator_suppress_info_printing();
David Collinsbea297a2011-09-28 13:11:14 -0700706 platform_device_register(&msm9615_device_rpm_regulator);
Gagan Mac7a827642011-09-22 19:42:21 -0600707 msm_clock_init(&msm9615_clock_init_data);
708 msm9615_init_buses();
Harini Jayaraman738c9312011-09-08 15:22:38 -0600709 msm9615_device_qup_spi_gsbi3.dev.platform_data =
710 &msm9615_qup_spi_gsbi3_pdata;
Kenneth Heitkeaf3d3cf2011-09-08 11:45:31 -0700711 msm9615_device_ssbi_pmic1.dev.platform_data =
712 &msm9615_ssbi_pm8018_pdata;
David Collins00b31e62011-08-31 20:00:10 -0700713 pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
Amit Blay5e4ec192011-10-20 09:16:54 +0200714
715 msm_device_otg.dev.platform_data = &msm_otg_pdata;
Rohit Vaswani09666872011-08-23 17:41:54 -0700716 platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
Krishna Kondadd794462011-10-01 00:19:29 -0700717
Vikram Mulukutlab5e1cda2011-10-04 16:17:22 -0700718 acpuclk_init(&acpuclk_9615_soc_data);
719
Rohit Vaswani149f0a72011-11-09 15:21:28 -0800720 /* Ensure ar6000pm device is registered before MMC/SDC */
721 msm9615_init_ar6000pm();
722
Krishna Kondadd794462011-10-01 00:19:29 -0700723 msm9615_init_mmc();
Maheshkumar Sivasubramanian4923db22011-09-15 09:28:15 -0600724 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
725 msm_pm_set_rpm_wakeup_irq(RPM_APCC_CPU0_WAKE_UP_IRQ);
726 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
727 msm_pm_data);
Rohit Vaswaniced9b3b2011-08-23 17:21:49 -0700728}
729
730static void __init msm9615_cdp_init(void)
731{
732 msm9615_common_init();
733}
734
735static void __init msm9615_mtp_init(void)
736{
737 msm9615_common_init();
738}
739
740MACHINE_START(MSM9615_CDP, "QCT MSM9615 CDP")
741 .map_io = msm9615_map_io,
742 .init_irq = msm9615_init_irq,
743 .timer = &msm_timer,
744 .init_machine = msm9615_cdp_init,
745MACHINE_END
746
747MACHINE_START(MSM9615_MTP, "QCT MSM9615 MTP")
748 .map_io = msm9615_map_io,
749 .init_irq = msm9615_init_irq,
750 .timer = &msm_timer,
751 .init_machine = msm9615_mtp_init,
752MACHINE_END