blob: de4e571e78d885cdb8fd9f09e41c40d56b5e45d0 [file] [log] [blame]
Mitchel Humpherys85d08692012-10-23 12:56:35 -07001/* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13/include/ "skeleton.dtsi"
Mitchel Humpherys52ffaec2012-10-09 15:40:13 -070014/include/ "msm8226-ion.dtsi"
Patrick Dalye8977aa2012-11-06 15:25:58 -080015/include/ "msm-gdsc.dtsi"
Mitchel Humpherys85d08692012-10-23 12:56:35 -070016/include/ "msm8226-iommu.dtsi"
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -070017/include/ "msm8226-pm.dtsi"
Eric Holmberg3d112ee2013-01-29 19:12:39 -070018/include/ "msm8226-smp2p.dtsi"
liu zhongf5c0edb2013-01-25 11:18:53 -070019/include/ "msm8226-gpu.dtsi"
Gagan Macf5b34d82013-01-28 17:11:10 -070020/include/ "msm8226-bus.dtsi"
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070021
22/ {
23 model = "Qualcomm MSM 8226";
24 compatible = "qcom,msm8226";
25 interrupt-parent = <&intc>;
26
27 intc: interrupt-controller@f9000000 {
28 compatible = "qcom,msm-qgic2";
29 interrupt-controller;
30 #interrupt-cells = <3>;
31 reg = <0xF9000000 0x1000>,
32 <0xF9002000 0x1000>;
33 };
34
35 msmgpio: gpio@fd510000 {
36 compatible = "qcom,msm-gpio";
37 interrupt-controller;
38 #interrupt-cells = <2>;
39 reg = <0xfd510000 0x4000>;
Syed Rameez Mustafa86cccfc2012-12-10 18:06:08 -080040 gpio-controller;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070041 #gpio-cells = <2>;
Rohit Vaswani341c2032012-11-08 18:49:29 -080042 ngpio = <117>;
Rohit Vaswanid2001522012-12-05 19:23:44 -080043 interrupts = <0 208 0>;
Rohit Vaswanied0a4ef2012-12-11 15:14:42 -080044 qcom,direct-connect-irqs = <8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070045 };
46
Gilad Avidovd59217c2013-02-01 13:45:59 -070047 aliases {
48 spi0 = &spi_0;
49 };
50
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070051 timer {
Syed Rameez Mustafa0824d6c2012-11-29 18:53:56 -080052 compatible = "arm,armv7-timer";
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070053 interrupts = <1 2 0 1 3 0>;
54 clock-frequency = <19200000>;
55 };
56
57 serial@f991f000 {
58 compatible = "qcom,msm-lsuart-v14";
59 reg = <0xf991f000 0x1000>;
60 interrupts = <0 109 0>;
61 status = "disabled";
62 };
63
64 serial@f995e000 {
65 compatible = "qcom,msm-lsuart-v14";
66 reg = <0xf995e000 0x1000>;
67 interrupts = <0 114 0>;
68 status = "disabled";
69 };
70
Abhimanyu Kapur032b1f42013-01-18 00:10:50 -080071 qcom,msm-imem@fe805000 {
72 compatible = "qcom,msm-imem";
73 reg = <0xfe805000 0x1000>; /* Address and size of IMEM */
74 };
75
Yan He7c06ce32012-12-03 17:12:31 -080076 qcom,sps@f9984000 {
77 compatible = "qcom,msm_sps";
78 reg = <0xf9984000 0x15000>,
79 <0xf9999000 0xb000>;
80 interrupts = <0 94 0>;
81 };
82
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070083 usb@f9a55000 {
84 compatible = "qcom,hsusb-otg";
85 reg = <0xf9a55000 0x400>;
Mayank Ranaac2a54f2013-01-17 10:14:35 +053086 interrupts = <0 134 0>, <0 140 0>;
87 interrupt-names = "core_irq", "async_irq";
David Keitel7184c6e2013-02-11 13:23:04 -080088 HSUSB_VDDCX-supply = <&pm8226_s1>;
89 HSUSB_1p8-supply = <&pm8226_l10>;
90 HSUSB_3p3-supply = <&pm8226_l20>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070091
92 qcom,hsusb-otg-phy-type = <2>;
93 qcom,hsusb-otg-mode = <1>;
94 qcom,hsusb-otg-otg-control = <1>;
95 qcom,hsusb-otg-disable-reset;
96 };
97
Mayank Rana6bd9a272013-01-29 16:23:23 +053098 android_usb@fe8050c8 {
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -070099 compatible = "qcom,android-usb";
Mayank Rana6bd9a272013-01-29 16:23:23 +0530100 reg = <0xfe8050c8 0xc8>;
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700101 };
102
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800103 wcd9xxx_intc: wcd9xxx-irq {
104 compatible = "qcom,wcd9xxx-irq";
105 interrupt-controller;
106 #interrupt-cells = <1>;
107 interrupt-parent = <&msmgpio>;
108 interrupts = <68 0>;
109 interrupt-names = "cdc-int";
110 };
111
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800112 slim@fe12f000 {
113 cell-index = <1>;
114 compatible = "qcom,slim-ngd";
115 reg = <0xfe12f000 0x35000>,
116 <0xfe104000 0x20000>;
117 reg-names = "slimbus_physical", "slimbus_bam_physical";
118 interrupts = <0 163 0>, <0 164 0>;
119 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800120
121 tapan_codec {
122 compatible = "qcom,tapan-slim-pgd";
123 elemental-addr = [00 01 E0 00 17 02];
124
125 interrupt-parent = <&wcd9xxx_intc>;
126 interrupts = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
127 17 18 19 20 21 22 23 24 25 26 27 28>;
128 qcom,cdc-reset-gpio = <&msmgpio 72 0>;
129
David Keitel7184c6e2013-02-11 13:23:04 -0800130 cdc-vdd-buck-supply = <&pm8226_s4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800131 qcom,cdc-vdd-buck-voltage = <2100000 2100000>;
132 qcom,cdc-vdd-buck-current = <650000>;
133
David Keitel7184c6e2013-02-11 13:23:04 -0800134 cdc-vdd-h-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800135 qcom,cdc-vdd-h-voltage = <1800000 1800000>;
136 qcom,cdc-vdd-h-current = <25000>;
137
David Keitel7184c6e2013-02-11 13:23:04 -0800138 cdc-vdd-px-supply = <&pm8226_l6>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800139 qcom,cdc-vdd-px-voltage = <1800000 1800000>;
140 qcom,cdc-vdd-px-current = <25000>;
141
David Keitel7184c6e2013-02-11 13:23:04 -0800142 cdc-vdd-a-1p2v-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800143 qcom,cdc-vdd-a-1p2v-voltage = <1200000 1200000>;
144 qcom,cdc-vdd-a-1p2v-current = <10000>;
145
David Keitel7184c6e2013-02-11 13:23:04 -0800146 cdc-vdd-cx-supply = <&pm8226_l4>;
Bhalchandra Gajare555bceb2012-12-12 22:48:34 -0800147 qcom,cdc-vdd-cx-voltage = <1200000 1200000>;
148 qcom,cdc-vdd-cx-current = <10000>;
149
150 qcom,cdc-micbias-ldoh-v = <0x3>;
151 qcom,cdc-micbias-cfilt1-mv = <1800>;
152 qcom,cdc-micbias-cfilt2-mv = <1800>;
153 qcom,cdc-micbias-cfilt3-mv = <1800>;
154
155 qcom,cdc-micbias1-cfilt-sel = <0x0>;
156 qcom,cdc-micbias2-cfilt-sel = <0x1>;
157 qcom,cdc-micbias3-cfilt-sel = <0x2>;
158
159 qcom,cdc-mclk-clk-rate = <9600000>;
160 qcom,cdc-slim-ifd = "tapan-slim-ifd";
161 qcom,cdc-slim-ifd-elemental-addr = [00 00 E0 00 17 02];
162 };
Bhalchandra Gajarefb785972012-12-06 19:25:10 -0800163 };
164
Bhalchandra Gajaree1915b82012-12-12 17:28:39 -0800165 qcom,msm-adsp-loader {
166 compatible = "qcom,adsp-loader";
167 qcom,adsp-state = <0>;
168 };
169
Bhalchandra Gajare03a40ec2012-12-17 11:38:28 -0800170 sound {
171 compatible = "qcom,msm8226-audio-tapan";
172 qcom,model = "msm8226-tapan-snd-card";
173
174 qcom,audio-routing =
175 "RX_BIAS", "MCLK",
176 "LDO_H", "MCLK",
177 "AMIC1", "MIC BIAS1 Internal1",
178 "MIC BIAS1 Internal1", "Handset Mic",
179 "AMIC2", "MIC BIAS2 External",
180 "MIC BIAS2 External", "Headset Mic",
181 "AMIC3", "MIC BIAS2 External",
182 "MIC BIAS2 External", "ANCRight Headset Mic",
183 "AMIC4", "MIC BIAS2 External",
184 "MIC BIAS2 External", "ANCLeft Headset Mic",
185 "DMIC1", "MIC BIAS1 External",
186 "MIC BIAS1 External", "Digital Mic1",
187 "DMIC2", "MIC BIAS1 External",
188 "MIC BIAS1 External", "Digital Mic2",
189 "DMIC3", "MIC BIAS3 External",
190 "MIC BIAS3 External", "Digital Mic3",
191 "DMIC4", "MIC BIAS3 External",
192 "MIC BIAS3 External", "Digital Mic4",
193 "DMIC5", "MIC BIAS4 External",
194 "MIC BIAS4 External", "Digital Mic5",
195 "DMIC6", "MIC BIAS4 External",
196 "MIC BIAS4 External", "Digital Mic6";
197 qcom,tapan-mclk-clk-freq = <9600000>;
198 };
199
200 qcom,msm-pcm {
201 compatible = "qcom,msm-pcm-dsp";
202 };
203
204 qcom,msm-pcm-routing {
205 compatible = "qcom,msm-pcm-routing";
206 };
207
208 qcom,msm-pcm-lpa {
209 compatible = "qcom,msm-pcm-lpa";
210 };
211
212 qcom,msm-compr-dsp {
213 compatible = "qcom,msm-compr-dsp";
214 };
215
216 qcom,msm-voip-dsp {
217 compatible = "qcom,msm-voip-dsp";
218 };
219
220 qcom,msm-pcm-voice {
221 compatible = "qcom,msm-pcm-voice";
222 };
223
224 qcom,msm-stub-codec {
225 compatible = "qcom,msm-stub-codec";
226 };
227
228 qcom,msm-dai-fe {
229 compatible = "qcom,msm-dai-fe";
230 };
231
232 qcom,msm-pcm-afe {
233 compatible = "qcom,msm-pcm-afe";
234 };
235
236 qcom,msm-dai-q6-hdmi {
237 compatible = "qcom,msm-dai-q6-hdmi";
238 qcom,msm-dai-q6-dev-id = <8>;
239 };
240
241 qcom,msm-dai-q6 {
242 compatible = "qcom,msm-dai-q6";
243 qcom,msm-dai-q6-sb-0-rx {
244 compatible = "qcom,msm-dai-q6-dev";
245 qcom,msm-dai-q6-dev-id = <16384>;
246 };
247
248 qcom,msm-dai-q6-sb-0-tx {
249 compatible = "qcom,msm-dai-q6-dev";
250 qcom,msm-dai-q6-dev-id = <16385>;
251 };
252
253 qcom,msm-dai-q6-sb-1-rx {
254 compatible = "qcom,msm-dai-q6-dev";
255 qcom,msm-dai-q6-dev-id = <16386>;
256 };
257
258 qcom,msm-dai-q6-sb-1-tx {
259 compatible = "qcom,msm-dai-q6-dev";
260 qcom,msm-dai-q6-dev-id = <16387>;
261 };
262
263 qcom,msm-dai-q6-sb-3-rx {
264 compatible = "qcom,msm-dai-q6-dev";
265 qcom,msm-dai-q6-dev-id = <16390>;
266 };
267
268 qcom,msm-dai-q6-sb-3-tx {
269 compatible = "qcom,msm-dai-q6-dev";
270 qcom,msm-dai-q6-dev-id = <16391>;
271 };
272
273 qcom,msm-dai-q6-sb-4-rx {
274 compatible = "qcom,msm-dai-q6-dev";
275 qcom,msm-dai-q6-dev-id = <16392>;
276 };
277
278 qcom,msm-dai-q6-sb-4-tx {
279 compatible = "qcom,msm-dai-q6-dev";
280 qcom,msm-dai-q6-dev-id = <16393>;
281 };
282
283 qcom,msm-dai-q6-bt-sco-rx {
284 compatible = "qcom,msm-dai-q6-dev";
285 qcom,msm-dai-q6-dev-id = <12288>;
286 };
287
288 qcom,msm-dai-q6-bt-sco-tx {
289 compatible = "qcom,msm-dai-q6-dev";
290 qcom,msm-dai-q6-dev-id = <12289>;
291 };
292
293 qcom,msm-dai-q6-int-fm-rx {
294 compatible = "qcom,msm-dai-q6-dev";
295 qcom,msm-dai-q6-dev-id = <12292>;
296 };
297
298 qcom,msm-dai-q6-int-fm-tx {
299 compatible = "qcom,msm-dai-q6-dev";
300 qcom,msm-dai-q6-dev-id = <12293>;
301 };
302
303 qcom,msm-dai-q6-be-afe-pcm-rx {
304 compatible = "qcom,msm-dai-q6-dev";
305 qcom,msm-dai-q6-dev-id = <224>;
306 };
307
308 qcom,msm-dai-q6-be-afe-pcm-tx {
309 compatible = "qcom,msm-dai-q6-dev";
310 qcom,msm-dai-q6-dev-id = <225>;
311 };
312
313 qcom,msm-dai-q6-afe-proxy-rx {
314 compatible = "qcom,msm-dai-q6-dev";
315 qcom,msm-dai-q6-dev-id = <241>;
316 };
317
318 qcom,msm-dai-q6-afe-proxy-tx {
319 compatible = "qcom,msm-dai-q6-dev";
320 qcom,msm-dai-q6-dev-id = <240>;
321 };
322 };
323
324 qcom,msm-pcm-hostless {
325 compatible = "qcom,msm-pcm-hostless";
326 };
327
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700328 qcom,wdt@f9017000 {
329 compatible = "qcom,msm-watchdog";
330 reg = <0xf9017000 0x1000>;
331 interrupts = <0 3 0>, <0 4 0>;
332 qcom,bark-time = <11000>;
333 qcom,pet-time = <10000>;
Mitchel Humpherys1be23802012-11-16 15:52:32 -0800334 qcom,ipi-ping;
Mitchel Humpherys5fe1c9b2012-10-09 17:30:19 -0700335 };
336
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600337 qcom,smem@fa00000 {
338 compatible = "qcom,smem";
339 reg = <0xfa00000 0x200000>,
340 <0xfa006000 0x1000>,
341 <0xfc428000 0x4000>;
342 reg-names = "smem", "irq-reg-base", "aux-mem1";
343
344 qcom,smd-modem {
345 compatible = "qcom,smd";
346 qcom,smd-edge = <0>;
347 qcom,smd-irq-offset = <0x8>;
348 qcom,smd-irq-bitmask = <0x1000>;
349 qcom,pil-string = "modem";
350 interrupts = <0 25 1>;
David Ngb715e322012-12-01 12:57:08 -0800351 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600352
353 qcom,smsm-modem {
354 compatible = "qcom,smsm";
355 qcom,smsm-edge = <0>;
356 qcom,smsm-irq-offset = <0x8>;
357 qcom,smsm-irq-bitmask = <0x2000>;
358 interrupts = <0 26 1>;
David Ngb715e322012-12-01 12:57:08 -0800359 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600360
361 qcom,smd-adsp {
362 compatible = "qcom,smd";
363 qcom,smd-edge = <1>;
364 qcom,smd-irq-offset = <0x8>;
365 qcom,smd-irq-bitmask = <0x100>;
366 qcom,pil-string = "adsp";
367 interrupts = <0 156 1>;
David Ngb715e322012-12-01 12:57:08 -0800368 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600369
370 qcom,smsm-adsp {
371 compatible = "qcom,smsm";
372 qcom,smsm-edge = <1>;
373 qcom,smsm-irq-offset = <0x8>;
374 qcom,smsm-irq-bitmask = <0x200>;
375 interrupts = <0 157 1>;
David Ngb715e322012-12-01 12:57:08 -0800376 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600377
378 qcom,smd-wcnss {
379 compatible = "qcom,smd";
380 qcom,smd-edge = <6>;
381 qcom,smd-irq-offset = <0x8>;
382 qcom,smd-irq-bitmask = <0x20000>;
383 qcom,pil-string = "wcnss";
384 interrupts = <0 142 1>;
David Ngb715e322012-12-01 12:57:08 -0800385 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600386
387 qcom,smsm-wcnss {
388 compatible = "qcom,smsm";
389 qcom,smsm-edge = <6>;
390 qcom,smsm-irq-offset = <0x8>;
391 qcom,smsm-irq-bitmask = <0x80000>;
392 interrupts = <0 144 1>;
David Ngb715e322012-12-01 12:57:08 -0800393 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600394
395 qcom,smd-rpm {
396 compatible = "qcom,smd";
397 qcom,smd-edge = <15>;
398 qcom,smd-irq-offset = <0x8>;
399 qcom,smd-irq-bitmask = <0x1>;
400 interrupts = <0 168 1>;
401 qcom,irq-no-suspend;
David Ngb715e322012-12-01 12:57:08 -0800402 };
Jeff Hugo7f9705b62012-10-12 10:38:26 -0600403 };
404
Praveen Chidambaramc8af25e2012-12-19 11:27:36 -0700405 rpm_bus: qcom,rpm-smd {
406 compatible = "qcom,rpm-smd";
407 rpm-channel-name = "rpm_requests";
408 rpm-channel-type = <15>; /* SMD_APPS_RPM */
409 rpm-standalone;
410 };
411
Asutosh Das99912e62012-12-06 12:38:46 +0530412 sdcc1: qcom,sdcc@f9824000 {
413 cell-index = <1>; /* SDC1 eMMC slot */
414 compatible = "qcom,msm-sdcc";
415
Asutosh Das6b82fc52012-11-23 12:00:26 +0530416 reg = <0xf9824000 0x800>,
417 <0xf9824800 0x100>,
418 <0xf9804000 0x7000>;
419 reg-names = "core_mem", "dml_mem", "bam_mem";
420 interrupts = <0 123 0>, <0 137 0>;
421 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530422
423 qcom,bus-width = <8>;
424 status = "disabled";
425 };
426
427 sdcc2: qcom,sdcc@f98a4000 {
428 cell-index = <2>; /* SDC2 SD card slot */
429 compatible = "qcom,msm-sdcc";
430
Asutosh Das6b82fc52012-11-23 12:00:26 +0530431 reg = <0xf98a4000 0x800>,
432 <0xf98a4800 0x100>,
433 <0xf9884000 0x7000>;
434 reg-names = "core_mem", "dml_mem", "bam_mem";
435 interrupts = <0 125 0>, <0 220 0>;
436 interrupt-names = "core_irq", "bam_irq";
Asutosh Das99912e62012-12-06 12:38:46 +0530437
438 qcom,bus-width = <4>;
439 status = "disabled";
440 };
Kenneth Heitkee5804002012-11-15 17:50:07 -0700441
442 spmi_bus: qcom,spmi@fc4c0000 {
443 cell-index = <0>;
444 compatible = "qcom,spmi-pmic-arb";
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700445 reg-names = "core", "intr", "cnfg";
Kenneth Heitkee5804002012-11-15 17:50:07 -0700446 reg = <0xfc4cf000 0x1000>,
Kenneth Heitke366b8a42012-12-18 13:51:37 -0700447 <0Xfc4cb000 0x1000>,
448 <0Xfc4ca000 0x1000>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700449 /* 190,ee0_krait_hlos_spmi_periph_irq */
450 /* 187,channel_0_krait_hlos_trans_done_irq */
451 interrupts = <0 190 0>, <0 187 0>;
452 qcom,not-wakeup;
453 qcom,pmic-arb-ee = <0>;
454 qcom,pmic-arb-channel = <0>;
Kenneth Heitkee5804002012-11-15 17:50:07 -0700455 };
456
Gilad Avidov28e18eb2012-11-21 18:13:25 -0700457 i2c@f9926000 { /* BLSP-1 QUP-4 */
458 cell-index = <0>;
459 compatible = "qcom,i2c-qup";
460 reg = <0xf9926000 0x1000>;
461 #address-cells = <1>;
462 #size-cells = <0>;
463 reg-names = "qup_phys_addr";
464 interrupts = <0 98 0>;
465 interrupt-names = "qup_err_intr";
466 qcom,i2c-bus-freq = <100000>;
467 };
Patrick Daly99a52ca2012-10-23 12:00:45 -0700468
469 qcom,acpuclk@f9011050 {
470 compatible = "qcom,acpuclk-a7";
471 reg = <0xf9011050 0x8>;
472 reg-names = "rcg_base";
David Keitel7184c6e2013-02-11 13:23:04 -0800473 a7_cpu-supply = <&pm8226_s2>;
474 a7_mem-supply = <&pm8226_l3>;
Patrick Daly99a52ca2012-10-23 12:00:45 -0700475 };
Mitchel Humpherys00beacf2012-10-11 13:53:43 -0700476
477 qcom,ocmem@fdd00000 {
478 compatible = "qcom,msm-ocmem";
479 reg = <0xfdd00000 0x2000>,
480 <0xfdd02000 0x2000>,
481 <0xfe039000 0x400>,
482 <0xfec00000 0x180000>;
483 reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical";
484 interrupts = <0 76 0 0 77 0>;
485 interrupt-names = "ocmem_irq", "dm_irq";
486 qcom,ocmem-num-regions = <0x1>;
487 qcom,ocmem-num-macros = <0x2>;
488 qcom,resource-type = <0x706d636f>;
489 #address-cells = <1>;
490 #size-cells = <1>;
491 ranges = <0x0 0xfec00000 0x180000>;
492
493 partition@0 {
494 reg = <0x0 0x100000>;
495 qcom,ocmem-part-name = "graphics";
496 qcom,ocmem-part-min = <0x80000>;
497 };
498 };
499
Patrick Dalyb83f0b02013-01-09 12:36:19 -0800500 qcom,venus@fdce0000 {
501 compatible = "qcom,pil-venus";
502 reg = <0xfdce0000 0x4000>,
503 <0xfdc80000 0x400>;
504 reg-names = "wrapper_base", "vbif_base";
505 vdd-supply = <&gdsc_venus>;
506
507 qcom,firmware-name = "venus";
508 };
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800509
510 qcom,pronto@fb21b000 {
511 compatible = "qcom,pil-pronto";
512 reg = <0xfb21b000 0x3000>,
513 <0xfc401700 0x4>,
514 <0xfd485300 0xc>;
515 reg-names = "pmu_base", "clk_base", "halt_base";
516 interrupts = <0 149 1>;
David Keitel7184c6e2013-02-11 13:23:04 -0800517 vdd_pronto_pll-supply = <&pm8226_l8>;
Patrick Daly1e3bc6c2013-01-09 12:34:25 -0800518
519 qcom,firmware-name = "wcnss";
520 };
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800521
Patrick Daly4df59842013-01-09 12:31:40 -0800522 qcom,lpass@fe200000 {
523 compatible = "qcom,pil-q6v5-lpass";
524 reg = <0xfe200000 0x00100>,
525 <0xfd485100 0x00010>;
526 reg-names = "qdsp6_base", "halt_base";
Patrick Dalyea7111c2013-02-08 17:48:20 -0800527 vdd_cx-supply = <&pm8026_s1_corner>;
Patrick Daly4df59842013-01-09 12:31:40 -0800528 interrupts = <0 162 1>;
529
530 qcom,firmware-name = "adsp";
531 };
532
Neeti Desai1f7ca2d2012-11-21 13:25:57 -0800533 qcom,msm-mem-hole {
534 compatible = "qcom,msm-mem-hole";
535 qcom,memblock-remove = <0x8100000 0x7e00000>; /* Address and Size of Hole */
536 };
Siddartha Mohanadossfcd98562013-02-13 08:53:22 -0800537
538 tsens: tsens@fc4a8000 {
539 compatible = "qcom,msm-tsens";
540 reg = <0xfc4a8000 0x2000>,
541 <0xfc4b8000 0x1000>;
542 reg-names = "tsens_physical", "tsens_eeprom_physical";
543 interrupts = <0 184 0>;
544 qcom,sensors = <7>;
545 qcom,slope = <3200 3200 3200 3200 3200 3200 3200>;
546 qcom,calib-mode = "fuse_map2";
547 };
Praveen Chidambarama03bda52013-02-12 21:23:13 -0700548
549 qcom,msm-thermal {
550 compatible = "qcom,msm-thermal";
551 qcom,sensor-id = <0>;
552 qcom,poll-ms = <250>;
553 qcom,limit-temp = <60>;
554 qcom,temp-hysteresis = <10>;
555 qcom,freq-step = <2>;
556 };
557
Gilad Avidovd59217c2013-02-01 13:45:59 -0700558 spi_0: spi@f9923000 { /* BLSP1 QUP1 */
559 compatible = "qcom,spi-qup-v2";
560 #address-cells = <1>;
561 #size-cells = <0>;
562 reg-names = "spi_physical", "spi_bam_physical";
563 reg = <0xf9923000 0x1000>,
564 <0xf9904000 0xF000>;
565 interrupt-names = "spi_irq", "spi_bam_irq";
566 interrupts = <0 95 0>, <0 238 0>;
567 spi-max-frequency = <19200000>;
568
569 gpios = <&msmgpio 3 0>, /* CLK */
570 <&msmgpio 1 0>, /* MISO */
571 <&msmgpio 0 0>; /* MOSI */
572 cs-gpios = <&msmgpio 2 0>;
573
574 qcom,infinite-mode = <0>;
575 qcom,use-bam;
576 qcom,ver-reg-exists;
577 qcom,bam-consumer-pipe-index = <12>;
578 qcom,bam-producer-pipe-index = <13>;
579 };
580
Syed Rameez Mustafa332018f2012-10-11 18:01:59 -0700581};
David Collins37ddb972012-10-17 15:00:26 -0700582
Patrick Dalye8977aa2012-11-06 15:25:58 -0800583&gdsc_venus {
584 status = "ok";
585};
586
587&gdsc_mdss {
588 status = "ok";
589};
590
591&gdsc_jpeg {
592 status = "ok";
593};
594
595&gdsc_vfe {
596 status = "ok";
597};
598
599&gdsc_oxili_cx {
600 status = "ok";
601};
602
603&gdsc_usb_hsic {
604 status = "ok";
605};
606
Kenneth Heitkebea6ca22013-02-07 17:23:21 -0700607/include/ "msm-pm8226.dtsi"
David Keitel7184c6e2013-02-11 13:23:04 -0800608/include/ "msm8226-regulator.dtsi"
Siddartha Mohanadossae99e772013-02-19 15:44:40 -0800609
610&pm8226_vadc {
611 chan@0 {
612 label = "usb_in";
613 reg = <0>;
614 qcom,decimation = <0>;
615 qcom,pre-div-channel-scaling = <4>;
616 qcom,calibration-type = "absolute";
617 qcom,scale-function = <0>;
618 qcom,hw-settle-time = <0>;
619 qcom,fast-avg-setup = <0>;
620 };
621
622 chan@2 {
623 label = "vchg_sns";
624 reg = <2>;
625 qcom,decimation = <0>;
626 qcom,pre-div-channel-scaling = <3>;
627 qcom,calibration-type = "absolute";
628 qcom,scale-function = <0>;
629 qcom,hw-settle-time = <0>;
630 qcom,fast-avg-setup = <0>;
631 };
632
633 chan@5 {
634 label = "vcoin";
635 reg = <5>;
636 qcom,decimation = <0>;
637 qcom,pre-div-channel-scaling = <1>;
638 qcom,calibration-type = "absolute";
639 qcom,scale-function = <0>;
640 qcom,hw-settle-time = <0>;
641 qcom,fast-avg-setup = <0>;
642 };
643
644 chan@6 {
645 label = "vbat_sns";
646 reg = <6>;
647 qcom,decimation = <0>;
648 qcom,pre-div-channel-scaling = <1>;
649 qcom,calibration-type = "absolute";
650 qcom,scale-function = <0>;
651 qcom,hw-settle-time = <0>;
652 qcom,fast-avg-setup = <0>;
653 };
654
655 chan@7 {
656 label = "vph_pwr";
657 reg = <7>;
658 qcom,decimation = <0>;
659 qcom,pre-div-channel-scaling = <1>;
660 qcom,calibration-type = "absolute";
661 qcom,scale-function = <0>;
662 qcom,hw-settle-time = <0>;
663 qcom,fast-avg-setup = <0>;
664 };
665
666 chan@30 {
667 label = "batt_therm";
668 reg = <0x30>;
669 qcom,decimation = <0>;
670 qcom,pre-div-channel-scaling = <0>;
671 qcom,calibration-type = "ratiometric";
672 qcom,scale-function = <1>;
673 qcom,hw-settle-time = <0>;
674 qcom,fast-avg-setup = <0>;
675 };
676
677 chan@31 {
678 label = "batt_id";
679 reg = <0x31>;
680 qcom,decimation = <0>;
681 qcom,pre-div-channel-scaling = <0>;
682 qcom,calibration-type = "ratiometric";
683 qcom,scale-function = <0>;
684 qcom,hw-settle-time = <2>;
685 qcom,fast-avg-setup = <0>;
686 };
687
688 chan@b2 {
689 label = "xo_therm_pu2";
690 reg = <0xb2>;
691 qcom,decimation = <0>;
692 qcom,pre-div-channel-scaling = <0>;
693 qcom,calibration-type = "ratiometric";
694 qcom,scale-function = <4>;
695 qcom,hw-settle-time = <0>;
696 qcom,fast-avg-setup = <0>;
697 };
698};