Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 1 | //===-- LiveIntervalUnion.cpp - Live interval union data structure --------===// |
| 2 | // |
| 3 | // The LLVM Compiler Infrastructure |
| 4 | // |
| 5 | // This file is distributed under the University of Illinois Open Source |
| 6 | // License. See LICENSE.TXT for details. |
| 7 | // |
| 8 | //===----------------------------------------------------------------------===// |
| 9 | // |
| 10 | // LiveIntervalUnion represents a coalesced set of live intervals. This may be |
| 11 | // used during coalescing to represent a congruence class, or during register |
| 12 | // allocation to model liveness of a physical register. |
| 13 | // |
| 14 | //===----------------------------------------------------------------------===// |
| 15 | |
| 16 | #define DEBUG_TYPE "regalloc" |
| 17 | #include "LiveIntervalUnion.h" |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 18 | #include "llvm/ADT/SparseBitVector.h" |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 19 | #include "llvm/Support/Debug.h" |
| 20 | #include "llvm/Support/raw_ostream.h" |
| 21 | #include <algorithm> |
| 22 | using namespace llvm; |
| 23 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 24 | // Find the first segment in the range [SegBegin,Segments.end()) that |
| 25 | // intersects with LS. If no intersection is found, return the first SI |
| 26 | // such that SI.start >= LS.End. |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 27 | // |
| 28 | // This logic is tied to the underlying LiveSegments data structure. For now, we |
| 29 | // use set::upper_bound to find the nearest starting position, |
| 30 | // then reverse iterate to find the first overlap. |
| 31 | // |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 32 | // Upon entry we have SegBegin.Start < LS.End |
| 33 | // SegBegin |--... |
| 34 | // \ . |
| 35 | // LS ...-| |
| 36 | // |
| 37 | // After set::upper_bound, we have SI.start >= LS.start: |
| 38 | // SI |--... |
| 39 | // / |
| 40 | // LS |--... |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 41 | // |
| 42 | // Assuming intervals are disjoint, if an intersection exists, it must be the |
| 43 | // segment found or the one immediately preceeding it. We continue reverse |
| 44 | // iterating to return the first overlapping segment. |
| 45 | LiveIntervalUnion::SegmentIter |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 46 | LiveIntervalUnion::upperBound(SegmentIter SegBegin, |
| 47 | const LiveSegment &LS) { |
| 48 | assert(LS.End > SegBegin->Start && "segment iterator precondition"); |
| 49 | |
| 50 | // Get the next LIU segment such that segI->Start is not less than seg.Start |
| 51 | // |
| 52 | // FIXME: Once we have a B+tree, we can make good use of SegBegin as a hint to |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 53 | // upper_bound. For now, we're forced to search again from the root each time. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 54 | SegmentIter SI = Segments.upper_bound(LS); |
| 55 | while (SI != SegBegin) { |
| 56 | --SI; |
| 57 | if (LS.Start >= SI->End) |
| 58 | return ++SI; |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 59 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 60 | return SI; |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 61 | } |
| 62 | |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 63 | // Merge a LiveInterval's segments. Guarantee no overlaps. |
Andrew Trick | e16eecc | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 64 | // |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 65 | // After implementing B+tree, segments will be coalesced. |
| 66 | void LiveIntervalUnion::unify(LiveInterval &VirtReg) { |
| 67 | |
| 68 | // Insert each of the virtual register's live segments into the map. |
| 69 | SegmentIter SegPos = Segments.begin(); |
| 70 | for (LiveInterval::iterator VirtRegI = VirtReg.begin(), |
| 71 | VirtRegEnd = VirtReg.end(); |
| 72 | VirtRegI != VirtRegEnd; ++VirtRegI ) { |
| 73 | |
| 74 | LiveSegment Seg(*VirtRegI, &VirtReg); |
| 75 | SegPos = Segments.insert(SegPos, Seg); |
| 76 | |
| 77 | assert(*SegPos == Seg && "need equal val for equal key"); |
Andrew Trick | e16eecc | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 78 | #ifndef NDEBUG |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 79 | // Check for overlap (inductively). |
| 80 | if (SegPos != Segments.begin()) { |
| 81 | assert(llvm::prior(SegPos)->End <= Seg.Start && "overlapping segments" ); |
Andrew Trick | e16eecc | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 82 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 83 | SegmentIter NextPos = llvm::next(SegPos); |
| 84 | if (NextPos != Segments.end()) |
| 85 | assert(Seg.End <= NextPos->Start && "overlapping segments" ); |
Andrew Trick | e16eecc | 2010-10-26 18:34:01 +0000 | [diff] [blame] | 86 | #endif // NDEBUG |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 87 | } |
| 88 | } |
| 89 | |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 90 | // Remove a live virtual register's segments from this union. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 91 | void LiveIntervalUnion::extract(const LiveInterval &VirtReg) { |
| 92 | |
Andrew Trick | e141a49 | 2010-11-08 18:02:08 +0000 | [diff] [blame] | 93 | // Remove each of the virtual register's live segments from the map. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 94 | SegmentIter SegPos = Segments.begin(); |
| 95 | for (LiveInterval::const_iterator VirtRegI = VirtReg.begin(), |
| 96 | VirtRegEnd = VirtReg.end(); |
| 97 | VirtRegI != VirtRegEnd; ++VirtRegI) { |
| 98 | |
| 99 | LiveSegment Seg(*VirtRegI, const_cast<LiveInterval*>(&VirtReg)); |
| 100 | SegPos = upperBound(SegPos, Seg); |
| 101 | assert(SegPos != Segments.end() && "missing VirtReg segment"); |
| 102 | |
| 103 | Segments.erase(SegPos++); |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 104 | } |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 105 | } |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 106 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 107 | raw_ostream& llvm::operator<<(raw_ostream& OS, const LiveSegment &LS) { |
| 108 | return OS << '[' << LS.Start << ',' << LS.End << ':' << |
| 109 | LS.VirtReg->reg << ")"; |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 110 | } |
| 111 | |
| 112 | void LiveSegment::dump() const { |
| 113 | dbgs() << *this << "\n"; |
| 114 | } |
| 115 | |
| 116 | void |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 117 | LiveIntervalUnion::print(raw_ostream &OS, |
| 118 | const AbstractRegisterDescription *RegDesc) const { |
| 119 | OS << "LIU "; |
| 120 | if (RegDesc != NULL) |
| 121 | OS << RegDesc->getName(RepReg); |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 122 | else { |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 123 | OS << RepReg; |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 124 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 125 | for (LiveSegments::const_iterator SI = Segments.begin(), |
| 126 | SegEnd = Segments.end(); SI != SegEnd; ++SI) { |
| 127 | dbgs() << " " << *SI; |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 128 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 129 | OS << "\n"; |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 130 | } |
| 131 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 132 | void LiveIntervalUnion::dump(const AbstractRegisterDescription *RegDesc) const { |
| 133 | print(dbgs(), RegDesc); |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 134 | } |
| 135 | |
| 136 | #ifndef NDEBUG |
| 137 | // Verify the live intervals in this union and add them to the visited set. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 138 | void LiveIntervalUnion::verify(LiveVirtRegBitSet& VisitedVRegs) { |
| 139 | SegmentIter SI = Segments.begin(); |
| 140 | SegmentIter SegEnd = Segments.end(); |
| 141 | if (SI == SegEnd) return; |
| 142 | VisitedVRegs.set(SI->VirtReg->reg); |
| 143 | for (++SI; SI != SegEnd; ++SI) { |
| 144 | VisitedVRegs.set(SI->VirtReg->reg); |
| 145 | assert(llvm::prior(SI)->End <= SI->Start && "overlapping segments" ); |
Andrew Trick | 071d1c0 | 2010-11-09 21:04:34 +0000 | [diff] [blame] | 146 | } |
| 147 | } |
| 148 | #endif //!NDEBUG |
| 149 | |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 150 | // Private interface accessed by Query. |
| 151 | // |
| 152 | // Find a pair of segments that intersect, one in the live virtual register |
| 153 | // (LiveInterval), and the other in this LiveIntervalUnion. The caller (Query) |
| 154 | // is responsible for advancing the LiveIntervalUnion segments to find a |
| 155 | // "notable" intersection, which requires query-specific logic. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 156 | // |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 157 | // This design assumes only a fast mechanism for intersecting a single live |
| 158 | // virtual register segment with a set of LiveIntervalUnion segments. This may |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 159 | // be ok since most VIRTREGs have very few segments. If we had a data |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 160 | // structure that optimizd MxN intersection of segments, then we would bypass |
| 161 | // the loop that advances within the LiveInterval. |
| 162 | // |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 163 | // If no intersection exists, set VirtRegI = VirtRegEnd, and set SI to the first |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 164 | // segment whose start point is greater than LiveInterval's end point. |
| 165 | // |
| 166 | // Assumes that segments are sorted by start position in both |
| 167 | // LiveInterval and LiveSegments. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 168 | void LiveIntervalUnion::Query::findIntersection(InterferenceResult &IR) const { |
| 169 | |
| 170 | // Search until reaching the end of the LiveUnion segments. |
| 171 | LiveInterval::iterator VirtRegEnd = VirtReg->end(); |
| 172 | SegmentIter LiveUnionEnd = LiveUnion->end(); |
| 173 | while (IR.LiveUnionI != LiveUnionEnd) { |
| 174 | |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 175 | // Slowly advance the live virtual reg iterator until we surpass the next |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 176 | // segment in LiveUnion. |
| 177 | // |
| 178 | // Note: If this is ever used for coalescing of fixed registers and we have |
| 179 | // a live vreg with thousands of segments, then change this code to use |
| 180 | // upperBound instead. |
| 181 | while (IR.VirtRegI != VirtRegEnd && |
| 182 | IR.VirtRegI->end <= IR.LiveUnionI->Start) |
| 183 | ++IR.VirtRegI; |
| 184 | if (IR.VirtRegI == VirtRegEnd) |
| 185 | break; // Retain current (nonoverlapping) LiveUnionI |
| 186 | |
| 187 | // VirtRegI may have advanced far beyond LiveUnionI, |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 188 | // do a fast intersection test to "catch up" |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 189 | LiveSegment Seg(*IR.VirtRegI, VirtReg); |
| 190 | IR.LiveUnionI = LiveUnion->upperBound(IR.LiveUnionI, Seg); |
| 191 | |
| 192 | // Check if no LiveUnionI exists with VirtRegI->Start < LiveUnionI.end |
| 193 | if (IR.LiveUnionI == LiveUnionEnd) |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 194 | break; |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 195 | if (IR.LiveUnionI->Start < IR.VirtRegI->end) { |
| 196 | assert(overlap(*IR.VirtRegI, *IR.LiveUnionI) && |
| 197 | "upperBound postcondition"); |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 198 | break; |
| 199 | } |
| 200 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 201 | if (IR.LiveUnionI == LiveUnionEnd) |
| 202 | IR.VirtRegI = VirtRegEnd; |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 203 | } |
| 204 | |
| 205 | // Find the first intersection, and cache interference info |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 206 | // (retain segment iterators into both VirtReg and LiveUnion). |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 207 | LiveIntervalUnion::InterferenceResult |
| 208 | LiveIntervalUnion::Query::firstInterference() { |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 209 | if (FirstInterference != LiveIntervalUnion::InterferenceResult()) { |
| 210 | return FirstInterference; |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 211 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 212 | FirstInterference = InterferenceResult(VirtReg->begin(), LiveUnion->begin()); |
| 213 | findIntersection(FirstInterference); |
| 214 | return FirstInterference; |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 215 | } |
| 216 | |
| 217 | // Treat the result as an iterator and advance to the next interfering pair |
| 218 | // of segments. This is a plain iterator with no filter. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 219 | bool LiveIntervalUnion::Query::nextInterference(InterferenceResult &IR) const { |
| 220 | assert(isInterference(IR) && "iteration past end of interferences"); |
| 221 | |
| 222 | // Advance either the VirtReg or LiveUnion segment to ensure that we visit all |
| 223 | // unique overlapping pairs. |
| 224 | if (IR.VirtRegI->end < IR.LiveUnionI->End) { |
| 225 | if (++IR.VirtRegI == VirtReg->end()) |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 226 | return false; |
| 227 | } |
| 228 | else { |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 229 | if (++IR.LiveUnionI == LiveUnion->end()) { |
| 230 | IR.VirtRegI = VirtReg->end(); |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 231 | return false; |
| 232 | } |
| 233 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 234 | // Short-circuit findIntersection() if possible. |
| 235 | if (overlap(*IR.VirtRegI, *IR.LiveUnionI)) |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 236 | return true; |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 237 | |
| 238 | // Find the next intersection. |
| 239 | findIntersection(IR); |
| 240 | return isInterference(IR); |
Andrew Trick | 14e8d71 | 2010-10-22 23:09:15 +0000 | [diff] [blame] | 241 | } |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 242 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 243 | // Scan the vector of interfering virtual registers in this union. Assume it's |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 244 | // quite small. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 245 | bool LiveIntervalUnion::Query::isSeenInterference(LiveInterval *VirtReg) const { |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 246 | SmallVectorImpl<LiveInterval*>::const_iterator I = |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 247 | std::find(InterferingVRegs.begin(), InterferingVRegs.end(), VirtReg); |
| 248 | return I != InterferingVRegs.end(); |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 249 | } |
| 250 | |
| 251 | // Count the number of virtual registers in this union that interfere with this |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 252 | // query's live virtual register. |
| 253 | // |
| 254 | // The number of times that we either advance IR.VirtRegI or call |
| 255 | // LiveUnion.upperBound() will be no more than the number of holes in |
| 256 | // VirtReg. So each invocation of collectInterferingVRegs() takes |
| 257 | // time proportional to |VirtReg Holes| * time(LiveUnion.upperBound()). |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 258 | // |
| 259 | // For comments on how to speed it up, see Query::findIntersection(). |
| 260 | unsigned LiveIntervalUnion::Query:: |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 261 | collectInterferingVRegs(unsigned MaxInterferingRegs) { |
| 262 | InterferenceResult IR = firstInterference(); |
| 263 | LiveInterval::iterator VirtRegEnd = VirtReg->end(); |
| 264 | SegmentIter LiveUnionEnd = LiveUnion->end(); |
| 265 | LiveInterval *RecentInterferingVReg = NULL; |
| 266 | while (IR.LiveUnionI != LiveUnionEnd) { |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 267 | // Advance the union's iterator to reach an unseen interfering vreg. |
| 268 | do { |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 269 | if (IR.LiveUnionI->VirtReg == RecentInterferingVReg) |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 270 | continue; |
| 271 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 272 | if (!isSeenInterference(IR.LiveUnionI->VirtReg)) |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 273 | break; |
| 274 | |
| 275 | // Cache the most recent interfering vreg to bypass isSeenInterference. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 276 | RecentInterferingVReg = IR.LiveUnionI->VirtReg; |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 277 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 278 | } while( ++IR.LiveUnionI != LiveUnionEnd); |
| 279 | if (IR.LiveUnionI == LiveUnionEnd) |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 280 | break; |
| 281 | |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 282 | // Advance the VirtReg iterator until surpassing the next segment in |
| 283 | // LiveUnion. |
| 284 | // |
| 285 | // Note: If this is ever used for coalescing of fixed registers and we have |
| 286 | // a live virtual register with thousands of segments, then use upperBound |
| 287 | // instead. |
| 288 | while (IR.VirtRegI != VirtRegEnd && |
| 289 | IR.VirtRegI->end <= IR.LiveUnionI->Start) |
| 290 | ++IR.VirtRegI; |
| 291 | if (IR.VirtRegI == VirtRegEnd) |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 292 | break; |
| 293 | |
| 294 | // Check for intersection with the union's segment. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 295 | if (overlap(*IR.VirtRegI, *IR.LiveUnionI)) { |
| 296 | |
| 297 | if (!IR.LiveUnionI->VirtReg->isSpillable()) |
| 298 | SeenUnspillableVReg = true; |
| 299 | |
| 300 | InterferingVRegs.push_back(IR.LiveUnionI->VirtReg); |
| 301 | if (InterferingVRegs.size() == MaxInterferingRegs) |
| 302 | return MaxInterferingRegs; |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 303 | |
| 304 | // Cache the most recent interfering vreg to bypass isSeenInterference. |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 305 | RecentInterferingVReg = IR.LiveUnionI->VirtReg; |
| 306 | ++IR.LiveUnionI; |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 307 | continue; |
| 308 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 309 | // VirtRegI may have advanced far beyond LiveUnionI, |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 310 | // do a fast intersection test to "catch up" |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 311 | LiveSegment Seg(*IR.VirtRegI, VirtReg); |
| 312 | IR.LiveUnionI = LiveUnion->upperBound(IR.LiveUnionI, Seg); |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 313 | } |
Andrew Trick | 18c57a8 | 2010-11-30 23:18:47 +0000 | [diff] [blame] | 314 | SeenAllInterferences = true; |
| 315 | return InterferingVRegs.size(); |
Andrew Trick | f4baeaf | 2010-11-10 19:18:47 +0000 | [diff] [blame] | 316 | } |