| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 1 | //===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===// | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 2 | // | 
| John Criswell | b576c94 | 2003-10-20 19:43:21 +0000 | [diff] [blame] | 3 | //                     The LLVM Compiler Infrastructure | 
 | 4 | // | 
 | 5 | // This file was developed by the LLVM research group and is distributed under | 
 | 6 | // the University of Illinois Open Source License. See LICENSE.TXT for details. | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 7 | // | 
| John Criswell | b576c94 | 2003-10-20 19:43:21 +0000 | [diff] [blame] | 8 | //===----------------------------------------------------------------------===// | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 9 | // | 
 | 10 | // This register allocator allocates registers to a basic block at a time, | 
 | 11 | // attempting to keep values in registers and reusing registers as appropriate. | 
 | 12 | // | 
 | 13 | //===----------------------------------------------------------------------===// | 
 | 14 |  | 
| Chris Lattner | 4cc662b | 2003-08-03 21:47:31 +0000 | [diff] [blame] | 15 | #define DEBUG_TYPE "regalloc" | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 16 | #include "llvm/CodeGen/Passes.h" | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 17 | #include "llvm/CodeGen/MachineFunctionPass.h" | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 18 | #include "llvm/CodeGen/MachineInstr.h" | 
| Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 19 | #include "llvm/CodeGen/SSARegMap.h" | 
| Chris Lattner | eb24db9 | 2002-12-28 21:08:26 +0000 | [diff] [blame] | 20 | #include "llvm/CodeGen/MachineFrameInfo.h" | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 21 | #include "llvm/CodeGen/LiveVariables.h" | 
| Chris Lattner | 3501fea | 2003-01-14 22:00:31 +0000 | [diff] [blame] | 22 | #include "llvm/Target/TargetInstrInfo.h" | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 23 | #include "llvm/Target/TargetMachine.h" | 
| Reid Spencer | 551ccae | 2004-09-01 22:55:40 +0000 | [diff] [blame] | 24 | #include "llvm/Support/CommandLine.h" | 
 | 25 | #include "llvm/Support/Debug.h" | 
 | 26 | #include "llvm/ADT/DenseMap.h" | 
 | 27 | #include "llvm/ADT/Statistic.h" | 
| Chris Lattner | 27f2916 | 2004-10-26 15:35:58 +0000 | [diff] [blame] | 28 | #include <algorithm> | 
| Chris Lattner | ef09c63 | 2004-01-31 21:27:19 +0000 | [diff] [blame] | 29 | using namespace llvm; | 
| Brian Gaeke | d0fde30 | 2003-11-11 22:41:34 +0000 | [diff] [blame] | 30 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 31 | namespace { | 
| Alkis Evlogimenos | 2acef2d | 2004-02-19 06:19:09 +0000 | [diff] [blame] | 32 |   Statistic<> NumStores("ra-local", "Number of stores added"); | 
 | 33 |   Statistic<> NumLoads ("ra-local", "Number of loads added"); | 
| Alkis Evlogimenos | d6f6d1a | 2004-02-21 18:07:33 +0000 | [diff] [blame] | 34 |   Statistic<> NumFolded("ra-local", "Number of loads/stores folded into " | 
 | 35 |                         "instructions"); | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 36 |   class RA : public MachineFunctionPass { | 
 | 37 |     const TargetMachine *TM; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 38 |     MachineFunction *MF; | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 39 |     const MRegisterInfo *RegInfo; | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 40 |     LiveVariables *LV; | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 41 |     bool *PhysRegsEverUsed; | 
| Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 42 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 43 |     // StackSlotForVirtReg - Maps virtual regs to the frame index where these | 
 | 44 |     // values are spilled. | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 45 |     std::map<unsigned, int> StackSlotForVirtReg; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 46 |  | 
 | 47 |     // Virt2PhysRegMap - This map contains entries for each virtual register | 
| Alkis Evlogimenos | 4d0d864 | 2004-02-25 21:55:45 +0000 | [diff] [blame] | 48 |     // that is currently available in a physical register. | 
 | 49 |     DenseMap<unsigned, VirtReg2IndexFunctor> Virt2PhysRegMap; | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 50 |  | 
 | 51 |     unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) { | 
| Alkis Evlogimenos | 4d0d864 | 2004-02-25 21:55:45 +0000 | [diff] [blame] | 52 |       return Virt2PhysRegMap[VirtReg]; | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 53 |     } | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 54 |  | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 55 |     // PhysRegsUsed - This array is effectively a map, containing entries for | 
 | 56 |     // each physical register that currently has a value (ie, it is in | 
 | 57 |     // Virt2PhysRegMap).  The value mapped to is the virtual register | 
 | 58 |     // corresponding to the physical register (the inverse of the | 
 | 59 |     // Virt2PhysRegMap), or 0.  The value is set to 0 if this register is pinned | 
 | 60 |     // because it is used by a future instruction.  If the entry for a physical | 
 | 61 |     // register is -1, then the physical register is "not in the map". | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 62 |     // | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 63 |     std::vector<int> PhysRegsUsed; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 64 |  | 
 | 65 |     // PhysRegsUseOrder - This contains a list of the physical registers that | 
 | 66 |     // currently have a virtual register value in them.  This list provides an | 
 | 67 |     // ordering of registers, imposing a reallocation order.  This list is only | 
 | 68 |     // used if all registers are allocated and we have to spill one, in which | 
 | 69 |     // case we spill the least recently used register.  Entries at the front of | 
 | 70 |     // the list are the least recently used registers, entries at the back are | 
 | 71 |     // the most recently used. | 
 | 72 |     // | 
 | 73 |     std::vector<unsigned> PhysRegsUseOrder; | 
 | 74 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 75 |     // VirtRegModified - This bitset contains information about which virtual | 
 | 76 |     // registers need to be spilled back to memory when their registers are | 
 | 77 |     // scavenged.  If a virtual register has simply been rematerialized, there | 
 | 78 |     // is no reason to spill it to memory when we need the register back. | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 79 |     // | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 80 |     std::vector<bool> VirtRegModified; | 
 | 81 |  | 
 | 82 |     void markVirtRegModified(unsigned Reg, bool Val = true) { | 
| Chris Lattner | ef09c63 | 2004-01-31 21:27:19 +0000 | [diff] [blame] | 83 |       assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!"); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 84 |       Reg -= MRegisterInfo::FirstVirtualRegister; | 
 | 85 |       if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1); | 
 | 86 |       VirtRegModified[Reg] = Val; | 
 | 87 |     } | 
 | 88 |  | 
 | 89 |     bool isVirtRegModified(unsigned Reg) const { | 
| Chris Lattner | ef09c63 | 2004-01-31 21:27:19 +0000 | [diff] [blame] | 90 |       assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!"); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 91 |       assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size() | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 92 |              && "Illegal virtual register!"); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 93 |       return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister]; | 
 | 94 |     } | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 95 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 96 |     void MarkPhysRegRecentlyUsed(unsigned Reg) { | 
| Chris Lattner | aebcce8 | 2004-06-16 06:57:29 +0000 | [diff] [blame] | 97 |       if(PhysRegsUseOrder.empty() || | 
 | 98 |          PhysRegsUseOrder.back() == Reg) return;  // Already most recently used | 
| Chris Lattner | 0eb172c | 2002-12-24 00:04:55 +0000 | [diff] [blame] | 99 |  | 
 | 100 |       for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i) | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 101 |         if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) { | 
 | 102 |           unsigned RegMatch = PhysRegsUseOrder[i-1];       // remove from middle | 
 | 103 |           PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1); | 
 | 104 |           // Add it to the end of the list | 
 | 105 |           PhysRegsUseOrder.push_back(RegMatch); | 
 | 106 |           if (RegMatch == Reg) | 
 | 107 |             return;    // Found an exact match, exit early | 
 | 108 |         } | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 109 |     } | 
 | 110 |  | 
 | 111 |   public: | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 112 |     virtual const char *getPassName() const { | 
 | 113 |       return "Local Register Allocator"; | 
 | 114 |     } | 
 | 115 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 116 |     virtual void getAnalysisUsage(AnalysisUsage &AU) const { | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 117 |       AU.addRequired<LiveVariables>(); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 118 |       AU.addRequiredID(PHIEliminationID); | 
| Alkis Evlogimenos | 4c08086 | 2003-12-18 22:40:24 +0000 | [diff] [blame] | 119 |       AU.addRequiredID(TwoAddressInstructionPassID); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 120 |       MachineFunctionPass::getAnalysisUsage(AU); | 
 | 121 |     } | 
 | 122 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 123 |   private: | 
 | 124 |     /// runOnMachineFunction - Register allocate the whole function | 
 | 125 |     bool runOnMachineFunction(MachineFunction &Fn); | 
 | 126 |  | 
 | 127 |     /// AllocateBasicBlock - Register allocate the specified basic block. | 
 | 128 |     void AllocateBasicBlock(MachineBasicBlock &MBB); | 
 | 129 |  | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 130 |  | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 131 |     /// areRegsEqual - This method returns true if the specified registers are | 
 | 132 |     /// related to each other.  To do this, it checks to see if they are equal | 
 | 133 |     /// or if the first register is in the alias set of the second register. | 
 | 134 |     /// | 
 | 135 |     bool areRegsEqual(unsigned R1, unsigned R2) const { | 
 | 136 |       if (R1 == R2) return true; | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 137 |       for (const unsigned *AliasSet = RegInfo->getAliasSet(R2); | 
 | 138 |            *AliasSet; ++AliasSet) { | 
 | 139 |         if (*AliasSet == R1) return true; | 
 | 140 |       } | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 141 |       return false; | 
 | 142 |     } | 
 | 143 |  | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 144 |     /// getStackSpaceFor - This returns the frame index of the specified virtual | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 145 |     /// register on the stack, allocating space if necessary. | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 146 |     int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 147 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 148 |     /// removePhysReg - This method marks the specified physical register as no | 
 | 149 |     /// longer being in use. | 
 | 150 |     /// | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 151 |     void removePhysReg(unsigned PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 152 |  | 
 | 153 |     /// spillVirtReg - This method spills the value specified by PhysReg into | 
 | 154 |     /// the virtual register slot specified by VirtReg.  It then updates the RA | 
 | 155 |     /// data structures to indicate the fact that PhysReg is now available. | 
 | 156 |     /// | 
| Chris Lattner | 688c825 | 2004-02-22 19:08:15 +0000 | [diff] [blame] | 157 |     void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 158 |                       unsigned VirtReg, unsigned PhysReg); | 
 | 159 |  | 
| Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 160 |     /// spillPhysReg - This method spills the specified physical register into | 
| Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 161 |     /// the virtual register slot associated with it.  If OnlyVirtRegs is set to | 
 | 162 |     /// true, then the request is ignored if the physical register does not | 
 | 163 |     /// contain a virtual register. | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 164 |     /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 165 |     void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, | 
| Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 166 |                       unsigned PhysReg, bool OnlyVirtRegs = false); | 
| Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 167 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 168 |     /// assignVirtToPhysReg - This method updates local state so that we know | 
 | 169 |     /// that PhysReg is the proper container for VirtReg now.  The physical | 
 | 170 |     /// register must not be used for anything else when this is called. | 
 | 171 |     /// | 
 | 172 |     void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg); | 
 | 173 |  | 
 | 174 |     /// liberatePhysReg - Make sure the specified physical register is available | 
 | 175 |     /// for use.  If there is currently a value in it, it is either moved out of | 
 | 176 |     /// the way or spilled to memory. | 
 | 177 |     /// | 
 | 178 |     void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 179 |                          unsigned PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 180 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 181 |     /// isPhysRegAvailable - Return true if the specified physical register is | 
 | 182 |     /// free and available for use.  This also includes checking to see if | 
 | 183 |     /// aliased registers are all free... | 
 | 184 |     /// | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 185 |     bool isPhysRegAvailable(unsigned PhysReg) const; | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 186 |  | 
 | 187 |     /// getFreeReg - Look to see if there is a free register available in the | 
 | 188 |     /// specified register class.  If not, return 0. | 
 | 189 |     /// | 
 | 190 |     unsigned getFreeReg(const TargetRegisterClass *RC); | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 191 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 192 |     /// getReg - Find a physical register to hold the specified virtual | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 193 |     /// register.  If all compatible physical registers are used, this method | 
 | 194 |     /// spills the last used virtual register to the stack, and uses that | 
 | 195 |     /// register. | 
 | 196 |     /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 197 |     unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI, | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 198 |                     unsigned VirtReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 199 |  | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 200 |     /// reloadVirtReg - This method transforms the specified specified virtual | 
 | 201 |     /// register use to refer to a physical register.  This method may do this | 
 | 202 |     /// in one of several ways: if the register is available in a physical | 
 | 203 |     /// register already, it uses that physical register.  If the value is not | 
 | 204 |     /// in a physical register, and if there are physical registers available, | 
 | 205 |     /// it loads it into a register.  If register pressure is high, and it is | 
 | 206 |     /// possible, it tries to fold the load of the virtual register into the | 
 | 207 |     /// instruction itself.  It avoids doing this if register pressure is low to | 
 | 208 |     /// improve the chance that subsequent instructions can use the reloaded | 
 | 209 |     /// value.  This method returns the modified instruction. | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 210 |     /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 211 |     MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, | 
 | 212 |                                 unsigned OpNum); | 
| Misha Brukman | edf128a | 2005-04-21 22:36:52 +0000 | [diff] [blame] | 213 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 214 |  | 
 | 215 |     void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, | 
 | 216 |                        unsigned PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 217 |   }; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 218 | } | 
 | 219 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 220 | /// getStackSpaceFor - This allocates space for the specified virtual register | 
 | 221 | /// to be held on the stack. | 
 | 222 | int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) { | 
 | 223 |   // Find the location Reg would belong... | 
 | 224 |   std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 225 |  | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 226 |   if (I != StackSlotForVirtReg.end() && I->first == VirtReg) | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 227 |     return I->second;          // Already has space allocated? | 
 | 228 |  | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 229 |   // Allocate a new stack object for this spill location... | 
| Chris Lattner | 26eb14b | 2004-08-15 22:02:22 +0000 | [diff] [blame] | 230 |   int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), | 
 | 231 |                                                        RC->getAlignment()); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 232 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 233 |   // Assign the slot... | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 234 |   StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); | 
 | 235 |   return FrameIdx; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 236 | } | 
 | 237 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 238 |  | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 239 | /// removePhysReg - This method marks the specified physical register as no | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 240 | /// longer being in use. | 
 | 241 | /// | 
 | 242 | void RA::removePhysReg(unsigned PhysReg) { | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 243 |   PhysRegsUsed[PhysReg] = -1;      // PhyReg no longer used | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 244 |  | 
 | 245 |   std::vector<unsigned>::iterator It = | 
 | 246 |     std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg); | 
| Alkis Evlogimenos | 19b6486 | 2004-01-13 06:24:30 +0000 | [diff] [blame] | 247 |   if (It != PhysRegsUseOrder.end()) | 
 | 248 |     PhysRegsUseOrder.erase(It); | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 249 | } | 
 | 250 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 251 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 252 | /// spillVirtReg - This method spills the value specified by PhysReg into the | 
 | 253 | /// virtual register slot specified by VirtReg.  It then updates the RA data | 
 | 254 | /// structures to indicate the fact that PhysReg is now available. | 
 | 255 | /// | 
| Chris Lattner | 688c825 | 2004-02-22 19:08:15 +0000 | [diff] [blame] | 256 | void RA::spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 257 |                       unsigned VirtReg, unsigned PhysReg) { | 
| Chris Lattner | 8c81945 | 2003-08-05 04:13:58 +0000 | [diff] [blame] | 258 |   assert(VirtReg && "Spilling a physical register is illegal!" | 
| Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 259 |          " Must not have appropriate kill for the register or use exists beyond" | 
 | 260 |          " the intended one."); | 
 | 261 |   DEBUG(std::cerr << "  Spilling register " << RegInfo->getName(PhysReg); | 
 | 262 |         std::cerr << " containing %reg" << VirtReg; | 
 | 263 |         if (!isVirtRegModified(VirtReg)) | 
 | 264 |         std::cerr << " which has not been modified, so no store necessary!"); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 265 |  | 
| Chris Lattner | d9ac6a7 | 2003-08-05 00:49:09 +0000 | [diff] [blame] | 266 |   // Otherwise, there is a virtual register corresponding to this physical | 
 | 267 |   // register.  We only need to spill it into its stack slot if it has been | 
 | 268 |   // modified. | 
 | 269 |   if (isVirtRegModified(VirtReg)) { | 
 | 270 |     const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); | 
 | 271 |     int FrameIndex = getStackSpaceFor(VirtReg, RC); | 
 | 272 |     DEBUG(std::cerr << " to stack slot #" << FrameIndex); | 
| Chris Lattner | 57f1b67 | 2004-08-15 21:56:44 +0000 | [diff] [blame] | 273 |     RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex); | 
| Alkis Evlogimenos | 2acef2d | 2004-02-19 06:19:09 +0000 | [diff] [blame] | 274 |     ++NumStores;   // Update statistics | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 275 |   } | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 276 |  | 
 | 277 |   getVirt2PhysRegMapSlot(VirtReg) = 0;   // VirtReg no longer available | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 278 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 279 |   DEBUG(std::cerr << "\n"); | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 280 |   removePhysReg(PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 281 | } | 
 | 282 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 283 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 284 | /// spillPhysReg - This method spills the specified physical register into the | 
| Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 285 | /// virtual register slot associated with it.  If OnlyVirtRegs is set to true, | 
 | 286 | /// then the request is ignored if the physical register does not contain a | 
 | 287 | /// virtual register. | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 288 | /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 289 | void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I, | 
| Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 290 |                       unsigned PhysReg, bool OnlyVirtRegs) { | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 291 |   if (PhysRegsUsed[PhysReg] != -1) {            // Only spill it if it's used! | 
 | 292 |     if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs) | 
 | 293 |       spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg); | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 294 |   } else { | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 295 |     // If the selected register aliases any other registers, we must make | 
 | 296 |     // sure that one of the aliases isn't alive... | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 297 |     for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 298 |          *AliasSet; ++AliasSet) | 
 | 299 |       if (PhysRegsUsed[*AliasSet] != -1)     // Spill aliased register... | 
 | 300 |         if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs) | 
 | 301 |           spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 302 |   } | 
 | 303 | } | 
 | 304 |  | 
 | 305 |  | 
 | 306 | /// assignVirtToPhysReg - This method updates local state so that we know | 
 | 307 | /// that PhysReg is the proper container for VirtReg now.  The physical | 
 | 308 | /// register must not be used for anything else when this is called. | 
 | 309 | /// | 
 | 310 | void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 311 |   assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!"); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 312 |   // Update information to note the fact that this register was just used, and | 
 | 313 |   // it holds VirtReg. | 
 | 314 |   PhysRegsUsed[PhysReg] = VirtReg; | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 315 |   getVirt2PhysRegMapSlot(VirtReg) = PhysReg; | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 316 |   PhysRegsUseOrder.push_back(PhysReg);   // New use of PhysReg | 
 | 317 | } | 
 | 318 |  | 
 | 319 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 320 | /// isPhysRegAvailable - Return true if the specified physical register is free | 
 | 321 | /// and available for use.  This also includes checking to see if aliased | 
 | 322 | /// registers are all free... | 
 | 323 | /// | 
 | 324 | bool RA::isPhysRegAvailable(unsigned PhysReg) const { | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 325 |   if (PhysRegsUsed[PhysReg] != -1) return false; | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 326 |  | 
 | 327 |   // If the selected register aliases any other allocated registers, it is | 
 | 328 |   // not free! | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 329 |   for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg); | 
 | 330 |        *AliasSet; ++AliasSet) | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 331 |     if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use? | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 332 |       return false;                    // Can't use this reg then. | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 333 |   return true; | 
 | 334 | } | 
 | 335 |  | 
 | 336 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 337 | /// getFreeReg - Look to see if there is a free register available in the | 
 | 338 | /// specified register class.  If not, return 0. | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 339 | /// | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 340 | unsigned RA::getFreeReg(const TargetRegisterClass *RC) { | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 341 |   // Get iterators defining the range of registers that are valid to allocate in | 
 | 342 |   // this class, which also specifies the preferred allocation order. | 
 | 343 |   TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF); | 
 | 344 |   TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF); | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 345 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 346 |   for (; RI != RE; ++RI) | 
 | 347 |     if (isPhysRegAvailable(*RI)) {       // Is reg unused? | 
 | 348 |       assert(*RI != 0 && "Cannot use register!"); | 
 | 349 |       return *RI; // Found an unused register! | 
 | 350 |     } | 
 | 351 |   return 0; | 
 | 352 | } | 
 | 353 |  | 
 | 354 |  | 
 | 355 | /// liberatePhysReg - Make sure the specified physical register is available for | 
 | 356 | /// use.  If there is currently a value in it, it is either moved out of the way | 
 | 357 | /// or spilled to memory. | 
 | 358 | /// | 
 | 359 | void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 360 |                          unsigned PhysReg) { | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 361 |   spillPhysReg(MBB, I, PhysReg); | 
 | 362 | } | 
 | 363 |  | 
 | 364 |  | 
 | 365 | /// getReg - Find a physical register to hold the specified virtual | 
 | 366 | /// register.  If all compatible physical registers are used, this method spills | 
 | 367 | /// the last used virtual register to the stack, and uses that register. | 
 | 368 | /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 369 | unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I, | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 370 |                     unsigned VirtReg) { | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 371 |   const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); | 
 | 372 |  | 
 | 373 |   // First check to see if we have a free register of the requested type... | 
 | 374 |   unsigned PhysReg = getFreeReg(RC); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 375 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 376 |   // If we didn't find an unused register, scavenge one now! | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 377 |   if (PhysReg == 0) { | 
| Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 378 |     assert(!PhysRegsUseOrder.empty() && "No allocated registers??"); | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 379 |  | 
 | 380 |     // Loop over all of the preallocated registers from the least recently used | 
 | 381 |     // to the most recently used.  When we find one that is capable of holding | 
 | 382 |     // our register, use it. | 
 | 383 |     for (unsigned i = 0; PhysReg == 0; ++i) { | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 384 |       assert(i != PhysRegsUseOrder.size() && | 
 | 385 |              "Couldn't find a register of the appropriate class!"); | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 386 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 387 |       unsigned R = PhysRegsUseOrder[i]; | 
| Chris Lattner | 41822c7 | 2003-08-23 23:49:42 +0000 | [diff] [blame] | 388 |  | 
 | 389 |       // We can only use this register if it holds a virtual register (ie, it | 
 | 390 |       // can be spilled).  Do not use it if it is an explicitly allocated | 
 | 391 |       // physical register! | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 392 |       assert(PhysRegsUsed[R] != -1 && | 
| Chris Lattner | 41822c7 | 2003-08-23 23:49:42 +0000 | [diff] [blame] | 393 |              "PhysReg in PhysRegsUseOrder, but is not allocated?"); | 
 | 394 |       if (PhysRegsUsed[R]) { | 
 | 395 |         // If the current register is compatible, use it. | 
| Chris Lattner | 3bba026 | 2004-08-15 22:23:09 +0000 | [diff] [blame] | 396 |         if (RC->contains(R)) { | 
| Chris Lattner | 41822c7 | 2003-08-23 23:49:42 +0000 | [diff] [blame] | 397 |           PhysReg = R; | 
 | 398 |           break; | 
 | 399 |         } else { | 
 | 400 |           // If one of the registers aliased to the current register is | 
 | 401 |           // compatible, use it. | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 402 |           for (const unsigned *AliasSet = RegInfo->getAliasSet(R); | 
 | 403 |                *AliasSet; ++AliasSet) { | 
| Chris Lattner | 3bba026 | 2004-08-15 22:23:09 +0000 | [diff] [blame] | 404 |             if (RC->contains(*AliasSet)) { | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 405 |               PhysReg = *AliasSet;    // Take an aliased register | 
 | 406 |               break; | 
 | 407 |             } | 
 | 408 |           } | 
| Chris Lattner | 41822c7 | 2003-08-23 23:49:42 +0000 | [diff] [blame] | 409 |         } | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 410 |       } | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 411 |     } | 
 | 412 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 413 |     assert(PhysReg && "Physical register not assigned!?!?"); | 
 | 414 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 415 |     // At this point PhysRegsUseOrder[i] is the least recently used register of | 
 | 416 |     // compatible register class.  Spill it to memory and reap its remains. | 
| Chris Lattner | c21be92 | 2002-12-16 17:44:42 +0000 | [diff] [blame] | 417 |     spillPhysReg(MBB, I, PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 418 |   } | 
 | 419 |  | 
 | 420 |   // Now that we know which register we need to assign this to, do it now! | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 421 |   assignVirtToPhysReg(VirtReg, PhysReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 422 |   return PhysReg; | 
 | 423 | } | 
 | 424 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 425 |  | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 426 | /// reloadVirtReg - This method transforms the specified specified virtual | 
 | 427 | /// register use to refer to a physical register.  This method may do this in | 
 | 428 | /// one of several ways: if the register is available in a physical register | 
 | 429 | /// already, it uses that physical register.  If the value is not in a physical | 
 | 430 | /// register, and if there are physical registers available, it loads it into a | 
 | 431 | /// register.  If register pressure is high, and it is possible, it tries to | 
 | 432 | /// fold the load of the virtual register into the instruction itself.  It | 
 | 433 | /// avoids doing this if register pressure is low to improve the chance that | 
 | 434 | /// subsequent instructions can use the reloaded value.  This method returns the | 
 | 435 | /// modified instruction. | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 436 | /// | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 437 | MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, | 
 | 438 |                                 unsigned OpNum) { | 
 | 439 |   unsigned VirtReg = MI->getOperand(OpNum).getReg(); | 
 | 440 |  | 
 | 441 |   // If the virtual register is already available, just update the instruction | 
 | 442 |   // and return. | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 443 |   if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) { | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 444 |     MarkPhysRegRecentlyUsed(PR);          // Already have this value available! | 
 | 445 |     MI->SetMachineOperandReg(OpNum, PR);  // Assign the input register | 
 | 446 |     return MI; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 447 |   } | 
 | 448 |  | 
| Chris Lattner | 1e3812c | 2004-02-17 04:08:37 +0000 | [diff] [blame] | 449 |   // Otherwise, we need to fold it into the current instruction, or reload it. | 
 | 450 |   // If we have registers available to hold the value, use them. | 
| Chris Lattner | ff863ba | 2002-12-25 05:05:46 +0000 | [diff] [blame] | 451 |   const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg); | 
| Chris Lattner | 1e3812c | 2004-02-17 04:08:37 +0000 | [diff] [blame] | 452 |   unsigned PhysReg = getFreeReg(RC); | 
| Chris Lattner | 11390e7 | 2004-02-17 08:09:40 +0000 | [diff] [blame] | 453 |   int FrameIndex = getStackSpaceFor(VirtReg, RC); | 
| Chris Lattner | 1e3812c | 2004-02-17 04:08:37 +0000 | [diff] [blame] | 454 |  | 
| Chris Lattner | 11390e7 | 2004-02-17 08:09:40 +0000 | [diff] [blame] | 455 |   if (PhysReg) {   // Register is available, allocate it! | 
 | 456 |     assignVirtToPhysReg(VirtReg, PhysReg); | 
 | 457 |   } else {         // No registers available. | 
 | 458 |     // If we can fold this spill into this instruction, do so now. | 
| Alkis Evlogimenos | 39354c9 | 2004-03-14 07:19:51 +0000 | [diff] [blame] | 459 |     if (MachineInstr* FMI = RegInfo->foldMemoryOperand(MI, OpNum, FrameIndex)){ | 
| Alkis Evlogimenos | d6f6d1a | 2004-02-21 18:07:33 +0000 | [diff] [blame] | 460 |       ++NumFolded; | 
| Chris Lattner | d368c61 | 2004-02-19 18:34:02 +0000 | [diff] [blame] | 461 |       // Since we changed the address of MI, make sure to update live variables | 
 | 462 |       // to know that the new instruction has the properties of the old one. | 
| Alkis Evlogimenos | 39354c9 | 2004-03-14 07:19:51 +0000 | [diff] [blame] | 463 |       LV->instructionChanged(MI, FMI); | 
 | 464 |       return MBB.insert(MBB.erase(MI), FMI); | 
| Chris Lattner | 1e3812c | 2004-02-17 04:08:37 +0000 | [diff] [blame] | 465 |     } | 
 | 466 |  | 
 | 467 |     // It looks like we can't fold this virtual register load into this | 
 | 468 |     // instruction.  Force some poor hapless value out of the register file to | 
 | 469 |     // make room for the new register, and reload it. | 
 | 470 |     PhysReg = getReg(MBB, MI, VirtReg); | 
 | 471 |   } | 
 | 472 |  | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 473 |   markVirtRegModified(VirtReg, false);   // Note that this reg was just reloaded | 
 | 474 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 475 |   DEBUG(std::cerr << "  Reloading %reg" << VirtReg << " into " | 
 | 476 |                   << RegInfo->getName(PhysReg) << "\n"); | 
 | 477 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 478 |   // Add move instruction(s) | 
| Chris Lattner | 57f1b67 | 2004-08-15 21:56:44 +0000 | [diff] [blame] | 479 |   RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex); | 
| Alkis Evlogimenos | 2acef2d | 2004-02-19 06:19:09 +0000 | [diff] [blame] | 480 |   ++NumLoads;    // Update statistics | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 481 |  | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 482 |   PhysRegsEverUsed[PhysReg] = true; | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 483 |   MI->SetMachineOperandReg(OpNum, PhysReg);  // Assign the input register | 
 | 484 |   return MI; | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 485 | } | 
 | 486 |  | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 487 |  | 
 | 488 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 489 | void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { | 
 | 490 |   // loop over each instruction | 
| Alkis Evlogimenos | c0b9dc5 | 2004-02-12 02:27:10 +0000 | [diff] [blame] | 491 |   MachineBasicBlock::iterator MI = MBB.begin(); | 
 | 492 |   for (; MI != MBB.end(); ++MI) { | 
| Chris Lattner | 9bcdcd1 | 2004-06-02 05:57:12 +0000 | [diff] [blame] | 493 |     const TargetInstrDescriptor &TID = TM->getInstrInfo()->get(MI->getOpcode()); | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 494 |     DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI; | 
 | 495 |           std::cerr << "  Regs have values: "; | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 496 |           for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i) | 
 | 497 |             if (PhysRegsUsed[i] != -1) | 
 | 498 |                std::cerr << "[" << RegInfo->getName(i) | 
 | 499 |                          << ",%reg" << PhysRegsUsed[i] << "] "; | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 500 |           std::cerr << "\n"); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 501 |  | 
| Chris Lattner | ae64043 | 2002-12-17 02:50:10 +0000 | [diff] [blame] | 502 |     // Loop over the implicit uses, making sure that they are at the head of the | 
 | 503 |     // use order list, so they don't get reallocated. | 
| Alkis Evlogimenos | 73ff512 | 2003-10-08 05:20:08 +0000 | [diff] [blame] | 504 |     for (const unsigned *ImplicitUses = TID.ImplicitUses; | 
 | 505 |          *ImplicitUses; ++ImplicitUses) | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 506 |       MarkPhysRegRecentlyUsed(*ImplicitUses); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 507 |  | 
| Brian Gaeke | 53b99a0 | 2003-08-15 21:19:25 +0000 | [diff] [blame] | 508 |     // Get the used operands into registers.  This has the potential to spill | 
| Chris Lattner | b8822ad | 2003-08-04 23:36:39 +0000 | [diff] [blame] | 509 |     // incoming values if we are out of registers.  Note that we completely | 
 | 510 |     // ignore physical register uses here.  We assume that if an explicit | 
 | 511 |     // physical register is referenced by the instruction, that it is guaranteed | 
 | 512 |     // to be live-in, or the input is badly hosed. | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 513 |     // | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 514 |     for (unsigned i = 0; i != MI->getNumOperands(); ++i) { | 
 | 515 |       MachineOperand& MO = MI->getOperand(i); | 
 | 516 |       // here we are looking for only used operands (never def&use) | 
 | 517 |       if (!MO.isDef() && MO.isRegister() && MO.getReg() && | 
 | 518 |           MRegisterInfo::isVirtualRegister(MO.getReg())) | 
| Chris Lattner | 42e0a8f | 2004-02-17 03:57:19 +0000 | [diff] [blame] | 519 |         MI = reloadVirtReg(MBB, MI, i); | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 520 |     } | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 521 |  | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 522 |     // If this instruction is the last user of anything in registers, kill the | 
 | 523 |     // value, freeing the register being used, so it doesn't need to be | 
 | 524 |     // spilled to memory. | 
 | 525 |     // | 
 | 526 |     for (LiveVariables::killed_iterator KI = LV->killed_begin(MI), | 
 | 527 |            KE = LV->killed_end(MI); KI != KE; ++KI) { | 
| Chris Lattner | 44b94c2 | 2005-08-23 23:42:17 +0000 | [diff] [blame] | 528 |       unsigned VirtReg = *KI; | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 529 |       unsigned PhysReg = VirtReg; | 
 | 530 |       if (MRegisterInfo::isVirtualRegister(VirtReg)) { | 
 | 531 |         // If the virtual register was never materialized into a register, it | 
 | 532 |         // might not be in the map, but it won't hurt to zero it out anyway. | 
 | 533 |         unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); | 
 | 534 |         PhysReg = PhysRegSlot; | 
 | 535 |         PhysRegSlot = 0; | 
 | 536 |       } | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 537 |  | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 538 |       if (PhysReg) { | 
 | 539 |         DEBUG(std::cerr << "  Last use of " << RegInfo->getName(PhysReg) | 
 | 540 |               << "[%reg" << VirtReg <<"], removing it from live set\n"); | 
 | 541 |         removePhysReg(PhysReg); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 542 |       } | 
 | 543 |     } | 
 | 544 |  | 
 | 545 |     // Loop over all of the operands of the instruction, spilling registers that | 
 | 546 |     // are defined, and marking explicit destinations in the PhysRegsUsed map. | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 547 |     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { | 
 | 548 |       MachineOperand& MO = MI->getOperand(i); | 
 | 549 |       if (MO.isDef() && MO.isRegister() && MO.getReg() && | 
 | 550 |           MRegisterInfo::isPhysicalRegister(MO.getReg())) { | 
 | 551 |         unsigned Reg = MO.getReg(); | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 552 |         PhysRegsEverUsed[Reg] = true; | 
| Alkis Evlogimenos | c0b9dc5 | 2004-02-12 02:27:10 +0000 | [diff] [blame] | 553 |         spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 554 |         PhysRegsUsed[Reg] = 0;            // It is free and reserved now | 
 | 555 |         PhysRegsUseOrder.push_back(Reg); | 
| Alkis Evlogimenos | 19b6486 | 2004-01-13 06:24:30 +0000 | [diff] [blame] | 556 |         for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); | 
 | 557 |              *AliasSet; ++AliasSet) { | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 558 |           PhysRegsUseOrder.push_back(*AliasSet); | 
 | 559 |           PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 560 |           PhysRegsEverUsed[*AliasSet] = true; | 
| Alkis Evlogimenos | 19b6486 | 2004-01-13 06:24:30 +0000 | [diff] [blame] | 561 |         } | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 562 |       } | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 563 |     } | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 564 |  | 
 | 565 |     // Loop over the implicit defs, spilling them as well. | 
| Alkis Evlogimenos | efe995a | 2003-12-13 01:20:58 +0000 | [diff] [blame] | 566 |     for (const unsigned *ImplicitDefs = TID.ImplicitDefs; | 
 | 567 |          *ImplicitDefs; ++ImplicitDefs) { | 
 | 568 |       unsigned Reg = *ImplicitDefs; | 
| Chris Lattner | 11390e7 | 2004-02-17 08:09:40 +0000 | [diff] [blame] | 569 |       spillPhysReg(MBB, MI, Reg, true); | 
| Alkis Evlogimenos | efe995a | 2003-12-13 01:20:58 +0000 | [diff] [blame] | 570 |       PhysRegsUseOrder.push_back(Reg); | 
 | 571 |       PhysRegsUsed[Reg] = 0;            // It is free and reserved now | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 572 |       PhysRegsEverUsed[Reg] = true; | 
 | 573 |  | 
| Alkis Evlogimenos | 19b6486 | 2004-01-13 06:24:30 +0000 | [diff] [blame] | 574 |       for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); | 
 | 575 |            *AliasSet; ++AliasSet) { | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 576 |         PhysRegsUseOrder.push_back(*AliasSet); | 
 | 577 |         PhysRegsUsed[*AliasSet] = 0;  // It is free and reserved now | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 578 |         PhysRegsEverUsed[*AliasSet] = true; | 
| Alkis Evlogimenos | 19b6486 | 2004-01-13 06:24:30 +0000 | [diff] [blame] | 579 |       } | 
| Alkis Evlogimenos | efe995a | 2003-12-13 01:20:58 +0000 | [diff] [blame] | 580 |     } | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 581 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 582 |     // Okay, we have allocated all of the source operands and spilled any values | 
 | 583 |     // that would be destroyed by defs of this instruction.  Loop over the | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 584 |     // explicit defs and assign them to a register, spilling incoming values if | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 585 |     // we need to scavenge a register. | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 586 |     // | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 587 |     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { | 
 | 588 |       MachineOperand& MO = MI->getOperand(i); | 
 | 589 |       if (MO.isDef() && MO.isRegister() && MO.getReg() && | 
 | 590 |           MRegisterInfo::isVirtualRegister(MO.getReg())) { | 
 | 591 |         unsigned DestVirtReg = MO.getReg(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 592 |         unsigned DestPhysReg; | 
 | 593 |  | 
| Alkis Evlogimenos | 9af9dbd | 2003-12-18 13:08:52 +0000 | [diff] [blame] | 594 |         // If DestVirtReg already has a value, use it. | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 595 |         if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) | 
| Alkis Evlogimenos | c0b9dc5 | 2004-02-12 02:27:10 +0000 | [diff] [blame] | 596 |           DestPhysReg = getReg(MBB, MI, DestVirtReg); | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 597 |         PhysRegsEverUsed[DestPhysReg] = true; | 
| Chris Lattner | d572563 | 2003-05-12 03:54:14 +0000 | [diff] [blame] | 598 |         markVirtRegModified(DestVirtReg); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 599 |         MI->SetMachineOperandReg(i, DestPhysReg);  // Assign the output register | 
 | 600 |       } | 
| Alkis Evlogimenos | 71e353e | 2004-02-26 22:00:20 +0000 | [diff] [blame] | 601 |     } | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 602 |  | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 603 |     // If this instruction defines any registers that are immediately dead, | 
 | 604 |     // kill them now. | 
 | 605 |     // | 
 | 606 |     for (LiveVariables::killed_iterator KI = LV->dead_begin(MI), | 
 | 607 |            KE = LV->dead_end(MI); KI != KE; ++KI) { | 
| Chris Lattner | 44b94c2 | 2005-08-23 23:42:17 +0000 | [diff] [blame] | 608 |       unsigned VirtReg = *KI; | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 609 |       unsigned PhysReg = VirtReg; | 
 | 610 |       if (MRegisterInfo::isVirtualRegister(VirtReg)) { | 
 | 611 |         unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg); | 
 | 612 |         PhysReg = PhysRegSlot; | 
 | 613 |         assert(PhysReg != 0); | 
 | 614 |         PhysRegSlot = 0; | 
 | 615 |       } | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 616 |  | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 617 |       if (PhysReg) { | 
 | 618 |         DEBUG(std::cerr << "  Register " << RegInfo->getName(PhysReg) | 
 | 619 |               << " [%reg" << VirtReg | 
 | 620 |               << "] is never used, removing it frame live list\n"); | 
 | 621 |         removePhysReg(PhysReg); | 
| Chris Lattner | 82bee0f | 2002-12-18 08:14:26 +0000 | [diff] [blame] | 622 |       } | 
 | 623 |     } | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 624 |   } | 
 | 625 |  | 
| Alkis Evlogimenos | 743d0a1 | 2004-02-23 18:14:48 +0000 | [diff] [blame] | 626 |   MI = MBB.getFirstTerminator(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 627 |  | 
 | 628 |   // Spill all physical registers holding virtual registers now. | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 629 |   for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) | 
 | 630 |     if (PhysRegsUsed[i] != -1) | 
 | 631 |       if (unsigned VirtReg = PhysRegsUsed[i]) | 
| Alkis Evlogimenos | c0b9dc5 | 2004-02-12 02:27:10 +0000 | [diff] [blame] | 632 |         spillVirtReg(MBB, MI, VirtReg, i); | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 633 |       else | 
 | 634 |         removePhysReg(i); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 635 |  | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 636 | #ifndef NDEBUG | 
 | 637 |   bool AllOk = true; | 
| Alkis Evlogimenos | 4d0d864 | 2004-02-25 21:55:45 +0000 | [diff] [blame] | 638 |   for (unsigned i = MRegisterInfo::FirstVirtualRegister, | 
 | 639 |            e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i) | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 640 |     if (unsigned PR = Virt2PhysRegMap[i]) { | 
 | 641 |       std::cerr << "Register still mapped: " << i << " -> " << PR << "\n"; | 
 | 642 |       AllOk = false; | 
 | 643 |     } | 
 | 644 |   assert(AllOk && "Virtual registers still in phys regs?"); | 
 | 645 | #endif | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 646 |  | 
| Chris Lattner | 128c2aa | 2003-08-17 18:01:15 +0000 | [diff] [blame] | 647 |   // Clear any physical register which appear live at the end of the basic | 
 | 648 |   // block, but which do not hold any virtual registers.  e.g., the stack | 
 | 649 |   // pointer. | 
 | 650 |   PhysRegsUseOrder.clear(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 651 | } | 
 | 652 |  | 
| Chris Lattner | 86c69a6 | 2002-12-17 03:16:10 +0000 | [diff] [blame] | 653 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 654 | /// runOnMachineFunction - Register allocate the whole function | 
 | 655 | /// | 
 | 656 | bool RA::runOnMachineFunction(MachineFunction &Fn) { | 
 | 657 |   DEBUG(std::cerr << "Machine Function " << "\n"); | 
 | 658 |   MF = &Fn; | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 659 |   TM = &Fn.getTarget(); | 
 | 660 |   RegInfo = TM->getRegisterInfo(); | 
| Chris Lattner | 56ddada | 2004-02-17 17:49:10 +0000 | [diff] [blame] | 661 |   LV = &getAnalysis<LiveVariables>(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 662 |  | 
| Chris Lattner | 0648b16 | 2005-01-23 22:51:56 +0000 | [diff] [blame] | 663 |   PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; | 
 | 664 |   std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); | 
 | 665 |   Fn.setUsedPhysRegs(PhysRegsEverUsed); | 
 | 666 |  | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 667 |   PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); | 
| Chris Lattner | 64667b6 | 2004-02-09 01:26:13 +0000 | [diff] [blame] | 668 |  | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 669 |   // initialize the virtual->physical register map to have a 'null' | 
 | 670 |   // mapping for all virtual registers | 
| Alkis Evlogimenos | 4d0d864 | 2004-02-25 21:55:45 +0000 | [diff] [blame] | 671 |   Virt2PhysRegMap.grow(MF->getSSARegMap()->getLastVirtReg()); | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 672 |  | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 673 |   // Loop over all of the basic blocks, eliminating virtual register references | 
 | 674 |   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); | 
 | 675 |        MBB != MBBe; ++MBB) | 
 | 676 |     AllocateBasicBlock(*MBB); | 
 | 677 |  | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 678 |   StackSlotForVirtReg.clear(); | 
| Alkis Evlogimenos | 4de473b | 2004-02-13 18:20:47 +0000 | [diff] [blame] | 679 |   PhysRegsUsed.clear(); | 
| Chris Lattner | 91a452b | 2003-01-13 00:25:40 +0000 | [diff] [blame] | 680 |   VirtRegModified.clear(); | 
| Chris Lattner | ecea563 | 2004-02-09 02:12:04 +0000 | [diff] [blame] | 681 |   Virt2PhysRegMap.clear(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 682 |   return true; | 
 | 683 | } | 
 | 684 |  | 
| Chris Lattner | ef09c63 | 2004-01-31 21:27:19 +0000 | [diff] [blame] | 685 | FunctionPass *llvm::createLocalRegisterAllocator() { | 
| Chris Lattner | 580f9be | 2002-12-28 20:40:43 +0000 | [diff] [blame] | 686 |   return new RA(); | 
| Chris Lattner | b74e83c | 2002-12-16 16:15:28 +0000 | [diff] [blame] | 687 | } |