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Chris Lattnerb74e83c2002-12-16 16:15:28 +00001//===-- RegAllocLocal.cpp - A BasicBlock generic register allocator -------===//
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00002//
John Criswellb576c942003-10-20 19:43:21 +00003// The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +00007//
John Criswellb576c942003-10-20 19:43:21 +00008//===----------------------------------------------------------------------===//
Chris Lattnerb74e83c2002-12-16 16:15:28 +00009//
10// This register allocator allocates registers to a basic block at a time,
11// attempting to keep values in registers and reusing registers as appropriate.
12//
13//===----------------------------------------------------------------------===//
14
Chris Lattner4cc662b2003-08-03 21:47:31 +000015#define DEBUG_TYPE "regalloc"
Chris Lattner91a452b2003-01-13 00:25:40 +000016#include "llvm/CodeGen/Passes.h"
Chris Lattner580f9be2002-12-28 20:40:43 +000017#include "llvm/CodeGen/MachineFunctionPass.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000018#include "llvm/CodeGen/MachineInstr.h"
Chris Lattnerff863ba2002-12-25 05:05:46 +000019#include "llvm/CodeGen/SSARegMap.h"
Chris Lattnereb24db92002-12-28 21:08:26 +000020#include "llvm/CodeGen/MachineFrameInfo.h"
Chris Lattner91a452b2003-01-13 00:25:40 +000021#include "llvm/CodeGen/LiveVariables.h"
Chris Lattner3501fea2003-01-14 22:00:31 +000022#include "llvm/Target/TargetInstrInfo.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000023#include "llvm/Target/TargetMachine.h"
Chris Lattner82bee0f2002-12-18 08:14:26 +000024#include "Support/CommandLine.h"
Chris Lattnera11136b2003-08-01 22:21:34 +000025#include "Support/Debug.h"
26#include "Support/Statistic.h"
Chris Lattnerb74e83c2002-12-16 16:15:28 +000027#include <iostream>
Chris Lattneref09c632004-01-31 21:27:19 +000028using namespace llvm;
Brian Gaeked0fde302003-11-11 22:41:34 +000029
Chris Lattnerb74e83c2002-12-16 16:15:28 +000030namespace {
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +000031 Statistic<> NumStores("ra-local", "Number of stores added");
32 Statistic<> NumLoads ("ra-local", "Number of loads added");
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +000033 Statistic<> NumFolded("ra-local", "Number of loads/stores folded into "
34 "instructions");
Chris Lattner580f9be2002-12-28 20:40:43 +000035 class RA : public MachineFunctionPass {
36 const TargetMachine *TM;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000037 MachineFunction *MF;
Chris Lattner580f9be2002-12-28 20:40:43 +000038 const MRegisterInfo *RegInfo;
Chris Lattner91a452b2003-01-13 00:25:40 +000039 LiveVariables *LV;
Chris Lattnerff863ba2002-12-25 05:05:46 +000040
Chris Lattnerb8822ad2003-08-04 23:36:39 +000041 // StackSlotForVirtReg - Maps virtual regs to the frame index where these
42 // values are spilled.
Chris Lattner580f9be2002-12-28 20:40:43 +000043 std::map<unsigned, int> StackSlotForVirtReg;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000044
45 // Virt2PhysRegMap - This map contains entries for each virtual register
Chris Lattnerecea5632004-02-09 02:12:04 +000046 // that is currently available in a physical register. This is "logically"
47 // a map from virtual register numbers to physical register numbers.
48 // Instead of using a map, however, which is slow, we use a vector. The
49 // index is the VREG number - FirstVirtualRegister. If the entry is zero,
50 // then it is logically "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000051 //
Chris Lattnerecea5632004-02-09 02:12:04 +000052 std::vector<unsigned> Virt2PhysRegMap;
53
54 unsigned &getVirt2PhysRegMapSlot(unsigned VirtReg) {
Alkis Evlogimenos859a18b2004-02-15 21:37:17 +000055 assert(MRegisterInfo::isVirtualRegister(VirtReg) &&"Illegal VREG #");
Chris Lattnerecea5632004-02-09 02:12:04 +000056 assert(VirtReg-MRegisterInfo::FirstVirtualRegister <Virt2PhysRegMap.size()
57 && "VirtReg not in map!");
58 return Virt2PhysRegMap[VirtReg-MRegisterInfo::FirstVirtualRegister];
59 }
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000060
Chris Lattner64667b62004-02-09 01:26:13 +000061 // PhysRegsUsed - This array is effectively a map, containing entries for
62 // each physical register that currently has a value (ie, it is in
63 // Virt2PhysRegMap). The value mapped to is the virtual register
64 // corresponding to the physical register (the inverse of the
65 // Virt2PhysRegMap), or 0. The value is set to 0 if this register is pinned
66 // because it is used by a future instruction. If the entry for a physical
67 // register is -1, then the physical register is "not in the map".
Chris Lattnerb74e83c2002-12-16 16:15:28 +000068 //
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000069 std::vector<int> PhysRegsUsed;
Chris Lattnerb74e83c2002-12-16 16:15:28 +000070
71 // PhysRegsUseOrder - This contains a list of the physical registers that
72 // currently have a virtual register value in them. This list provides an
73 // ordering of registers, imposing a reallocation order. This list is only
74 // used if all registers are allocated and we have to spill one, in which
75 // case we spill the least recently used register. Entries at the front of
76 // the list are the least recently used registers, entries at the back are
77 // the most recently used.
78 //
79 std::vector<unsigned> PhysRegsUseOrder;
80
Chris Lattner91a452b2003-01-13 00:25:40 +000081 // VirtRegModified - This bitset contains information about which virtual
82 // registers need to be spilled back to memory when their registers are
83 // scavenged. If a virtual register has simply been rematerialized, there
84 // is no reason to spill it to memory when we need the register back.
Chris Lattner82bee0f2002-12-18 08:14:26 +000085 //
Chris Lattner91a452b2003-01-13 00:25:40 +000086 std::vector<bool> VirtRegModified;
87
88 void markVirtRegModified(unsigned Reg, bool Val = true) {
Chris Lattneref09c632004-01-31 21:27:19 +000089 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000090 Reg -= MRegisterInfo::FirstVirtualRegister;
91 if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
92 VirtRegModified[Reg] = Val;
93 }
94
95 bool isVirtRegModified(unsigned Reg) const {
Chris Lattneref09c632004-01-31 21:27:19 +000096 assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
Chris Lattner91a452b2003-01-13 00:25:40 +000097 assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +000098 && "Illegal virtual register!");
Chris Lattner91a452b2003-01-13 00:25:40 +000099 return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
100 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000101
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000102 void MarkPhysRegRecentlyUsed(unsigned Reg) {
Chris Lattner82bee0f2002-12-18 08:14:26 +0000103 assert(!PhysRegsUseOrder.empty() && "No registers used!");
Chris Lattner0eb172c2002-12-24 00:04:55 +0000104 if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
105
106 for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000107 if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
108 unsigned RegMatch = PhysRegsUseOrder[i-1]; // remove from middle
109 PhysRegsUseOrder.erase(PhysRegsUseOrder.begin()+i-1);
110 // Add it to the end of the list
111 PhysRegsUseOrder.push_back(RegMatch);
112 if (RegMatch == Reg)
113 return; // Found an exact match, exit early
114 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000115 }
116
117 public:
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000118 virtual const char *getPassName() const {
119 return "Local Register Allocator";
120 }
121
Chris Lattner91a452b2003-01-13 00:25:40 +0000122 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
Chris Lattner56ddada2004-02-17 17:49:10 +0000123 AU.addRequired<LiveVariables>();
Chris Lattner91a452b2003-01-13 00:25:40 +0000124 AU.addRequiredID(PHIEliminationID);
Alkis Evlogimenos4c080862003-12-18 22:40:24 +0000125 AU.addRequiredID(TwoAddressInstructionPassID);
Chris Lattner91a452b2003-01-13 00:25:40 +0000126 MachineFunctionPass::getAnalysisUsage(AU);
127 }
128
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000129 private:
130 /// runOnMachineFunction - Register allocate the whole function
131 bool runOnMachineFunction(MachineFunction &Fn);
132
133 /// AllocateBasicBlock - Register allocate the specified basic block.
134 void AllocateBasicBlock(MachineBasicBlock &MBB);
135
Chris Lattner82bee0f2002-12-18 08:14:26 +0000136
Chris Lattner82bee0f2002-12-18 08:14:26 +0000137 /// areRegsEqual - This method returns true if the specified registers are
138 /// related to each other. To do this, it checks to see if they are equal
139 /// or if the first register is in the alias set of the second register.
140 ///
141 bool areRegsEqual(unsigned R1, unsigned R2) const {
142 if (R1 == R2) return true;
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000143 for (const unsigned *AliasSet = RegInfo->getAliasSet(R2);
144 *AliasSet; ++AliasSet) {
145 if (*AliasSet == R1) return true;
146 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000147 return false;
148 }
149
Chris Lattner580f9be2002-12-28 20:40:43 +0000150 /// getStackSpaceFor - This returns the frame index of the specified virtual
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000151 /// register on the stack, allocating space if necessary.
Chris Lattner580f9be2002-12-28 20:40:43 +0000152 int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000153
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000154 /// removePhysReg - This method marks the specified physical register as no
155 /// longer being in use.
156 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000157 void removePhysReg(unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000158
159 /// spillVirtReg - This method spills the value specified by PhysReg into
160 /// the virtual register slot specified by VirtReg. It then updates the RA
161 /// data structures to indicate the fact that PhysReg is now available.
162 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000163 void spillVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000164 unsigned VirtReg, unsigned PhysReg);
165
Chris Lattnerc21be922002-12-16 17:44:42 +0000166 /// spillPhysReg - This method spills the specified physical register into
Chris Lattner128c2aa2003-08-17 18:01:15 +0000167 /// the virtual register slot associated with it. If OnlyVirtRegs is set to
168 /// true, then the request is ignored if the physical register does not
169 /// contain a virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000170 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000171 void spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000172 unsigned PhysReg, bool OnlyVirtRegs = false);
Chris Lattnerc21be922002-12-16 17:44:42 +0000173
Chris Lattner91a452b2003-01-13 00:25:40 +0000174 /// assignVirtToPhysReg - This method updates local state so that we know
175 /// that PhysReg is the proper container for VirtReg now. The physical
176 /// register must not be used for anything else when this is called.
177 ///
178 void assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg);
179
180 /// liberatePhysReg - Make sure the specified physical register is available
181 /// for use. If there is currently a value in it, it is either moved out of
182 /// the way or spilled to memory.
183 ///
184 void liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000185 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000186
Chris Lattnerae640432002-12-17 02:50:10 +0000187 /// isPhysRegAvailable - Return true if the specified physical register is
188 /// free and available for use. This also includes checking to see if
189 /// aliased registers are all free...
190 ///
Chris Lattner82bee0f2002-12-18 08:14:26 +0000191 bool isPhysRegAvailable(unsigned PhysReg) const;
Chris Lattner91a452b2003-01-13 00:25:40 +0000192
193 /// getFreeReg - Look to see if there is a free register available in the
194 /// specified register class. If not, return 0.
195 ///
196 unsigned getFreeReg(const TargetRegisterClass *RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000197
Chris Lattner91a452b2003-01-13 00:25:40 +0000198 /// getReg - Find a physical register to hold the specified virtual
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000199 /// register. If all compatible physical registers are used, this method
200 /// spills the last used virtual register to the stack, and uses that
201 /// register.
202 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000203 unsigned getReg(MachineBasicBlock &MBB, MachineInstr *MI,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000204 unsigned VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000205
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000206 /// reloadVirtReg - This method transforms the specified specified virtual
207 /// register use to refer to a physical register. This method may do this
208 /// in one of several ways: if the register is available in a physical
209 /// register already, it uses that physical register. If the value is not
210 /// in a physical register, and if there are physical registers available,
211 /// it loads it into a register. If register pressure is high, and it is
212 /// possible, it tries to fold the load of the virtual register into the
213 /// instruction itself. It avoids doing this if register pressure is low to
214 /// improve the chance that subsequent instructions can use the reloaded
215 /// value. This method returns the modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000216 ///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000217 MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
218 unsigned OpNum);
219
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000220
221 void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
222 unsigned PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000223 };
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000224}
225
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000226/// getStackSpaceFor - This allocates space for the specified virtual register
227/// to be held on the stack.
228int RA::getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC) {
229 // Find the location Reg would belong...
230 std::map<unsigned, int>::iterator I =StackSlotForVirtReg.lower_bound(VirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000231
Chris Lattner580f9be2002-12-28 20:40:43 +0000232 if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000233 return I->second; // Already has space allocated?
234
Chris Lattner580f9be2002-12-28 20:40:43 +0000235 // Allocate a new stack object for this spill location...
Chris Lattner91a452b2003-01-13 00:25:40 +0000236 int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000237
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000238 // Assign the slot...
Chris Lattner580f9be2002-12-28 20:40:43 +0000239 StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
240 return FrameIdx;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000241}
242
Chris Lattnerae640432002-12-17 02:50:10 +0000243
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000244/// removePhysReg - This method marks the specified physical register as no
Chris Lattner82bee0f2002-12-18 08:14:26 +0000245/// longer being in use.
246///
247void RA::removePhysReg(unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000248 PhysRegsUsed[PhysReg] = -1; // PhyReg no longer used
Chris Lattner82bee0f2002-12-18 08:14:26 +0000249
250 std::vector<unsigned>::iterator It =
251 std::find(PhysRegsUseOrder.begin(), PhysRegsUseOrder.end(), PhysReg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000252 if (It != PhysRegsUseOrder.end())
253 PhysRegsUseOrder.erase(It);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000254}
255
Chris Lattner91a452b2003-01-13 00:25:40 +0000256
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000257/// spillVirtReg - This method spills the value specified by PhysReg into the
258/// virtual register slot specified by VirtReg. It then updates the RA data
259/// structures to indicate the fact that PhysReg is now available.
260///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000261void RA::spillVirtReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000262 unsigned VirtReg, unsigned PhysReg) {
Chris Lattner8c819452003-08-05 04:13:58 +0000263 assert(VirtReg && "Spilling a physical register is illegal!"
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000264 " Must not have appropriate kill for the register or use exists beyond"
265 " the intended one.");
266 DEBUG(std::cerr << " Spilling register " << RegInfo->getName(PhysReg);
267 std::cerr << " containing %reg" << VirtReg;
268 if (!isVirtRegModified(VirtReg))
269 std::cerr << " which has not been modified, so no store necessary!");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000270
Chris Lattnerd9ac6a72003-08-05 00:49:09 +0000271 // Otherwise, there is a virtual register corresponding to this physical
272 // register. We only need to spill it into its stack slot if it has been
273 // modified.
274 if (isVirtRegModified(VirtReg)) {
275 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
276 int FrameIndex = getStackSpaceFor(VirtReg, RC);
277 DEBUG(std::cerr << " to stack slot #" << FrameIndex);
278 RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000279 ++NumStores; // Update statistics
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000280 }
Chris Lattnerecea5632004-02-09 02:12:04 +0000281
282 getVirt2PhysRegMapSlot(VirtReg) = 0; // VirtReg no longer available
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000283
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000284 DEBUG(std::cerr << "\n");
Chris Lattner82bee0f2002-12-18 08:14:26 +0000285 removePhysReg(PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000286}
287
Chris Lattnerae640432002-12-17 02:50:10 +0000288
Chris Lattner91a452b2003-01-13 00:25:40 +0000289/// spillPhysReg - This method spills the specified physical register into the
Chris Lattner128c2aa2003-08-17 18:01:15 +0000290/// virtual register slot associated with it. If OnlyVirtRegs is set to true,
291/// then the request is ignored if the physical register does not contain a
292/// virtual register.
Chris Lattner91a452b2003-01-13 00:25:40 +0000293///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000294void RA::spillPhysReg(MachineBasicBlock &MBB, MachineInstr *I,
Chris Lattner128c2aa2003-08-17 18:01:15 +0000295 unsigned PhysReg, bool OnlyVirtRegs) {
Chris Lattner64667b62004-02-09 01:26:13 +0000296 if (PhysRegsUsed[PhysReg] != -1) { // Only spill it if it's used!
297 if (PhysRegsUsed[PhysReg] || !OnlyVirtRegs)
298 spillVirtReg(MBB, I, PhysRegsUsed[PhysReg], PhysReg);
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000299 } else {
Chris Lattner91a452b2003-01-13 00:25:40 +0000300 // If the selected register aliases any other registers, we must make
301 // sure that one of the aliases isn't alive...
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000302 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
Chris Lattner64667b62004-02-09 01:26:13 +0000303 *AliasSet; ++AliasSet)
304 if (PhysRegsUsed[*AliasSet] != -1) // Spill aliased register...
305 if (PhysRegsUsed[*AliasSet] || !OnlyVirtRegs)
306 spillVirtReg(MBB, I, PhysRegsUsed[*AliasSet], *AliasSet);
Chris Lattner91a452b2003-01-13 00:25:40 +0000307 }
308}
309
310
311/// assignVirtToPhysReg - This method updates local state so that we know
312/// that PhysReg is the proper container for VirtReg now. The physical
313/// register must not be used for anything else when this is called.
314///
315void RA::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) {
Chris Lattner64667b62004-02-09 01:26:13 +0000316 assert(PhysRegsUsed[PhysReg] == -1 && "Phys reg already assigned!");
Chris Lattner91a452b2003-01-13 00:25:40 +0000317 // Update information to note the fact that this register was just used, and
318 // it holds VirtReg.
319 PhysRegsUsed[PhysReg] = VirtReg;
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000320 getVirt2PhysRegMapSlot(VirtReg) = PhysReg;
Chris Lattner91a452b2003-01-13 00:25:40 +0000321 PhysRegsUseOrder.push_back(PhysReg); // New use of PhysReg
322}
323
324
Chris Lattnerae640432002-12-17 02:50:10 +0000325/// isPhysRegAvailable - Return true if the specified physical register is free
326/// and available for use. This also includes checking to see if aliased
327/// registers are all free...
328///
329bool RA::isPhysRegAvailable(unsigned PhysReg) const {
Chris Lattner64667b62004-02-09 01:26:13 +0000330 if (PhysRegsUsed[PhysReg] != -1) return false;
Chris Lattnerae640432002-12-17 02:50:10 +0000331
332 // If the selected register aliases any other allocated registers, it is
333 // not free!
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000334 for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
335 *AliasSet; ++AliasSet)
Chris Lattner64667b62004-02-09 01:26:13 +0000336 if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000337 return false; // Can't use this reg then.
Chris Lattnerae640432002-12-17 02:50:10 +0000338 return true;
339}
340
341
Chris Lattner91a452b2003-01-13 00:25:40 +0000342/// getFreeReg - Look to see if there is a free register available in the
343/// specified register class. If not, return 0.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000344///
Chris Lattner91a452b2003-01-13 00:25:40 +0000345unsigned RA::getFreeReg(const TargetRegisterClass *RC) {
Chris Lattner580f9be2002-12-28 20:40:43 +0000346 // Get iterators defining the range of registers that are valid to allocate in
347 // this class, which also specifies the preferred allocation order.
348 TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
349 TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
Chris Lattnerae640432002-12-17 02:50:10 +0000350
Chris Lattner91a452b2003-01-13 00:25:40 +0000351 for (; RI != RE; ++RI)
352 if (isPhysRegAvailable(*RI)) { // Is reg unused?
353 assert(*RI != 0 && "Cannot use register!");
354 return *RI; // Found an unused register!
355 }
356 return 0;
357}
358
359
360/// liberatePhysReg - Make sure the specified physical register is available for
361/// use. If there is currently a value in it, it is either moved out of the way
362/// or spilled to memory.
363///
364void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000365 unsigned PhysReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000366 // FIXME: This code checks to see if a register is available, but it really
367 // wants to know if a reg is available BEFORE the instruction executes. If
368 // called after killed operands are freed, it runs the risk of reallocating a
369 // used operand...
370#if 0
371 if (isPhysRegAvailable(PhysReg)) return; // Already available...
372
373 // Check to see if the register is directly used, not indirectly used through
374 // aliases. If aliased registers are the ones actually used, we cannot be
375 // sure that we will be able to save the whole thing if we do a reg-reg copy.
Chris Lattner64667b62004-02-09 01:26:13 +0000376 if (PhysRegsUsed[PhysReg] != -1) {
377 // The virtual register held...
378 unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
Chris Lattner91a452b2003-01-13 00:25:40 +0000379
380 // Check to see if there is a compatible register available. If so, we can
381 // move the value into the new register...
382 //
383 const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
384 if (unsigned NewReg = getFreeReg(RC)) {
385 // Emit the code to copy the value...
386 RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000387
Chris Lattner91a452b2003-01-13 00:25:40 +0000388 // Update our internal state to indicate that PhysReg is available and Reg
389 // isn't.
Chris Lattnerecea5632004-02-09 02:12:04 +0000390 getVirt2PhysRegMapSlot[VirtReg] = 0;
Chris Lattner91a452b2003-01-13 00:25:40 +0000391 removePhysReg(PhysReg); // Free the physreg
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000392
Chris Lattner91a452b2003-01-13 00:25:40 +0000393 // Move reference over to new register...
394 assignVirtToPhysReg(VirtReg, NewReg);
395 return;
Chris Lattnerae640432002-12-17 02:50:10 +0000396 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000397 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000398#endif
399 spillPhysReg(MBB, I, PhysReg);
400}
401
402
403/// getReg - Find a physical register to hold the specified virtual
404/// register. If all compatible physical registers are used, this method spills
405/// the last used virtual register to the stack, and uses that register.
406///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000407unsigned RA::getReg(MachineBasicBlock &MBB, MachineInstr *I,
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000408 unsigned VirtReg) {
Chris Lattner91a452b2003-01-13 00:25:40 +0000409 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
410
411 // First check to see if we have a free register of the requested type...
412 unsigned PhysReg = getFreeReg(RC);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000413
Chris Lattnerae640432002-12-17 02:50:10 +0000414 // If we didn't find an unused register, scavenge one now!
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000415 if (PhysReg == 0) {
Chris Lattnerc21be922002-12-16 17:44:42 +0000416 assert(!PhysRegsUseOrder.empty() && "No allocated registers??");
Chris Lattnerae640432002-12-17 02:50:10 +0000417
418 // Loop over all of the preallocated registers from the least recently used
419 // to the most recently used. When we find one that is capable of holding
420 // our register, use it.
421 for (unsigned i = 0; PhysReg == 0; ++i) {
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000422 assert(i != PhysRegsUseOrder.size() &&
423 "Couldn't find a register of the appropriate class!");
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000424
Chris Lattnerae640432002-12-17 02:50:10 +0000425 unsigned R = PhysRegsUseOrder[i];
Chris Lattner41822c72003-08-23 23:49:42 +0000426
427 // We can only use this register if it holds a virtual register (ie, it
428 // can be spilled). Do not use it if it is an explicitly allocated
429 // physical register!
Chris Lattner64667b62004-02-09 01:26:13 +0000430 assert(PhysRegsUsed[R] != -1 &&
Chris Lattner41822c72003-08-23 23:49:42 +0000431 "PhysReg in PhysRegsUseOrder, but is not allocated?");
432 if (PhysRegsUsed[R]) {
433 // If the current register is compatible, use it.
434 if (RegInfo->getRegClass(R) == RC) {
435 PhysReg = R;
436 break;
437 } else {
438 // If one of the registers aliased to the current register is
439 // compatible, use it.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000440 for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
441 *AliasSet; ++AliasSet) {
442 if (RegInfo->getRegClass(*AliasSet) == RC) {
443 PhysReg = *AliasSet; // Take an aliased register
444 break;
445 }
446 }
Chris Lattner41822c72003-08-23 23:49:42 +0000447 }
Chris Lattnerae640432002-12-17 02:50:10 +0000448 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000449 }
450
Chris Lattnerae640432002-12-17 02:50:10 +0000451 assert(PhysReg && "Physical register not assigned!?!?");
452
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000453 // At this point PhysRegsUseOrder[i] is the least recently used register of
454 // compatible register class. Spill it to memory and reap its remains.
Chris Lattnerc21be922002-12-16 17:44:42 +0000455 spillPhysReg(MBB, I, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000456 }
457
458 // Now that we know which register we need to assign this to, do it now!
Chris Lattner91a452b2003-01-13 00:25:40 +0000459 assignVirtToPhysReg(VirtReg, PhysReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000460 return PhysReg;
461}
462
Chris Lattnerae640432002-12-17 02:50:10 +0000463
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000464/// reloadVirtReg - This method transforms the specified specified virtual
465/// register use to refer to a physical register. This method may do this in
466/// one of several ways: if the register is available in a physical register
467/// already, it uses that physical register. If the value is not in a physical
468/// register, and if there are physical registers available, it loads it into a
469/// register. If register pressure is high, and it is possible, it tries to
470/// fold the load of the virtual register into the instruction itself. It
471/// avoids doing this if register pressure is low to improve the chance that
472/// subsequent instructions can use the reloaded value. This method returns the
473/// modified instruction.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000474///
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000475MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
476 unsigned OpNum) {
477 unsigned VirtReg = MI->getOperand(OpNum).getReg();
478
479 // If the virtual register is already available, just update the instruction
480 // and return.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000481 if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000482 MarkPhysRegRecentlyUsed(PR); // Already have this value available!
483 MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
484 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000485 }
486
Chris Lattner1e3812c2004-02-17 04:08:37 +0000487 // Otherwise, we need to fold it into the current instruction, or reload it.
488 // If we have registers available to hold the value, use them.
Chris Lattnerff863ba2002-12-25 05:05:46 +0000489 const TargetRegisterClass *RC = MF->getSSARegMap()->getRegClass(VirtReg);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000490 unsigned PhysReg = getFreeReg(RC);
Chris Lattner11390e72004-02-17 08:09:40 +0000491 int FrameIndex = getStackSpaceFor(VirtReg, RC);
Chris Lattner1e3812c2004-02-17 04:08:37 +0000492
Chris Lattner11390e72004-02-17 08:09:40 +0000493 if (PhysReg) { // Register is available, allocate it!
494 assignVirtToPhysReg(VirtReg, PhysReg);
495 } else { // No registers available.
496 // If we can fold this spill into this instruction, do so now.
497 MachineBasicBlock::iterator MII = MI;
498 if (RegInfo->foldMemoryOperand(MII, OpNum, FrameIndex)) {
Alkis Evlogimenosd6f6d1a2004-02-21 18:07:33 +0000499 ++NumFolded;
Chris Lattnerd368c612004-02-19 18:34:02 +0000500 // Since we changed the address of MI, make sure to update live variables
501 // to know that the new instruction has the properties of the old one.
502 LV->instructionChanged(MI, MII);
Chris Lattner11390e72004-02-17 08:09:40 +0000503 return MII;
Chris Lattner1e3812c2004-02-17 04:08:37 +0000504 }
505
506 // It looks like we can't fold this virtual register load into this
507 // instruction. Force some poor hapless value out of the register file to
508 // make room for the new register, and reload it.
509 PhysReg = getReg(MBB, MI, VirtReg);
510 }
511
Chris Lattner91a452b2003-01-13 00:25:40 +0000512 markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
513
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000514 DEBUG(std::cerr << " Reloading %reg" << VirtReg << " into "
515 << RegInfo->getName(PhysReg) << "\n");
516
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000517 // Add move instruction(s)
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000518 RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
Alkis Evlogimenos2acef2d2004-02-19 06:19:09 +0000519 ++NumLoads; // Update statistics
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000520
521 MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
522 return MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000523}
524
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000525
526
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000527void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
528 // loop over each instruction
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000529 MachineBasicBlock::iterator MI = MBB.begin();
530 for (; MI != MBB.end(); ++MI) {
Chris Lattner3501fea2003-01-14 22:00:31 +0000531 const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000532 DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
533 std::cerr << " Regs have values: ";
Chris Lattner64667b62004-02-09 01:26:13 +0000534 for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
535 if (PhysRegsUsed[i] != -1)
536 std::cerr << "[" << RegInfo->getName(i)
537 << ",%reg" << PhysRegsUsed[i] << "] ";
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000538 std::cerr << "\n");
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000539
Chris Lattnerae640432002-12-17 02:50:10 +0000540 // Loop over the implicit uses, making sure that they are at the head of the
541 // use order list, so they don't get reallocated.
Alkis Evlogimenos73ff5122003-10-08 05:20:08 +0000542 for (const unsigned *ImplicitUses = TID.ImplicitUses;
543 *ImplicitUses; ++ImplicitUses)
Chris Lattnerecea5632004-02-09 02:12:04 +0000544 MarkPhysRegRecentlyUsed(*ImplicitUses);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000545
Brian Gaeke53b99a02003-08-15 21:19:25 +0000546 // Get the used operands into registers. This has the potential to spill
Chris Lattnerb8822ad2003-08-04 23:36:39 +0000547 // incoming values if we are out of registers. Note that we completely
548 // ignore physical register uses here. We assume that if an explicit
549 // physical register is referenced by the instruction, that it is guaranteed
550 // to be live-in, or the input is badly hosed.
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000551 //
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000552 for (unsigned i = 0; i != MI->getNumOperands(); ++i)
Alkis Evlogimenos4d7af652003-12-14 13:24:17 +0000553 if (MI->getOperand(i).isUse() &&
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000554 !MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
Chris Lattner42e0a8f2004-02-17 03:57:19 +0000555 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg()))
556 MI = reloadVirtReg(MBB, MI, i);
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000557
Chris Lattner56ddada2004-02-17 17:49:10 +0000558 // If this instruction is the last user of anything in registers, kill the
559 // value, freeing the register being used, so it doesn't need to be
560 // spilled to memory.
561 //
562 for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
563 KE = LV->killed_end(MI); KI != KE; ++KI) {
564 unsigned VirtReg = KI->second;
565 unsigned PhysReg = VirtReg;
566 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
567 // If the virtual register was never materialized into a register, it
568 // might not be in the map, but it won't hurt to zero it out anyway.
569 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
570 PhysReg = PhysRegSlot;
571 PhysRegSlot = 0;
572 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000573
Chris Lattner56ddada2004-02-17 17:49:10 +0000574 if (PhysReg) {
575 DEBUG(std::cerr << " Last use of " << RegInfo->getName(PhysReg)
576 << "[%reg" << VirtReg <<"], removing it from live set\n");
577 removePhysReg(PhysReg);
Chris Lattner91a452b2003-01-13 00:25:40 +0000578 }
579 }
580
581 // Loop over all of the operands of the instruction, spilling registers that
582 // are defined, and marking explicit destinations in the PhysRegsUsed map.
583 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner3d878d82004-02-10 20:41:10 +0000584 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
585 MRegisterInfo::isPhysicalRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000586 unsigned Reg = MI->getOperand(i).getReg();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000587 spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
Chris Lattner91a452b2003-01-13 00:25:40 +0000588 PhysRegsUsed[Reg] = 0; // It is free and reserved now
589 PhysRegsUseOrder.push_back(Reg);
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000590 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
591 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000592 PhysRegsUseOrder.push_back(*AliasSet);
593 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000594 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000595 }
596
597 // Loop over the implicit defs, spilling them as well.
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000598 for (const unsigned *ImplicitDefs = TID.ImplicitDefs;
599 *ImplicitDefs; ++ImplicitDefs) {
600 unsigned Reg = *ImplicitDefs;
Chris Lattner11390e72004-02-17 08:09:40 +0000601 spillPhysReg(MBB, MI, Reg, true);
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000602 PhysRegsUseOrder.push_back(Reg);
603 PhysRegsUsed[Reg] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000604 for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
605 *AliasSet; ++AliasSet) {
Chris Lattnerecea5632004-02-09 02:12:04 +0000606 PhysRegsUseOrder.push_back(*AliasSet);
607 PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
Alkis Evlogimenos19b64862004-01-13 06:24:30 +0000608 }
Alkis Evlogimenosefe995a2003-12-13 01:20:58 +0000609 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000610
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000611 // Okay, we have allocated all of the source operands and spilled any values
612 // that would be destroyed by defs of this instruction. Loop over the
Chris Lattner91a452b2003-01-13 00:25:40 +0000613 // implicit defs and assign them to a register, spilling incoming values if
614 // we need to scavenge a register.
Chris Lattner82bee0f2002-12-18 08:14:26 +0000615 //
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000616 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
Chris Lattner1cbe4d02004-02-10 21:12:22 +0000617 if (MI->getOperand(i).isDef() && MI->getOperand(i).isRegister() &&
618 MRegisterInfo::isVirtualRegister(MI->getOperand(i).getReg())) {
Alkis Evlogimenosbe766c72004-02-13 21:01:20 +0000619 unsigned DestVirtReg = MI->getOperand(i).getReg();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000620 unsigned DestPhysReg;
621
Alkis Evlogimenos9af9dbd2003-12-18 13:08:52 +0000622 // If DestVirtReg already has a value, use it.
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000623 if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000624 DestPhysReg = getReg(MBB, MI, DestVirtReg);
Chris Lattnerd5725632003-05-12 03:54:14 +0000625 markVirtRegModified(DestVirtReg);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000626 MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
627 }
Chris Lattner82bee0f2002-12-18 08:14:26 +0000628
Chris Lattner56ddada2004-02-17 17:49:10 +0000629 // If this instruction defines any registers that are immediately dead,
630 // kill them now.
631 //
632 for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
633 KE = LV->dead_end(MI); KI != KE; ++KI) {
634 unsigned VirtReg = KI->second;
635 unsigned PhysReg = VirtReg;
636 if (MRegisterInfo::isVirtualRegister(VirtReg)) {
637 unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
638 PhysReg = PhysRegSlot;
639 assert(PhysReg != 0);
640 PhysRegSlot = 0;
641 }
Chris Lattner91a452b2003-01-13 00:25:40 +0000642
Chris Lattner56ddada2004-02-17 17:49:10 +0000643 if (PhysReg) {
644 DEBUG(std::cerr << " Register " << RegInfo->getName(PhysReg)
645 << " [%reg" << VirtReg
646 << "] is never used, removing it frame live list\n");
647 removePhysReg(PhysReg);
Chris Lattner82bee0f2002-12-18 08:14:26 +0000648 }
649 }
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000650 }
651
652 // Rewind the iterator to point to the first flow control instruction...
Chris Lattner3501fea2003-01-14 22:00:31 +0000653 const TargetInstrInfo &TII = TM->getInstrInfo();
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000654 MI = MBB.end();
655 while (MI != MBB.begin() && TII.isTerminatorInstr((--MI)->getOpcode()));
656 ++MI;
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000657
658 // Spill all physical registers holding virtual registers now.
Chris Lattner64667b62004-02-09 01:26:13 +0000659 for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
660 if (PhysRegsUsed[i] != -1)
661 if (unsigned VirtReg = PhysRegsUsed[i])
Alkis Evlogimenosc0b9dc52004-02-12 02:27:10 +0000662 spillVirtReg(MBB, MI, VirtReg, i);
Chris Lattner64667b62004-02-09 01:26:13 +0000663 else
664 removePhysReg(i);
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000665
Chris Lattnerecea5632004-02-09 02:12:04 +0000666#ifndef NDEBUG
667 bool AllOk = true;
668 for (unsigned i = 0, e = Virt2PhysRegMap.size(); i != e; ++i)
669 if (unsigned PR = Virt2PhysRegMap[i]) {
670 std::cerr << "Register still mapped: " << i << " -> " << PR << "\n";
671 AllOk = false;
672 }
673 assert(AllOk && "Virtual registers still in phys regs?");
674#endif
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000675
Chris Lattner128c2aa2003-08-17 18:01:15 +0000676 // Clear any physical register which appear live at the end of the basic
677 // block, but which do not hold any virtual registers. e.g., the stack
678 // pointer.
679 PhysRegsUseOrder.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000680}
681
Chris Lattner86c69a62002-12-17 03:16:10 +0000682
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000683/// runOnMachineFunction - Register allocate the whole function
684///
685bool RA::runOnMachineFunction(MachineFunction &Fn) {
686 DEBUG(std::cerr << "Machine Function " << "\n");
687 MF = &Fn;
Chris Lattner580f9be2002-12-28 20:40:43 +0000688 TM = &Fn.getTarget();
689 RegInfo = TM->getRegisterInfo();
Chris Lattner56ddada2004-02-17 17:49:10 +0000690 LV = &getAnalysis<LiveVariables>();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000691
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000692 PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
Chris Lattner64667b62004-02-09 01:26:13 +0000693
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000694 // initialize the virtual->physical register map to have a 'null'
695 // mapping for all virtual registers
696 Virt2PhysRegMap.assign(MF->getSSARegMap()->getNumVirtualRegs(), 0);
Chris Lattnerecea5632004-02-09 02:12:04 +0000697
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000698 // Loop over all of the basic blocks, eliminating virtual register references
699 for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
700 MBB != MBBe; ++MBB)
701 AllocateBasicBlock(*MBB);
702
Chris Lattner580f9be2002-12-28 20:40:43 +0000703 StackSlotForVirtReg.clear();
Alkis Evlogimenos4de473b2004-02-13 18:20:47 +0000704 PhysRegsUsed.clear();
Chris Lattner91a452b2003-01-13 00:25:40 +0000705 VirtRegModified.clear();
Chris Lattnerecea5632004-02-09 02:12:04 +0000706 Virt2PhysRegMap.clear();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000707 return true;
708}
709
Chris Lattneref09c632004-01-31 21:27:19 +0000710FunctionPass *llvm::createLocalRegisterAllocator() {
Chris Lattner580f9be2002-12-28 20:40:43 +0000711 return new RA();
Chris Lattnerb74e83c2002-12-16 16:15:28 +0000712}