Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * on the rights to use, copy, modify, merge, publish, distribute, sub |
| 8 | * license, and/or sell copies of the Software, and to permit persons to whom |
| 9 | * the Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 19 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 20 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 21 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Jerome Glisse |
| 25 | */ |
| 26 | #ifndef R600_PRIV_H |
| 27 | #define R600_PRIV_H |
| 28 | |
| 29 | #include <errno.h> |
| 30 | #include <stdint.h> |
| 31 | #include <stdlib.h> |
| 32 | #include <assert.h> |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 33 | #include <util/u_double_list.h> |
| 34 | #include <util/u_inlines.h> |
Dave Airlie | e4b040c | 2011-03-21 19:56:26 +1000 | [diff] [blame] | 35 | #include "util/u_hash_table.h" |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 36 | #include <os/os_thread.h> |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 37 | #include "r600.h" |
| 38 | |
Dave Airlie | 162bc40 | 2011-04-18 13:03:06 +1000 | [diff] [blame] | 39 | #define PKT_COUNT_C 0xC000FFFF |
| 40 | #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16) |
| 41 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 42 | struct r600_bomgr; |
Jerome Glisse | 63b9790 | 2011-01-11 14:29:33 -0500 | [diff] [blame] | 43 | struct r600_bo; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 44 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 45 | struct radeon { |
| 46 | int fd; |
| 47 | int refcount; |
| 48 | unsigned device; |
| 49 | unsigned family; |
Jerome Glisse | 363dfb8 | 2010-09-20 11:58:00 -0400 | [diff] [blame] | 50 | enum chip_class chip_class; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 51 | struct r600_tiling_info tiling_info; |
| 52 | struct r600_bomgr *bomgr; |
Jerome Glisse | 63b9790 | 2011-01-11 14:29:33 -0500 | [diff] [blame] | 53 | unsigned fence; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 54 | unsigned *cfence; |
Jerome Glisse | 63b9790 | 2011-01-11 14:29:33 -0500 | [diff] [blame] | 55 | struct r600_bo *fence_bo; |
Mathias Fröhlich | 90c2fd8 | 2011-01-23 22:35:13 +0100 | [diff] [blame] | 56 | unsigned clock_crystal_freq; |
Dave Airlie | 929be6e | 2011-03-01 14:55:35 +1000 | [diff] [blame] | 57 | unsigned num_backends; |
| 58 | unsigned minor_version; |
Dave Airlie | e4b040c | 2011-03-21 19:56:26 +1000 | [diff] [blame] | 59 | |
| 60 | /* List of buffer handles and its mutex. */ |
| 61 | struct util_hash_table *bo_handles; |
| 62 | pipe_mutex bo_handles_mutex; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 63 | }; |
| 64 | |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 65 | #define REG_FLAG_NEED_BO 1 |
| 66 | #define REG_FLAG_DIRTY_ALWAYS 2 |
Dave Airlie | ae7abf0 | 2011-05-03 20:45:39 +0200 | [diff] [blame] | 67 | #define REG_FLAG_RV6XX_SBU 4 |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 68 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 69 | struct r600_reg { |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 70 | unsigned offset; |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 71 | unsigned flags; |
Jerome Glisse | ca35292 | 2010-09-21 20:24:51 -0400 | [diff] [blame] | 72 | unsigned flush_flags; |
Jerome Glisse | 585e409 | 2010-10-05 10:29:30 -0400 | [diff] [blame] | 73 | unsigned flush_mask; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 74 | }; |
| 75 | |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 76 | struct radeon_bo { |
| 77 | struct pipe_reference reference; |
| 78 | unsigned handle; |
| 79 | unsigned size; |
| 80 | unsigned alignment; |
Tilman Sauerbeck | 86778da | 2010-10-29 19:30:57 +0200 | [diff] [blame] | 81 | int map_count; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 82 | void *data; |
Dave Airlie | 3c38e4f | 2010-10-05 15:35:52 +1000 | [diff] [blame] | 83 | struct list_head fencedlist; |
Jerome Glisse | ea5a74f | 2010-10-05 16:14:11 -0400 | [diff] [blame] | 84 | unsigned fence; |
| 85 | struct r600_context *ctx; |
Dave Airlie | 3c38e4f | 2010-10-05 15:35:52 +1000 | [diff] [blame] | 86 | boolean shared; |
Jerome Glisse | 12d16e5 | 2010-10-05 08:42:42 -0400 | [diff] [blame] | 87 | struct r600_reloc *reloc; |
| 88 | unsigned reloc_id; |
Jerome Glisse | 585e409 | 2010-10-05 10:29:30 -0400 | [diff] [blame] | 89 | unsigned last_flush; |
Dave Airlie | e4b040c | 2011-03-21 19:56:26 +1000 | [diff] [blame] | 90 | unsigned name; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 91 | }; |
| 92 | |
Jerome Glisse | 294c9fc | 2010-10-04 10:06:13 -0400 | [diff] [blame] | 93 | struct r600_bo { |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 94 | struct pipe_reference reference; |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame] | 95 | unsigned size; |
Dave Airlie | 8a74f74 | 2010-10-18 09:45:58 +1000 | [diff] [blame] | 96 | unsigned tiling_flags; |
Jerome Glisse | edda44e | 2010-12-03 13:06:53 -0500 | [diff] [blame] | 97 | unsigned kernel_pitch; |
Keith Whitwell | 29c4a15 | 2010-11-02 17:47:06 +0000 | [diff] [blame] | 98 | unsigned domains; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 99 | struct radeon_bo *bo; |
| 100 | unsigned fence; |
| 101 | /* manager data */ |
| 102 | struct list_head list; |
| 103 | unsigned manager_id; |
| 104 | unsigned alignment; |
| 105 | unsigned offset; |
| 106 | int64_t start; |
| 107 | int64_t end; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 108 | }; |
| 109 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 110 | struct r600_bomgr { |
| 111 | struct radeon *radeon; |
| 112 | unsigned usecs; |
| 113 | pipe_mutex mutex; |
| 114 | struct list_head delayed; |
| 115 | unsigned num_delayed; |
| 116 | }; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 117 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 118 | /* |
| 119 | * r600_drm.c |
| 120 | */ |
| 121 | struct radeon *r600_new(int fd, unsigned device); |
| 122 | void r600_delete(struct radeon *r600); |
| 123 | |
| 124 | /* |
| 125 | * radeon_pciid.c |
| 126 | */ |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 127 | unsigned radeon_family_from_device(unsigned device); |
| 128 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 129 | /* |
| 130 | * radeon_bo.c |
| 131 | */ |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 132 | struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle, |
Tilman Sauerbeck | 4e34393 | 2010-10-28 21:27:37 +0200 | [diff] [blame] | 133 | unsigned size, unsigned alignment); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 134 | void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst, |
| 135 | struct radeon_bo *src); |
| 136 | int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo); |
| 137 | int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain); |
Dave Airlie | 3c38e4f | 2010-10-05 15:35:52 +1000 | [diff] [blame] | 138 | int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo); |
Dave Airlie | 8a74f74 | 2010-10-18 09:45:58 +1000 | [diff] [blame] | 139 | int radeon_bo_get_tiling_flags(struct radeon *radeon, |
| 140 | struct radeon_bo *bo, |
| 141 | uint32_t *tiling_flags, |
| 142 | uint32_t *pitch); |
Benjamin Franzke | 46c1970 | 2010-11-03 21:41:48 +0100 | [diff] [blame] | 143 | int radeon_bo_get_name(struct radeon *radeon, |
| 144 | struct radeon_bo *bo, |
| 145 | uint32_t *name); |
Dave Airlie | 5e15497 | 2011-05-11 13:14:16 +1000 | [diff] [blame] | 146 | int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 147 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 148 | /* |
| 149 | * r600_hw_context.c |
| 150 | */ |
Jerome Glisse | ea5a74f | 2010-10-05 16:14:11 -0400 | [diff] [blame] | 151 | int r600_context_init_fence(struct r600_context *ctx); |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame] | 152 | void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo); |
Jerome Glisse | 585e409 | 2010-10-05 10:29:30 -0400 | [diff] [blame] | 153 | void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, |
| 154 | unsigned flush_mask, struct r600_bo *rbo); |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame] | 155 | struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); |
Dave Airlie | d79a4a6 | 2011-05-12 14:07:53 +1000 | [diff] [blame^] | 156 | int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg, |
| 157 | unsigned opcode, unsigned offset_base); |
Dave Airlie | a6e32da | 2011-04-19 10:00:03 +1000 | [diff] [blame] | 158 | void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset); |
Dave Airlie | 5b5a16e | 2011-04-19 10:04:02 +1000 | [diff] [blame] | 159 | void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block); |
| 160 | void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, |
| 161 | int dirty, int index); |
| 162 | |
| 163 | void r600_context_reg(struct r600_context *ctx, |
| 164 | unsigned offset, unsigned value, |
| 165 | unsigned mask); |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 166 | /* |
| 167 | * r600_bo.c |
| 168 | */ |
| 169 | void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo); |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 170 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 171 | /* |
| 172 | * r600_bomgr.c |
| 173 | */ |
| 174 | struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs); |
| 175 | void r600_bomgr_destroy(struct r600_bomgr *mgr); |
| 176 | bool r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo); |
| 177 | void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo); |
| 178 | struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr, |
| 179 | unsigned size, |
| 180 | unsigned alignment, |
| 181 | unsigned cfence); |
| 182 | |
| 183 | |
| 184 | /* |
| 185 | * helpers |
| 186 | */ |
Dave Airlie | d015d2f | 2011-05-12 13:20:02 +1000 | [diff] [blame] | 187 | |
| 188 | /* each range covers 9 bits of dword space = 512 dwords = 2k bytes */ |
| 189 | /* there is a block entry for each register so 512 blocks */ |
| 190 | /* we have no registers to read/write below 0x8000 (0x2000 in dw space) */ |
| 191 | /* we use some fake offsets at 0x40000 to do evergreen sampler borders so take 0x42000 as a max bound*/ |
| 192 | #define RANGE_OFFSET_START 0x8000 |
| 193 | #define HASH_SHIFT 9 |
| 194 | #define NUM_RANGES (0x42000 - RANGE_OFFSET_START) / (4 << HASH_SHIFT) /* 128 << 9 = 64k */ |
| 195 | |
| 196 | #define CTX_RANGE_ID(ctx, offset) ((((offset - RANGE_OFFSET_START) >> 2) >> HASH_SHIFT) & 255) |
| 197 | #define CTX_BLOCK_ID(ctx, offset) (((offset - RANGE_OFFSET_START) >> 2) & ((1 << HASH_SHIFT) - 1)) |
Jerome Glisse | a852615 | 2010-09-26 12:06:46 -0400 | [diff] [blame] | 198 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 199 | /* |
| 200 | * radeon_bo.c |
| 201 | */ |
John Doe | 40181ae | 2010-09-30 17:53:36 -0400 | [diff] [blame] | 202 | static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo) |
| 203 | { |
Dave Airlie | 5e15497 | 2011-05-11 13:14:16 +1000 | [diff] [blame] | 204 | if (bo->map_count == 0 && !bo->data) |
| 205 | return radeon_bo_fixed_map(radeon, bo); |
John Doe | 40181ae | 2010-09-30 17:53:36 -0400 | [diff] [blame] | 206 | bo->map_count++; |
Dave Airlie | 1c2b3cb | 2010-10-04 16:26:46 +1000 | [diff] [blame] | 207 | return 0; |
John Doe | 40181ae | 2010-09-30 17:53:36 -0400 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo) |
| 211 | { |
| 212 | bo->map_count--; |
| 213 | assert(bo->map_count >= 0); |
| 214 | } |
| 215 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 216 | /* |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 217 | * fence |
| 218 | */ |
| 219 | static inline bool fence_is_after(unsigned fence, unsigned ofence) |
| 220 | { |
| 221 | /* handle wrap around */ |
| 222 | if (fence < 0x80000000 && ofence > 0x80000000) |
| 223 | return TRUE; |
| 224 | if (fence > ofence) |
| 225 | return TRUE; |
| 226 | return FALSE; |
| 227 | } |
| 228 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 229 | #endif |