Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * on the rights to use, copy, modify, merge, publish, distribute, sub |
| 8 | * license, and/or sell copies of the Software, and to permit persons to whom |
| 9 | * the Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
| 19 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
| 20 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
| 21 | * USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * Jerome Glisse |
| 25 | */ |
| 26 | #ifndef R600_PRIV_H |
| 27 | #define R600_PRIV_H |
| 28 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 29 | #include "r600.h" |
Marek Olšák | ce12f82 | 2011-07-22 19:25:07 +0200 | [diff] [blame] | 30 | #include "../../radeon/drm/radeon_winsys.h" |
Marek Olšák | 354f76f | 2011-07-22 21:38:56 +0200 | [diff] [blame] | 31 | #include "util/u_hash_table.h" |
| 32 | #include "os/os_thread.h" |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 33 | |
Dave Airlie | 162bc40 | 2011-04-18 13:03:06 +1000 | [diff] [blame] | 34 | #define PKT_COUNT_C 0xC000FFFF |
| 35 | #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16) |
| 36 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 37 | struct radeon { |
Marek Olšák | 2ce783d | 2011-08-02 20:25:13 +0200 | [diff] [blame] | 38 | struct radeon_winsys *ws; |
Marek Olšák | ce12f82 | 2011-07-22 19:25:07 +0200 | [diff] [blame] | 39 | struct radeon_info info; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 40 | unsigned family; |
Jerome Glisse | 363dfb8 | 2010-09-20 11:58:00 -0400 | [diff] [blame] | 41 | enum chip_class chip_class; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 42 | struct r600_tiling_info tiling_info; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 43 | }; |
| 44 | |
Dave Airlie | ba78a5a | 2011-06-07 13:21:02 +1000 | [diff] [blame] | 45 | /* these flags are used in register flags and added into block flags */ |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 46 | #define REG_FLAG_NEED_BO 1 |
| 47 | #define REG_FLAG_DIRTY_ALWAYS 2 |
Dave Airlie | ae7abf0 | 2011-05-03 20:45:39 +0200 | [diff] [blame] | 48 | #define REG_FLAG_RV6XX_SBU 4 |
Dave Airlie | 65ee7cd | 2011-05-31 10:52:07 +1000 | [diff] [blame] | 49 | #define REG_FLAG_NOT_R600 8 |
Dave Airlie | 63184bc | 2011-06-03 09:59:12 +1000 | [diff] [blame] | 50 | #define REG_FLAG_ENABLE_ALWAYS 16 |
Dave Airlie | ba78a5a | 2011-06-07 13:21:02 +1000 | [diff] [blame] | 51 | #define BLOCK_FLAG_RESOURCE 32 |
Dave Airlie | 04554c7 | 2011-06-08 14:35:00 +1000 | [diff] [blame] | 52 | #define REG_FLAG_FLUSH_CHANGE 64 |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 53 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 54 | struct r600_reg { |
Jerome Glisse | 5646964 | 2010-09-28 17:37:56 -0400 | [diff] [blame] | 55 | unsigned offset; |
Dave Airlie | c058067 | 2011-04-17 17:35:44 +1000 | [diff] [blame] | 56 | unsigned flags; |
Jerome Glisse | ca35292 | 2010-09-21 20:24:51 -0400 | [diff] [blame] | 57 | unsigned flush_flags; |
Jerome Glisse | 585e409 | 2010-10-05 10:29:30 -0400 | [diff] [blame] | 58 | unsigned flush_mask; |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 59 | }; |
| 60 | |
Dave Airlie | bd5b7a6 | 2011-05-13 10:41:16 +1000 | [diff] [blame] | 61 | #define BO_BOUND_TEXTURE 1 |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 62 | |
Jerome Glisse | 294c9fc | 2010-10-04 10:06:13 -0400 | [diff] [blame] | 63 | struct r600_bo { |
Dave Airlie | 4707ae2 | 2011-06-07 11:03:59 +1000 | [diff] [blame] | 64 | struct pipe_reference reference; /* this must be the first member for the r600_bo_reference inline to work */ |
| 65 | /* DO NOT MOVE THIS ^ */ |
Marek Olšák | c6fec83 | 2011-08-04 06:11:45 +0200 | [diff] [blame] | 66 | struct pb_buffer *buf; |
| 67 | struct radeon_winsys_cs_handle *cs_buf; |
Keith Whitwell | 29c4a15 | 2010-11-02 17:47:06 +0000 | [diff] [blame] | 68 | unsigned domains; |
Marek Olšák | c6fec83 | 2011-08-04 06:11:45 +0200 | [diff] [blame] | 69 | unsigned last_flush; |
| 70 | unsigned binding; |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 71 | }; |
Jerome Glisse | 1235bec | 2010-09-29 15:05:19 -0400 | [diff] [blame] | 72 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 73 | /* |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 74 | * radeon_pciid.c |
| 75 | */ |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 76 | unsigned radeon_family_from_device(unsigned device); |
| 77 | |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 78 | /* |
Jerome Glisse | 15753cf | 2010-12-09 13:07:10 -0500 | [diff] [blame] | 79 | * r600_hw_context.c |
| 80 | */ |
Jerome Glisse | 585e409 | 2010-10-05 10:29:30 -0400 | [diff] [blame] | 81 | void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, |
| 82 | unsigned flush_mask, struct r600_bo *rbo); |
Jerome Glisse | 674452f | 2010-10-04 10:37:32 -0400 | [diff] [blame] | 83 | struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); |
Dave Airlie | d79a4a6 | 2011-05-12 14:07:53 +1000 | [diff] [blame] | 84 | int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg, |
| 85 | unsigned opcode, unsigned offset_base); |
Dave Airlie | f356bb7 | 2011-06-06 18:00:36 +1000 | [diff] [blame] | 86 | void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block); |
Dave Airlie | 5b5a16e | 2011-04-19 10:04:02 +1000 | [diff] [blame] | 87 | void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block); |
Dave Airlie | ba78a5a | 2011-06-07 13:21:02 +1000 | [diff] [blame] | 88 | void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block); |
Dave Airlie | 5b5a16e | 2011-04-19 10:04:02 +1000 | [diff] [blame] | 89 | void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block, |
| 90 | int dirty, int index); |
Dave Airlie | 240049a | 2011-05-12 15:01:33 +1000 | [diff] [blame] | 91 | int r600_setup_block_table(struct r600_context *ctx); |
Dave Airlie | 5b5a16e | 2011-04-19 10:04:02 +1000 | [diff] [blame] | 92 | void r600_context_reg(struct r600_context *ctx, |
| 93 | unsigned offset, unsigned value, |
| 94 | unsigned mask); |
Alex Deucher | b551883 | 2011-05-31 10:43:31 -0400 | [diff] [blame] | 95 | void r600_init_cs(struct r600_context *ctx); |
Dave Airlie | f356bb7 | 2011-06-06 18:00:36 +1000 | [diff] [blame] | 96 | int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base); |
Dave Airlie | 745abb5 | 2011-06-07 15:40:20 +1000 | [diff] [blame] | 97 | |
Marek Olšák | 47dcfb8 | 2011-08-07 21:14:38 +0200 | [diff] [blame^] | 98 | static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct r600_bo *rbo, |
| 99 | enum radeon_bo_usage usage) |
Dave Airlie | 745abb5 | 2011-06-07 15:40:20 +1000 | [diff] [blame] | 100 | { |
Marek Olšák | 47dcfb8 | 2011-08-07 21:14:38 +0200 | [diff] [blame^] | 101 | enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? rbo->domains : 0; |
| 102 | enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? rbo->domains : 0; |
| 103 | |
| 104 | assert(usage); |
| 105 | |
Marek Olšák | c6fec83 | 2011-08-04 06:11:45 +0200 | [diff] [blame] | 106 | unsigned reloc_index = |
| 107 | ctx->radeon->ws->cs_add_reloc(ctx->cs, rbo->cs_buf, |
Marek Olšák | 47dcfb8 | 2011-08-07 21:14:38 +0200 | [diff] [blame^] | 108 | rd, wd); |
Marek Olšák | e6fb625 | 2011-08-04 01:37:33 +0200 | [diff] [blame] | 109 | |
| 110 | if (reloc_index >= ctx->creloc) |
| 111 | ctx->creloc = reloc_index+1; |
Dave Airlie | 745abb5 | 2011-06-07 15:40:20 +1000 | [diff] [blame] | 112 | |
Marek Olšák | 041ed55 | 2011-08-04 06:17:39 +0200 | [diff] [blame] | 113 | r600_bo_reference(&ctx->bo[reloc_index], rbo); |
Marek Olšák | 3e57972 | 2011-08-03 05:15:36 +0200 | [diff] [blame] | 114 | return reloc_index * 4; |
Dave Airlie | 745abb5 | 2011-06-07 15:40:20 +1000 | [diff] [blame] | 115 | } |
| 116 | |
Jerome Glisse | fd266ec | 2010-09-17 10:41:50 -0400 | [diff] [blame] | 117 | #endif |