Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 1 | // Copyright 2014 the V8 project authors. All rights reserved. |
| 2 | // Use of this source code is governed by a BSD-style license that can be |
| 3 | // found in the LICENSE file. |
| 4 | |
| 5 | #ifndef V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
| 6 | #define V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |
| 7 | |
| 8 | namespace v8 { |
| 9 | namespace internal { |
| 10 | namespace compiler { |
| 11 | |
| 12 | // IA32-specific opcodes that specify which assembly sequence to emit. |
| 13 | // Most opcodes specify a single instruction. |
| 14 | #define TARGET_ARCH_OPCODE_LIST(V) \ |
| 15 | V(IA32Add) \ |
| 16 | V(IA32And) \ |
| 17 | V(IA32Cmp) \ |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 18 | V(IA32Cmp16) \ |
| 19 | V(IA32Cmp8) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 20 | V(IA32Test) \ |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 21 | V(IA32Test16) \ |
| 22 | V(IA32Test8) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 23 | V(IA32Or) \ |
| 24 | V(IA32Xor) \ |
| 25 | V(IA32Sub) \ |
| 26 | V(IA32Imul) \ |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 27 | V(IA32ImulHigh) \ |
| 28 | V(IA32UmulHigh) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 29 | V(IA32Idiv) \ |
| 30 | V(IA32Udiv) \ |
| 31 | V(IA32Not) \ |
| 32 | V(IA32Neg) \ |
| 33 | V(IA32Shl) \ |
| 34 | V(IA32Shr) \ |
| 35 | V(IA32Sar) \ |
Ben Murdoch | da12d29 | 2016-06-02 14:46:10 +0100 | [diff] [blame] | 36 | V(IA32AddPair) \ |
| 37 | V(IA32SubPair) \ |
| 38 | V(IA32MulPair) \ |
| 39 | V(IA32ShlPair) \ |
| 40 | V(IA32ShrPair) \ |
| 41 | V(IA32SarPair) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 42 | V(IA32Ror) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 43 | V(IA32Lzcnt) \ |
| 44 | V(IA32Tzcnt) \ |
| 45 | V(IA32Popcnt) \ |
| 46 | V(SSEFloat32Cmp) \ |
| 47 | V(SSEFloat32Add) \ |
| 48 | V(SSEFloat32Sub) \ |
| 49 | V(SSEFloat32Mul) \ |
| 50 | V(SSEFloat32Div) \ |
| 51 | V(SSEFloat32Max) \ |
| 52 | V(SSEFloat32Min) \ |
| 53 | V(SSEFloat32Abs) \ |
| 54 | V(SSEFloat32Neg) \ |
| 55 | V(SSEFloat32Sqrt) \ |
| 56 | V(SSEFloat32Round) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 57 | V(SSEFloat64Cmp) \ |
| 58 | V(SSEFloat64Add) \ |
| 59 | V(SSEFloat64Sub) \ |
| 60 | V(SSEFloat64Mul) \ |
| 61 | V(SSEFloat64Div) \ |
| 62 | V(SSEFloat64Mod) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 63 | V(SSEFloat64Max) \ |
| 64 | V(SSEFloat64Min) \ |
| 65 | V(SSEFloat64Abs) \ |
| 66 | V(SSEFloat64Neg) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 67 | V(SSEFloat64Sqrt) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 68 | V(SSEFloat64Round) \ |
| 69 | V(SSEFloat32ToFloat64) \ |
| 70 | V(SSEFloat64ToFloat32) \ |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 71 | V(SSEFloat32ToInt32) \ |
| 72 | V(SSEFloat32ToUint32) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 73 | V(SSEFloat64ToInt32) \ |
| 74 | V(SSEFloat64ToUint32) \ |
Ben Murdoch | 097c5b2 | 2016-05-18 11:27:45 +0100 | [diff] [blame] | 75 | V(SSEInt32ToFloat32) \ |
| 76 | V(SSEUint32ToFloat32) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 77 | V(SSEInt32ToFloat64) \ |
| 78 | V(SSEUint32ToFloat64) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 79 | V(SSEFloat64ExtractLowWord32) \ |
| 80 | V(SSEFloat64ExtractHighWord32) \ |
| 81 | V(SSEFloat64InsertLowWord32) \ |
| 82 | V(SSEFloat64InsertHighWord32) \ |
| 83 | V(SSEFloat64LoadLowWord32) \ |
Ben Murdoch | 61f157c | 2016-09-16 13:49:30 +0100 | [diff] [blame] | 84 | V(SSEFloat64SilenceNaN) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 85 | V(AVXFloat32Add) \ |
| 86 | V(AVXFloat32Sub) \ |
| 87 | V(AVXFloat32Mul) \ |
| 88 | V(AVXFloat32Div) \ |
| 89 | V(AVXFloat32Max) \ |
| 90 | V(AVXFloat32Min) \ |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 91 | V(AVXFloat64Add) \ |
| 92 | V(AVXFloat64Sub) \ |
| 93 | V(AVXFloat64Mul) \ |
| 94 | V(AVXFloat64Div) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 95 | V(AVXFloat64Max) \ |
| 96 | V(AVXFloat64Min) \ |
| 97 | V(AVXFloat64Abs) \ |
| 98 | V(AVXFloat64Neg) \ |
| 99 | V(AVXFloat32Abs) \ |
| 100 | V(AVXFloat32Neg) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 101 | V(IA32Movsxbl) \ |
| 102 | V(IA32Movzxbl) \ |
| 103 | V(IA32Movb) \ |
| 104 | V(IA32Movsxwl) \ |
| 105 | V(IA32Movzxwl) \ |
| 106 | V(IA32Movw) \ |
| 107 | V(IA32Movl) \ |
| 108 | V(IA32Movss) \ |
| 109 | V(IA32Movsd) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 110 | V(IA32BitcastFI) \ |
| 111 | V(IA32BitcastIF) \ |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 112 | V(IA32Lea) \ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 113 | V(IA32Push) \ |
Ben Murdoch | 4a90d5f | 2016-03-22 12:00:34 +0000 | [diff] [blame] | 114 | V(IA32PushFloat32) \ |
| 115 | V(IA32PushFloat64) \ |
| 116 | V(IA32Poke) \ |
Ben Murdoch | c561043 | 2016-08-08 18:44:38 +0100 | [diff] [blame] | 117 | V(IA32StackCheck) \ |
| 118 | V(IA32Xchgb) \ |
| 119 | V(IA32Xchgw) \ |
| 120 | V(IA32Xchgl) |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 121 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 122 | // Addressing modes represent the "shape" of inputs to an instruction. |
| 123 | // Many instructions support multiple addressing modes. Addressing modes |
| 124 | // are encoded into the InstructionCode of the instruction and tell the |
| 125 | // code generator after register allocation which assembler method to call. |
| 126 | // |
| 127 | // We use the following local notation for addressing modes: |
| 128 | // |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 129 | // M = memory operand |
| 130 | // R = base register |
| 131 | // N = index register * N for N in {1, 2, 4, 8} |
| 132 | // I = immediate displacement (int32_t) |
| 133 | |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 134 | #define TARGET_ADDRESSING_MODE_LIST(V) \ |
Emily Bernier | d0a1eb7 | 2015-03-24 16:35:39 -0400 | [diff] [blame] | 135 | V(MR) /* [%r1 ] */ \ |
| 136 | V(MRI) /* [%r1 + K] */ \ |
| 137 | V(MR1) /* [%r1 + %r2*1 ] */ \ |
| 138 | V(MR2) /* [%r1 + %r2*2 ] */ \ |
| 139 | V(MR4) /* [%r1 + %r2*4 ] */ \ |
| 140 | V(MR8) /* [%r1 + %r2*8 ] */ \ |
| 141 | V(MR1I) /* [%r1 + %r2*1 + K] */ \ |
| 142 | V(MR2I) /* [%r1 + %r2*2 + K] */ \ |
| 143 | V(MR4I) /* [%r1 + %r2*3 + K] */ \ |
| 144 | V(MR8I) /* [%r1 + %r2*4 + K] */ \ |
| 145 | V(M1) /* [ %r2*1 ] */ \ |
| 146 | V(M2) /* [ %r2*2 ] */ \ |
| 147 | V(M4) /* [ %r2*4 ] */ \ |
| 148 | V(M8) /* [ %r2*8 ] */ \ |
| 149 | V(M1I) /* [ %r2*1 + K] */ \ |
| 150 | V(M2I) /* [ %r2*2 + K] */ \ |
| 151 | V(M4I) /* [ %r2*4 + K] */ \ |
| 152 | V(M8I) /* [ %r2*8 + K] */ \ |
| 153 | V(MI) /* [ K] */ |
Ben Murdoch | b8a8cc1 | 2014-11-26 15:28:44 +0000 | [diff] [blame] | 154 | |
| 155 | } // namespace compiler |
| 156 | } // namespace internal |
| 157 | } // namespace v8 |
| 158 | |
| 159 | #endif // V8_COMPILER_IA32_INSTRUCTION_CODES_IA32_H_ |