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Channagoud Kadabif8ad8e72015-01-06 15:10:13 -08001/* Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
Channagoud Kadabied60a8b2014-06-27 15:35:09 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <platform/irqs.h>
32#include <platform/gpio.h>
33#include <reg.h>
34#include <target.h>
35#include <platform.h>
36#include <dload_util.h>
37#include <uart_dm.h>
38#include <mmc.h>
39#include <spmi.h>
40#include <board.h>
41#include <smem.h>
42#include <baseband.h>
Sridhar Parasuramd75ade52015-03-09 15:45:16 -070043#include <regulator.h>
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070044#include <dev/keys.h>
45#include <pm8x41.h>
46#include <crypto5_wrapper.h>
47#include <clock.h>
48#include <partition_parser.h>
49#include <scm.h>
50#include <platform/clock.h>
51#include <platform/gpio.h>
52#include <platform/timer.h>
53#include <stdlib.h>
54#include <ufs.h>
55#include <boot_device.h>
56#include <qmp_phy.h>
Channagoud Kadabi7d308202014-12-22 12:07:04 -080057#include <sdhci_msm.h>
58#include <qusb2_phy.h>
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -080059#include <rpmb.h>
Sridhar Parasuram9f28f672015-03-17 15:40:47 -070060#include <rpm-glink.h>
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -070061#if ENABLE_WBC
62#include <pm_app_smbchg.h>
63#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070064
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080065#define CE_INSTANCE 1
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -070066#define CE_EE 0
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080067#define CE_FIFO_SIZE 64
68#define CE_READ_PIPE 3
69#define CE_WRITE_PIPE 2
70#define CE_READ_PIPE_LOCK_GRP 0
71#define CE_WRITE_PIPE_LOCK_GRP 0
72#define CE_ARRAY_SIZE 20
73
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070074#define PMIC_ARB_CHANNEL_NUM 0
75#define PMIC_ARB_OWNER_ID 0
76
77static void set_sdc_power_ctrl(void);
78static uint32_t mmc_pwrctl_base[] =
79 { MSM_SDC1_BASE, MSM_SDC2_BASE };
80
81static uint32_t mmc_sdhci_base[] =
82 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
83
84static uint32_t mmc_sdc_pwrctl_irq[] =
85 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
86
87struct mmc_device *dev;
88struct ufs_dev ufs_device;
89
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070090void target_early_init(void)
91{
92#if WITH_DEBUG_UART
Channagoud Kadabi35503c42014-11-14 16:22:43 -080093 uart_dm_init(8, 0, BLSP2_UART1_BASE);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070094#endif
95}
96
97/* Return 1 if vol_up pressed */
Amit Blay6a3e88b2015-06-23 22:25:06 +030098int target_volume_up()
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070099{
100 uint8_t status = 0;
101 struct pm8x41_gpio gpio;
102
103 /* Configure the GPIO */
104 gpio.direction = PM_GPIO_DIR_IN;
105 gpio.function = 0;
106 gpio.pull = PM_GPIO_PULL_UP_30;
107 gpio.vin_sel = 2;
108
109 pm8x41_gpio_config(2, &gpio);
110
111 /* Wait for the pmic gpio config to take effect */
112 thread_sleep(1);
113
114 /* Get status of P_GPIO_5 */
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800115 pm8x41_gpio_get(2, &status);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700116
117 return !status; /* active low */
118}
119
120/* Return 1 if vol_down pressed */
121uint32_t target_volume_down()
122{
123 return pm8x41_resin_status();
124}
125
126static void target_keystatus()
127{
128 keys_init();
129
130 if(target_volume_down())
131 keys_post_event(KEY_VOLUMEDOWN, 1);
132
133 if(target_volume_up())
134 keys_post_event(KEY_VOLUMEUP, 1);
135}
136
137void target_uninit(void)
138{
139 if (platform_boot_dev_isemmc())
140 {
141 mmc_put_card_to_sleep(dev);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700142 }
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800143
144 if (is_sec_app_loaded())
145 {
146 if (unload_sec_app() < 0)
147 {
148 dprintf(CRITICAL, "Failed to unload App for rpmb\n");
149 ASSERT(0);
150 }
151 }
152
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700153#if ENABLE_WBC
Channagoud Kadabi22165612015-07-22 14:04:37 -0700154 if (board_hardware_id() == HW_PLATFORM_MTP)
155 pm_appsbl_set_dcin_suspend(1);
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700156#endif
157
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700158
159 if (crypto_initialized())
160 {
161 crypto_eng_cleanup();
162 clock_ce_disable(CE_INSTANCE);
163 }
164
Sridhar Parasuram9f28f672015-03-17 15:40:47 -0700165 /* Tear down glink channels */
166 rpm_glink_uninit();
167
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800168 if (rpmb_uninit() < 0)
169 {
170 dprintf(CRITICAL, "RPMB uninit failed\n");
171 ASSERT(0);
172 }
173
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700174}
175
176static void set_sdc_power_ctrl()
177{
178 /* Drive strength configs for sdc pins */
179 struct tlmm_cfgs sdc1_hdrv_cfg[] =
180 {
181 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
182 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
183 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, SDC1_HDRV_PULL_CTL },
184 };
185
186 /* Pull configs for sdc pins */
187 struct tlmm_cfgs sdc1_pull_cfg[] =
188 {
189 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
190 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
191 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
192 };
193
194 struct tlmm_cfgs sdc1_rclk_cfg[] =
195 {
196 { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, SDC1_HDRV_PULL_CTL },
197 };
198
199 /* Set the drive strength & pull control values */
200 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
201 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
202 tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg));
203}
204
205void target_sdc_init()
206{
207 struct mmc_config_data config = {0};
208
209 /* Set drive strength & pull ctrl values */
210 set_sdc_power_ctrl();
211
212 config.bus_width = DATA_BUS_WIDTH_8BIT;
213 config.max_clk_rate = MMC_CLK_192MHZ;
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800214 config.hs400_support = 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700215
216 /* Try slot 1*/
217 config.slot = 1;
218 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
219 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
220 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
221
222 if (!(dev = mmc_init(&config)))
223 {
224 /* Try slot 2 */
225 config.slot = 2;
226 config.max_clk_rate = MMC_CLK_200MHZ;
227 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
228 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
229 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
230
231 if (!(dev = mmc_init(&config)))
232 {
233 dprintf(CRITICAL, "mmc init failed!");
234 ASSERT(0);
235 }
236 }
237}
238
239void *target_mmc_device()
240{
241 if (platform_boot_dev_isemmc())
242 return (void *) dev;
243 else
244 return (void *) &ufs_device;
245}
246
247void target_init(void)
248{
249 dprintf(INFO, "target_init()\n");
250
Sridhar Parasuram1d224322015-06-15 11:03:40 -0700251 pmic_info_populate();
252
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700253 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
254
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700255 /* Initialize Glink */
256 rpm_glink_init();
257
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700258 target_keystatus();
259
260 if (target_use_signed_kernel())
261 target_crypto_init_params();
262
263 platform_read_boot_config();
264
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800265#ifdef MMC_SDHCI_SUPPORT
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700266 if (platform_boot_dev_isemmc())
267 {
268 target_sdc_init();
269 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800270#endif
271#ifdef UFS_SUPPORT
272 if (!platform_boot_dev_isemmc())
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700273 {
274 ufs_device.base = UFS_BASE;
275 ufs_init(&ufs_device);
276 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800277#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700278
279 /* Storage initialization is complete, read the partition table info */
Channagoud Kadabi58a273b2015-02-10 12:56:22 -0800280 mmc_read_partition_table(0);
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800281
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700282#if ENABLE_WBC
283 /* Look for battery voltage and make sure we have enough to bootup
284 * Otherwise initiate battery charging
285 * Charging should happen as early as possible, any other driver
286 * initialization before this should consider the power impact
287 */
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700288 switch(board_hardware_id())
289 {
290 case HW_PLATFORM_MTP:
291 case HW_PLATFORM_FLUID:
292 pm_appsbl_chg_check_weak_battery_status(1);
293 break;
294 default:
295 /* Charging not supported */
296 break;
297 };
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700298#endif
299
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800300 if (rpmb_init() < 0)
301 {
302 dprintf(CRITICAL, "RPMB init failed\n");
303 ASSERT(0);
304 }
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700305}
306
307unsigned board_machtype(void)
308{
309 return LINUX_MACHTYPE_UNKNOWN;
310}
311
312/* Detect the target type */
313void target_detect(struct board_data *board)
314{
315 /* This is filled from board.c */
316}
317
Dhaval Patelb95039c2015-03-16 11:14:06 -0700318static uint8_t splash_override;
319/* Returns 1 if target supports continuous splash screen. */
320int target_cont_splash_screen()
321{
322 uint8_t splash_screen = 0;
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700323 if(!splash_override && !pm_appsbl_charging_in_progress()) {
Dhaval Patelb95039c2015-03-16 11:14:06 -0700324 switch(board_hardware_id())
325 {
326 case HW_PLATFORM_SURF:
327 case HW_PLATFORM_MTP:
328 case HW_PLATFORM_FLUID:
329 dprintf(SPEW, "Target_cont_splash=1\n");
330 splash_screen = 1;
331 break;
332 default:
333 dprintf(SPEW, "Target_cont_splash=0\n");
334 splash_screen = 0;
335 }
336 }
337 return splash_screen;
338}
339
340void target_force_cont_splash_disable(uint8_t override)
341{
342 splash_override = override;
343}
344
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700345/* Detect the modem type */
346void target_baseband_detect(struct board_data *board)
347{
348 uint32_t platform;
349
350 platform = board->platform;
351
352 switch(platform) {
Channagoud Kadabi439df822015-05-26 11:14:16 -0700353 case APQ8096:
354 board->baseband = BASEBAND_APQ;
355 break;
Channagoud Kadabi4a4c05e2015-03-30 15:18:58 -0700356 case MSM8996:
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800357 if (board->platform_version == 0x10000)
358 board->baseband = BASEBAND_APQ;
359 else
360 board->baseband = BASEBAND_MSM;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700361 break;
362 default:
363 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
364 ASSERT(0);
365 };
366}
367unsigned target_baseband()
368{
369 return board_baseband();
370}
371
372void target_serialno(unsigned char *buf)
373{
374 unsigned int serialno;
375 if (target_is_emmc_boot()) {
376 serialno = mmc_get_psn();
377 snprintf((char *)buf, 13, "%x", serialno);
378 }
379}
380
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700381int emmc_recovery_init(void)
382{
383 return _emmc_recovery_init();
384}
385
386void target_usb_phy_reset()
387{
388 usb30_qmp_phy_reset();
389 qusb2_phy_reset();
390}
391
392target_usb_iface_t* target_usb30_init()
393{
394 target_usb_iface_t *t_usb_iface;
395
396 t_usb_iface = calloc(1, sizeof(target_usb_iface_t));
397 ASSERT(t_usb_iface);
398
399 t_usb_iface->phy_init = usb30_qmp_phy_init;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700400 t_usb_iface->phy_reset = target_usb_phy_reset;
401 t_usb_iface->clock_init = clock_usb30_init;
402 t_usb_iface->vbus_override = 1;
403
404 return t_usb_iface;
405}
406
407/* identify the usb controller to be used for the target */
408const char * target_usb_controller()
409{
410 return "dwc";
411}
412
413uint32_t target_override_pll()
414{
Channagoud Kadabi1e5144b2015-04-28 17:15:05 -0700415 if (board_soc_version() >= 0x20000)
416 return 0;
417 else
418 return 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700419}
420
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800421crypto_engine_type board_ce_type(void)
422{
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700423 return CRYPTO_ENGINE_TYPE_HW;
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800424}
425
426/* Set up params for h/w CE. */
427void target_crypto_init_params()
428{
429 struct crypto_init_params ce_params;
430
431 /* Set up base addresses and instance. */
432 ce_params.crypto_instance = CE_INSTANCE;
433 ce_params.crypto_base = MSM_CE_BASE;
434 ce_params.bam_base = MSM_CE_BAM_BASE;
435
436 /* Set up BAM config. */
437 ce_params.bam_ee = CE_EE;
438 ce_params.pipes.read_pipe = CE_READ_PIPE;
439 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
440 ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
441 ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
442
443 /* Assign buffer sizes. */
444 ce_params.num_ce = CE_ARRAY_SIZE;
445 ce_params.read_fifo_size = CE_FIFO_SIZE;
446 ce_params.write_fifo_size = CE_FIFO_SIZE;
447
448 /* BAM is initialized by TZ for this platform.
449 * Do not do it again as the initialization address space
450 * is locked.
451 */
452 ce_params.do_bam_init = 0;
453
454 crypto_init_params(&ce_params);
455}
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700456
457unsigned target_pause_for_battery_charge(void)
458{
459 uint8_t pon_reason = pm8x41_get_pon_reason();
460 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
461 dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__,
462 pon_reason, is_cold_boot);
463 /* In case of fastboot reboot,adb reboot or if we see the power key
464 * pressed we do not want go into charger mode.
465 * fastboot reboot is warm boot with PON hard reset bit not set
466 * adb reboot is a cold boot with PON hard reset bit set
467 */
468 if (is_cold_boot &&
469 (!(pon_reason & HARD_RST)) &&
470 (!(pon_reason & KPDPWR_N)) &&
471 ((pon_reason & PON1)))
472 return 1;
473 else
474 return 0;
475}
Channagoud Kadabi23edc0c2015-03-27 18:31:32 -0700476
477int set_download_mode(enum dload_mode mode)
478{
479 int ret = 0;
480 ret = scm_dload_mode(mode);
481
482 return ret;
483}
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700484
Channagoud Kadabi65b518d2015-08-05 16:17:14 -0700485void pmic_reset_configure(uint8_t reset_type)
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700486{
Channagoud Kadabi65b518d2015-08-05 16:17:14 -0700487 pm8994_reset_configure(reset_type);
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700488}