Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
| 31 | #include <reg.h> |
| 32 | #include <target.h> |
| 33 | #include <platform.h> |
| 34 | #include <uart_dm.h> |
| 35 | #include <mmc.h> |
| 36 | #include <platform/gpio.h> |
| 37 | #include <dev/keys.h> |
| 38 | #include <spmi_v2.h> |
| 39 | #include <pm8x41.h> |
Aparna Mallavarapu | bc6315e | 2015-04-11 04:00:43 +0530 | [diff] [blame] | 40 | #include <pm8x41_hw.h> |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 41 | #include <board.h> |
| 42 | #include <baseband.h> |
| 43 | #include <hsusb.h> |
| 44 | #include <scm.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/gpio.h> |
| 47 | #include <platform/irqs.h> |
| 48 | #include <platform/clock.h> |
Aparna Mallavarapu | bc6315e | 2015-04-11 04:00:43 +0530 | [diff] [blame] | 49 | #include <platform/timer.h> |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 50 | #include <crypto5_wrapper.h> |
| 51 | #include <partition_parser.h> |
| 52 | #include <stdlib.h> |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 53 | #include <rpm-smd.h> |
Aparna Mallavarapu | bc6315e | 2015-04-11 04:00:43 +0530 | [diff] [blame] | 54 | #include <spmi.h> |
| 55 | #include <sdhci_msm.h> |
| 56 | #include <clock.h> |
Parth Dixit | 6e6bad5 | 2015-07-30 19:02:38 +0530 | [diff] [blame] | 57 | #include <boot_device.h> |
| 58 | #include <secapp_loader.h> |
| 59 | #include <rpmb.h> |
lijuang | 3606df8 | 2015-09-02 21:14:43 +0800 | [diff] [blame] | 60 | #include <smem.h> |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 61 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 62 | #include "target/display.h" |
| 63 | |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 64 | #if LONG_PRESS_POWER_ON |
| 65 | #include <shutdown_detect.h> |
| 66 | #endif |
| 67 | |
Matthew Qin | 47dfdb7 | 2015-06-10 21:29:11 +0800 | [diff] [blame] | 68 | #if PON_VIB_SUPPORT |
| 69 | #include <vibrator.h> |
| 70 | #endif |
| 71 | |
| 72 | #if PON_VIB_SUPPORT |
| 73 | #define VIBRATE_TIME 250 |
| 74 | #endif |
| 75 | |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 76 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 77 | #define PMIC_ARB_OWNER_ID 0 |
| 78 | #define TLMM_VOL_UP_BTN_GPIO 85 |
Unnati Gandhi | fe004a9 | 2015-06-01 13:06:06 +0530 | [diff] [blame] | 79 | #define TLMM_VOL_UP_BTN_GPIO_8956 113 |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 80 | |
| 81 | #define FASTBOOT_MODE 0x77665500 |
Aparna Mallavarapu | 680a133 | 2015-04-29 19:14:09 +0530 | [diff] [blame] | 82 | #define RECOVERY_MODE 0x77665502 |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 83 | #define PON_SOFT_RB_SPARE 0x88F |
| 84 | |
Aparna Mallavarapu | 1e8b093 | 2015-03-29 23:38:13 +0530 | [diff] [blame] | 85 | #define CE1_INSTANCE 1 |
| 86 | #define CE_EE 1 |
| 87 | #define CE_FIFO_SIZE 64 |
| 88 | #define CE_READ_PIPE 3 |
| 89 | #define CE_WRITE_PIPE 2 |
| 90 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 91 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
| 92 | #define CE_ARRAY_SIZE 20 |
| 93 | |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 94 | struct mmc_device *dev; |
| 95 | |
| 96 | static uint32_t mmc_pwrctl_base[] = |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 97 | { MSM_SDC1_BASE, MSM_SDC2_BASE }; |
| 98 | |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 99 | static uint32_t mmc_sdhci_base[] = |
| 100 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE }; |
| 101 | |
| 102 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 103 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ }; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 104 | |
| 105 | void target_early_init(void) |
| 106 | { |
| 107 | #if WITH_DEBUG_UART |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 108 | uart_dm_init(2, 0, BLSP1_UART1_BASE); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 109 | #endif |
| 110 | } |
| 111 | |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 112 | static void set_sdc_power_ctrl() |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 113 | { |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 114 | /* Drive strength configs for sdc pins */ |
| 115 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 116 | { |
| 117 | { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0}, |
| 118 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0}, |
| 119 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0}, |
| 120 | }; |
| 121 | |
| 122 | /* Pull configs for sdc pins */ |
| 123 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 124 | { |
| 125 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, 0}, |
| 126 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
| 127 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
| 128 | }; |
| 129 | |
Aparna Mallavarapu | 2913891 | 2015-04-13 23:45:35 +0530 | [diff] [blame] | 130 | struct tlmm_cfgs sdc1_rclk_cfg[] = |
| 131 | { |
| 132 | { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, 0}, |
| 133 | }; |
| 134 | |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 135 | /* Set the drive strength & pull control values */ |
| 136 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 137 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
Aparna Mallavarapu | 2913891 | 2015-04-13 23:45:35 +0530 | [diff] [blame] | 138 | tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg)); |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 139 | } |
| 140 | |
| 141 | void target_sdc_init() |
| 142 | { |
| 143 | struct mmc_config_data config; |
| 144 | |
| 145 | /* Set drive strength & pull ctrl values */ |
| 146 | set_sdc_power_ctrl(); |
| 147 | |
| 148 | /* Try slot 1*/ |
| 149 | config.slot = 1; |
| 150 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Aparna Mallavarapu | 680a133 | 2015-04-29 19:14:09 +0530 | [diff] [blame] | 151 | config.max_clk_rate = MMC_CLK_192MHZ; |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 152 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 153 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 154 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 155 | config.hs400_support = 1; |
| 156 | |
| 157 | if (!(dev = mmc_init(&config))) { |
| 158 | /* Try slot 2 */ |
| 159 | config.slot = 2; |
| 160 | config.max_clk_rate = MMC_CLK_200MHZ; |
| 161 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 162 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 163 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 164 | config.hs400_support = 0; |
| 165 | |
| 166 | if (!(dev = mmc_init(&config))) { |
| 167 | dprintf(CRITICAL, "mmc init failed!"); |
| 168 | ASSERT(0); |
| 169 | } |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | void *target_mmc_device() |
| 174 | { |
| 175 | return (void *) dev; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 176 | } |
| 177 | |
| 178 | /* Return 1 if vol_up pressed */ |
Rami Butstein | e51318a | 2015-05-27 16:23:17 +0300 | [diff] [blame] | 179 | int target_volume_up() |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 180 | { |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 181 | static uint8_t first_time = 0; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 182 | uint8_t status = 0; |
Unnati Gandhi | e3a5c0e | 2015-06-14 17:31:07 +0530 | [diff] [blame] | 183 | uint32_t vol_up_gpio; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 184 | |
Unnati Gandhi | fe004a9 | 2015-06-01 13:06:06 +0530 | [diff] [blame] | 185 | if(platform_is_msm8956()) |
Unnati Gandhi | e3a5c0e | 2015-06-14 17:31:07 +0530 | [diff] [blame] | 186 | vol_up_gpio = TLMM_VOL_UP_BTN_GPIO_8956; |
| 187 | |
Unnati Gandhi | fe004a9 | 2015-06-01 13:06:06 +0530 | [diff] [blame] | 188 | else |
Unnati Gandhi | e3a5c0e | 2015-06-14 17:31:07 +0530 | [diff] [blame] | 189 | vol_up_gpio = TLMM_VOL_UP_BTN_GPIO; |
| 190 | |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 191 | if (!first_time) { |
| 192 | gpio_tlmm_config(vol_up_gpio, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 193 | |
lijuang | 2d2b8a0 | 2015-06-05 21:34:15 +0800 | [diff] [blame] | 194 | /* Wait for the gpio config to take effect - debounce time */ |
| 195 | udelay(10000); |
| 196 | |
| 197 | first_time = 1; |
| 198 | } |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 199 | |
| 200 | /* Get status of GPIO */ |
Unnati Gandhi | e3a5c0e | 2015-06-14 17:31:07 +0530 | [diff] [blame] | 201 | status = gpio_status(vol_up_gpio); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 202 | |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 203 | /* Active low signal. */ |
Aparna Mallavarapu | db938b6 | 2015-04-09 01:00:55 +0530 | [diff] [blame] | 204 | return !status; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | /* Return 1 if vol_down pressed */ |
| 208 | uint32_t target_volume_down() |
| 209 | { |
| 210 | /* Volume down button tied in with PMIC RESIN. */ |
| 211 | return pm8x41_resin_status(); |
| 212 | } |
| 213 | |
Parth Dixit | 300a3b9 | 2015-06-19 16:38:12 +0530 | [diff] [blame] | 214 | uint32_t target_is_pwrkey_pon_reason() |
| 215 | { |
| 216 | uint8_t pon_reason = pm8950_get_pon_reason(); |
| 217 | if (pm8x41_get_is_cold_boot() && ((pon_reason == KPDPWR_N) || (pon_reason == (KPDPWR_N|PON1)))) |
| 218 | return 1; |
| 219 | else |
| 220 | return 0; |
| 221 | } |
| 222 | |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 223 | static void target_keystatus() |
| 224 | { |
| 225 | keys_init(); |
| 226 | |
| 227 | if(target_volume_down()) |
| 228 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 229 | |
| 230 | if(target_volume_up()) |
| 231 | keys_post_event(KEY_VOLUMEUP, 1); |
| 232 | } |
| 233 | |
| 234 | /* Configure PMIC and Drop PS_HOLD for shutdown */ |
| 235 | void shutdown_device() |
| 236 | { |
| 237 | dprintf(CRITICAL, "Going down for shutdown.\n"); |
| 238 | |
| 239 | /* Configure PMIC for shutdown */ |
| 240 | pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 241 | |
| 242 | /* Drop PS_HOLD for MSM */ |
| 243 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 244 | |
| 245 | mdelay(5000); |
| 246 | |
| 247 | dprintf(CRITICAL, "shutdown failed\n"); |
| 248 | |
| 249 | ASSERT(0); |
| 250 | } |
| 251 | |
| 252 | |
| 253 | void target_init(void) |
| 254 | { |
Parth Dixit | 6e6bad5 | 2015-07-30 19:02:38 +0530 | [diff] [blame] | 255 | int ret = 0; |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 256 | dprintf(INFO, "target_init()\n"); |
| 257 | |
| 258 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
| 259 | |
| 260 | target_keystatus(); |
| 261 | |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 262 | target_sdc_init(); |
| 263 | if (partition_read_table()) |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 264 | { |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 265 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 266 | ASSERT(0); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 267 | } |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 268 | |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 269 | #if LONG_PRESS_POWER_ON |
| 270 | shutdown_detect(); |
| 271 | #endif |
Matthew Qin | 47dfdb7 | 2015-06-10 21:29:11 +0800 | [diff] [blame] | 272 | |
| 273 | #if PON_VIB_SUPPORT |
| 274 | /* turn on vibrator to indicate that phone is booting up to end user */ |
| 275 | vib_timed_turn_on(VIBRATE_TIME); |
| 276 | #endif |
| 277 | |
Aparna Mallavarapu | 1e8b093 | 2015-03-29 23:38:13 +0530 | [diff] [blame] | 278 | if (target_use_signed_kernel()) |
| 279 | target_crypto_init_params(); |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 280 | |
Parth Dixit | 0eb7369 | 2015-08-09 17:32:27 +0530 | [diff] [blame] | 281 | clock_ce_enable(CE1_INSTANCE); |
| 282 | |
Parth Dixit | 6e6bad5 | 2015-07-30 19:02:38 +0530 | [diff] [blame] | 283 | /* Initialize Qseecom */ |
| 284 | ret = qseecom_init(); |
| 285 | |
| 286 | if (ret < 0) |
| 287 | { |
| 288 | dprintf(CRITICAL, "Failed to initialize qseecom, error: %d\n", ret); |
| 289 | ASSERT(0); |
| 290 | } |
| 291 | |
| 292 | /* Start Qseecom */ |
| 293 | ret = qseecom_tz_init(); |
| 294 | |
| 295 | if (ret < 0) |
| 296 | { |
| 297 | dprintf(CRITICAL, "Failed to start qseecom, error: %d\n", ret); |
| 298 | ASSERT(0); |
| 299 | } |
| 300 | |
Parth Dixit | b4b2ffa | 2015-10-09 15:31:14 +0530 | [diff] [blame] | 301 | if (rpmb_init() < 0) |
| 302 | { |
| 303 | dprintf(CRITICAL, "RPMB init failed\n"); |
| 304 | ASSERT(0); |
| 305 | } |
| 306 | |
Parth Dixit | 6e6bad5 | 2015-07-30 19:02:38 +0530 | [diff] [blame] | 307 | /* |
| 308 | * Load the sec app for first time |
| 309 | */ |
| 310 | if (load_sec_app() < 0) |
| 311 | { |
| 312 | dprintf(CRITICAL, "Failed to load App for verified\n"); |
| 313 | ASSERT(0); |
| 314 | } |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 315 | #if SMD_SUPPORT |
| 316 | rpm_smd_init(); |
| 317 | #endif |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 318 | } |
| 319 | |
| 320 | void target_serialno(unsigned char *buf) |
| 321 | { |
| 322 | uint32_t serialno; |
| 323 | if (target_is_emmc_boot()) { |
| 324 | serialno = mmc_get_psn(); |
| 325 | snprintf((char *)buf, 13, "%x", serialno); |
| 326 | } |
| 327 | } |
| 328 | |
| 329 | unsigned board_machtype(void) |
| 330 | { |
Aparna Mallavarapu | e9bdacd | 2015-03-15 14:24:21 +0530 | [diff] [blame] | 331 | return LINUX_MACHTYPE_UNKNOWN; |
| 332 | } |
| 333 | |
| 334 | /* Detect the target type */ |
| 335 | void target_detect(struct board_data *board) |
| 336 | { |
| 337 | /* This is already filled as part of board.c */ |
| 338 | } |
| 339 | |
| 340 | /* Detect the modem type */ |
| 341 | void target_baseband_detect(struct board_data *board) |
| 342 | { |
| 343 | uint32_t platform; |
| 344 | |
| 345 | platform = board->platform; |
| 346 | |
| 347 | switch(platform) { |
| 348 | case MSM8952: |
| 349 | case MSM8956: |
| 350 | case MSM8976: |
Parth Dixit | 4ec3fe2 | 2015-10-30 00:44:33 +0530 | [diff] [blame] | 351 | case MSM8937: |
Aparna Mallavarapu | e9bdacd | 2015-03-15 14:24:21 +0530 | [diff] [blame] | 352 | board->baseband = BASEBAND_MSM; |
| 353 | break; |
Aparna Mallavarapu | 815b324 | 2015-04-29 11:08:14 +0530 | [diff] [blame] | 354 | case APQ8052: |
| 355 | case APQ8056: |
| 356 | case APQ8076: |
Parth Dixit | 4ec3fe2 | 2015-10-30 00:44:33 +0530 | [diff] [blame] | 357 | case APQ8037: |
Aparna Mallavarapu | 815b324 | 2015-04-29 11:08:14 +0530 | [diff] [blame] | 358 | board->baseband = BASEBAND_APQ; |
| 359 | break; |
Aparna Mallavarapu | e9bdacd | 2015-03-15 14:24:21 +0530 | [diff] [blame] | 360 | default: |
| 361 | dprintf(CRITICAL, "Platform type: %u is not supported\n",platform); |
| 362 | ASSERT(0); |
| 363 | }; |
| 364 | } |
| 365 | |
| 366 | unsigned target_baseband() |
| 367 | { |
| 368 | return board_baseband(); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 369 | } |
| 370 | |
| 371 | unsigned check_reboot_mode(void) |
| 372 | { |
| 373 | uint32_t restart_reason = 0; |
| 374 | |
| 375 | /* Read reboot reason and scrub it */ |
| 376 | restart_reason = readl(RESTART_REASON_ADDR); |
| 377 | writel(0x00, RESTART_REASON_ADDR); |
| 378 | |
| 379 | return restart_reason; |
| 380 | } |
| 381 | |
| 382 | unsigned check_hard_reboot_mode(void) |
| 383 | { |
| 384 | uint8_t hard_restart_reason = 0; |
| 385 | uint8_t value = 0; |
| 386 | |
| 387 | /* Read reboot reason and scrub it |
| 388 | * Bit-5, bit-6 and bit-7 of SOFT_RB_SPARE for hard reset reason |
| 389 | */ |
| 390 | value = pm8x41_reg_read(PON_SOFT_RB_SPARE); |
| 391 | hard_restart_reason = value >> 5; |
| 392 | pm8x41_reg_write(PON_SOFT_RB_SPARE, value & 0x1f); |
| 393 | |
| 394 | return hard_restart_reason; |
| 395 | } |
| 396 | |
| 397 | int set_download_mode(enum dload_mode mode) |
| 398 | { |
| 399 | int ret = 0; |
| 400 | ret = scm_dload_mode(mode); |
| 401 | |
| 402 | pm8x41_clear_pmic_watchdog(); |
| 403 | |
| 404 | return ret; |
| 405 | } |
| 406 | |
| 407 | int emmc_recovery_init(void) |
| 408 | { |
| 409 | return _emmc_recovery_init(); |
| 410 | } |
| 411 | |
| 412 | void reboot_device(unsigned reboot_reason) |
| 413 | { |
| 414 | uint8_t reset_type = 0; |
| 415 | uint32_t ret = 0; |
| 416 | |
| 417 | /* Need to clear the SW_RESET_ENTRY register and |
| 418 | * write to the BOOT_MISC_REG for known reset cases |
| 419 | */ |
| 420 | if(reboot_reason != DLOAD) |
| 421 | scm_dload_mode(NORMAL_MODE); |
| 422 | |
| 423 | writel(reboot_reason, RESTART_REASON_ADDR); |
| 424 | |
| 425 | /* For Reboot-bootloader and Dload cases do a warm reset |
| 426 | * For Reboot cases do a hard reset |
| 427 | */ |
Aparna Mallavarapu | 680a133 | 2015-04-29 19:14:09 +0530 | [diff] [blame] | 428 | if((reboot_reason == FASTBOOT_MODE) || (reboot_reason == DLOAD) || (reboot_reason == RECOVERY_MODE)) |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 429 | reset_type = PON_PSHOLD_WARM_RESET; |
| 430 | else |
| 431 | reset_type = PON_PSHOLD_HARD_RESET; |
| 432 | |
Parth Dixit | be10796 | 2015-10-16 14:33:20 +0530 | [diff] [blame] | 433 | pm8994_reset_configure(reset_type); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 434 | |
| 435 | ret = scm_halt_pmic_arbiter(); |
| 436 | if (ret) |
| 437 | dprintf(CRITICAL , "Failed to halt pmic arbiter: %d\n", ret); |
| 438 | |
| 439 | /* Drop PS_HOLD for MSM */ |
| 440 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 441 | |
| 442 | mdelay(5000); |
| 443 | |
| 444 | dprintf(CRITICAL, "Rebooting failed\n"); |
| 445 | } |
| 446 | |
| 447 | #if USER_FORCE_RESET_SUPPORT |
| 448 | /* Return 1 if it is a force resin triggered by user. */ |
| 449 | uint32_t is_user_force_reset(void) |
| 450 | { |
| 451 | uint8_t poff_reason1 = pm8x41_get_pon_poff_reason1(); |
| 452 | uint8_t poff_reason2 = pm8x41_get_pon_poff_reason2(); |
| 453 | |
| 454 | dprintf(SPEW, "poff_reason1: %d\n", poff_reason1); |
| 455 | dprintf(SPEW, "poff_reason2: %d\n", poff_reason2); |
| 456 | if (pm8x41_get_is_cold_boot() && (poff_reason1 == KPDPWR_AND_RESIN || |
| 457 | poff_reason2 == STAGE3)) |
| 458 | return 1; |
| 459 | else |
| 460 | return 0; |
| 461 | } |
| 462 | #endif |
| 463 | |
Zhenhua Huang | b46b9b5 | 2015-04-21 19:53:09 +0800 | [diff] [blame] | 464 | #define SMBCHG_USB_RT_STS 0x21310 |
| 465 | #define USBIN_UV_RT_STS BIT(0) |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 466 | unsigned target_pause_for_battery_charge(void) |
| 467 | { |
| 468 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 469 | uint8_t is_cold_boot = pm8x41_get_is_cold_boot(); |
Zhenhua Huang | b46b9b5 | 2015-04-21 19:53:09 +0800 | [diff] [blame] | 470 | bool usb_present_sts = !(USBIN_UV_RT_STS & |
| 471 | pm8x41_reg_read(SMBCHG_USB_RT_STS)); |
| 472 | dprintf(INFO, "%s : pon_reason is:0x%x cold_boot:%d usb_sts:%d\n", __func__, |
| 473 | pon_reason, is_cold_boot, usb_present_sts); |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 474 | /* In case of fastboot reboot,adb reboot or if we see the power key |
| 475 | * pressed we do not want go into charger mode. |
| 476 | * fastboot reboot is warm boot with PON hard reset bit not set |
| 477 | * adb reboot is a cold boot with PON hard reset bit set |
| 478 | */ |
| 479 | if (is_cold_boot && |
| 480 | (!(pon_reason & HARD_RST)) && |
| 481 | (!(pon_reason & KPDPWR_N)) && |
Zhenhua Huang | b46b9b5 | 2015-04-21 19:53:09 +0800 | [diff] [blame] | 482 | usb_present_sts) |
Aparna Mallavarapu | ca67688 | 2015-01-19 20:39:06 +0530 | [diff] [blame] | 483 | return 1; |
| 484 | else |
| 485 | return 0; |
| 486 | } |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 487 | |
| 488 | void target_uninit(void) |
| 489 | { |
| 490 | mmc_put_card_to_sleep(dev); |
| 491 | sdhci_mode_disable(&dev->host); |
Aparna Mallavarapu | 1e8b093 | 2015-03-29 23:38:13 +0530 | [diff] [blame] | 492 | if (crypto_initialized()) |
| 493 | crypto_eng_cleanup(); |
| 494 | |
| 495 | if (target_is_ssd_enabled()) |
| 496 | clock_ce_disable(CE1_INSTANCE); |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 497 | |
Parth Dixit | 6e6bad5 | 2015-07-30 19:02:38 +0530 | [diff] [blame] | 498 | |
| 499 | if (is_sec_app_loaded()) |
| 500 | { |
| 501 | if (send_milestone_call_to_tz() < 0) |
| 502 | { |
| 503 | dprintf(CRITICAL, "Failed to unload App for rpmb\n"); |
| 504 | ASSERT(0); |
| 505 | } |
| 506 | } |
| 507 | |
| 508 | if (rpmb_uninit() < 0) |
| 509 | { |
| 510 | dprintf(CRITICAL, "RPMB uninit failed\n"); |
| 511 | ASSERT(0); |
| 512 | } |
| 513 | |
Parth Dixit | 0eb7369 | 2015-08-09 17:32:27 +0530 | [diff] [blame] | 514 | clock_ce_disable(CE1_INSTANCE); |
Aparna Mallavarapu | fa5f8a7 | 2015-03-31 06:21:36 +0530 | [diff] [blame] | 515 | #if SMD_SUPPORT |
| 516 | rpm_smd_uninit(); |
| 517 | #endif |
Aparna Mallavarapu | 7b638e6 | 2015-03-26 05:51:57 +0530 | [diff] [blame] | 518 | } |
| 519 | |
| 520 | void target_usb_init(void) |
| 521 | { |
| 522 | uint32_t val; |
| 523 | |
| 524 | /* Select and enable external configuration with USB PHY */ |
| 525 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 526 | |
| 527 | /* Enable sess_vld */ |
| 528 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 529 | writel(val, USB_GENCONFIG_2); |
| 530 | |
| 531 | /* Enable external vbus configuration in the LINK */ |
| 532 | val = readl(USB_USBCMD); |
| 533 | val |= SESS_VLD_CTRL; |
| 534 | writel(val, USB_USBCMD); |
| 535 | } |
| 536 | |
| 537 | void target_usb_stop(void) |
| 538 | { |
| 539 | /* Disable VBUS mimicing in the controller. */ |
| 540 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 541 | } |
Aparna Mallavarapu | 1e8b093 | 2015-03-29 23:38:13 +0530 | [diff] [blame] | 542 | |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 543 | static uint8_t splash_override; |
| 544 | /* Returns 1 if target supports continuous splash screen. */ |
| 545 | int target_cont_splash_screen() |
| 546 | { |
| 547 | uint8_t splash_screen = 0; |
| 548 | if (!splash_override) { |
| 549 | switch (board_hardware_id()) { |
| 550 | case HW_PLATFORM_MTP: |
| 551 | case HW_PLATFORM_SURF: |
Vishnuvardhan Prodduturi | e116c00 | 2015-07-14 17:14:25 +0530 | [diff] [blame] | 552 | case HW_PLATFORM_RCM: |
feifanz | 174c82c | 2015-04-15 18:57:07 +0800 | [diff] [blame] | 553 | case HW_PLATFORM_QRD: |
Padmanabhan Komanduru | 9d49f89 | 2015-04-10 12:58:46 -0700 | [diff] [blame] | 554 | splash_screen = 1; |
| 555 | break; |
| 556 | default: |
| 557 | splash_screen = 0; |
| 558 | break; |
| 559 | } |
| 560 | dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen); |
| 561 | } |
| 562 | return splash_screen; |
| 563 | } |
| 564 | |
| 565 | void target_force_cont_splash_disable(uint8_t override) |
| 566 | { |
| 567 | splash_override = override; |
| 568 | } |
| 569 | |
Ray Zhang | f95f5b9 | 2015-06-25 15:34:29 +0800 | [diff] [blame] | 570 | uint8_t target_panel_auto_detect_enabled() |
| 571 | { |
| 572 | uint8_t ret = 0; |
| 573 | |
| 574 | switch(board_hardware_id()) |
| 575 | { |
| 576 | case HW_PLATFORM_QRD: |
| 577 | ret = platform_is_msm8956() ? 1 : 0; |
| 578 | break; |
| 579 | case HW_PLATFORM_SURF: |
| 580 | case HW_PLATFORM_MTP: |
| 581 | default: |
| 582 | ret = 0; |
| 583 | } |
| 584 | return ret; |
| 585 | } |
| 586 | |
Aparna Mallavarapu | 1e8b093 | 2015-03-29 23:38:13 +0530 | [diff] [blame] | 587 | /* Do any target specific intialization needed before entering fastboot mode */ |
| 588 | void target_fastboot_init(void) |
| 589 | { |
| 590 | if (target_is_ssd_enabled()) { |
| 591 | clock_ce_enable(CE1_INSTANCE); |
| 592 | target_load_ssd_keystore(); |
| 593 | } |
| 594 | } |
| 595 | |
| 596 | void target_load_ssd_keystore(void) |
| 597 | { |
| 598 | uint64_t ptn; |
| 599 | int index; |
| 600 | uint64_t size; |
| 601 | uint32_t *buffer = NULL; |
| 602 | |
| 603 | if (!target_is_ssd_enabled()) |
| 604 | return; |
| 605 | |
| 606 | index = partition_get_index("ssd"); |
| 607 | |
| 608 | ptn = partition_get_offset(index); |
| 609 | if (ptn == 0){ |
| 610 | dprintf(CRITICAL, "Error: ssd partition not found\n"); |
| 611 | return; |
| 612 | } |
| 613 | |
| 614 | size = partition_get_size(index); |
| 615 | if (size == 0) { |
| 616 | dprintf(CRITICAL, "Error: invalid ssd partition size\n"); |
| 617 | return; |
| 618 | } |
| 619 | |
| 620 | buffer = memalign(CACHE_LINE, ROUNDUP(size, CACHE_LINE)); |
| 621 | if (!buffer) { |
| 622 | dprintf(CRITICAL, "Error: allocating memory for ssd buffer\n"); |
| 623 | return; |
| 624 | } |
| 625 | |
| 626 | if (mmc_read(ptn, buffer, size)) { |
| 627 | dprintf(CRITICAL, "Error: cannot read data\n"); |
| 628 | free(buffer); |
| 629 | return; |
| 630 | } |
| 631 | |
| 632 | clock_ce_enable(CE1_INSTANCE); |
| 633 | scm_protect_keystore(buffer, size); |
| 634 | clock_ce_disable(CE1_INSTANCE); |
| 635 | free(buffer); |
| 636 | } |
| 637 | |
| 638 | crypto_engine_type board_ce_type(void) |
| 639 | { |
| 640 | return CRYPTO_ENGINE_TYPE_HW; |
| 641 | } |
| 642 | |
| 643 | /* Set up params for h/w CE. */ |
| 644 | void target_crypto_init_params() |
| 645 | { |
| 646 | struct crypto_init_params ce_params; |
| 647 | |
| 648 | /* Set up base addresses and instance. */ |
| 649 | ce_params.crypto_instance = CE1_INSTANCE; |
| 650 | ce_params.crypto_base = MSM_CE1_BASE; |
| 651 | ce_params.bam_base = MSM_CE1_BAM_BASE; |
| 652 | |
| 653 | /* Set up BAM config. */ |
| 654 | ce_params.bam_ee = CE_EE; |
| 655 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 656 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 657 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 658 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
| 659 | |
| 660 | /* Assign buffer sizes. */ |
| 661 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 662 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 663 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 664 | |
| 665 | /* BAM is initialized by TZ for this platform. |
| 666 | * Do not do it again as the initialization address space |
| 667 | * is locked. |
| 668 | */ |
| 669 | ce_params.do_bam_init = 0; |
| 670 | |
| 671 | crypto_init_params(&ce_params); |
| 672 | } |
lijuang | 3606df8 | 2015-09-02 21:14:43 +0800 | [diff] [blame] | 673 | |
| 674 | uint32_t target_get_pmic() |
| 675 | { |
| 676 | return PMIC_IS_PMI8950; |
| 677 | } |