blob: 9dad93d35e7f598cc1a5ac342bac1a385e31ec63 [file] [log] [blame]
Shashank Mittal402d0972010-09-29 10:09:52 -07001/*
Aparna Mallavarapu88713ed2013-01-07 20:21:37 +05302 * * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
Shashank Mittal402d0972010-09-29 10:09:52 -07003 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are
6 * met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above
10 * copyright notice, this list of conditions and the following
11 * disclaimer in the documentation and/or other materials provided
12 * with the distribution.
Aparna Mallavarapu88713ed2013-01-07 20:21:37 +053013 * * Neither the name of The Linux Foundation nor the names of its
Shashank Mittal402d0972010-09-29 10:09:52 -070014 * contributors may be used to endorse or promote products derived
15 * from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <kernel/thread.h>
32#include <i2c_qup.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040033#include <platform.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070034#include <platform/iomap.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070035#include <platform/gpio.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070036#include <platform/clock.h>
37#include <platform/pmic.h>
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -070038#include <platform/pmic_pwm.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040039#include <platform/machtype.h>
40#include <platform/timer.h>
Amol Jadic52c8a32011-07-12 11:27:04 -070041#include <gsbi.h>
Wentao Xu8d6150c2011-06-22 11:03:18 -040042#include <dev/lcdc.h>
Shashank Mittal402d0972010-09-29 10:09:52 -070043
44#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
45
46static struct qup_i2c_dev *dev = NULL;
Greg Griscod2471ef2011-07-14 13:00:42 -070047void gpio_tlmm_config(uint32_t gpio, uint8_t func,
Ajay Dudanib01e5062011-12-03 23:23:42 -080048 uint8_t dir, uint8_t pull,
49 uint8_t drvstr, uint32_t enable);
Shashank Mittal402d0972010-09-29 10:09:52 -070050
51uint8_t expander_read(uint8_t addr)
52{
Ajay Dudanib01e5062011-12-03 23:23:42 -080053 uint8_t ret = 0;
54 /* Create a i2c_msg buffer, that is used to put the controller into read
55 mode and then to read some data. */
56 struct i2c_msg msg_buf[] = {
57 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_WR, 1, &addr},
58 {CORE_GPIO_EXPANDER_I2C_ADDRESS, I2C_M_RD, 1, &ret}
59 };
Shashank Mittal402d0972010-09-29 10:09:52 -070060
Ajay Dudanib01e5062011-12-03 23:23:42 -080061 qup_i2c_xfer(dev, msg_buf, 2);
Shashank Mittal402d0972010-09-29 10:09:52 -070062
Ajay Dudanib01e5062011-12-03 23:23:42 -080063 return ret;
Shashank Mittal402d0972010-09-29 10:09:52 -070064}
65
66uint8_t expander_write(uint8_t addr, uint8_t val)
67{
Ajay Dudanib01e5062011-12-03 23:23:42 -080068 uint8_t data_buf[] = { addr, val };
Shashank Mittal402d0972010-09-29 10:09:52 -070069
Ajay Dudanib01e5062011-12-03 23:23:42 -080070 /* Create a i2c_msg buffer, that is used to put the controller into write
71 mode and then to write some data. */
72 struct i2c_msg msg_buf[] = { {CORE_GPIO_EXPANDER_I2C_ADDRESS,
73 I2C_M_WR, 2, data_buf}
74 };
Shashank Mittal402d0972010-09-29 10:09:52 -070075
Ajay Dudanib01e5062011-12-03 23:23:42 -080076 qup_i2c_xfer(dev, msg_buf, 1);
Shashank Mittal402d0972010-09-29 10:09:52 -070077
Ajay Dudanib01e5062011-12-03 23:23:42 -080078 /* Double check that the write worked. */
79 if (val != expander_read(addr)) {
80 return -1;
81 }
Shashank Mittal402d0972010-09-29 10:09:52 -070082
Ajay Dudanib01e5062011-12-03 23:23:42 -080083 return 0;
Shashank Mittal402d0972010-09-29 10:09:52 -070084}
85
Shashank Mittal402d0972010-09-29 10:09:52 -070086void panel_backlight(int on)
87{
88}
89
90static int display_common_power(int on)
91{
92}
93
94static int lcd_power_on()
95{
Ajay Dudanib01e5062011-12-03 23:23:42 -080096 uint8_t buffer = 0x0, mask = 0x0, prev_val = 0x0;
97 int ret = 0;
Shashank Mittal402d0972010-09-29 10:09:52 -070098
Ajay Dudanib01e5062011-12-03 23:23:42 -080099 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
100 /* Not updating reference voltage */
101 buffer = (0x80); /* Write mode */
102 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
103 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
Shashank Mittal402d0972010-09-29 10:09:52 -0700104
Ajay Dudanib01e5062011-12-03 23:23:42 -0800105 if ((ret = pm8901_test_bank_read(&prev_val,
106 PM8901_LDO_TEST_BANK(2),
107 PM8901_LDO_L2_TEST_BANK))) {
108 return ret;
109 }
110 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
111 prev_val))) {
112 return ret;
113 }
Shashank Mittal402d0972010-09-29 10:09:52 -0700114
Ajay Dudanib01e5062011-12-03 23:23:42 -0800115 /* Enable LDO L2 at Max Voltage (should be around 3.3v) */
116 buffer = (0x0 << PM8901_LDO_CTL_ENABLE__S);
117 /* Disable Pull Down */
118 buffer |= (0x1 << PM8901_LDO_CTL_PULL_DOWN__S);
119 /* Put LDO into normal mode instead of low power mode */
120 buffer |= (0x0 << PM8901_LDO_CTL_MODE__S);
Wentao Xu8d6150c2011-06-22 11:03:18 -0400121
122 /* Set voltage programming to 3.3V or 2.85V(8660 fluid) */
123 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID)
124 buffer |= (0xB);
125 else
126 buffer |= (0xF);
127
Ajay Dudanib01e5062011-12-03 23:23:42 -0800128 mask = buffer | LDO_CTL_ENABLE_MASK |
129 LDO_CTL_PULL_DOWN_MASK |
130 LDO_CTL_NORMAL_POWER_MODE_MASK | LDO_CTL_VOLTAGE_SET_MASK;
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800131
Ajay Dudanib01e5062011-12-03 23:23:42 -0800132 /* Do a normal read here, as to not destroy the value in LDO control */
133 if ((ret = pm8901_read(&prev_val, 1, PM8901_LDO_L2))) {
134 return ret;
135 }
136 /* Configure the LDO2 for 3.3V or 2.85V(8660 fluid) */
137 ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2, prev_val);
Subbaraman Narayanamurthy83019a42011-02-15 20:08:02 -0800138
Ajay Dudanib01e5062011-12-03 23:23:42 -0800139 /* Configure LDO L2 TEST Bank 4, for High Range Mode */
140 buffer = (0x80); /* Write mode */
141 buffer |= (PM8901_LDO_TEST_BANK(4)); /* Test Bank 4 */
142 buffer |= (0x01); /* Put into High Range Mode */
143 mask = buffer | LDO_TEST_OUTPUT_RANGE_MASK;
Shashank Mittal402d0972010-09-29 10:09:52 -0700144
Ajay Dudanib01e5062011-12-03 23:23:42 -0800145 if ((ret = pm8901_test_bank_read(&prev_val,
146 PM8901_LDO_TEST_BANK(4),
147 PM8901_LDO_L2_TEST_BANK))) {
148 return ret;
149 }
150 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
151 prev_val))) {
152 return ret;
153 }
Shashank Mittal402d0972010-09-29 10:09:52 -0700154
Ajay Dudanib01e5062011-12-03 23:23:42 -0800155 /* Configure LDO L2 TEST Bank 2, to Range Select 0 */
156 buffer = (0x80); /* Write mode */
157 buffer |= (PM8901_LDO_TEST_BANK(2)); /* Test Bank 2 */
158 buffer |= (1 << 1); /* For fine step 50 mV */
159 buffer |= (1 << 3); /* to update reference voltage */
160 mask = buffer | LDO_TEST_RANGE_SELECT_MASK;
161 mask |= (1 << 2); /* Setting mask to make ref voltage as 1.25 V */
Shashank Mittal402d0972010-09-29 10:09:52 -0700162
Ajay Dudanib01e5062011-12-03 23:23:42 -0800163 if ((ret = pm8901_test_bank_read(&prev_val,
164 PM8901_LDO_TEST_BANK(2),
165 PM8901_LDO_L2_TEST_BANK))) {
166 return ret;
167 }
168 if ((ret = pm8901_vreg_write(&buffer, mask, PM8901_LDO_L2_TEST_BANK,
169 prev_val))) {
170 return ret;
171 }
Shashank Mittal402d0972010-09-29 10:09:52 -0700172
Ajay Dudanib01e5062011-12-03 23:23:42 -0800173 /* Enable PMR for LDO L2 */
174 buffer = 0x7F;
175 mask = 0x7F;
Aparna Mallavarapu88713ed2013-01-07 20:21:37 +0530176 if ((ret = pm8901_read(&prev_val, 1, PM8901_PMR_REG(LDO_L2)))) {
Ajay Dudanib01e5062011-12-03 23:23:42 -0800177 return ret;
178 }
Aparna Mallavarapu88713ed2013-01-07 20:21:37 +0530179 ret = pm8901_vreg_write(&buffer, mask, PM8901_PMR_REG(LDO_L2), prev_val);
Ajay Dudanib01e5062011-12-03 23:23:42 -0800180 return ret;
Shashank Mittal402d0972010-09-29 10:09:52 -0700181}
182
183/* Configures the GPIO that are needed to enable LCD.
184 * This function also configures the PMIC for PWM control of the LCD backlight.
185 */
186static void lcd_gpio_cfg(uint8_t on)
187{
Ajay Dudanib01e5062011-12-03 23:23:42 -0800188 uint32_t func;
189 uint32_t pull;
190 uint32_t dir;
191 uint32_t enable = 0; /* not used in gpio_tlmm_config */
192 uint32_t drv;
193 if (on) {
194 func = 1; /* Configure GPIO for LCDC function */
195 pull = GPIO_NO_PULL;
196 dir = 1; /* doesn't matter since it is not configured as
197 GPIO */
198 drv = GPIO_16MA;
199 } else {
200 /* As discussed in the MSM8660 FFA HW SW Control Doc configure these
201 GPIO as input and pull down. */
202 func = 0; /* GPIO */
203 pull = GPIO_PULL_DOWN;
204 dir = 0; /* Input */
205 drv = 0; /* does not matter configured as input */
206 }
Shashank Mittal402d0972010-09-29 10:09:52 -0700207
Ajay Dudanib01e5062011-12-03 23:23:42 -0800208 gpio_tlmm_config(0, func, dir, pull, drv, enable); /* lcdc_pclk */
209 gpio_tlmm_config(1, func, dir, pull, drv, enable); /* lcdc_hsync */
210 gpio_tlmm_config(2, func, dir, pull, drv, enable); /* lcdc_vsync */
211 gpio_tlmm_config(3, func, dir, pull, drv, enable); /* lcdc_den */
212 gpio_tlmm_config(4, func, dir, pull, drv, enable); /* lcdc_red7 */
213 gpio_tlmm_config(5, func, dir, pull, drv, enable); /* lcdc_red6 */
214 gpio_tlmm_config(6, func, dir, pull, drv, enable); /* lcdc_red5 */
215 gpio_tlmm_config(7, func, dir, pull, drv, enable); /* lcdc_red4 */
216 gpio_tlmm_config(8, func, dir, pull, drv, enable); /* lcdc_red3 */
217 gpio_tlmm_config(9, func, dir, pull, drv, enable); /* lcdc_red2 */
218 gpio_tlmm_config(10, func, dir, pull, drv, enable); /* lcdc_red1 */
219 gpio_tlmm_config(11, func, dir, pull, drv, enable); /* lcdc_red0 */
220 gpio_tlmm_config(12, func, dir, pull, drv, enable); /* lcdc_rgn7 */
221 gpio_tlmm_config(13, func, dir, pull, drv, enable); /* lcdc_rgn6 */
222 gpio_tlmm_config(14, func, dir, pull, drv, enable); /* lcdc_rgn5 */
223 gpio_tlmm_config(15, func, dir, pull, drv, enable); /* lcdc_rgn4 */
224 gpio_tlmm_config(16, func, dir, pull, drv, enable); /* lcdc_rgn3 */
225 gpio_tlmm_config(17, func, dir, pull, drv, enable); /* lcdc_rgn2 */
226 gpio_tlmm_config(18, func, dir, pull, drv, enable); /* lcdc_rgn1 */
227 gpio_tlmm_config(19, func, dir, pull, drv, enable); /* lcdc_rgn0 */
228 gpio_tlmm_config(20, func, dir, pull, drv, enable); /* lcdc_blu7 */
229 gpio_tlmm_config(21, func, dir, pull, drv, enable); /* lcdc_blu6 */
230 gpio_tlmm_config(22, func, dir, pull, drv, enable); /* lcdc_blu5 */
231 gpio_tlmm_config(23, func, dir, pull, drv, enable); /* lcdc_blu4 */
232 gpio_tlmm_config(24, func, dir, pull, drv, enable); /* lcdc_blu3 */
233 gpio_tlmm_config(25, func, dir, pull, drv, enable); /* lcdc_blu2 */
234 gpio_tlmm_config(26, func, dir, pull, drv, enable); /* lcdc_blu1 */
235 gpio_tlmm_config(27, func, dir, pull, drv, enable); /* lcdc_blu0 */
Shashank Mittal402d0972010-09-29 10:09:52 -0700236}
237
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700238/* API to set backlight level configuring PWM in PM8058 */
239
240int panel_set_backlight(uint8_t bt_level)
Shashank Mittal402d0972010-09-29 10:09:52 -0700241{
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700242 int rc = -1;
243 uint32_t duty_us, period_us;
Shashank Mittal402d0972010-09-29 10:09:52 -0700244
Aparna Mallavarapu88713ed2013-01-07 20:21:37 +0530245 if ((bt_level < 0) || (bt_level > 15)) {
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700246 dprintf(CRITICAL, "Error in brightness level (1-15 allowed)\n");
247 goto bail_out;
248 }
249
Ajay Dudanib01e5062011-12-03 23:23:42 -0800250 duty_us = bt_level * PWM_DUTY_LEVEL;
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700251 period_us = PWM_PERIOD_USEC;
252 rc = pm_pwm_config(0, duty_us, period_us);
Ajay Dudanib01e5062011-12-03 23:23:42 -0800253 if (rc) {
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700254 dprintf(CRITICAL, "Error in pwm_config0\n");
255 goto bail_out;
256 }
257
Ajay Dudanib01e5062011-12-03 23:23:42 -0800258 duty_us = PWM_PERIOD_USEC - (bt_level * PWM_DUTY_LEVEL);
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700259 period_us = PWM_PERIOD_USEC;
260 rc = pm_pwm_config(1, duty_us, period_us);
Ajay Dudanib01e5062011-12-03 23:23:42 -0800261 if (rc) {
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700262 dprintf(CRITICAL, "Error in pwm_config1\n");
263 goto bail_out;
264 }
265
266 rc = pm_pwm_enable(0);
Ajay Dudanib01e5062011-12-03 23:23:42 -0800267 if (rc) {
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700268 dprintf(CRITICAL, "Error in pwm_enable0\n");
269 goto bail_out;
270 }
271
272 rc = pm_pwm_enable(1);
Ajay Dudanib01e5062011-12-03 23:23:42 -0800273 if (rc)
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700274 dprintf(CRITICAL, "Error in pwm_enable1\n");
275
Ajay Dudanib01e5062011-12-03 23:23:42 -0800276 bail_out:
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700277 return rc;
278}
279
280void bl_gpio_init(void)
281{
282 /* Configure PM8058 GPIO24 as a PWM driver (LPG ch0) for chain 1 of 6 LEDs */
Ajay Dudanib01e5062011-12-03 23:23:42 -0800283 pm8058_write_one(0x81, GPIO24_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
284 selection enabled */
285 pm8058_write_one(0x98, GPIO24_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
286 CMOS, Don't Invert Output */
287 pm8058_write_one(0xAA, GPIO24_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
288 pm8058_write_one(0xB4, GPIO24_GPIO_CNTRL); /* Write, Bank3, high drv
289 strength */
290 pm8058_write_one(0xC6, GPIO24_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV1
291 (Spec. Fnc 2) */
292 pm8058_write_one(0xD8, GPIO24_GPIO_CNTRL); /* Write, Bank5, Interrupt
293 polarity noninversion */
Shashank Mittal402d0972010-09-29 10:09:52 -0700294
Subbaraman Narayanamurthy8f1ffa52011-06-03 12:33:01 -0700295 /* Configure PM8058 GPIO25 as a PWM driver (LPG ch1) for chain 2 of 5 LEDs */
Ajay Dudanib01e5062011-12-03 23:23:42 -0800296 pm8058_write_one(0x81, GPIO25_GPIO_CNTRL); /* Write, Bank0, VIN0, Mode
297 selection enabled */
298 pm8058_write_one(0x98, GPIO25_GPIO_CNTRL); /* Write, Bank1, OutOn/InOff,
299 CMOS, Don't Invert Output */
300 pm8058_write_one(0xAA, GPIO25_GPIO_CNTRL); /* Write, Bank2, GPIO no pull */
301 pm8058_write_one(0xB4, GPIO25_GPIO_CNTRL); /* Write, Bank3, high drv
302 strength */
303 pm8058_write_one(0xC6, GPIO25_GPIO_CNTRL); /* Write, Bank4, Src: LPG_DRV2
304 (Spec. Fnc 2) */
305 pm8058_write_one(0xD8, GPIO25_GPIO_CNTRL); /* Write, Bank5, Interrupt
306 polarity noninversion */
Shashank Mittal402d0972010-09-29 10:09:52 -0700307}
308
309void board_lcd_enable(void)
310{
Ajay Dudanib01e5062011-12-03 23:23:42 -0800311 int rc = -1;
312 dev = qup_i2c_init(GSBI_ID_8, 100000, 24000000);
Shashank Mittal402d0972010-09-29 10:09:52 -0700313
Ajay Dudanib01e5062011-12-03 23:23:42 -0800314 /* Make sure dev is created and initialized properly */
315 if (!dev) {
316 while (1) ;
317 return;
318 }
Shashank Mittal402d0972010-09-29 10:09:52 -0700319
Ajay Dudanib01e5062011-12-03 23:23:42 -0800320 /* Store current value of these registers as to not destroy their previous
321 state. */
322 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
323 uint8_t dir_b = expander_read(GPIO_EXPANDER_REG_DIR_B);
324 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
325 uint8_t data_b = expander_read(GPIO_EXPANDER_REG_DATA_B);
326 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
Shashank Mittal402d0972010-09-29 10:09:52 -0700327
Ajay Dudanib01e5062011-12-03 23:23:42 -0800328 /* Set the LVDS_SHUTDOWN_N to open drain and output low. */
329 dprintf(INFO, "Enable lvds_shutdown_n line for Open Drain.\n");
330 expander_write(GPIO_EXPANDER_REG_OPEN_DRAIN_A, 0x04 | open_drain_a);
Shashank Mittal402d0972010-09-29 10:09:52 -0700331
Ajay Dudanib01e5062011-12-03 23:23:42 -0800332 dprintf(INFO, "Enable lvds_shutdown_n line for output.\n");
333 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
Shashank Mittal402d0972010-09-29 10:09:52 -0700334
Ajay Dudanib01e5062011-12-03 23:23:42 -0800335 dprintf(INFO, "Drive the LVDS_SHUTDOWN_N pin high here.\n");
336 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
Shashank Mittal402d0972010-09-29 10:09:52 -0700337
Ajay Dudanib01e5062011-12-03 23:23:42 -0800338 /* Turn on the VREG_L2B to 3.3V. */
Shashank Mittal402d0972010-09-29 10:09:52 -0700339
Ajay Dudanib01e5062011-12-03 23:23:42 -0800340 /* Power on the appropiate PMIC LDO power rails */
341 if (lcd_power_on())
342 return;
Shashank Mittal402d0972010-09-29 10:09:52 -0700343
Ajay Dudanib01e5062011-12-03 23:23:42 -0800344 /* Enable the GPIO as LCDC mode LCD. */
345 lcd_gpio_cfg(1);
Shashank Mittal402d0972010-09-29 10:09:52 -0700346
Ajay Dudanib01e5062011-12-03 23:23:42 -0800347 /* Arbitrary delay */
348 udelay(20000);
Shashank Mittal402d0972010-09-29 10:09:52 -0700349
Ajay Dudanib01e5062011-12-03 23:23:42 -0800350 /* Set the GPIOs needed for backlight */
351 bl_gpio_init();
352 /* Set backlight level with API (to 8 by default) */
353 rc = panel_set_backlight(8);
354 if (rc)
355 dprintf(CRITICAL, "Error in setting panel backlight\n");
Shashank Mittal402d0972010-09-29 10:09:52 -0700356
Ajay Dudanib01e5062011-12-03 23:23:42 -0800357 dprintf(INFO, "Enable BACKLIGHT_EN line for output.\n");
358 expander_write(GPIO_EXPANDER_REG_DIR_B, ~0x10 & dir_b);
Shashank Mittal402d0972010-09-29 10:09:52 -0700359
Ajay Dudanib01e5062011-12-03 23:23:42 -0800360 dprintf(INFO, "Drive BACKLIGHT_EN to high\n");
361 expander_write(GPIO_EXPANDER_REG_DATA_B, 0x10 | data_b);
Shashank Mittal402d0972010-09-29 10:09:52 -0700362
363}
364
Shashank Mittal402d0972010-09-29 10:09:52 -0700365void lcdc_on(void)
366{
Ajay Dudanib01e5062011-12-03 23:23:42 -0800367 board_lcd_enable();
Shashank Mittal402d0972010-09-29 10:09:52 -0700368}
Wentao Xu8d6150c2011-06-22 11:03:18 -0400369
370void auo_board_lcd_enable(void)
371{
372 /* Make sure dev is created and initialized properly */
373 dev = qup_i2c_init(GSBI_ID_8, 100000, 24000000);
374 if (!dev) {
375 dprintf(CRITICAL, "Error in qup_i2c_init\n");
376 while (1) ;
377 }
378
379 /* Setup RESX_N */
380 uint8_t open_drain_a = expander_read(GPIO_EXPANDER_REG_OPEN_DRAIN_A);
381 uint8_t dir_a = expander_read(GPIO_EXPANDER_REG_DIR_A);
382 uint8_t data_a = expander_read(GPIO_EXPANDER_REG_DATA_A);
383
384 expander_write(GPIO_EXPANDER_REG_DIR_A, ~0x04 & dir_a);
385 expander_write(GPIO_EXPANDER_REG_DATA_A, ~0x04 & data_a);
386
Ajay Dudanib01e5062011-12-03 23:23:42 -0800387 /* Power on the appropiate PMIC LDO power rails */
Wentao Xu8d6150c2011-06-22 11:03:18 -0400388 if (lcd_power_on())
389 return;
390
391 /* Toggle RESX_N */
392 mdelay(20);
393 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
394 mdelay(1);
395 expander_write(GPIO_EXPANDER_REG_DATA_A, ~0x04 & data_a);
396 mdelay(1);
397 expander_write(GPIO_EXPANDER_REG_DATA_A, 0x04 | data_a);
398 mdelay(25);
399
400 /* Enable the gpios for LCD */
401 lcd_gpio_cfg(1);
402
403 auo_lcdc_init();
404}
405
406void panel_poweron(void)
407{
Ajay Dudanib01e5062011-12-03 23:23:42 -0800408 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID) {
Wentao Xu8d6150c2011-06-22 11:03:18 -0400409 auo_board_lcd_enable();
Ajay Dudanib01e5062011-12-03 23:23:42 -0800410 } else {
Wentao Xu8d6150c2011-06-22 11:03:18 -0400411 panel_backlight(1);
412 lcdc_on();
413 }
414}
415
416struct lcdc_timing_parameters *get_lcd_timing(void)
417{
Ajay Dudanib01e5062011-12-03 23:23:42 -0800418 if (board_machtype() == LINUX_MACHTYPE_8660_FLUID)
Wentao Xu8d6150c2011-06-22 11:03:18 -0400419 return auo_timing_param();
420 else
421 return DEFAULT_LCD_TIMING;
422}