Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Lucas Stach | 07134a3 | 2014-03-05 14:25:50 +0100 | [diff] [blame^] | 13 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 14 | |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 15 | #include "skeleton.dtsi" |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 16 | |
| 17 | / { |
| 18 | aliases { |
Lothar Waßmann | 5f8fbc2 | 2013-12-12 14:27:57 +0100 | [diff] [blame] | 19 | can0 = &can1; |
| 20 | can1 = &can2; |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 21 | gpio0 = &gpio1; |
| 22 | gpio1 = &gpio2; |
| 23 | gpio2 = &gpio3; |
| 24 | gpio3 = &gpio4; |
| 25 | gpio4 = &gpio5; |
| 26 | gpio5 = &gpio6; |
| 27 | gpio6 = &gpio7; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame] | 28 | i2c0 = &i2c1; |
| 29 | i2c1 = &i2c2; |
| 30 | i2c2 = &i2c3; |
Sascha Hauer | fb06d65 | 2014-01-16 13:44:20 +0100 | [diff] [blame] | 31 | mmc0 = &usdhc1; |
| 32 | mmc1 = &usdhc2; |
| 33 | mmc2 = &usdhc3; |
| 34 | mmc3 = &usdhc4; |
Sascha Hauer | 80fa058 | 2013-06-25 15:51:57 +0200 | [diff] [blame] | 35 | serial0 = &uart1; |
| 36 | serial1 = &uart2; |
| 37 | serial2 = &uart3; |
| 38 | serial3 = &uart4; |
| 39 | serial4 = &uart5; |
| 40 | spi0 = &ecspi1; |
| 41 | spi1 = &ecspi2; |
| 42 | spi2 = &ecspi3; |
| 43 | spi3 = &ecspi4; |
Peter Chen | 8189c51 | 2013-12-20 15:52:05 +0800 | [diff] [blame] | 44 | usbphy0 = &usbphy1; |
| 45 | usbphy1 = &usbphy2; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 46 | }; |
| 47 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 48 | intc: interrupt-controller@00a01000 { |
| 49 | compatible = "arm,cortex-a9-gic"; |
| 50 | #interrupt-cells = <3>; |
| 51 | #address-cells = <1>; |
| 52 | #size-cells = <1>; |
| 53 | interrupt-controller; |
| 54 | reg = <0x00a01000 0x1000>, |
| 55 | <0x00a00100 0x100>; |
| 56 | }; |
| 57 | |
| 58 | clocks { |
| 59 | #address-cells = <1>; |
| 60 | #size-cells = <0>; |
| 61 | |
| 62 | ckil { |
| 63 | compatible = "fsl,imx-ckil", "fixed-clock"; |
| 64 | clock-frequency = <32768>; |
| 65 | }; |
| 66 | |
| 67 | ckih1 { |
| 68 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
| 69 | clock-frequency = <0>; |
| 70 | }; |
| 71 | |
| 72 | osc { |
| 73 | compatible = "fsl,imx-osc", "fixed-clock"; |
| 74 | clock-frequency = <24000000>; |
| 75 | }; |
| 76 | }; |
| 77 | |
| 78 | soc { |
| 79 | #address-cells = <1>; |
| 80 | #size-cells = <1>; |
| 81 | compatible = "simple-bus"; |
| 82 | interrupt-parent = <&intc>; |
| 83 | ranges; |
| 84 | |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 85 | dma_apbh: dma-apbh@00110000 { |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 86 | compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh"; |
| 87 | reg = <0x00110000 0x2000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 88 | interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 89 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 90 | <0 13 IRQ_TYPE_LEVEL_HIGH>, |
| 91 | <0 13 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 92 | interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3"; |
| 93 | #dma-cells = <1>; |
| 94 | dma-channels = <4>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 95 | clocks = <&clks 106>; |
Huang Shijie | e5d0f9f | 2012-06-06 21:22:57 -0400 | [diff] [blame] | 96 | }; |
| 97 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 98 | gpmi: gpmi-nand@00112000 { |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 99 | compatible = "fsl,imx6q-gpmi-nand"; |
| 100 | #address-cells = <1>; |
| 101 | #size-cells = <1>; |
| 102 | reg = <0x00112000 0x2000>, <0x00114000 0x2000>; |
| 103 | reg-names = "gpmi-nand", "bch"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 104 | interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c7aa12a | 2013-07-16 17:13:00 +0800 | [diff] [blame] | 105 | interrupt-names = "bch"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 106 | clocks = <&clks 152>, <&clks 153>, <&clks 151>, |
| 107 | <&clks 150>, <&clks 149>; |
| 108 | clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch", |
| 109 | "gpmi_bch_apb", "per1_bch"; |
Shawn Guo | f30fb03 | 2013-02-25 21:56:56 +0800 | [diff] [blame] | 110 | dmas = <&dma_apbh 0>; |
| 111 | dma-names = "rx-tx"; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 112 | status = "disabled"; |
Huang Shijie | cf922fa | 2012-07-01 23:38:46 -0400 | [diff] [blame] | 113 | }; |
| 114 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 115 | timer@00a00600 { |
Marc Zyngier | 58458e0 | 2012-01-10 19:44:19 +0000 | [diff] [blame] | 116 | compatible = "arm,cortex-a9-twd-timer"; |
| 117 | reg = <0x00a00600 0x20>; |
| 118 | interrupts = <1 13 0xf01>; |
Shawn Guo | 2bb4b70 | 2013-04-03 23:50:09 +0800 | [diff] [blame] | 119 | clocks = <&clks 15>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 120 | }; |
| 121 | |
| 122 | L2: l2-cache@00a02000 { |
| 123 | compatible = "arm,pl310-cache"; |
| 124 | reg = <0x00a02000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 125 | interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 126 | cache-unified; |
| 127 | cache-level = <2>; |
Dirk Behme | 5a5ca56 | 2013-04-26 10:13:55 +0200 | [diff] [blame] | 128 | arm,tag-latency = <4 2 3>; |
| 129 | arm,data-latency = <4 2 3>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 130 | }; |
| 131 | |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 132 | pcie: pcie@0x01000000 { |
| 133 | compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; |
| 134 | reg = <0x01ffc000 0x4000>; /* DBI */ |
| 135 | #address-cells = <3>; |
| 136 | #size-cells = <2>; |
| 137 | device_type = "pci"; |
| 138 | ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */ |
| 139 | 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ |
| 140 | 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ |
| 141 | num-lanes = <1>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 142 | interrupts = <0 123 IRQ_TYPE_LEVEL_HIGH>; |
Lucas Stach | 07134a3 | 2014-03-05 14:25:50 +0100 | [diff] [blame^] | 143 | #interrupt-cells = <1>; |
| 144 | interrupt-map-mask = <0 0 0 0x7>; |
| 145 | interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
| 146 | <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
| 147 | <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, |
| 148 | <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; |
Sean Cross | 3a57291 | 2013-09-26 10:51:09 +0800 | [diff] [blame] | 149 | clocks = <&clks 189>, <&clks 187>, <&clks 206>, <&clks 144>; |
| 150 | clock-names = "pcie_ref_125m", "sata_ref_100m", "lvds_gate", "pcie_axi"; |
| 151 | status = "disabled"; |
| 152 | }; |
| 153 | |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 154 | pmu { |
| 155 | compatible = "arm,cortex-a9-pmu"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 156 | interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>; |
Dirk Behme | 218abe6 | 2013-02-15 15:10:01 +0100 | [diff] [blame] | 157 | }; |
| 158 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 159 | aips-bus@02000000 { /* AIPS1 */ |
| 160 | compatible = "fsl,aips-bus", "simple-bus"; |
| 161 | #address-cells = <1>; |
| 162 | #size-cells = <1>; |
| 163 | reg = <0x02000000 0x100000>; |
| 164 | ranges; |
| 165 | |
| 166 | spba-bus@02000000 { |
| 167 | compatible = "fsl,spba-bus", "simple-bus"; |
| 168 | #address-cells = <1>; |
| 169 | #size-cells = <1>; |
| 170 | reg = <0x02000000 0x40000>; |
| 171 | ranges; |
| 172 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 173 | spdif: spdif@02004000 { |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 174 | compatible = "fsl,imx35-spdif"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 175 | reg = <0x02004000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 176 | interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>; |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 177 | dmas = <&sdma 14 18 0>, |
| 178 | <&sdma 15 18 0>; |
| 179 | dma-names = "rx", "tx"; |
| 180 | clocks = <&clks 197>, <&clks 3>, |
| 181 | <&clks 197>, <&clks 107>, |
| 182 | <&clks 0>, <&clks 118>, |
Shawn Guo | 793b4b1 | 2013-11-16 22:38:29 +0800 | [diff] [blame] | 183 | <&clks 0>, <&clks 139>, |
Fabio Estevam | c9d96df | 2013-09-02 23:51:41 -0300 | [diff] [blame] | 184 | <&clks 0>; |
| 185 | clock-names = "core", "rxtx0", |
| 186 | "rxtx1", "rxtx2", |
| 187 | "rxtx3", "rxtx4", |
| 188 | "rxtx5", "rxtx6", |
| 189 | "rxtx7"; |
| 190 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 191 | }; |
| 192 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 193 | ecspi1: ecspi@02008000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 194 | #address-cells = <1>; |
| 195 | #size-cells = <0>; |
| 196 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 197 | reg = <0x02008000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 198 | interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 199 | clocks = <&clks 112>, <&clks 112>; |
| 200 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 201 | dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; |
| 202 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 203 | status = "disabled"; |
| 204 | }; |
| 205 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 206 | ecspi2: ecspi@0200c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 207 | #address-cells = <1>; |
| 208 | #size-cells = <0>; |
| 209 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 210 | reg = <0x0200c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 211 | interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 212 | clocks = <&clks 113>, <&clks 113>; |
| 213 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 214 | dmas = <&sdma 5 7 1>, <&sdma 6 7 2>; |
| 215 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 216 | status = "disabled"; |
| 217 | }; |
| 218 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 219 | ecspi3: ecspi@02010000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 220 | #address-cells = <1>; |
| 221 | #size-cells = <0>; |
| 222 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 223 | reg = <0x02010000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 224 | interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 225 | clocks = <&clks 114>, <&clks 114>; |
| 226 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 227 | dmas = <&sdma 7 7 1>, <&sdma 8 7 2>; |
| 228 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 229 | status = "disabled"; |
| 230 | }; |
| 231 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 232 | ecspi4: ecspi@02014000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 233 | #address-cells = <1>; |
| 234 | #size-cells = <0>; |
| 235 | compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; |
| 236 | reg = <0x02014000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 237 | interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 238 | clocks = <&clks 115>, <&clks 115>; |
| 239 | clock-names = "ipg", "per"; |
Frank Li | b3810c3 | 2014-01-04 06:53:52 +0800 | [diff] [blame] | 240 | dmas = <&sdma 9 7 1>, <&sdma 10 7 2>; |
| 241 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 242 | status = "disabled"; |
| 243 | }; |
| 244 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 245 | uart1: serial@02020000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 246 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 247 | reg = <0x02020000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 248 | interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 249 | clocks = <&clks 160>, <&clks 161>; |
| 250 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 251 | dmas = <&sdma 25 4 0>, <&sdma 26 4 0>; |
| 252 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 253 | status = "disabled"; |
| 254 | }; |
| 255 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 256 | esai: esai@02024000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 257 | reg = <0x02024000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 258 | interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 259 | }; |
| 260 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 261 | ssi1: ssi@02028000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 262 | compatible = "fsl,imx6q-ssi", |
| 263 | "fsl,imx51-ssi", |
| 264 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 265 | reg = <0x02028000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 266 | interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 267 | clocks = <&clks 178>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 268 | dmas = <&sdma 37 1 0>, |
| 269 | <&sdma 38 1 0>; |
| 270 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 271 | fsl,fifo-depth = <15>; |
| 272 | fsl,ssi-dma-events = <38 37>; |
| 273 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 274 | }; |
| 275 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 276 | ssi2: ssi@0202c000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 277 | compatible = "fsl,imx6q-ssi", |
| 278 | "fsl,imx51-ssi", |
| 279 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 280 | reg = <0x0202c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 281 | interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 282 | clocks = <&clks 179>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 283 | dmas = <&sdma 41 1 0>, |
| 284 | <&sdma 42 1 0>; |
| 285 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 286 | fsl,fifo-depth = <15>; |
| 287 | fsl,ssi-dma-events = <42 41>; |
| 288 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 289 | }; |
| 290 | |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 291 | ssi3: ssi@02030000 { |
Markus Pargmann | 98ea6ad | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 292 | compatible = "fsl,imx6q-ssi", |
| 293 | "fsl,imx51-ssi", |
| 294 | "fsl,imx21-ssi"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 295 | reg = <0x02030000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 296 | interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 297 | clocks = <&clks 180>; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 298 | dmas = <&sdma 45 1 0>, |
| 299 | <&sdma 46 1 0>; |
| 300 | dma-names = "rx", "tx"; |
Richard Zhao | b1a5da8 | 2012-05-02 10:29:10 +0800 | [diff] [blame] | 301 | fsl,fifo-depth = <15>; |
| 302 | fsl,ssi-dma-events = <46 45>; |
| 303 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 304 | }; |
| 305 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 306 | asrc: asrc@02034000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 307 | reg = <0x02034000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 308 | interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 309 | }; |
| 310 | |
| 311 | spba@0203c000 { |
| 312 | reg = <0x0203c000 0x4000>; |
| 313 | }; |
| 314 | }; |
| 315 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 316 | vpu: vpu@02040000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 317 | reg = <0x02040000 0x3c000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 318 | interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>, |
| 319 | <0 12 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 320 | }; |
| 321 | |
| 322 | aipstz@0207c000 { /* AIPSTZ1 */ |
| 323 | reg = <0x0207c000 0x4000>; |
| 324 | }; |
| 325 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 326 | pwm1: pwm@02080000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 327 | #pwm-cells = <2>; |
| 328 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 329 | reg = <0x02080000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 330 | interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 331 | clocks = <&clks 62>, <&clks 145>; |
| 332 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 333 | }; |
| 334 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 335 | pwm2: pwm@02084000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 336 | #pwm-cells = <2>; |
| 337 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 338 | reg = <0x02084000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 339 | interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 340 | clocks = <&clks 62>, <&clks 146>; |
| 341 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 342 | }; |
| 343 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 344 | pwm3: pwm@02088000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 345 | #pwm-cells = <2>; |
| 346 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 347 | reg = <0x02088000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 348 | interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 349 | clocks = <&clks 62>, <&clks 147>; |
| 350 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 351 | }; |
| 352 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 353 | pwm4: pwm@0208c000 { |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 354 | #pwm-cells = <2>; |
| 355 | compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 356 | reg = <0x0208c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 357 | interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 33b3858 | 2012-11-21 12:18:28 +0100 | [diff] [blame] | 358 | clocks = <&clks 62>, <&clks 148>; |
| 359 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 360 | }; |
| 361 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 362 | can1: flexcan@02090000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 363 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 364 | reg = <0x02090000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 365 | interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 366 | clocks = <&clks 108>, <&clks 109>; |
| 367 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 368 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 369 | }; |
| 370 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 371 | can2: flexcan@02094000 { |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 372 | compatible = "fsl,imx6q-flexcan"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 373 | reg = <0x02094000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 374 | interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 0f22521 | 2013-06-25 15:51:46 +0200 | [diff] [blame] | 375 | clocks = <&clks 110>, <&clks 111>; |
| 376 | clock-names = "ipg", "per"; |
Tim Harvey | a113533 | 2013-10-22 21:51:27 -0700 | [diff] [blame] | 377 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 378 | }; |
| 379 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 380 | gpt: gpt@02098000 { |
Sascha Hauer | 97b108f | 2013-06-25 15:51:47 +0200 | [diff] [blame] | 381 | compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 382 | reg = <0x02098000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 383 | interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 4efccad | 2013-03-14 13:09:01 +0100 | [diff] [blame] | 384 | clocks = <&clks 119>, <&clks 120>; |
| 385 | clock-names = "ipg", "per"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 386 | }; |
| 387 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 388 | gpio1: gpio@0209c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 389 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 390 | reg = <0x0209c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 391 | interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>, |
| 392 | <0 67 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 393 | gpio-controller; |
| 394 | #gpio-cells = <2>; |
| 395 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 396 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 397 | }; |
| 398 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 399 | gpio2: gpio@020a0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 400 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 401 | reg = <0x020a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 402 | interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>, |
| 403 | <0 69 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 404 | gpio-controller; |
| 405 | #gpio-cells = <2>; |
| 406 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 407 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 408 | }; |
| 409 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 410 | gpio3: gpio@020a4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 411 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 412 | reg = <0x020a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 413 | interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>, |
| 414 | <0 71 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 415 | gpio-controller; |
| 416 | #gpio-cells = <2>; |
| 417 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 418 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 419 | }; |
| 420 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 421 | gpio4: gpio@020a8000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 422 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 423 | reg = <0x020a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 424 | interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>, |
| 425 | <0 73 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 426 | gpio-controller; |
| 427 | #gpio-cells = <2>; |
| 428 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 429 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 430 | }; |
| 431 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 432 | gpio5: gpio@020ac000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 433 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 434 | reg = <0x020ac000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 435 | interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>, |
| 436 | <0 75 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 437 | gpio-controller; |
| 438 | #gpio-cells = <2>; |
| 439 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 440 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 441 | }; |
| 442 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 443 | gpio6: gpio@020b0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 444 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 445 | reg = <0x020b0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 446 | interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>, |
| 447 | <0 77 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 448 | gpio-controller; |
| 449 | #gpio-cells = <2>; |
| 450 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 451 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 452 | }; |
| 453 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 454 | gpio7: gpio@020b4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 455 | compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 456 | reg = <0x020b4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 457 | interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>, |
| 458 | <0 79 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 459 | gpio-controller; |
| 460 | #gpio-cells = <2>; |
| 461 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 462 | #interrupt-cells = <2>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 463 | }; |
| 464 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 465 | kpp: kpp@020b8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 466 | reg = <0x020b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 467 | interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 468 | }; |
| 469 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 470 | wdog1: wdog@020bc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 471 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 472 | reg = <0x020bc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 473 | interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 474 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 475 | }; |
| 476 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 477 | wdog2: wdog@020c0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 478 | compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt"; |
| 479 | reg = <0x020c0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 480 | interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 481 | clocks = <&clks 0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 482 | status = "disabled"; |
| 483 | }; |
| 484 | |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 485 | clks: ccm@020c4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 486 | compatible = "fsl,imx6q-ccm"; |
| 487 | reg = <0x020c4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 488 | interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>, |
| 489 | <0 88 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 490 | #clock-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 491 | }; |
| 492 | |
Dong Aisheng | baa6415 | 2012-09-05 10:57:15 +0800 | [diff] [blame] | 493 | anatop: anatop@020c8000 { |
| 494 | compatible = "fsl,imx6q-anatop", "syscon", "simple-bus"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 495 | reg = <0x020c8000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 496 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>, |
| 497 | <0 54 IRQ_TYPE_LEVEL_HIGH>, |
| 498 | <0 127 IRQ_TYPE_LEVEL_HIGH>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 499 | |
| 500 | regulator-1p1@110 { |
| 501 | compatible = "fsl,anatop-regulator"; |
| 502 | regulator-name = "vdd1p1"; |
| 503 | regulator-min-microvolt = <800000>; |
| 504 | regulator-max-microvolt = <1375000>; |
| 505 | regulator-always-on; |
| 506 | anatop-reg-offset = <0x110>; |
| 507 | anatop-vol-bit-shift = <8>; |
| 508 | anatop-vol-bit-width = <5>; |
| 509 | anatop-min-bit-val = <4>; |
| 510 | anatop-min-voltage = <800000>; |
| 511 | anatop-max-voltage = <1375000>; |
| 512 | }; |
| 513 | |
| 514 | regulator-3p0@120 { |
| 515 | compatible = "fsl,anatop-regulator"; |
| 516 | regulator-name = "vdd3p0"; |
| 517 | regulator-min-microvolt = <2800000>; |
| 518 | regulator-max-microvolt = <3150000>; |
| 519 | regulator-always-on; |
| 520 | anatop-reg-offset = <0x120>; |
| 521 | anatop-vol-bit-shift = <8>; |
| 522 | anatop-vol-bit-width = <5>; |
| 523 | anatop-min-bit-val = <0>; |
| 524 | anatop-min-voltage = <2625000>; |
| 525 | anatop-max-voltage = <3400000>; |
| 526 | }; |
| 527 | |
| 528 | regulator-2p5@130 { |
| 529 | compatible = "fsl,anatop-regulator"; |
| 530 | regulator-name = "vdd2p5"; |
| 531 | regulator-min-microvolt = <2000000>; |
| 532 | regulator-max-microvolt = <2750000>; |
| 533 | regulator-always-on; |
| 534 | anatop-reg-offset = <0x130>; |
| 535 | anatop-vol-bit-shift = <8>; |
| 536 | anatop-vol-bit-width = <5>; |
| 537 | anatop-min-bit-val = <0>; |
| 538 | anatop-min-voltage = <2000000>; |
| 539 | anatop-max-voltage = <2750000>; |
| 540 | }; |
| 541 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 542 | reg_arm: regulator-vddcore@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 543 | compatible = "fsl,anatop-regulator"; |
Fabio Estevam | 118c98a | 2013-12-19 21:08:52 -0200 | [diff] [blame] | 544 | regulator-name = "vddarm"; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 545 | regulator-min-microvolt = <725000>; |
| 546 | regulator-max-microvolt = <1450000>; |
| 547 | regulator-always-on; |
| 548 | anatop-reg-offset = <0x140>; |
| 549 | anatop-vol-bit-shift = <0>; |
| 550 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 551 | anatop-delay-reg-offset = <0x170>; |
| 552 | anatop-delay-bit-shift = <24>; |
| 553 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 554 | anatop-min-bit-val = <1>; |
| 555 | anatop-min-voltage = <725000>; |
| 556 | anatop-max-voltage = <1450000>; |
| 557 | }; |
| 558 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 559 | reg_pu: regulator-vddpu@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 560 | compatible = "fsl,anatop-regulator"; |
| 561 | regulator-name = "vddpu"; |
| 562 | regulator-min-microvolt = <725000>; |
| 563 | regulator-max-microvolt = <1450000>; |
| 564 | regulator-always-on; |
| 565 | anatop-reg-offset = <0x140>; |
| 566 | anatop-vol-bit-shift = <9>; |
| 567 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 568 | anatop-delay-reg-offset = <0x170>; |
| 569 | anatop-delay-bit-shift = <26>; |
| 570 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 571 | anatop-min-bit-val = <1>; |
| 572 | anatop-min-voltage = <725000>; |
| 573 | anatop-max-voltage = <1450000>; |
| 574 | }; |
| 575 | |
Shawn Guo | 96574a6 | 2013-01-08 14:25:14 +0800 | [diff] [blame] | 576 | reg_soc: regulator-vddsoc@140 { |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 577 | compatible = "fsl,anatop-regulator"; |
| 578 | regulator-name = "vddsoc"; |
| 579 | regulator-min-microvolt = <725000>; |
| 580 | regulator-max-microvolt = <1450000>; |
| 581 | regulator-always-on; |
| 582 | anatop-reg-offset = <0x140>; |
| 583 | anatop-vol-bit-shift = <18>; |
| 584 | anatop-vol-bit-width = <5>; |
Anson Huang | 46743dd | 2013-01-30 17:33:44 -0500 | [diff] [blame] | 585 | anatop-delay-reg-offset = <0x170>; |
| 586 | anatop-delay-bit-shift = <28>; |
| 587 | anatop-delay-bit-width = <2>; |
Ying-Chun Liu (PaulLiu) | a1e327e | 2012-03-30 21:46:53 +0800 | [diff] [blame] | 588 | anatop-min-bit-val = <1>; |
| 589 | anatop-min-voltage = <725000>; |
| 590 | anatop-max-voltage = <1450000>; |
| 591 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 592 | }; |
| 593 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 594 | tempmon: tempmon { |
| 595 | compatible = "fsl,imx6q-tempmon"; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 596 | interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 597 | fsl,tempmon = <&anatop>; |
| 598 | fsl,tempmon-data = <&ocotp>; |
Anson Huang | f430d19 | 2013-12-19 13:17:23 -0500 | [diff] [blame] | 599 | clocks = <&clks 172>; |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 600 | }; |
| 601 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 602 | usbphy1: usbphy@020c9000 { |
| 603 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 604 | reg = <0x020c9000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 605 | interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 606 | clocks = <&clks 182>; |
Peter Chen | 76a3885 | 2013-12-20 15:52:01 +0800 | [diff] [blame] | 607 | fsl,anatop = <&anatop>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 608 | }; |
| 609 | |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 610 | usbphy2: usbphy@020ca000 { |
| 611 | compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 612 | reg = <0x020ca000 0x1000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 613 | interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 614 | clocks = <&clks 183>; |
Peter Chen | 76a3885 | 2013-12-20 15:52:01 +0800 | [diff] [blame] | 615 | fsl,anatop = <&anatop>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 616 | }; |
| 617 | |
| 618 | snvs@020cc000 { |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 619 | compatible = "fsl,sec-v4.0-mon", "simple-bus"; |
| 620 | #address-cells = <1>; |
| 621 | #size-cells = <1>; |
| 622 | ranges = <0 0x020cc000 0x4000>; |
| 623 | |
| 624 | snvs-rtc-lp@34 { |
| 625 | compatible = "fsl,sec-v4.0-mon-rtc-lp"; |
| 626 | reg = <0x34 0x58>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 627 | interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>, |
| 628 | <0 20 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | c925038 | 2012-07-02 20:13:03 +0800 | [diff] [blame] | 629 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 630 | }; |
| 631 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 632 | epit1: epit@020d0000 { /* EPIT1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 633 | reg = <0x020d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 634 | interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 635 | }; |
| 636 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 637 | epit2: epit@020d4000 { /* EPIT2 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 638 | reg = <0x020d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 639 | interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 640 | }; |
| 641 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 642 | src: src@020d8000 { |
Philipp Zabel | bd3d924 | 2013-03-28 17:35:22 +0100 | [diff] [blame] | 643 | compatible = "fsl,imx6q-src", "fsl,imx51-src"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 644 | reg = <0x020d8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 645 | interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>, |
| 646 | <0 96 IRQ_TYPE_LEVEL_HIGH>; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 647 | #reset-cells = <1>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 648 | }; |
| 649 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 650 | gpc: gpc@020dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 651 | compatible = "fsl,imx6q-gpc"; |
| 652 | reg = <0x020dc000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 653 | interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>, |
| 654 | <0 90 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 655 | }; |
| 656 | |
Dong Aisheng | df37e0c | 2012-09-05 10:57:14 +0800 | [diff] [blame] | 657 | gpr: iomuxc-gpr@020e0000 { |
| 658 | compatible = "fsl,imx6q-iomuxc-gpr", "syscon"; |
| 659 | reg = <0x020e0000 0x38>; |
| 660 | }; |
| 661 | |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 662 | iomuxc: iomuxc@020e0000 { |
| 663 | compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc"; |
| 664 | reg = <0x020e0000 0x4000>; |
Shawn Guo | c56009b2f | 2013-07-11 13:58:36 +0800 | [diff] [blame] | 665 | }; |
| 666 | |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 667 | ldb: ldb@020e0008 { |
| 668 | #address-cells = <1>; |
| 669 | #size-cells = <0>; |
| 670 | compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb"; |
| 671 | gpr = <&gpr>; |
| 672 | status = "disabled"; |
| 673 | |
| 674 | lvds-channel@0 { |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 675 | #address-cells = <1>; |
| 676 | #size-cells = <0>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 677 | reg = <0>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 678 | status = "disabled"; |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 679 | |
| 680 | port@0 { |
| 681 | reg = <0>; |
| 682 | |
| 683 | lvds0_mux_0: endpoint { |
| 684 | remote-endpoint = <&ipu1_di0_lvds0>; |
| 685 | }; |
| 686 | }; |
| 687 | |
| 688 | port@1 { |
| 689 | reg = <1>; |
| 690 | |
| 691 | lvds0_mux_1: endpoint { |
| 692 | remote-endpoint = <&ipu1_di1_lvds0>; |
| 693 | }; |
| 694 | }; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 695 | }; |
| 696 | |
| 697 | lvds-channel@1 { |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 698 | #address-cells = <1>; |
| 699 | #size-cells = <0>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 700 | reg = <1>; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 701 | status = "disabled"; |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 702 | |
| 703 | port@0 { |
| 704 | reg = <0>; |
| 705 | |
| 706 | lvds1_mux_0: endpoint { |
| 707 | remote-endpoint = <&ipu1_di0_lvds1>; |
| 708 | }; |
| 709 | }; |
| 710 | |
| 711 | port@1 { |
| 712 | reg = <1>; |
| 713 | |
| 714 | lvds1_mux_1: endpoint { |
| 715 | remote-endpoint = <&ipu1_di1_lvds1>; |
| 716 | }; |
| 717 | }; |
Steffen Trumtrar | 41c0434 | 2013-03-28 16:23:35 +0100 | [diff] [blame] | 718 | }; |
| 719 | }; |
| 720 | |
Russell King | 04cec1a | 2013-10-16 10:19:00 +0100 | [diff] [blame] | 721 | hdmi: hdmi@0120000 { |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 722 | #address-cells = <1>; |
| 723 | #size-cells = <0>; |
Russell King | 04cec1a | 2013-10-16 10:19:00 +0100 | [diff] [blame] | 724 | reg = <0x00120000 0x9000>; |
| 725 | interrupts = <0 115 0x04>; |
| 726 | gpr = <&gpr>; |
| 727 | clocks = <&clks 123>, <&clks 124>; |
| 728 | clock-names = "iahb", "isfr"; |
| 729 | status = "disabled"; |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 730 | |
| 731 | port@0 { |
| 732 | reg = <0>; |
| 733 | |
| 734 | hdmi_mux_0: endpoint { |
| 735 | remote-endpoint = <&ipu1_di0_hdmi>; |
| 736 | }; |
| 737 | }; |
| 738 | |
| 739 | port@1 { |
| 740 | reg = <1>; |
| 741 | |
| 742 | hdmi_mux_1: endpoint { |
| 743 | remote-endpoint = <&ipu1_di1_hdmi>; |
| 744 | }; |
| 745 | }; |
Russell King | 04cec1a | 2013-10-16 10:19:00 +0100 | [diff] [blame] | 746 | }; |
| 747 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 748 | dcic1: dcic@020e4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 749 | reg = <0x020e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 750 | interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 751 | }; |
| 752 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 753 | dcic2: dcic@020e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 754 | reg = <0x020e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 755 | interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 756 | }; |
| 757 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 758 | sdma: sdma@020ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 759 | compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; |
| 760 | reg = <0x020ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 761 | interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 762 | clocks = <&clks 155>, <&clks 155>; |
| 763 | clock-names = "ipg", "ahb"; |
Huang Shijie | fb72bb2 | 2013-07-02 10:15:29 +0800 | [diff] [blame] | 764 | #dma-cells = <3>; |
Fabio Estevam | d6b9c59 | 2013-01-17 12:13:25 -0200 | [diff] [blame] | 765 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 766 | }; |
| 767 | }; |
| 768 | |
| 769 | aips-bus@02100000 { /* AIPS2 */ |
| 770 | compatible = "fsl,aips-bus", "simple-bus"; |
| 771 | #address-cells = <1>; |
| 772 | #size-cells = <1>; |
| 773 | reg = <0x02100000 0x100000>; |
| 774 | ranges; |
| 775 | |
| 776 | caam@02100000 { |
| 777 | reg = <0x02100000 0x40000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 778 | interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>, |
| 779 | <0 106 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 780 | }; |
| 781 | |
| 782 | aipstz@0217c000 { /* AIPSTZ2 */ |
| 783 | reg = <0x0217c000 0x4000>; |
| 784 | }; |
| 785 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 786 | usbotg: usb@02184000 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 787 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 788 | reg = <0x02184000 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 789 | interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 790 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 791 | fsl,usbphy = <&usbphy1>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 792 | fsl,usbmisc = <&usbmisc 0>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 793 | status = "disabled"; |
| 794 | }; |
| 795 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 796 | usbh1: usb@02184200 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 797 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 798 | reg = <0x02184200 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 799 | interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 800 | clocks = <&clks 162>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 801 | fsl,usbphy = <&usbphy2>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 802 | fsl,usbmisc = <&usbmisc 1>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 803 | status = "disabled"; |
| 804 | }; |
| 805 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 806 | usbh2: usb@02184400 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 807 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 808 | reg = <0x02184400 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 809 | interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 810 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 811 | fsl,usbmisc = <&usbmisc 2>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 812 | status = "disabled"; |
| 813 | }; |
| 814 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 815 | usbh3: usb@02184600 { |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 816 | compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; |
| 817 | reg = <0x02184600 0x200>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 818 | interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 819 | clocks = <&clks 162>; |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 820 | fsl,usbmisc = <&usbmisc 3>; |
Richard Zhao | 74bd88f | 2012-07-12 14:21:41 +0800 | [diff] [blame] | 821 | status = "disabled"; |
| 822 | }; |
| 823 | |
Shawn Guo | 60984bd | 2013-04-28 09:59:54 +0800 | [diff] [blame] | 824 | usbmisc: usbmisc@02184800 { |
Richard Zhao | 28342c6 | 2012-09-14 14:42:45 +0800 | [diff] [blame] | 825 | #index-cells = <1>; |
| 826 | compatible = "fsl,imx6q-usbmisc"; |
| 827 | reg = <0x02184800 0x200>; |
| 828 | clocks = <&clks 162>; |
| 829 | }; |
| 830 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 831 | fec: ethernet@02188000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 832 | compatible = "fsl,imx6q-fec"; |
| 833 | reg = <0x02188000 0x4000>; |
Troy Kisky | 454cf8f | 2013-12-20 11:47:10 -0700 | [diff] [blame] | 834 | interrupts-extended = |
| 835 | <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>, |
| 836 | <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; |
Frank Li | 8dd5c66 | 2013-02-05 14:21:06 +0800 | [diff] [blame] | 837 | clocks = <&clks 117>, <&clks 117>, <&clks 190>; |
Frank Li | 7629838 | 2012-10-30 18:24:57 +0000 | [diff] [blame] | 838 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 839 | status = "disabled"; |
| 840 | }; |
| 841 | |
| 842 | mlb@0218c000 { |
| 843 | reg = <0x0218c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 844 | interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>, |
| 845 | <0 117 IRQ_TYPE_LEVEL_HIGH>, |
| 846 | <0 126 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 847 | }; |
| 848 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 849 | usdhc1: usdhc@02190000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 850 | compatible = "fsl,imx6q-usdhc"; |
| 851 | reg = <0x02190000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 852 | interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 853 | clocks = <&clks 163>, <&clks 163>, <&clks 163>; |
| 854 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 855 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 856 | status = "disabled"; |
| 857 | }; |
| 858 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 859 | usdhc2: usdhc@02194000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 860 | compatible = "fsl,imx6q-usdhc"; |
| 861 | reg = <0x02194000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 862 | interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 863 | clocks = <&clks 164>, <&clks 164>, <&clks 164>; |
| 864 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 865 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 866 | status = "disabled"; |
| 867 | }; |
| 868 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 869 | usdhc3: usdhc@02198000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 870 | compatible = "fsl,imx6q-usdhc"; |
| 871 | reg = <0x02198000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 872 | interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 873 | clocks = <&clks 165>, <&clks 165>, <&clks 165>; |
| 874 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 875 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 876 | status = "disabled"; |
| 877 | }; |
| 878 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 879 | usdhc4: usdhc@0219c000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 880 | compatible = "fsl,imx6q-usdhc"; |
| 881 | reg = <0x0219c000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 882 | interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 883 | clocks = <&clks 166>, <&clks 166>, <&clks 166>; |
| 884 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 885 | bus-width = <4>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 886 | status = "disabled"; |
| 887 | }; |
| 888 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 889 | i2c1: i2c@021a0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 890 | #address-cells = <1>; |
| 891 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 892 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 893 | reg = <0x021a0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 894 | interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 895 | clocks = <&clks 125>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 896 | status = "disabled"; |
| 897 | }; |
| 898 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 899 | i2c2: i2c@021a4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 900 | #address-cells = <1>; |
| 901 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 902 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 903 | reg = <0x021a4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 904 | interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 905 | clocks = <&clks 126>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 906 | status = "disabled"; |
| 907 | }; |
| 908 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 909 | i2c3: i2c@021a8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 910 | #address-cells = <1>; |
| 911 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 912 | compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 913 | reg = <0x021a8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 914 | interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 915 | clocks = <&clks 127>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 916 | status = "disabled"; |
| 917 | }; |
| 918 | |
| 919 | romcp@021ac000 { |
| 920 | reg = <0x021ac000 0x4000>; |
| 921 | }; |
| 922 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 923 | mmdc0: mmdc@021b0000 { /* MMDC0 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 924 | compatible = "fsl,imx6q-mmdc"; |
| 925 | reg = <0x021b0000 0x4000>; |
| 926 | }; |
| 927 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 928 | mmdc1: mmdc@021b4000 { /* MMDC1 */ |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 929 | reg = <0x021b4000 0x4000>; |
| 930 | }; |
| 931 | |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 932 | weim: weim@021b8000 { |
| 933 | compatible = "fsl,imx6q-weim"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 934 | reg = <0x021b8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 935 | interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>; |
Huang Shijie | 05e3f8e | 2013-05-28 14:20:09 +0800 | [diff] [blame] | 936 | clocks = <&clks 196>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 937 | }; |
| 938 | |
Shawn Guo | 3fe6373 | 2013-07-16 21:16:36 +0800 | [diff] [blame] | 939 | ocotp: ocotp@021bc000 { |
| 940 | compatible = "fsl,imx6q-ocotp", "syscon"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 941 | reg = <0x021bc000 0x4000>; |
| 942 | }; |
| 943 | |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 944 | tzasc@021d0000 { /* TZASC1 */ |
| 945 | reg = <0x021d0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 946 | interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 947 | }; |
| 948 | |
| 949 | tzasc@021d4000 { /* TZASC2 */ |
| 950 | reg = <0x021d4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 951 | interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 952 | }; |
| 953 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 954 | audmux: audmux@021d8000 { |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 955 | compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 956 | reg = <0x021d8000 0x4000>; |
Richard Zhao | f965cd5 | 2012-05-02 10:32:26 +0800 | [diff] [blame] | 957 | status = "disabled"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 958 | }; |
| 959 | |
Troy Kisky | 5e0c7cd | 2013-11-14 14:02:08 -0700 | [diff] [blame] | 960 | mipi_csi: mipi@021dc000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 961 | reg = <0x021dc000 0x4000>; |
| 962 | }; |
| 963 | |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 964 | mipi_dsi: mipi@021e0000 { |
| 965 | #address-cells = <1>; |
| 966 | #size-cells = <0>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 967 | reg = <0x021e0000 0x4000>; |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 968 | status = "disabled"; |
| 969 | |
| 970 | port@0 { |
| 971 | reg = <0>; |
| 972 | |
| 973 | mipi_mux_0: endpoint { |
| 974 | remote-endpoint = <&ipu1_di0_mipi>; |
| 975 | }; |
| 976 | }; |
| 977 | |
| 978 | port@1 { |
| 979 | reg = <1>; |
| 980 | |
| 981 | mipi_mux_1: endpoint { |
| 982 | remote-endpoint = <&ipu1_di1_mipi>; |
| 983 | }; |
| 984 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 985 | }; |
| 986 | |
| 987 | vdoa@021e4000 { |
| 988 | reg = <0x021e4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 989 | interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 990 | }; |
| 991 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 992 | uart2: serial@021e8000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 993 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 994 | reg = <0x021e8000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 995 | interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 996 | clocks = <&clks 160>, <&clks 161>; |
| 997 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 998 | dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; |
| 999 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1000 | status = "disabled"; |
| 1001 | }; |
| 1002 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 1003 | uart3: serial@021ec000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1004 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 1005 | reg = <0x021ec000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 1006 | interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 1007 | clocks = <&clks 160>, <&clks 161>; |
| 1008 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 1009 | dmas = <&sdma 29 4 0>, <&sdma 30 4 0>; |
| 1010 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1011 | status = "disabled"; |
| 1012 | }; |
| 1013 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 1014 | uart4: serial@021f0000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1015 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 1016 | reg = <0x021f0000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 1017 | interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 1018 | clocks = <&clks 160>, <&clks 161>; |
| 1019 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 1020 | dmas = <&sdma 31 4 0>, <&sdma 32 4 0>; |
| 1021 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1022 | status = "disabled"; |
| 1023 | }; |
| 1024 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 1025 | uart5: serial@021f4000 { |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1026 | compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; |
| 1027 | reg = <0x021f4000 0x4000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 1028 | interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; |
Shawn Guo | 0e87e04 | 2012-08-22 21:36:28 +0800 | [diff] [blame] | 1029 | clocks = <&clks 160>, <&clks 161>; |
| 1030 | clock-names = "ipg", "per"; |
Huang Shijie | 72a5ceb | 2013-07-12 18:02:09 +0800 | [diff] [blame] | 1031 | dmas = <&sdma 33 4 0>, <&sdma 34 4 0>; |
| 1032 | dma-names = "rx", "tx"; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1033 | status = "disabled"; |
| 1034 | }; |
| 1035 | }; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 1036 | |
| 1037 | ipu1: ipu@02400000 { |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 1038 | #address-cells = <1>; |
| 1039 | #size-cells = <0>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 1040 | compatible = "fsl,imx6q-ipu"; |
| 1041 | reg = <0x02400000 0x400000>; |
Troy Kisky | 275c08b | 2013-11-14 14:02:13 -0700 | [diff] [blame] | 1042 | interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>, |
| 1043 | <0 5 IRQ_TYPE_LEVEL_HIGH>; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 1044 | clocks = <&clks 130>, <&clks 131>, <&clks 132>; |
| 1045 | clock-names = "bus", "di0", "di1"; |
Philipp Zabel | 09ebf36 | 2013-03-28 17:35:20 +0100 | [diff] [blame] | 1046 | resets = <&src 2>; |
Philipp Zabel | 4520e69 | 2014-03-05 10:21:01 +0100 | [diff] [blame] | 1047 | |
| 1048 | ipu1_di0: port@2 { |
| 1049 | #address-cells = <1>; |
| 1050 | #size-cells = <0>; |
| 1051 | reg = <2>; |
| 1052 | |
| 1053 | ipu1_di0_disp0: endpoint@0 { |
| 1054 | }; |
| 1055 | |
| 1056 | ipu1_di0_hdmi: endpoint@1 { |
| 1057 | remote-endpoint = <&hdmi_mux_0>; |
| 1058 | }; |
| 1059 | |
| 1060 | ipu1_di0_mipi: endpoint@2 { |
| 1061 | remote-endpoint = <&mipi_mux_0>; |
| 1062 | }; |
| 1063 | |
| 1064 | ipu1_di0_lvds0: endpoint@3 { |
| 1065 | remote-endpoint = <&lvds0_mux_0>; |
| 1066 | }; |
| 1067 | |
| 1068 | ipu1_di0_lvds1: endpoint@4 { |
| 1069 | remote-endpoint = <&lvds1_mux_0>; |
| 1070 | }; |
| 1071 | }; |
| 1072 | |
| 1073 | ipu1_di1: port@3 { |
| 1074 | #address-cells = <1>; |
| 1075 | #size-cells = <0>; |
| 1076 | reg = <3>; |
| 1077 | |
| 1078 | ipu1_di0_disp1: endpoint@0 { |
| 1079 | }; |
| 1080 | |
| 1081 | ipu1_di1_hdmi: endpoint@1 { |
| 1082 | remote-endpoint = <&hdmi_mux_1>; |
| 1083 | }; |
| 1084 | |
| 1085 | ipu1_di1_mipi: endpoint@2 { |
| 1086 | remote-endpoint = <&mipi_mux_1>; |
| 1087 | }; |
| 1088 | |
| 1089 | ipu1_di1_lvds0: endpoint@3 { |
| 1090 | remote-endpoint = <&lvds0_mux_1>; |
| 1091 | }; |
| 1092 | |
| 1093 | ipu1_di1_lvds1: endpoint@4 { |
| 1094 | remote-endpoint = <&lvds1_mux_1>; |
| 1095 | }; |
| 1096 | }; |
Sascha Hauer | 91660d7 | 2012-11-12 15:52:21 +0100 | [diff] [blame] | 1097 | }; |
Shawn Guo | 7d740f8 | 2011-09-06 13:53:26 +0800 | [diff] [blame] | 1098 | }; |
| 1099 | }; |