blob: 6060dda4e9101ac73c92cafb597c1d71592bb00e [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
Michal Kaziorc5450702015-01-24 12:14:48 +020028#define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
29#define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
Kalle Valo5e3dd152013-06-12 20:52:10 +030030
31/* when under memory pressure rx ring refill may fail and needs a retry */
32#define HTT_RX_RING_REFILL_RETRY_MS 50
33
Michal Kaziorf6dc2092013-09-26 10:12:22 +030034static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020035static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030036
Michal Kaziorc5450702015-01-24 12:14:48 +020037static struct sk_buff *
38ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
39{
40 struct ath10k_skb_rxcb *rxcb;
41
42 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
43 if (rxcb->paddr == paddr)
44 return ATH10K_RXCB_SKB(rxcb);
45
46 WARN_ON_ONCE(1);
47 return NULL;
48}
49
Kalle Valo5e3dd152013-06-12 20:52:10 +030050static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
51{
52 struct sk_buff *skb;
Michal Kaziorc5450702015-01-24 12:14:48 +020053 struct ath10k_skb_rxcb *rxcb;
54 struct hlist_node *n;
Kalle Valo5e3dd152013-06-12 20:52:10 +030055 int i;
56
Michal Kaziorc5450702015-01-24 12:14:48 +020057 if (htt->rx_ring.in_ord_rx) {
58 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
59 skb = ATH10K_RXCB_SKB(rxcb);
60 dma_unmap_single(htt->ar->dev, rxcb->paddr,
61 skb->len + skb_tailroom(skb),
62 DMA_FROM_DEVICE);
63 hash_del(&rxcb->hlist);
64 dev_kfree_skb_any(skb);
65 }
66 } else {
67 for (i = 0; i < htt->rx_ring.size; i++) {
68 skb = htt->rx_ring.netbufs_ring[i];
69 if (!skb)
70 continue;
71
72 rxcb = ATH10K_SKB_RXCB(skb);
73 dma_unmap_single(htt->ar->dev, rxcb->paddr,
74 skb->len + skb_tailroom(skb),
75 DMA_FROM_DEVICE);
76 dev_kfree_skb_any(skb);
77 }
Kalle Valo5e3dd152013-06-12 20:52:10 +030078 }
79
80 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +020081 hash_init(htt->rx_ring.skb_table);
82 memset(htt->rx_ring.netbufs_ring, 0,
83 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
Kalle Valo5e3dd152013-06-12 20:52:10 +030084}
85
86static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
87{
88 struct htt_rx_desc *rx_desc;
Michal Kaziorc5450702015-01-24 12:14:48 +020089 struct ath10k_skb_rxcb *rxcb;
Kalle Valo5e3dd152013-06-12 20:52:10 +030090 struct sk_buff *skb;
91 dma_addr_t paddr;
92 int ret = 0, idx;
93
Michal Kaziorc5450702015-01-24 12:14:48 +020094 /* The Full Rx Reorder firmware has no way of telling the host
95 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
96 * To keep things simple make sure ring is always half empty. This
97 * guarantees there'll be no replenishment overruns possible.
98 */
99 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
100
Kalle Valo8cc7f262014-09-14 12:50:39 +0300101 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300102 while (num > 0) {
103 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
104 if (!skb) {
105 ret = -ENOMEM;
106 goto fail;
107 }
108
109 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
110 skb_pull(skb,
111 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
112 skb->data);
113
114 /* Clear rx_desc attention word before posting to Rx ring */
115 rx_desc = (struct htt_rx_desc *)skb->data;
116 rx_desc->attention.flags = __cpu_to_le32(0);
117
118 paddr = dma_map_single(htt->ar->dev, skb->data,
119 skb->len + skb_tailroom(skb),
120 DMA_FROM_DEVICE);
121
122 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
123 dev_kfree_skb_any(skb);
124 ret = -ENOMEM;
125 goto fail;
126 }
127
Michal Kaziorc5450702015-01-24 12:14:48 +0200128 rxcb = ATH10K_SKB_RXCB(skb);
129 rxcb->paddr = paddr;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300130 htt->rx_ring.netbufs_ring[idx] = skb;
131 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
132 htt->rx_ring.fill_cnt++;
133
Michal Kaziorc5450702015-01-24 12:14:48 +0200134 if (htt->rx_ring.in_ord_rx) {
135 hash_add(htt->rx_ring.skb_table,
136 &ATH10K_SKB_RXCB(skb)->hlist,
137 (u32)paddr);
138 }
139
Kalle Valo5e3dd152013-06-12 20:52:10 +0300140 num--;
141 idx++;
142 idx &= htt->rx_ring.size_mask;
143 }
144
145fail:
Vasanthakumar Thiagarajan5de6dfc2015-01-09 22:49:46 +0530146 /*
147 * Make sure the rx buffer is updated before available buffer
148 * index to avoid any potential rx ring corruption.
149 */
150 mb();
Kalle Valo8cc7f262014-09-14 12:50:39 +0300151 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300152 return ret;
153}
154
155static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
156{
157 lockdep_assert_held(&htt->rx_ring.lock);
158 return __ath10k_htt_rx_ring_fill_n(htt, num);
159}
160
161static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
162{
Michal Kazior6e712d42013-09-24 10:18:36 +0200163 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300164
Michal Kazior6e712d42013-09-24 10:18:36 +0200165 /* Refilling the whole RX ring buffer proves to be a bad idea. The
166 * reason is RX may take up significant amount of CPU cycles and starve
167 * other tasks, e.g. TX on an ethernet device while acting as a bridge
168 * with ath10k wlan interface. This ended up with very poor performance
169 * once CPU the host system was overwhelmed with RX on ath10k.
170 *
171 * By limiting the number of refills the replenishing occurs
172 * progressively. This in turns makes use of the fact tasklets are
173 * processed in FIFO order. This means actual RX processing can starve
174 * out refilling. If there's not enough buffers on RX ring FW will not
175 * report RX until it is refilled with enough buffers. This
176 * automatically balances load wrt to CPU power.
177 *
178 * This probably comes at a cost of lower maximum throughput but
Ben Greear3eafdfd2015-02-15 16:50:39 +0200179 * improves the average and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300180 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200181 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
182 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
183 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300184 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
185 if (ret == -ENOMEM) {
186 /*
187 * Failed to fill it to the desired level -
188 * we'll start a timer and try again next time.
189 * As long as enough buffers are left in the ring for
190 * another A-MPDU rx, no special recovery is needed.
191 */
192 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
193 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200194 } else if (num_deficit > 0) {
195 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300196 }
197 spin_unlock_bh(&htt->rx_ring.lock);
198}
199
200static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
201{
202 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300203
Kalle Valo5e3dd152013-06-12 20:52:10 +0300204 ath10k_htt_rx_msdu_buff_replenish(htt);
205}
206
Michal Kaziorc5450702015-01-24 12:14:48 +0200207int ath10k_htt_rx_ring_refill(struct ath10k *ar)
Michal Kazior3e841fd2014-05-14 16:23:31 +0300208{
Michal Kaziorc5450702015-01-24 12:14:48 +0200209 struct ath10k_htt *htt = &ar->htt;
210 int ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300211
Michal Kaziorc5450702015-01-24 12:14:48 +0200212 spin_lock_bh(&htt->rx_ring.lock);
213 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
214 htt->rx_ring.fill_cnt));
215 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior3e841fd2014-05-14 16:23:31 +0300216
Michal Kaziorc5450702015-01-24 12:14:48 +0200217 if (ret)
218 ath10k_htt_rx_ring_free(htt);
219
220 return ret;
Michal Kazior3e841fd2014-05-14 16:23:31 +0300221}
222
Michal Kazior95bf21f2014-05-16 17:15:39 +0300223void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300224{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300225 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200226 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200227 tasklet_kill(&htt->txrx_compl_task);
228
229 skb_queue_purge(&htt->tx_compl_q);
230 skb_queue_purge(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200231 skb_queue_purge(&htt->rx_in_ord_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300232
Michal Kaziorc5450702015-01-24 12:14:48 +0200233 ath10k_htt_rx_ring_free(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300234
235 dma_free_coherent(htt->ar->dev,
236 (htt->rx_ring.size *
237 sizeof(htt->rx_ring.paddrs_ring)),
238 htt->rx_ring.paddrs_ring,
239 htt->rx_ring.base_paddr);
240
241 dma_free_coherent(htt->ar->dev,
242 sizeof(*htt->rx_ring.alloc_idx.vaddr),
243 htt->rx_ring.alloc_idx.vaddr,
244 htt->rx_ring.alloc_idx.paddr);
245
246 kfree(htt->rx_ring.netbufs_ring);
247}
248
249static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
250{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200251 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300252 int idx;
253 struct sk_buff *msdu;
254
Michal Kazior45967082014-02-27 18:50:05 +0200255 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300256
Michal Kazior8d60ee82014-02-27 18:50:05 +0200257 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200258 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200259 return NULL;
260 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300261
262 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
263 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300264 htt->rx_ring.netbufs_ring[idx] = NULL;
Michal Kaziorc5450702015-01-24 12:14:48 +0200265 htt->rx_ring.paddrs_ring[idx] = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300266
267 idx++;
268 idx &= htt->rx_ring.size_mask;
269 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
270 htt->rx_ring.fill_cnt--;
271
Michal Kazior4de02802014-10-23 17:04:23 +0300272 dma_unmap_single(htt->ar->dev,
Michal Kazior8582bf32015-01-24 12:14:47 +0200273 ATH10K_SKB_RXCB(msdu)->paddr,
Michal Kazior4de02802014-10-23 17:04:23 +0300274 msdu->len + skb_tailroom(msdu),
275 DMA_FROM_DEVICE);
276 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
277 msdu->data, msdu->len + skb_tailroom(msdu));
Michal Kazior4de02802014-10-23 17:04:23 +0300278
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279 return msdu;
280}
281
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100282/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300283static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
284 u8 **fw_desc, int *fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +0200285 struct sk_buff_head *amsdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300286{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200287 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288 int msdu_len, msdu_chaining = 0;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200289 struct sk_buff *msdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300290 struct htt_rx_desc *rx_desc;
291
Michal Kazior45967082014-02-27 18:50:05 +0200292 lockdep_assert_held(&htt->rx_ring.lock);
293
Michal Kazior9aa505d2014-11-18 09:24:47 +0200294 for (;;) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300295 int last_msdu, msdu_len_invalid, msdu_chained;
296
Michal Kazior9aa505d2014-11-18 09:24:47 +0200297 msdu = ath10k_htt_rx_netbuf_pop(htt);
298 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200299 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200300 return -ENOENT;
Michal Kazior9aa505d2014-11-18 09:24:47 +0200301 }
302
303 __skb_queue_tail(amsdu, msdu);
304
Kalle Valo5e3dd152013-06-12 20:52:10 +0300305 rx_desc = (struct htt_rx_desc *)msdu->data;
306
307 /* FIXME: we must report msdu payload since this is what caller
308 * expects now */
309 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
310 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
311
312 /*
313 * Sanity check - confirm the HW is finished filling in the
314 * rx data.
315 * If the HW and SW are working correctly, then it's guaranteed
316 * that the HW's MAC DMA is done before this point in the SW.
317 * To prevent the case that we handle a stale Rx descriptor,
318 * just assert for now until we have a way to recover.
319 */
320 if (!(__le32_to_cpu(rx_desc->attention.flags)
321 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200322 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200323 return -EIO;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300324 }
325
326 /*
327 * Copy the FW rx descriptor for this MSDU from the rx
328 * indication message into the MSDU's netbuf. HL uses the
329 * same rx indication message definition as LL, and simply
330 * appends new info (fields from the HW rx desc, and the
331 * MSDU payload itself). So, the offset into the rx
332 * indication message only has to account for the standard
333 * offset of the per-MSDU FW rx desc info within the
334 * message, and how many bytes of the per-MSDU FW rx desc
335 * info have already been consumed. (And the endianness of
336 * the host, since for a big-endian host, the rx ind
337 * message contents, including the per-MSDU rx desc bytes,
338 * were byteswapped during upload.)
339 */
340 if (*fw_desc_len > 0) {
341 rx_desc->fw_desc.info0 = **fw_desc;
342 /*
343 * The target is expected to only provide the basic
344 * per-MSDU rx descriptors. Just to be sure, verify
345 * that the target has not attached extension data
346 * (e.g. LRO flow ID).
347 */
348
349 /* or more, if there's extension data */
350 (*fw_desc)++;
351 (*fw_desc_len)--;
352 } else {
353 /*
354 * When an oversized AMSDU happened, FW will lost
355 * some of MSDU status - in this case, the FW
356 * descriptors provided will be less than the
357 * actual MSDUs inside this MPDU. Mark the FW
358 * descriptors so that it will still deliver to
359 * upper stack, if no CRC error for this MPDU.
360 *
361 * FIX THIS - the FW descriptors are actually for
362 * MSDUs in the end of this A-MSDU instead of the
363 * beginning.
364 */
365 rx_desc->fw_desc.info0 = 0;
366 }
367
368 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
369 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
370 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700371 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300372 RX_MSDU_START_INFO0_MSDU_LENGTH);
373 msdu_chained = rx_desc->frag_info.ring2_more_count;
374
375 if (msdu_len_invalid)
376 msdu_len = 0;
377
378 skb_trim(msdu, 0);
379 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
380 msdu_len -= msdu->len;
381
Michal Kazior9aa505d2014-11-18 09:24:47 +0200382 /* Note: Chained buffers do not contain rx descriptor */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300383 while (msdu_chained--) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200384 msdu = ath10k_htt_rx_netbuf_pop(htt);
385 if (!msdu) {
Michal Kazior9aa505d2014-11-18 09:24:47 +0200386 __skb_queue_purge(amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +0200387 return -ENOENT;
Michal Kaziorb30595a2014-10-23 17:04:24 +0300388 }
389
Michal Kazior9aa505d2014-11-18 09:24:47 +0200390 __skb_queue_tail(amsdu, msdu);
391 skb_trim(msdu, 0);
392 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
393 msdu_len -= msdu->len;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300394 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300395 }
396
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700397 last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
Kalle Valo5e3dd152013-06-12 20:52:10 +0300398 RX_MSDU_END_INFO0_LAST_MSDU;
399
Michal Kaziorb04e2042014-10-23 17:04:27 +0300400 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300401 sizeof(*rx_desc) - sizeof(u32));
Michal Kazior9aa505d2014-11-18 09:24:47 +0200402
403 if (last_msdu)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300404 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300405 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300406
Michal Kazior9aa505d2014-11-18 09:24:47 +0200407 if (skb_queue_empty(amsdu))
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100408 msdu_chaining = -1;
409
Kalle Valo5e3dd152013-06-12 20:52:10 +0300410 /*
411 * Don't refill the ring yet.
412 *
413 * First, the elements popped here are still in use - it is not
414 * safe to overwrite them until the matching call to
415 * mpdu_desc_list_next. Second, for efficiency it is preferable to
416 * refill the rx ring with 1 PPDU's worth of rx buffers (something
417 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
418 * (something like 3 buffers). Consequently, we'll rely on the txrx
419 * SW to tell us when it is done pulling all the PPDU's rx buffers
420 * out of the rx ring, and then refill it just once.
421 */
422
423 return msdu_chaining;
424}
425
Michal Kazior6e712d42013-09-24 10:18:36 +0200426static void ath10k_htt_rx_replenish_task(unsigned long ptr)
427{
428 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300429
Michal Kazior6e712d42013-09-24 10:18:36 +0200430 ath10k_htt_rx_msdu_buff_replenish(htt);
431}
432
Michal Kaziorc5450702015-01-24 12:14:48 +0200433static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
434 u32 paddr)
435{
436 struct ath10k *ar = htt->ar;
437 struct ath10k_skb_rxcb *rxcb;
438 struct sk_buff *msdu;
439
440 lockdep_assert_held(&htt->rx_ring.lock);
441
442 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
443 if (!msdu)
444 return NULL;
445
446 rxcb = ATH10K_SKB_RXCB(msdu);
447 hash_del(&rxcb->hlist);
448 htt->rx_ring.fill_cnt--;
449
450 dma_unmap_single(htt->ar->dev, rxcb->paddr,
451 msdu->len + skb_tailroom(msdu),
452 DMA_FROM_DEVICE);
453 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
454 msdu->data, msdu->len + skb_tailroom(msdu));
455
456 return msdu;
457}
458
459static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
460 struct htt_rx_in_ord_ind *ev,
461 struct sk_buff_head *list)
462{
463 struct ath10k *ar = htt->ar;
464 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
465 struct htt_rx_desc *rxd;
466 struct sk_buff *msdu;
467 int msdu_count;
468 bool is_offload;
469 u32 paddr;
470
471 lockdep_assert_held(&htt->rx_ring.lock);
472
473 msdu_count = __le16_to_cpu(ev->msdu_count);
474 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
475
476 while (msdu_count--) {
477 paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
478
479 msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
480 if (!msdu) {
481 __skb_queue_purge(list);
482 return -ENOENT;
483 }
484
485 __skb_queue_tail(list, msdu);
486
487 if (!is_offload) {
488 rxd = (void *)msdu->data;
489
490 trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
491
492 skb_put(msdu, sizeof(*rxd));
493 skb_pull(msdu, sizeof(*rxd));
494 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
495
496 if (!(__le32_to_cpu(rxd->attention.flags) &
497 RX_ATTENTION_FLAGS_MSDU_DONE)) {
498 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
499 return -EIO;
500 }
501 }
502
503 msdu_desc++;
504 }
505
506 return 0;
507}
508
Michal Kazior95bf21f2014-05-16 17:15:39 +0300509int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300510{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200511 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300512 dma_addr_t paddr;
513 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300514 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
516
Michal Kazior51fc7d72014-10-23 17:04:24 +0300517 htt->rx_confused = false;
518
Michal Kaziorfe2407a2014-11-27 11:12:43 +0100519 /* XXX: The fill level could be changed during runtime in response to
520 * the host processing latency. Is this really worth it?
521 */
522 htt->rx_ring.size = HTT_RX_RING_SIZE;
523 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
524 htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
525
Kalle Valo5e3dd152013-06-12 20:52:10 +0300526 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200527 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 return -EINVAL;
529 }
530
Kalle Valo5e3dd152013-06-12 20:52:10 +0300531 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300532 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300533 GFP_KERNEL);
534 if (!htt->rx_ring.netbufs_ring)
535 goto err_netbuf;
536
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300537 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
538
539 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300540 if (!vaddr)
541 goto err_dma_ring;
542
543 htt->rx_ring.paddrs_ring = vaddr;
544 htt->rx_ring.base_paddr = paddr;
545
546 vaddr = dma_alloc_coherent(htt->ar->dev,
547 sizeof(*htt->rx_ring.alloc_idx.vaddr),
548 &paddr, GFP_DMA);
549 if (!vaddr)
550 goto err_dma_idx;
551
552 htt->rx_ring.alloc_idx.vaddr = vaddr;
553 htt->rx_ring.alloc_idx.paddr = paddr;
Michal Kaziorc5450702015-01-24 12:14:48 +0200554 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300555 *htt->rx_ring.alloc_idx.vaddr = 0;
556
557 /* Initialize the Rx refill retry timer */
558 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
559
560 spin_lock_init(&htt->rx_ring.lock);
561
562 htt->rx_ring.fill_cnt = 0;
Michal Kaziorc5450702015-01-24 12:14:48 +0200563 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
564 hash_init(htt->rx_ring.skb_table);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300565
Michal Kazior6e712d42013-09-24 10:18:36 +0200566 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
567 (unsigned long)htt);
568
Michal Kazior6c5151a2014-02-27 18:50:04 +0200569 skb_queue_head_init(&htt->tx_compl_q);
570 skb_queue_head_init(&htt->rx_compl_q);
Michal Kaziorc5450702015-01-24 12:14:48 +0200571 skb_queue_head_init(&htt->rx_in_ord_compl_q);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200572
573 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
574 (unsigned long)htt);
575
Michal Kazior7aa7a722014-08-25 12:09:38 +0200576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300577 htt->rx_ring.size, htt->rx_ring.fill_level);
578 return 0;
579
Kalle Valo5e3dd152013-06-12 20:52:10 +0300580err_dma_idx:
581 dma_free_coherent(htt->ar->dev,
582 (htt->rx_ring.size *
583 sizeof(htt->rx_ring.paddrs_ring)),
584 htt->rx_ring.paddrs_ring,
585 htt->rx_ring.base_paddr);
586err_dma_ring:
587 kfree(htt->rx_ring.netbufs_ring);
588err_netbuf:
589 return -ENOMEM;
590}
591
Michal Kazior7aa7a722014-08-25 12:09:38 +0200592static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
593 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300594{
595 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300596 case HTT_RX_MPDU_ENCRYPT_NONE:
597 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300598 case HTT_RX_MPDU_ENCRYPT_WEP40:
599 case HTT_RX_MPDU_ENCRYPT_WEP104:
600 return IEEE80211_WEP_IV_LEN;
601 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
602 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
603 return IEEE80211_TKIP_IV_LEN;
604 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
605 return IEEE80211_CCMP_HDR_LEN;
606 case HTT_RX_MPDU_ENCRYPT_WEP128:
607 case HTT_RX_MPDU_ENCRYPT_WAPI:
608 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300609 }
610
Michal Kazior890d3b22014-10-23 17:04:22 +0300611 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612 return 0;
613}
614
Michal Kazior890d3b22014-10-23 17:04:22 +0300615#define MICHAEL_MIC_LEN 8
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
618 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619{
620 switch (type) {
621 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300622 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300623 case HTT_RX_MPDU_ENCRYPT_WEP40:
624 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300625 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300626 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
627 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300628 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300629 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300630 return IEEE80211_CCMP_MIC_LEN;
631 case HTT_RX_MPDU_ENCRYPT_WEP128:
632 case HTT_RX_MPDU_ENCRYPT_WAPI:
633 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300634 }
635
Michal Kazior890d3b22014-10-23 17:04:22 +0300636 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300637 return 0;
638}
639
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300640struct amsdu_subframe_hdr {
641 u8 dst[ETH_ALEN];
642 u8 src[ETH_ALEN];
643 __be16 len;
644} __packed;
645
Michal Kazior6986fdd2015-08-27 14:47:33 +0200646#define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
647
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100648static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200649 struct ieee80211_rx_status *status,
650 struct htt_rx_desc *rxd)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100651{
Michal Kazior5528e032015-03-30 09:51:56 +0300652 struct ieee80211_supported_band *sband;
653 u8 cck, rate, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100654 u8 preamble = 0;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200655 u8 group_id;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200656 u32 info1, info2, info3;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100657
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200658 info1 = __le32_to_cpu(rxd->ppdu_start.info1);
659 info2 = __le32_to_cpu(rxd->ppdu_start.info2);
660 info3 = __le32_to_cpu(rxd->ppdu_start.info3);
661
662 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100663
664 switch (preamble) {
665 case HTT_RX_LEGACY:
Michal Kazior5528e032015-03-30 09:51:56 +0300666 /* To get legacy rate index band is required. Since band can't
667 * be undefined check if freq is non-zero.
668 */
669 if (!status->freq)
670 return;
671
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200672 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
673 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
Michal Kazior5528e032015-03-30 09:51:56 +0300674 rate &= ~RX_PPDU_START_RATE_FLAG;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100675
Michal Kazior5528e032015-03-30 09:51:56 +0300676 sband = &ar->mac.sbands[status->band];
677 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100678 break;
679 case HTT_RX_HT:
680 case HTT_RX_HT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200681 /* HT-SIG - Table 20-11 in info2 and info3 */
682 mcs = info2 & 0x1F;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100683 nss = mcs >> 3;
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200684 bw = (info2 >> 7) & 1;
685 sgi = (info3 >> 7) & 1;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100686
687 status->rate_idx = mcs;
688 status->flag |= RX_FLAG_HT;
689 if (sgi)
690 status->flag |= RX_FLAG_SHORT_GI;
691 if (bw)
692 status->flag |= RX_FLAG_40MHZ;
693 break;
694 case HTT_RX_VHT:
695 case HTT_RX_VHT_WITH_TXBF:
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200696 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100697 TODO check this */
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200698 bw = info2 & 3;
699 sgi = info3 & 1;
Michal Kazior6986fdd2015-08-27 14:47:33 +0200700 group_id = (info2 >> 4) & 0x3F;
701
702 if (GROUP_ID_IS_SU_MIMO(group_id)) {
703 mcs = (info3 >> 4) & 0x0F;
704 nss = ((info2 >> 10) & 0x07) + 1;
705 } else {
706 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
707 * so it's impossible to decode MCS. Also since
708 * firmware consumes Group Id Management frames host
709 * has no knowledge regarding group/user position
710 * mapping so it's impossible to pick the correct Nsts
711 * from VHT-SIG-A1.
712 *
713 * Bandwidth and SGI are valid so report the rateinfo
714 * on best-effort basis.
715 */
716 mcs = 0;
717 nss = 1;
718 }
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100719
Manikanta Pubbisetty6ccea102015-09-02 17:05:27 +0300720 if (mcs > 0x09) {
721 ath10k_warn(ar, "invalid MCS received %u\n", mcs);
722 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
723 __le32_to_cpu(rxd->attention.flags),
724 __le32_to_cpu(rxd->mpdu_start.info0),
725 __le32_to_cpu(rxd->mpdu_start.info1),
726 __le32_to_cpu(rxd->msdu_start.common.info0),
727 __le32_to_cpu(rxd->msdu_start.common.info1),
728 rxd->ppdu_start.info0,
729 __le32_to_cpu(rxd->ppdu_start.info1),
730 __le32_to_cpu(rxd->ppdu_start.info2),
731 __le32_to_cpu(rxd->ppdu_start.info3),
732 __le32_to_cpu(rxd->ppdu_start.info4));
733
734 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
735 __le32_to_cpu(rxd->msdu_end.common.info0),
736 __le32_to_cpu(rxd->mpdu_end.info0));
737
738 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
739 "rx desc msdu payload: ",
740 rxd->msdu_payload, 50);
741 }
742
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100743 status->rate_idx = mcs;
744 status->vht_nss = nss;
745
746 if (sgi)
747 status->flag |= RX_FLAG_SHORT_GI;
748
749 switch (bw) {
750 /* 20MHZ */
751 case 0:
752 break;
753 /* 40MHZ */
754 case 1:
755 status->flag |= RX_FLAG_40MHZ;
756 break;
757 /* 80MHZ */
758 case 2:
759 status->vht_flag |= RX_VHT_FLAG_80MHZ;
760 }
761
762 status->flag |= RX_FLAG_VHT;
763 break;
764 default:
765 break;
766 }
767}
768
Michal Kazior500ff9f2015-03-31 10:26:21 +0000769static struct ieee80211_channel *
770ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
771{
772 struct ath10k_peer *peer;
773 struct ath10k_vif *arvif;
774 struct cfg80211_chan_def def;
775 u16 peer_id;
776
777 lockdep_assert_held(&ar->data_lock);
778
779 if (!rxd)
780 return NULL;
781
782 if (rxd->attention.flags &
783 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
784 return NULL;
785
Peter Oh1f5dbfb2015-07-15 19:01:21 -0700786 if (!(rxd->msdu_end.common.info0 &
Michal Kazior500ff9f2015-03-31 10:26:21 +0000787 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
788 return NULL;
789
790 peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
791 RX_MPDU_START_INFO0_PEER_IDX);
792
793 peer = ath10k_peer_find_by_id(ar, peer_id);
794 if (!peer)
795 return NULL;
796
797 arvif = ath10k_get_arvif(ar, peer->vdev_id);
798 if (WARN_ON_ONCE(!arvif))
799 return NULL;
800
801 if (WARN_ON(ath10k_mac_vif_chan(arvif->vif, &def)))
802 return NULL;
803
804 return def.chan;
805}
806
807static struct ieee80211_channel *
808ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
809{
810 struct ath10k_vif *arvif;
811 struct cfg80211_chan_def def;
812
813 lockdep_assert_held(&ar->data_lock);
814
815 list_for_each_entry(arvif, &ar->arvifs, list) {
816 if (arvif->vdev_id == vdev_id &&
817 ath10k_mac_vif_chan(arvif->vif, &def) == 0)
818 return def.chan;
819 }
820
821 return NULL;
822}
823
824static void
825ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
826 struct ieee80211_chanctx_conf *conf,
827 void *data)
828{
829 struct cfg80211_chan_def *def = data;
830
831 *def = conf->def;
832}
833
834static struct ieee80211_channel *
835ath10k_htt_rx_h_any_channel(struct ath10k *ar)
836{
837 struct cfg80211_chan_def def = {};
838
839 ieee80211_iter_chan_contexts_atomic(ar->hw,
840 ath10k_htt_rx_h_any_chan_iter,
841 &def);
842
843 return def.chan;
844}
845
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100846static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000847 struct ieee80211_rx_status *status,
848 struct htt_rx_desc *rxd,
849 u32 vdev_id)
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100850{
851 struct ieee80211_channel *ch;
852
853 spin_lock_bh(&ar->data_lock);
854 ch = ar->scan_channel;
855 if (!ch)
856 ch = ar->rx_channel;
Michal Kazior500ff9f2015-03-31 10:26:21 +0000857 if (!ch)
858 ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
859 if (!ch)
860 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
861 if (!ch)
862 ch = ath10k_htt_rx_h_any_channel(ar);
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100863 spin_unlock_bh(&ar->data_lock);
864
865 if (!ch)
866 return false;
867
868 status->band = ch->band;
869 status->freq = ch->center_freq;
870
871 return true;
872}
873
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200874static void ath10k_htt_rx_h_signal(struct ath10k *ar,
875 struct ieee80211_rx_status *status,
876 struct htt_rx_desc *rxd)
877{
878 /* FIXME: Get real NF */
879 status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
880 rxd->ppdu_start.rssi_comb;
881 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
882}
883
884static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
885 struct ieee80211_rx_status *status,
886 struct htt_rx_desc *rxd)
887{
888 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
889 * means all prior MSDUs in a PPDU are reported to mac80211 without the
890 * TSF. Is it worth holding frames until end of PPDU is known?
891 *
892 * FIXME: Can we get/compute 64bit TSF?
893 */
Michal Kazior3ec79e32015-01-24 12:14:48 +0200894 status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200895 status->flag |= RX_FLAG_MACTIME_END;
896}
897
898static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
899 struct sk_buff_head *amsdu,
Michal Kazior500ff9f2015-03-31 10:26:21 +0000900 struct ieee80211_rx_status *status,
901 u32 vdev_id)
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200902{
903 struct sk_buff *first;
904 struct htt_rx_desc *rxd;
905 bool is_first_ppdu;
906 bool is_last_ppdu;
907
908 if (skb_queue_empty(amsdu))
909 return;
910
911 first = skb_peek(amsdu);
912 rxd = (void *)first->data - sizeof(*rxd);
913
914 is_first_ppdu = !!(rxd->attention.flags &
915 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
916 is_last_ppdu = !!(rxd->attention.flags &
917 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
918
919 if (is_first_ppdu) {
920 /* New PPDU starts so clear out the old per-PPDU status. */
921 status->freq = 0;
922 status->rate_idx = 0;
923 status->vht_nss = 0;
924 status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
925 status->flag &= ~(RX_FLAG_HT |
926 RX_FLAG_VHT |
927 RX_FLAG_SHORT_GI |
928 RX_FLAG_40MHZ |
929 RX_FLAG_MACTIME_END);
930 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
931
932 ath10k_htt_rx_h_signal(ar, status, rxd);
Michal Kazior500ff9f2015-03-31 10:26:21 +0000933 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
Michal Kaziorb9fd8a82014-11-18 09:24:49 +0200934 ath10k_htt_rx_h_rates(ar, status, rxd);
935 }
936
937 if (is_last_ppdu)
938 ath10k_htt_rx_h_mactime(ar, status, rxd);
939}
940
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300941static const char * const tid_to_ac[] = {
942 "BE",
943 "BK",
944 "BK",
945 "BE",
946 "VI",
947 "VI",
948 "VO",
949 "VO",
950};
951
952static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
953{
954 u8 *qc;
955 int tid;
956
957 if (!ieee80211_is_data_qos(hdr->frame_control))
958 return "";
959
960 qc = ieee80211_get_qos_ctl(hdr);
961 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
962 if (tid < 8)
963 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
964 else
965 snprintf(out, size, "tid %d", tid);
966
967 return out;
968}
969
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100970static void ath10k_process_rx(struct ath10k *ar,
971 struct ieee80211_rx_status *rx_status,
972 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100973{
974 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300975 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
976 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100977
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100978 status = IEEE80211_SKB_RXCB(skb);
979 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100980
Michal Kazior7aa7a722014-08-25 12:09:38 +0200981 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300982 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100983 skb,
984 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300985 ieee80211_get_SA(hdr),
986 ath10k_get_tid(hdr, tid, sizeof(tid)),
987 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
988 "mcast" : "ucast",
989 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100990 status->flag == 0 ? "legacy" : "",
991 status->flag & RX_FLAG_HT ? "ht" : "",
992 status->flag & RX_FLAG_VHT ? "vht" : "",
993 status->flag & RX_FLAG_40MHZ ? "40" : "",
994 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
995 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
996 status->rate_idx,
997 status->vht_nss,
998 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100999 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001000 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +03001001 !!(status->flag & RX_FLAG_MMIC_ERROR),
1002 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +02001003 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001004 skb->data, skb->len);
Rajkumar Manoharan5ce8e7f2014-11-05 19:14:31 +05301005 trace_ath10k_rx_hdr(ar, skb->data, skb->len);
1006 trace_ath10k_rx_payload(ar, skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001007
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001008 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +01001009}
1010
Michal Kazior48f4ca32015-05-19 14:09:34 +02001011static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
1012 struct ieee80211_hdr *hdr)
Michal Kaziord960c362014-02-25 09:29:57 +02001013{
Michal Kazior48f4ca32015-05-19 14:09:34 +02001014 int len = ieee80211_hdrlen(hdr->frame_control);
1015
1016 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
1017 ar->fw_features))
1018 len = round_up(len, 4);
1019
1020 return len;
Michal Kaziord960c362014-02-25 09:29:57 +02001021}
1022
Michal Kazior581c25f2014-11-18 09:24:48 +02001023static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
1024 struct sk_buff *msdu,
1025 struct ieee80211_rx_status *status,
1026 enum htt_rx_mpdu_encrypt_type enctype,
1027 bool is_decrypted)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001028{
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001029 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001030 struct htt_rx_desc *rxd;
1031 size_t hdr_len;
1032 size_t crypto_len;
1033 bool is_first;
1034 bool is_last;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001035
Michal Kazior581c25f2014-11-18 09:24:48 +02001036 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001037 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001038 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001039 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001040 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
Michal Kazior9aa505d2014-11-18 09:24:47 +02001041
Michal Kazior581c25f2014-11-18 09:24:48 +02001042 /* Delivered decapped frame:
1043 * [802.11 header]
1044 * [crypto param] <-- can be trimmed if !fcs_err &&
1045 * !decrypt_err && !peer_idx_invalid
1046 * [amsdu header] <-- only if A-MSDU
1047 * [rfc1042/llc]
1048 * [payload]
1049 * [FCS] <-- at end, needs to be trimmed
1050 */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001051
Michal Kazior581c25f2014-11-18 09:24:48 +02001052 /* This probably shouldn't happen but warn just in case */
1053 if (unlikely(WARN_ON_ONCE(!is_first)))
1054 return;
1055
1056 /* This probably shouldn't happen but warn just in case */
1057 if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
1058 return;
1059
1060 skb_trim(msdu, msdu->len - FCS_LEN);
1061
1062 /* In most cases this will be true for sniffed frames. It makes sense
David Liuccec9032015-07-24 20:25:32 +03001063 * to deliver them as-is without stripping the crypto param. This is
1064 * necessary for software based decryption.
Michal Kazior581c25f2014-11-18 09:24:48 +02001065 *
1066 * If there's no error then the frame is decrypted. At least that is
1067 * the case for frames that come in via fragmented rx indication.
1068 */
1069 if (!is_decrypted)
1070 return;
1071
1072 /* The payload is decrypted so strip crypto params. Start from tail
1073 * since hdr is used to compute some stuff.
1074 */
1075
1076 hdr = (void *)msdu->data;
1077
1078 /* Tail */
1079 skb_trim(msdu, msdu->len - ath10k_htt_rx_crypto_tail_len(ar, enctype));
1080
1081 /* MMIC */
1082 if (!ieee80211_has_morefrags(hdr->frame_control) &&
1083 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
1084 skb_trim(msdu, msdu->len - 8);
1085
1086 /* Head */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001087 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001088 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001089
Michal Kazior581c25f2014-11-18 09:24:48 +02001090 memmove((void *)msdu->data + crypto_len,
1091 (void *)msdu->data, hdr_len);
1092 skb_pull(msdu, crypto_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001093}
1094
Michal Kazior581c25f2014-11-18 09:24:48 +02001095static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
1096 struct sk_buff *msdu,
1097 struct ieee80211_rx_status *status,
1098 const u8 first_hdr[64])
Kalle Valo5e3dd152013-06-12 20:52:10 +03001099{
Kalle Valo5e3dd152013-06-12 20:52:10 +03001100 struct ieee80211_hdr *hdr;
Michal Kazior581c25f2014-11-18 09:24:48 +02001101 size_t hdr_len;
1102 u8 da[ETH_ALEN];
1103 u8 sa[ETH_ALEN];
Kalle Valo5e3dd152013-06-12 20:52:10 +03001104
Michal Kazior581c25f2014-11-18 09:24:48 +02001105 /* Delivered decapped frame:
1106 * [nwifi 802.11 header] <-- replaced with 802.11 hdr
1107 * [rfc1042/llc]
1108 *
1109 * Note: The nwifi header doesn't have QoS Control and is
1110 * (always?) a 3addr frame.
1111 *
1112 * Note2: There's no A-MSDU subframe header. Even if it's part
1113 * of an A-MSDU.
1114 */
1115
1116 /* pull decapped header and copy SA & DA */
1117 hdr = (struct ieee80211_hdr *)msdu->data;
Michal Kazior48f4ca32015-05-19 14:09:34 +02001118 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
Michal Kazior581c25f2014-11-18 09:24:48 +02001119 ether_addr_copy(da, ieee80211_get_DA(hdr));
1120 ether_addr_copy(sa, ieee80211_get_SA(hdr));
1121 skb_pull(msdu, hdr_len);
1122
1123 /* push original 802.11 header */
1124 hdr = (struct ieee80211_hdr *)first_hdr;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001125 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001126 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001127
Michal Kazior581c25f2014-11-18 09:24:48 +02001128 /* original 802.11 header has a different DA and in
1129 * case of 4addr it may also have different SA
1130 */
1131 hdr = (struct ieee80211_hdr *)msdu->data;
1132 ether_addr_copy(ieee80211_get_DA(hdr), da);
1133 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1134}
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001135
Michal Kazior581c25f2014-11-18 09:24:48 +02001136static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
1137 struct sk_buff *msdu,
1138 enum htt_rx_mpdu_encrypt_type enctype)
1139{
1140 struct ieee80211_hdr *hdr;
1141 struct htt_rx_desc *rxd;
1142 size_t hdr_len, crypto_len;
1143 void *rfc1042;
1144 bool is_first, is_last, is_amsdu;
Michal Kazior784f69d2013-09-26 10:12:23 +03001145
Michal Kazior581c25f2014-11-18 09:24:48 +02001146 rxd = (void *)msdu->data - sizeof(*rxd);
1147 hdr = (void *)rxd->rx_hdr_status;
1148
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001149 is_first = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001150 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001151 is_last = !!(rxd->msdu_end.common.info0 &
Michal Kazior581c25f2014-11-18 09:24:48 +02001152 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
1153 is_amsdu = !(is_first && is_last);
1154
1155 rfc1042 = hdr;
1156
1157 if (is_first) {
Michal Kazior784f69d2013-09-26 10:12:23 +03001158 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior581c25f2014-11-18 09:24:48 +02001159 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001160
Michal Kazior581c25f2014-11-18 09:24:48 +02001161 rfc1042 += round_up(hdr_len, 4) +
1162 round_up(crypto_len, 4);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001163 }
1164
Michal Kazior581c25f2014-11-18 09:24:48 +02001165 if (is_amsdu)
1166 rfc1042 += sizeof(struct amsdu_subframe_hdr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001167
Michal Kazior581c25f2014-11-18 09:24:48 +02001168 return rfc1042;
1169}
1170
1171static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
1172 struct sk_buff *msdu,
1173 struct ieee80211_rx_status *status,
1174 const u8 first_hdr[64],
1175 enum htt_rx_mpdu_encrypt_type enctype)
1176{
1177 struct ieee80211_hdr *hdr;
1178 struct ethhdr *eth;
1179 size_t hdr_len;
1180 void *rfc1042;
1181 u8 da[ETH_ALEN];
1182 u8 sa[ETH_ALEN];
1183
1184 /* Delivered decapped frame:
1185 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
1186 * [payload]
1187 */
1188
1189 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
1190 if (WARN_ON_ONCE(!rfc1042))
1191 return;
1192
1193 /* pull decapped header and copy SA & DA */
1194 eth = (struct ethhdr *)msdu->data;
1195 ether_addr_copy(da, eth->h_dest);
1196 ether_addr_copy(sa, eth->h_source);
1197 skb_pull(msdu, sizeof(struct ethhdr));
1198
1199 /* push rfc1042/llc/snap */
1200 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
1201 sizeof(struct rfc1042_hdr));
1202
1203 /* push original 802.11 header */
1204 hdr = (struct ieee80211_hdr *)first_hdr;
1205 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1206 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1207
1208 /* original 802.11 header has a different DA and in
1209 * case of 4addr it may also have different SA
1210 */
1211 hdr = (struct ieee80211_hdr *)msdu->data;
1212 ether_addr_copy(ieee80211_get_DA(hdr), da);
1213 ether_addr_copy(ieee80211_get_SA(hdr), sa);
1214}
1215
1216static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
1217 struct sk_buff *msdu,
1218 struct ieee80211_rx_status *status,
1219 const u8 first_hdr[64])
1220{
1221 struct ieee80211_hdr *hdr;
1222 size_t hdr_len;
1223
1224 /* Delivered decapped frame:
1225 * [amsdu header] <-- replaced with 802.11 hdr
1226 * [rfc1042/llc]
1227 * [payload]
1228 */
1229
1230 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
1231
1232 hdr = (struct ieee80211_hdr *)first_hdr;
1233 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1234 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
1235}
1236
1237static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
1238 struct sk_buff *msdu,
1239 struct ieee80211_rx_status *status,
1240 u8 first_hdr[64],
1241 enum htt_rx_mpdu_encrypt_type enctype,
1242 bool is_decrypted)
1243{
1244 struct htt_rx_desc *rxd;
1245 enum rx_msdu_decap_format decap;
Michal Kazior581c25f2014-11-18 09:24:48 +02001246
1247 /* First msdu's decapped header:
1248 * [802.11 header] <-- padded to 4 bytes long
1249 * [crypto param] <-- padded to 4 bytes long
1250 * [amsdu header] <-- only if A-MSDU
1251 * [rfc1042/llc]
1252 *
1253 * Other (2nd, 3rd, ..) msdu's decapped header:
1254 * [amsdu header] <-- only if A-MSDU
1255 * [rfc1042/llc]
1256 */
1257
1258 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001259 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001260 RX_MSDU_START_INFO1_DECAP_FORMAT);
1261
1262 switch (decap) {
1263 case RX_MSDU_DECAP_RAW:
1264 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
1265 is_decrypted);
1266 break;
1267 case RX_MSDU_DECAP_NATIVE_WIFI:
1268 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
1269 break;
1270 case RX_MSDU_DECAP_ETHERNET2_DIX:
1271 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
1272 break;
1273 case RX_MSDU_DECAP_8023_SNAP_LLC:
1274 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
1275 break;
1276 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001277}
1278
Michal Kazior605f81a2013-07-31 10:47:56 +02001279static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1280{
1281 struct htt_rx_desc *rxd;
1282 u32 flags, info;
1283 bool is_ip4, is_ip6;
1284 bool is_tcp, is_udp;
1285 bool ip_csum_ok, tcpudp_csum_ok;
1286
1287 rxd = (void *)skb->data - sizeof(*rxd);
1288 flags = __le32_to_cpu(rxd->attention.flags);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001289 info = __le32_to_cpu(rxd->msdu_start.common.info1);
Michal Kazior605f81a2013-07-31 10:47:56 +02001290
1291 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1292 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1293 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1294 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1295 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1296 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1297
1298 if (!is_ip4 && !is_ip6)
1299 return CHECKSUM_NONE;
1300 if (!is_tcp && !is_udp)
1301 return CHECKSUM_NONE;
1302 if (!ip_csum_ok)
1303 return CHECKSUM_NONE;
1304 if (!tcpudp_csum_ok)
1305 return CHECKSUM_NONE;
1306
1307 return CHECKSUM_UNNECESSARY;
1308}
1309
Michal Kazior581c25f2014-11-18 09:24:48 +02001310static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
1311{
1312 msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
1313}
1314
1315static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
1316 struct sk_buff_head *amsdu,
1317 struct ieee80211_rx_status *status)
1318{
1319 struct sk_buff *first;
1320 struct sk_buff *last;
1321 struct sk_buff *msdu;
1322 struct htt_rx_desc *rxd;
1323 struct ieee80211_hdr *hdr;
1324 enum htt_rx_mpdu_encrypt_type enctype;
1325 u8 first_hdr[64];
1326 u8 *qos;
1327 size_t hdr_len;
1328 bool has_fcs_err;
1329 bool has_crypto_err;
1330 bool has_tkip_err;
1331 bool has_peer_idx_invalid;
1332 bool is_decrypted;
1333 u32 attention;
1334
1335 if (skb_queue_empty(amsdu))
1336 return;
1337
1338 first = skb_peek(amsdu);
1339 rxd = (void *)first->data - sizeof(*rxd);
1340
1341 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1342 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
1343
1344 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
1345 * decapped header. It'll be used for undecapping of each MSDU.
1346 */
1347 hdr = (void *)rxd->rx_hdr_status;
1348 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1349 memcpy(first_hdr, hdr, hdr_len);
1350
1351 /* Each A-MSDU subframe will use the original header as the base and be
1352 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
1353 */
1354 hdr = (void *)first_hdr;
1355 qos = ieee80211_get_qos_ctl(hdr);
1356 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
1357
1358 /* Some attention flags are valid only in the last MSDU. */
1359 last = skb_peek_tail(amsdu);
1360 rxd = (void *)last->data - sizeof(*rxd);
1361 attention = __le32_to_cpu(rxd->attention.flags);
1362
1363 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
1364 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
1365 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1366 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
1367
1368 /* Note: If hardware captures an encrypted frame that it can't decrypt,
1369 * e.g. due to fcs error, missing peer or invalid key data it will
1370 * report the frame as raw.
1371 */
1372 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
1373 !has_fcs_err &&
1374 !has_crypto_err &&
1375 !has_peer_idx_invalid);
1376
1377 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
1378 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
1379 RX_FLAG_MMIC_ERROR |
1380 RX_FLAG_DECRYPTED |
1381 RX_FLAG_IV_STRIPPED |
1382 RX_FLAG_MMIC_STRIPPED);
1383
1384 if (has_fcs_err)
1385 status->flag |= RX_FLAG_FAILED_FCS_CRC;
1386
1387 if (has_tkip_err)
1388 status->flag |= RX_FLAG_MMIC_ERROR;
1389
1390 if (is_decrypted)
1391 status->flag |= RX_FLAG_DECRYPTED |
1392 RX_FLAG_IV_STRIPPED |
1393 RX_FLAG_MMIC_STRIPPED;
1394
1395 skb_queue_walk(amsdu, msdu) {
1396 ath10k_htt_rx_h_csum_offload(msdu);
1397 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
1398 is_decrypted);
1399
1400 /* Undecapping involves copying the original 802.11 header back
1401 * to sk_buff. If frame is protected and hardware has decrypted
1402 * it then remove the protected bit.
1403 */
1404 if (!is_decrypted)
1405 continue;
1406
1407 hdr = (void *)msdu->data;
1408 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1409 }
1410}
1411
1412static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
1413 struct sk_buff_head *amsdu,
1414 struct ieee80211_rx_status *status)
1415{
1416 struct sk_buff *msdu;
1417
1418 while ((msdu = __skb_dequeue(amsdu))) {
1419 /* Setup per-MSDU flags */
1420 if (skb_queue_empty(amsdu))
1421 status->flag &= ~RX_FLAG_AMSDU_MORE;
1422 else
1423 status->flag |= RX_FLAG_AMSDU_MORE;
1424
1425 ath10k_process_rx(ar, status, msdu);
1426 }
1427}
1428
Michal Kazior9aa505d2014-11-18 09:24:47 +02001429static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
Ben Greearbfa35362014-03-03 14:07:09 -08001430{
Michal Kazior9aa505d2014-11-18 09:24:47 +02001431 struct sk_buff *skb, *first;
Ben Greearbfa35362014-03-03 14:07:09 -08001432 int space;
1433 int total_len = 0;
1434
1435 /* TODO: Might could optimize this by using
1436 * skb_try_coalesce or similar method to
1437 * decrease copying, or maybe get mac80211 to
1438 * provide a way to just receive a list of
1439 * skb?
1440 */
1441
Michal Kazior9aa505d2014-11-18 09:24:47 +02001442 first = __skb_dequeue(amsdu);
Ben Greearbfa35362014-03-03 14:07:09 -08001443
1444 /* Allocate total length all at once. */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001445 skb_queue_walk(amsdu, skb)
1446 total_len += skb->len;
Ben Greearbfa35362014-03-03 14:07:09 -08001447
Michal Kazior9aa505d2014-11-18 09:24:47 +02001448 space = total_len - skb_tailroom(first);
Ben Greearbfa35362014-03-03 14:07:09 -08001449 if ((space > 0) &&
Michal Kazior9aa505d2014-11-18 09:24:47 +02001450 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
Ben Greearbfa35362014-03-03 14:07:09 -08001451 /* TODO: bump some rx-oom error stat */
1452 /* put it back together so we can free the
1453 * whole list at once.
1454 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001455 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001456 return -1;
1457 }
1458
1459 /* Walk list again, copying contents into
1460 * msdu_head
1461 */
Michal Kazior9aa505d2014-11-18 09:24:47 +02001462 while ((skb = __skb_dequeue(amsdu))) {
1463 skb_copy_from_linear_data(skb, skb_put(first, skb->len),
1464 skb->len);
1465 dev_kfree_skb_any(skb);
Ben Greearbfa35362014-03-03 14:07:09 -08001466 }
1467
Michal Kazior9aa505d2014-11-18 09:24:47 +02001468 __skb_queue_head(amsdu, first);
Ben Greearbfa35362014-03-03 14:07:09 -08001469 return 0;
1470}
1471
Michal Kazior581c25f2014-11-18 09:24:48 +02001472static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
1473 struct sk_buff_head *amsdu,
1474 bool chained)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001475{
Michal Kazior581c25f2014-11-18 09:24:48 +02001476 struct sk_buff *first;
1477 struct htt_rx_desc *rxd;
1478 enum rx_msdu_decap_format decap;
Michal Kazior7aa7a722014-08-25 12:09:38 +02001479
Michal Kazior581c25f2014-11-18 09:24:48 +02001480 first = skb_peek(amsdu);
1481 rxd = (void *)first->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001482 decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
Michal Kazior581c25f2014-11-18 09:24:48 +02001483 RX_MSDU_START_INFO1_DECAP_FORMAT);
1484
1485 if (!chained)
1486 return;
1487
1488 /* FIXME: Current unchaining logic can only handle simple case of raw
1489 * msdu chaining. If decapping is other than raw the chaining may be
1490 * more complex and this isn't handled by the current code. Don't even
1491 * try re-constructing such frames - it'll be pretty much garbage.
1492 */
1493 if (decap != RX_MSDU_DECAP_RAW ||
1494 skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
1495 __skb_queue_purge(amsdu);
1496 return;
1497 }
1498
1499 ath10k_unchain_msdu(amsdu);
1500}
1501
1502static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
1503 struct sk_buff_head *amsdu,
1504 struct ieee80211_rx_status *rx_status)
1505{
1506 struct sk_buff *msdu;
1507 struct htt_rx_desc *rxd;
Michal Kaziord67d0a02014-11-24 15:34:08 +01001508 bool is_mgmt;
1509 bool has_fcs_err;
Michal Kazior581c25f2014-11-18 09:24:48 +02001510
1511 msdu = skb_peek(amsdu);
1512 rxd = (void *)msdu->data - sizeof(*rxd);
1513
1514 /* FIXME: It might be a good idea to do some fuzzy-testing to drop
1515 * invalid/dangerous frames.
1516 */
1517
1518 if (!rx_status->freq) {
1519 ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001520 return false;
1521 }
1522
Michal Kaziord67d0a02014-11-24 15:34:08 +01001523 is_mgmt = !!(rxd->attention.flags &
1524 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
1525 has_fcs_err = !!(rxd->attention.flags &
1526 __cpu_to_le32(RX_ATTENTION_FLAGS_FCS_ERR));
1527
Michal Kazior581c25f2014-11-18 09:24:48 +02001528 /* Management frames are handled via WMI events. The pros of such
1529 * approach is that channel is explicitly provided in WMI events
1530 * whereas HTT doesn't provide channel information for Rxed frames.
Michal Kaziord67d0a02014-11-24 15:34:08 +01001531 *
1532 * However some firmware revisions don't report corrupted frames via
1533 * WMI so don't drop them.
Michal Kazior581c25f2014-11-18 09:24:48 +02001534 */
Michal Kaziord67d0a02014-11-24 15:34:08 +01001535 if (is_mgmt && !has_fcs_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001536 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001537 return false;
1538 }
1539
Michal Kazior581c25f2014-11-18 09:24:48 +02001540 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
1541 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001542 return false;
1543 }
1544
1545 return true;
1546}
1547
Michal Kazior581c25f2014-11-18 09:24:48 +02001548static void ath10k_htt_rx_h_filter(struct ath10k *ar,
1549 struct sk_buff_head *amsdu,
1550 struct ieee80211_rx_status *rx_status)
1551{
1552 if (skb_queue_empty(amsdu))
1553 return;
1554
1555 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
1556 return;
1557
1558 __skb_queue_purge(amsdu);
1559}
1560
Kalle Valo5e3dd152013-06-12 20:52:10 +03001561static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1562 struct htt_rx_indication *rx)
1563{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001564 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001565 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001566 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001567 struct sk_buff_head amsdu;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001568 int num_mpdu_ranges;
1569 int fw_desc_len;
1570 u8 *fw_desc;
Michal Kaziord5406902014-11-18 09:24:47 +02001571 int i, ret, mpdu_count = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001572
Michal Kazior45967082014-02-27 18:50:05 +02001573 lockdep_assert_held(&htt->rx_ring.lock);
1574
Michal Kaziore0bd7512014-11-18 09:24:48 +02001575 if (htt->rx_confused)
1576 return;
1577
Kalle Valo5e3dd152013-06-12 20:52:10 +03001578 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1579 fw_desc = (u8 *)&rx->fw_desc;
1580
1581 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1582 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1583 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1584
Michal Kazior7aa7a722014-08-25 12:09:38 +02001585 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001586 rx, sizeof(*rx) +
1587 (sizeof(struct htt_rx_indication_mpdu_range) *
1588 num_mpdu_ranges));
1589
Michal Kaziord5406902014-11-18 09:24:47 +02001590 for (i = 0; i < num_mpdu_ranges; i++)
1591 mpdu_count += mpdu_ranges[i].mpdu_count;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001592
Michal Kaziord5406902014-11-18 09:24:47 +02001593 while (mpdu_count--) {
Michal Kaziord5406902014-11-18 09:24:47 +02001594 __skb_queue_head_init(&amsdu);
1595 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001596 &fw_desc_len, &amsdu);
Michal Kaziord5406902014-11-18 09:24:47 +02001597 if (ret < 0) {
Michal Kaziore0bd7512014-11-18 09:24:48 +02001598 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
Michal Kaziord5406902014-11-18 09:24:47 +02001599 __skb_queue_purge(&amsdu);
Michal Kaziore0bd7512014-11-18 09:24:48 +02001600 /* FIXME: It's probably a good idea to reboot the
1601 * device instead of leaving it inoperable.
1602 */
1603 htt->rx_confused = true;
1604 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001605 }
Michal Kaziord5406902014-11-18 09:24:47 +02001606
Michal Kazior500ff9f2015-03-31 10:26:21 +00001607 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001608 ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
1609 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1610 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1611 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001612 }
1613
Michal Kazior6e712d42013-09-24 10:18:36 +02001614 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001615}
1616
1617static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001618 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001619{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001620 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001621 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Michal Kazior9aa505d2014-11-18 09:24:47 +02001622 struct sk_buff_head amsdu;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001623 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001624 u8 *fw_desc;
Michal Kazior581c25f2014-11-18 09:24:48 +02001625 int fw_desc_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001626
1627 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1628 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1629
Michal Kazior9aa505d2014-11-18 09:24:47 +02001630 __skb_queue_head_init(&amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001631
1632 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001633 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Michal Kaziorf0e27702014-11-18 09:24:49 +02001634 &amsdu);
Michal Kazior45967082014-02-27 18:50:05 +02001635 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001636
Michal Kazior686687c2014-10-23 17:04:24 +03001637 tasklet_schedule(&htt->rx_replenish_task);
1638
Michal Kazior7aa7a722014-08-25 12:09:38 +02001639 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001640
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001641 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001642 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001643 ret);
Michal Kazior9aa505d2014-11-18 09:24:47 +02001644 __skb_queue_purge(&amsdu);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001645 return;
1646 }
1647
Michal Kazior9aa505d2014-11-18 09:24:47 +02001648 if (skb_queue_len(&amsdu) != 1) {
1649 ath10k_warn(ar, "failed to pop frag amsdu: too many msdus\n");
1650 __skb_queue_purge(&amsdu);
1651 return;
1652 }
1653
Michal Kazior500ff9f2015-03-31 10:26:21 +00001654 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff);
Michal Kazior581c25f2014-11-18 09:24:48 +02001655 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status);
1656 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status);
1657 ath10k_htt_rx_h_deliver(ar, &amsdu, rx_status);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001658
Kalle Valo5e3dd152013-06-12 20:52:10 +03001659 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001660 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001661 "expecting more fragmented rx in one indication %d\n",
1662 fw_desc_len);
1663 }
1664}
1665
Michal Kazior6c5151a2014-02-27 18:50:04 +02001666static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1667 struct sk_buff *skb)
1668{
1669 struct ath10k_htt *htt = &ar->htt;
1670 struct htt_resp *resp = (struct htt_resp *)skb->data;
1671 struct htt_tx_done tx_done = {};
1672 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1673 __le16 msdu_id;
1674 int i;
1675
1676 switch (status) {
1677 case HTT_DATA_TX_STATUS_NO_ACK:
1678 tx_done.no_ack = true;
1679 break;
1680 case HTT_DATA_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03001681 tx_done.success = true;
Michal Kazior6c5151a2014-02-27 18:50:04 +02001682 break;
1683 case HTT_DATA_TX_STATUS_DISCARD:
1684 case HTT_DATA_TX_STATUS_POSTPONE:
1685 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1686 tx_done.discard = true;
1687 break;
1688 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001689 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001690 tx_done.discard = true;
1691 break;
1692 }
1693
Michal Kazior7aa7a722014-08-25 12:09:38 +02001694 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001695 resp->data_tx_completion.num_msdus);
1696
1697 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1698 msdu_id = resp->data_tx_completion.msdus[i];
1699 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1700 ath10k_txrx_tx_unref(htt, &tx_done);
1701 }
1702}
1703
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001704static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1705{
1706 struct htt_rx_addba *ev = &resp->rx_addba;
1707 struct ath10k_peer *peer;
1708 struct ath10k_vif *arvif;
1709 u16 info0, tid, peer_id;
1710
1711 info0 = __le16_to_cpu(ev->info0);
1712 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1713 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1714
Michal Kazior7aa7a722014-08-25 12:09:38 +02001715 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001716 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1717 tid, peer_id, ev->window_size);
1718
1719 spin_lock_bh(&ar->data_lock);
1720 peer = ath10k_peer_find_by_id(ar, peer_id);
1721 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001722 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001723 peer_id);
1724 spin_unlock_bh(&ar->data_lock);
1725 return;
1726 }
1727
1728 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1729 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001730 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001731 peer->vdev_id);
1732 spin_unlock_bh(&ar->data_lock);
1733 return;
1734 }
1735
Michal Kazior7aa7a722014-08-25 12:09:38 +02001736 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001737 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1738 peer->addr, tid, ev->window_size);
1739
1740 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1741 spin_unlock_bh(&ar->data_lock);
1742}
1743
1744static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1745{
1746 struct htt_rx_delba *ev = &resp->rx_delba;
1747 struct ath10k_peer *peer;
1748 struct ath10k_vif *arvif;
1749 u16 info0, tid, peer_id;
1750
1751 info0 = __le16_to_cpu(ev->info0);
1752 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1753 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1754
Michal Kazior7aa7a722014-08-25 12:09:38 +02001755 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001756 "htt rx delba tid %hu peer_id %hu\n",
1757 tid, peer_id);
1758
1759 spin_lock_bh(&ar->data_lock);
1760 peer = ath10k_peer_find_by_id(ar, peer_id);
1761 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001762 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001763 peer_id);
1764 spin_unlock_bh(&ar->data_lock);
1765 return;
1766 }
1767
1768 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1769 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001770 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001771 peer->vdev_id);
1772 spin_unlock_bh(&ar->data_lock);
1773 return;
1774 }
1775
Michal Kazior7aa7a722014-08-25 12:09:38 +02001776 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001777 "htt rx stop rx ba session sta %pM tid %hu\n",
1778 peer->addr, tid);
1779
1780 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1781 spin_unlock_bh(&ar->data_lock);
1782}
1783
Michal Kaziorc5450702015-01-24 12:14:48 +02001784static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
1785 struct sk_buff_head *amsdu)
1786{
1787 struct sk_buff *msdu;
1788 struct htt_rx_desc *rxd;
1789
1790 if (skb_queue_empty(list))
1791 return -ENOBUFS;
1792
1793 if (WARN_ON(!skb_queue_empty(amsdu)))
1794 return -EINVAL;
1795
1796 while ((msdu = __skb_dequeue(list))) {
1797 __skb_queue_tail(amsdu, msdu);
1798
1799 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001800 if (rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001801 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
1802 break;
1803 }
1804
1805 msdu = skb_peek_tail(amsdu);
1806 rxd = (void *)msdu->data - sizeof(*rxd);
Peter Oh1f5dbfb2015-07-15 19:01:21 -07001807 if (!(rxd->msdu_end.common.info0 &
Michal Kaziorc5450702015-01-24 12:14:48 +02001808 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
1809 skb_queue_splice_init(amsdu, list);
1810 return -EAGAIN;
1811 }
1812
1813 return 0;
1814}
1815
1816static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
1817 struct sk_buff *skb)
1818{
1819 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1820
1821 if (!ieee80211_has_protected(hdr->frame_control))
1822 return;
1823
1824 /* Offloaded frames are already decrypted but firmware insists they are
1825 * protected in the 802.11 header. Strip the flag. Otherwise mac80211
1826 * will drop the frame.
1827 */
1828
1829 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
1830 status->flag |= RX_FLAG_DECRYPTED |
1831 RX_FLAG_IV_STRIPPED |
1832 RX_FLAG_MMIC_STRIPPED;
1833}
1834
1835static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
1836 struct sk_buff_head *list)
1837{
1838 struct ath10k_htt *htt = &ar->htt;
1839 struct ieee80211_rx_status *status = &htt->rx_status;
1840 struct htt_rx_offload_msdu *rx;
1841 struct sk_buff *msdu;
1842 size_t offset;
1843
1844 while ((msdu = __skb_dequeue(list))) {
1845 /* Offloaded frames don't have Rx descriptor. Instead they have
1846 * a short meta information header.
1847 */
1848
1849 rx = (void *)msdu->data;
1850
1851 skb_put(msdu, sizeof(*rx));
1852 skb_pull(msdu, sizeof(*rx));
1853
1854 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
1855 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
1856 dev_kfree_skb_any(msdu);
1857 continue;
1858 }
1859
1860 skb_put(msdu, __le16_to_cpu(rx->msdu_len));
1861
1862 /* Offloaded rx header length isn't multiple of 2 nor 4 so the
1863 * actual payload is unaligned. Align the frame. Otherwise
1864 * mac80211 complains. This shouldn't reduce performance much
1865 * because these offloaded frames are rare.
1866 */
1867 offset = 4 - ((unsigned long)msdu->data & 3);
1868 skb_put(msdu, offset);
1869 memmove(msdu->data + offset, msdu->data, msdu->len);
1870 skb_pull(msdu, offset);
1871
1872 /* FIXME: The frame is NWifi. Re-construct QoS Control
1873 * if possible later.
1874 */
1875
1876 memset(status, 0, sizeof(*status));
1877 status->flag |= RX_FLAG_NO_SIGNAL_VAL;
1878
1879 ath10k_htt_rx_h_rx_offload_prot(status, msdu);
Michal Kazior500ff9f2015-03-31 10:26:21 +00001880 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001881 ath10k_process_rx(ar, status, msdu);
1882 }
1883}
1884
1885static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
1886{
1887 struct ath10k_htt *htt = &ar->htt;
1888 struct htt_resp *resp = (void *)skb->data;
1889 struct ieee80211_rx_status *status = &htt->rx_status;
1890 struct sk_buff_head list;
1891 struct sk_buff_head amsdu;
1892 u16 peer_id;
1893 u16 msdu_count;
1894 u8 vdev_id;
1895 u8 tid;
1896 bool offload;
1897 bool frag;
1898 int ret;
1899
1900 lockdep_assert_held(&htt->rx_ring.lock);
1901
1902 if (htt->rx_confused)
1903 return;
1904
1905 skb_pull(skb, sizeof(resp->hdr));
1906 skb_pull(skb, sizeof(resp->rx_in_ord_ind));
1907
1908 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
1909 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
1910 vdev_id = resp->rx_in_ord_ind.vdev_id;
1911 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
1912 offload = !!(resp->rx_in_ord_ind.info &
1913 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
1914 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
1915
1916 ath10k_dbg(ar, ATH10K_DBG_HTT,
1917 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
1918 vdev_id, peer_id, tid, offload, frag, msdu_count);
1919
1920 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
1921 ath10k_warn(ar, "dropping invalid in order rx indication\n");
1922 return;
1923 }
1924
1925 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
1926 * extracted and processed.
1927 */
1928 __skb_queue_head_init(&list);
1929 ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
1930 if (ret < 0) {
1931 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
1932 htt->rx_confused = true;
1933 return;
1934 }
1935
1936 /* Offloaded frames are very different and need to be handled
1937 * separately.
1938 */
1939 if (offload)
1940 ath10k_htt_rx_h_rx_offload(ar, &list);
1941
1942 while (!skb_queue_empty(&list)) {
1943 __skb_queue_head_init(&amsdu);
1944 ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
1945 switch (ret) {
1946 case 0:
1947 /* Note: The in-order indication may report interleaved
1948 * frames from different PPDUs meaning reported rx rate
1949 * to mac80211 isn't accurate/reliable. It's still
1950 * better to report something than nothing though. This
1951 * should still give an idea about rx rate to the user.
1952 */
Michal Kazior500ff9f2015-03-31 10:26:21 +00001953 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
Michal Kaziorc5450702015-01-24 12:14:48 +02001954 ath10k_htt_rx_h_filter(ar, &amsdu, status);
1955 ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
1956 ath10k_htt_rx_h_deliver(ar, &amsdu, status);
1957 break;
1958 case -EAGAIN:
1959 /* fall through */
1960 default:
1961 /* Should not happen. */
1962 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
1963 htt->rx_confused = true;
1964 __skb_queue_purge(&list);
1965 return;
1966 }
1967 }
1968
1969 tasklet_schedule(&htt->rx_replenish_task);
1970}
1971
Kalle Valo5e3dd152013-06-12 20:52:10 +03001972void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1973{
Michal Kazioredb82362013-07-05 16:15:14 +03001974 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001975 struct htt_resp *resp = (struct htt_resp *)skb->data;
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001976 enum htt_t2h_msg_type type;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001977
1978 /* confirm alignment */
1979 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001980 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001981
Michal Kazior7aa7a722014-08-25 12:09:38 +02001982 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001983 resp->hdr.msg_type);
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02001984
1985 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
1986 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
1987 resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
1988 dev_kfree_skb_any(skb);
1989 return;
1990 }
1991 type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
1992
1993 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001994 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1995 htt->target_version_major = resp->ver_resp.major;
1996 htt->target_version_minor = resp->ver_resp.minor;
1997 complete(&htt->target_version_received);
1998 break;
1999 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002000 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02002001 spin_lock_bh(&htt->rx_ring.lock);
2002 __skb_queue_tail(&htt->rx_compl_q, skb);
2003 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002004 tasklet_schedule(&htt->txrx_compl_task);
2005 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002006 case HTT_T2H_MSG_TYPE_PEER_MAP: {
2007 struct htt_peer_map_event ev = {
2008 .vdev_id = resp->peer_map.vdev_id,
2009 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
2010 };
2011 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
2012 ath10k_peer_map_event(htt, &ev);
2013 break;
2014 }
2015 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
2016 struct htt_peer_unmap_event ev = {
2017 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
2018 };
2019 ath10k_peer_unmap_event(htt, &ev);
2020 break;
2021 }
2022 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
2023 struct htt_tx_done tx_done = {};
2024 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
2025
2026 tx_done.msdu_id =
2027 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
2028
2029 switch (status) {
2030 case HTT_MGMT_TX_STATUS_OK:
Sujith Manoharan55314fc2015-04-01 22:53:21 +03002031 tx_done.success = true;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002032 break;
2033 case HTT_MGMT_TX_STATUS_RETRY:
2034 tx_done.no_ack = true;
2035 break;
2036 case HTT_MGMT_TX_STATUS_DROP:
2037 tx_done.discard = true;
2038 break;
2039 }
2040
Michal Kazior0a89f8a2013-09-18 14:43:20 +02002041 ath10k_txrx_tx_unref(htt, &tx_done);
Kalle Valo5e3dd152013-06-12 20:52:10 +03002042 break;
2043 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02002044 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
Qi Zhou005fb162015-07-22 16:38:24 -04002045 skb_queue_tail(&htt->tx_compl_q, skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002046 tasklet_schedule(&htt->txrx_compl_task);
2047 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002048 case HTT_T2H_MSG_TYPE_SEC_IND: {
2049 struct ath10k *ar = htt->ar;
2050 struct htt_security_indication *ev = &resp->security_indication;
2051
Michal Kazior7aa7a722014-08-25 12:09:38 +02002052 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03002053 "sec ind peer_id %d unicast %d type %d\n",
2054 __le16_to_cpu(ev->peer_id),
2055 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
2056 MS(ev->flags, HTT_SECURITY_TYPE));
2057 complete(&ar->install_key_done);
2058 break;
2059 }
2060 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02002061 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002062 skb->data, skb->len);
2063 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
2064 break;
2065 }
2066 case HTT_T2H_MSG_TYPE_TEST:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002067 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002068 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03002069 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03002070 break;
2071 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03002072 /* Firmware can return tx frames if it's unable to fully
2073 * process them and suspects host may be able to fix it. ath10k
2074 * sends all tx frames as already inspected so this shouldn't
2075 * happen unless fw has a bug.
2076 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02002077 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03002078 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002079 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002080 ath10k_htt_rx_addba(ar, resp);
2081 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03002082 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002083 ath10k_htt_rx_delba(ar, resp);
2084 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03002085 case HTT_T2H_MSG_TYPE_PKTLOG: {
2086 struct ath10k_pktlog_hdr *hdr =
2087 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
2088
2089 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
2090 sizeof(*hdr) +
2091 __le16_to_cpu(hdr->size));
2092 break;
2093 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02002094 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
2095 /* Ignore this event because mac80211 takes care of Rx
2096 * aggregation reordering.
2097 */
2098 break;
2099 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002100 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
2101 spin_lock_bh(&htt->rx_ring.lock);
2102 __skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
2103 spin_unlock_bh(&htt->rx_ring.lock);
2104 tasklet_schedule(&htt->txrx_compl_task);
2105 return;
2106 }
2107 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
Rajkumar Manoharan8348db22015-03-25 13:12:27 +02002108 break;
2109 case HTT_T2H_MSG_TYPE_CHAN_CHANGE:
Michal Kaziorc5450702015-01-24 12:14:48 +02002110 break;
David Liuccec9032015-07-24 20:25:32 +03002111 case HTT_T2H_MSG_TYPE_AGGR_CONF:
2112 break;
Raja Mani721ad3c2015-06-22 20:22:24 +05302113 case HTT_T2H_MSG_TYPE_EN_STATS:
2114 case HTT_T2H_MSG_TYPE_TX_FETCH_IND:
2115 case HTT_T2H_MSG_TYPE_TX_FETCH_CONF:
2116 case HTT_T2H_MSG_TYPE_TX_LOW_LATENCY_IND:
Kalle Valo5e3dd152013-06-12 20:52:10 +03002117 default:
Michal Kazior2358a542014-10-02 13:32:55 +02002118 ath10k_warn(ar, "htt event (%d) not handled\n",
2119 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02002120 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03002121 skb->data, skb->len);
2122 break;
2123 };
2124
2125 /* Free the indication buffer */
2126 dev_kfree_skb_any(skb);
2127}
Rajkumar Manoharan3f0f7ed2015-10-12 18:27:03 +05302128EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002129
2130static void ath10k_htt_txrx_compl_task(unsigned long ptr)
2131{
2132 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Michal Kaziorc5450702015-01-24 12:14:48 +02002133 struct ath10k *ar = htt->ar;
Michal Kazior6c5151a2014-02-27 18:50:04 +02002134 struct htt_resp *resp;
2135 struct sk_buff *skb;
2136
Qi Zhou005fb162015-07-22 16:38:24 -04002137 while ((skb = skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002138 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
2139 dev_kfree_skb_any(skb);
2140 }
2141
Michal Kazior45967082014-02-27 18:50:05 +02002142 spin_lock_bh(&htt->rx_ring.lock);
2143 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02002144 resp = (struct htt_resp *)skb->data;
2145 ath10k_htt_rx_handler(htt, &resp->rx_ind);
2146 dev_kfree_skb_any(skb);
2147 }
Michal Kaziorc5450702015-01-24 12:14:48 +02002148
2149 while ((skb = __skb_dequeue(&htt->rx_in_ord_compl_q))) {
2150 ath10k_htt_rx_in_ord_ind(ar, skb);
2151 dev_kfree_skb_any(skb);
2152 }
Michal Kazior45967082014-02-27 18:50:05 +02002153 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02002154}