blob: a720de3d20c41d151318ca16c5be6d03310bd479 [file] [log] [blame]
Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045
46static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020047static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030048
Kalle Valo5e3dd152013-06-12 20:52:10 +030049static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
50{
51 int size;
52
53 /*
54 * It is expected that the host CPU will typically be able to
55 * service the rx indication from one A-MPDU before the rx
56 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
57 * later. However, the rx ring should be sized very conservatively,
58 * to accomodate the worst reasonable delay before the host CPU
59 * services a rx indication interrupt.
60 *
61 * The rx ring need not be kept full of empty buffers. In theory,
62 * the htt host SW can dynamically track the low-water mark in the
63 * rx ring, and dynamically adjust the level to which the rx ring
64 * is filled with empty buffers, to dynamically meet the desired
65 * low-water mark.
66 *
67 * In contrast, it's difficult to resize the rx ring itself, once
68 * it's in use. Thus, the ring itself should be sized very
69 * conservatively, while the degree to which the ring is filled
70 * with empty buffers should be sized moderately conservatively.
71 */
72
73 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
74 size =
75 htt->max_throughput_mbps +
76 1000 /
77 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
78
79 if (size < HTT_RX_RING_SIZE_MIN)
80 size = HTT_RX_RING_SIZE_MIN;
81
82 if (size > HTT_RX_RING_SIZE_MAX)
83 size = HTT_RX_RING_SIZE_MAX;
84
85 size = roundup_pow_of_two(size);
86
87 return size;
88}
89
90static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
91{
92 int size;
93
94 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
95 size =
96 htt->max_throughput_mbps *
97 1000 /
98 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
99
100 /*
101 * Make sure the fill level is at least 1 less than the ring size.
102 * Leaving 1 element empty allows the SW to easily distinguish
103 * between a full ring vs. an empty ring.
104 */
105 if (size >= htt->rx_ring.size)
106 size = htt->rx_ring.size - 1;
107
108 return size;
109}
110
111static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
112{
113 struct sk_buff *skb;
114 struct ath10k_skb_cb *cb;
115 int i;
116
117 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
118 skb = htt->rx_ring.netbufs_ring[i];
119 cb = ATH10K_SKB_CB(skb);
120 dma_unmap_single(htt->ar->dev, cb->paddr,
121 skb->len + skb_tailroom(skb),
122 DMA_FROM_DEVICE);
123 dev_kfree_skb_any(skb);
124 }
125
126 htt->rx_ring.fill_cnt = 0;
127}
128
129static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
130{
131 struct htt_rx_desc *rx_desc;
132 struct sk_buff *skb;
133 dma_addr_t paddr;
134 int ret = 0, idx;
135
136 idx = __le32_to_cpu(*(htt->rx_ring.alloc_idx.vaddr));
137 while (num > 0) {
138 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
139 if (!skb) {
140 ret = -ENOMEM;
141 goto fail;
142 }
143
144 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
145 skb_pull(skb,
146 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
147 skb->data);
148
149 /* Clear rx_desc attention word before posting to Rx ring */
150 rx_desc = (struct htt_rx_desc *)skb->data;
151 rx_desc->attention.flags = __cpu_to_le32(0);
152
153 paddr = dma_map_single(htt->ar->dev, skb->data,
154 skb->len + skb_tailroom(skb),
155 DMA_FROM_DEVICE);
156
157 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
158 dev_kfree_skb_any(skb);
159 ret = -ENOMEM;
160 goto fail;
161 }
162
163 ATH10K_SKB_CB(skb)->paddr = paddr;
164 htt->rx_ring.netbufs_ring[idx] = skb;
165 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
166 htt->rx_ring.fill_cnt++;
167
168 num--;
169 idx++;
170 idx &= htt->rx_ring.size_mask;
171 }
172
173fail:
174 *(htt->rx_ring.alloc_idx.vaddr) = __cpu_to_le32(idx);
175 return ret;
176}
177
178static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
179{
180 lockdep_assert_held(&htt->rx_ring.lock);
181 return __ath10k_htt_rx_ring_fill_n(htt, num);
182}
183
184static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
185{
Michal Kazior6e712d42013-09-24 10:18:36 +0200186 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300187
Michal Kazior6e712d42013-09-24 10:18:36 +0200188 /* Refilling the whole RX ring buffer proves to be a bad idea. The
189 * reason is RX may take up significant amount of CPU cycles and starve
190 * other tasks, e.g. TX on an ethernet device while acting as a bridge
191 * with ath10k wlan interface. This ended up with very poor performance
192 * once CPU the host system was overwhelmed with RX on ath10k.
193 *
194 * By limiting the number of refills the replenishing occurs
195 * progressively. This in turns makes use of the fact tasklets are
196 * processed in FIFO order. This means actual RX processing can starve
197 * out refilling. If there's not enough buffers on RX ring FW will not
198 * report RX until it is refilled with enough buffers. This
199 * automatically balances load wrt to CPU power.
200 *
201 * This probably comes at a cost of lower maximum throughput but
202 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300203 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200204 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
205 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
206 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300207 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
208 if (ret == -ENOMEM) {
209 /*
210 * Failed to fill it to the desired level -
211 * we'll start a timer and try again next time.
212 * As long as enough buffers are left in the ring for
213 * another A-MPDU rx, no special recovery is needed.
214 */
215 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
216 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200217 } else if (num_deficit > 0) {
218 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300219 }
220 spin_unlock_bh(&htt->rx_ring.lock);
221}
222
223static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
224{
225 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200274 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 int idx;
276 struct sk_buff *msdu;
277
Michal Kazior45967082014-02-27 18:50:05 +0200278 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279
Michal Kazior8d60ee82014-02-27 18:50:05 +0200280 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200282 return NULL;
283 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284
285 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
286 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300287 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288
289 idx++;
290 idx &= htt->rx_ring.size_mask;
291 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
292 htt->rx_ring.fill_cnt--;
293
Kalle Valo5e3dd152013-06-12 20:52:10 +0300294 return msdu;
295}
296
297static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
298{
299 struct sk_buff *next;
300
301 while (skb) {
302 next = skb->next;
303 dev_kfree_skb_any(skb);
304 skb = next;
305 }
306}
307
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100308/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300309static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
310 u8 **fw_desc, int *fw_desc_len,
311 struct sk_buff **head_msdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300312 struct sk_buff **tail_msdu,
313 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300314{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200315 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300316 int msdu_len, msdu_chaining = 0;
317 struct sk_buff *msdu;
318 struct htt_rx_desc *rx_desc;
319
Michal Kazior45967082014-02-27 18:50:05 +0200320 lockdep_assert_held(&htt->rx_ring.lock);
321
Kalle Valo5e3dd152013-06-12 20:52:10 +0300322 if (htt->rx_confused) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200323 ath10k_warn(ar, "htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100324 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300325 }
326
327 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
328 while (msdu) {
329 int last_msdu, msdu_len_invalid, msdu_chained;
330
331 dma_unmap_single(htt->ar->dev,
332 ATH10K_SKB_CB(msdu)->paddr,
333 msdu->len + skb_tailroom(msdu),
334 DMA_FROM_DEVICE);
335
Michal Kazior7aa7a722014-08-25 12:09:38 +0200336 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300337 msdu->data, msdu->len + skb_tailroom(msdu));
338
339 rx_desc = (struct htt_rx_desc *)msdu->data;
340
341 /* FIXME: we must report msdu payload since this is what caller
342 * expects now */
343 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
344 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
345
346 /*
347 * Sanity check - confirm the HW is finished filling in the
348 * rx data.
349 * If the HW and SW are working correctly, then it's guaranteed
350 * that the HW's MAC DMA is done before this point in the SW.
351 * To prevent the case that we handle a stale Rx descriptor,
352 * just assert for now until we have a way to recover.
353 */
354 if (!(__le32_to_cpu(rx_desc->attention.flags)
355 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
356 ath10k_htt_rx_free_msdu_chain(*head_msdu);
357 *head_msdu = NULL;
358 msdu = NULL;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200359 ath10k_err(ar, "htt rx stopped. cannot recover\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300360 htt->rx_confused = true;
361 break;
362 }
363
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300364 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
365 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
366 RX_ATTENTION_FLAGS_DECRYPT_ERR |
367 RX_ATTENTION_FLAGS_FCS_ERR |
368 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300369 /*
370 * Copy the FW rx descriptor for this MSDU from the rx
371 * indication message into the MSDU's netbuf. HL uses the
372 * same rx indication message definition as LL, and simply
373 * appends new info (fields from the HW rx desc, and the
374 * MSDU payload itself). So, the offset into the rx
375 * indication message only has to account for the standard
376 * offset of the per-MSDU FW rx desc info within the
377 * message, and how many bytes of the per-MSDU FW rx desc
378 * info have already been consumed. (And the endianness of
379 * the host, since for a big-endian host, the rx ind
380 * message contents, including the per-MSDU rx desc bytes,
381 * were byteswapped during upload.)
382 */
383 if (*fw_desc_len > 0) {
384 rx_desc->fw_desc.info0 = **fw_desc;
385 /*
386 * The target is expected to only provide the basic
387 * per-MSDU rx descriptors. Just to be sure, verify
388 * that the target has not attached extension data
389 * (e.g. LRO flow ID).
390 */
391
392 /* or more, if there's extension data */
393 (*fw_desc)++;
394 (*fw_desc_len)--;
395 } else {
396 /*
397 * When an oversized AMSDU happened, FW will lost
398 * some of MSDU status - in this case, the FW
399 * descriptors provided will be less than the
400 * actual MSDUs inside this MPDU. Mark the FW
401 * descriptors so that it will still deliver to
402 * upper stack, if no CRC error for this MPDU.
403 *
404 * FIX THIS - the FW descriptors are actually for
405 * MSDUs in the end of this A-MSDU instead of the
406 * beginning.
407 */
408 rx_desc->fw_desc.info0 = 0;
409 }
410
411 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
412 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
413 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
414 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
415 RX_MSDU_START_INFO0_MSDU_LENGTH);
416 msdu_chained = rx_desc->frag_info.ring2_more_count;
417
418 if (msdu_len_invalid)
419 msdu_len = 0;
420
421 skb_trim(msdu, 0);
422 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
423 msdu_len -= msdu->len;
424
425 /* FIXME: Do chained buffers include htt_rx_desc or not? */
426 while (msdu_chained--) {
427 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
428
429 dma_unmap_single(htt->ar->dev,
430 ATH10K_SKB_CB(next)->paddr,
431 next->len + skb_tailroom(next),
432 DMA_FROM_DEVICE);
433
Michal Kazior7aa7a722014-08-25 12:09:38 +0200434 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
Ben Greear75fb2f92014-02-05 13:58:34 -0800435 "htt rx chained: ", next->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +0300436 next->len + skb_tailroom(next));
437
438 skb_trim(next, 0);
439 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
440 msdu_len -= next->len;
441
442 msdu->next = next;
443 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300444 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300445 }
446
Kalle Valo5e3dd152013-06-12 20:52:10 +0300447 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
448 RX_MSDU_END_INFO0_LAST_MSDU;
449
450 if (last_msdu) {
451 msdu->next = NULL;
452 break;
453 } else {
454 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
455 msdu->next = next;
456 msdu = next;
457 }
458 }
459 *tail_msdu = msdu;
460
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100461 if (*head_msdu == NULL)
462 msdu_chaining = -1;
463
Kalle Valo5e3dd152013-06-12 20:52:10 +0300464 /*
465 * Don't refill the ring yet.
466 *
467 * First, the elements popped here are still in use - it is not
468 * safe to overwrite them until the matching call to
469 * mpdu_desc_list_next. Second, for efficiency it is preferable to
470 * refill the rx ring with 1 PPDU's worth of rx buffers (something
471 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
472 * (something like 3 buffers). Consequently, we'll rely on the txrx
473 * SW to tell us when it is done pulling all the PPDU's rx buffers
474 * out of the rx ring, and then refill it just once.
475 */
476
477 return msdu_chaining;
478}
479
Michal Kazior6e712d42013-09-24 10:18:36 +0200480static void ath10k_htt_rx_replenish_task(unsigned long ptr)
481{
482 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
483 ath10k_htt_rx_msdu_buff_replenish(htt);
484}
485
Michal Kazior95bf21f2014-05-16 17:15:39 +0300486int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300487{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200488 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300489 dma_addr_t paddr;
490 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300491 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300492 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
493
494 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
495 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200496 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300497 return -EINVAL;
498 }
499
500 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
501
502 /*
503 * Set the initial value for the level to which the rx ring
504 * should be filled, based on the max throughput and the
505 * worst likely latency for the host to fill the rx ring
506 * with new buffers. In theory, this fill level can be
507 * dynamically adjusted from the initial value set here, to
508 * reflect the actual host latency rather than a
509 * conservative assumption about the host latency.
510 */
511 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
512
513 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300514 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300515 GFP_KERNEL);
516 if (!htt->rx_ring.netbufs_ring)
517 goto err_netbuf;
518
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300519 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
520
521 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300522 if (!vaddr)
523 goto err_dma_ring;
524
525 htt->rx_ring.paddrs_ring = vaddr;
526 htt->rx_ring.base_paddr = paddr;
527
528 vaddr = dma_alloc_coherent(htt->ar->dev,
529 sizeof(*htt->rx_ring.alloc_idx.vaddr),
530 &paddr, GFP_DMA);
531 if (!vaddr)
532 goto err_dma_idx;
533
534 htt->rx_ring.alloc_idx.vaddr = vaddr;
535 htt->rx_ring.alloc_idx.paddr = paddr;
536 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
537 *htt->rx_ring.alloc_idx.vaddr = 0;
538
539 /* Initialize the Rx refill retry timer */
540 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
541
542 spin_lock_init(&htt->rx_ring.lock);
543
544 htt->rx_ring.fill_cnt = 0;
545 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
546 goto err_fill_ring;
547
Michal Kazior6e712d42013-09-24 10:18:36 +0200548 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
549 (unsigned long)htt);
550
Michal Kazior6c5151a2014-02-27 18:50:04 +0200551 skb_queue_head_init(&htt->tx_compl_q);
552 skb_queue_head_init(&htt->rx_compl_q);
553
554 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
555 (unsigned long)htt);
556
Michal Kazior7aa7a722014-08-25 12:09:38 +0200557 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300558 htt->rx_ring.size, htt->rx_ring.fill_level);
559 return 0;
560
561err_fill_ring:
562 ath10k_htt_rx_ring_free(htt);
563 dma_free_coherent(htt->ar->dev,
564 sizeof(*htt->rx_ring.alloc_idx.vaddr),
565 htt->rx_ring.alloc_idx.vaddr,
566 htt->rx_ring.alloc_idx.paddr);
567err_dma_idx:
568 dma_free_coherent(htt->ar->dev,
569 (htt->rx_ring.size *
570 sizeof(htt->rx_ring.paddrs_ring)),
571 htt->rx_ring.paddrs_ring,
572 htt->rx_ring.base_paddr);
573err_dma_ring:
574 kfree(htt->rx_ring.netbufs_ring);
575err_netbuf:
576 return -ENOMEM;
577}
578
Michal Kazior7aa7a722014-08-25 12:09:38 +0200579static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
580 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300581{
582 switch (type) {
583 case HTT_RX_MPDU_ENCRYPT_WEP40:
584 case HTT_RX_MPDU_ENCRYPT_WEP104:
585 return 4;
586 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
587 case HTT_RX_MPDU_ENCRYPT_WEP128: /* not tested */
588 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
589 case HTT_RX_MPDU_ENCRYPT_WAPI: /* not tested */
590 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
591 return 8;
592 case HTT_RX_MPDU_ENCRYPT_NONE:
593 return 0;
594 }
595
Michal Kazior7aa7a722014-08-25 12:09:38 +0200596 ath10k_warn(ar, "unknown encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300597 return 0;
598}
599
Michal Kazior7aa7a722014-08-25 12:09:38 +0200600static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
601 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300602{
603 switch (type) {
604 case HTT_RX_MPDU_ENCRYPT_NONE:
605 case HTT_RX_MPDU_ENCRYPT_WEP40:
606 case HTT_RX_MPDU_ENCRYPT_WEP104:
607 case HTT_RX_MPDU_ENCRYPT_WEP128:
608 case HTT_RX_MPDU_ENCRYPT_WAPI:
609 return 0;
610 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
611 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
612 return 4;
613 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
614 return 8;
615 }
616
Michal Kazior7aa7a722014-08-25 12:09:38 +0200617 ath10k_warn(ar, "unknown encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300618 return 0;
619}
620
621/* Applies for first msdu in chain, before altering it. */
622static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
623{
624 struct htt_rx_desc *rxd;
625 enum rx_msdu_decap_format fmt;
626
627 rxd = (void *)skb->data - sizeof(*rxd);
628 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +0300629 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300630
631 if (fmt == RX_MSDU_DECAP_RAW)
632 return (void *)skb->data;
633 else
634 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
635}
636
637/* This function only applies for first msdu in an msdu chain */
638static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
639{
640 if (ieee80211_is_data_qos(hdr->frame_control)) {
641 u8 *qc = ieee80211_get_qos_ctl(hdr);
642 if (qc[0] & 0x80)
643 return true;
644 }
645 return false;
646}
647
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300648struct rfc1042_hdr {
649 u8 llc_dsap;
650 u8 llc_ssap;
651 u8 llc_ctrl;
652 u8 snap_oui[3];
653 __be16 snap_type;
654} __packed;
655
656struct amsdu_subframe_hdr {
657 u8 dst[ETH_ALEN];
658 u8 src[ETH_ALEN];
659 __be16 len;
660} __packed;
661
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100662static const u8 rx_legacy_rate_idx[] = {
663 3, /* 0x00 - 11Mbps */
664 2, /* 0x01 - 5.5Mbps */
665 1, /* 0x02 - 2Mbps */
666 0, /* 0x03 - 1Mbps */
667 3, /* 0x04 - 11Mbps */
668 2, /* 0x05 - 5.5Mbps */
669 1, /* 0x06 - 2Mbps */
670 0, /* 0x07 - 1Mbps */
671 10, /* 0x08 - 48Mbps */
672 8, /* 0x09 - 24Mbps */
673 6, /* 0x0A - 12Mbps */
674 4, /* 0x0B - 6Mbps */
675 11, /* 0x0C - 54Mbps */
676 9, /* 0x0D - 36Mbps */
677 7, /* 0x0E - 18Mbps */
678 5, /* 0x0F - 9Mbps */
679};
680
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100681static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100682 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100683 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100684 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100685{
686 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100687 u8 preamble = 0;
688
689 /* Check if valid fields */
690 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
691 return;
692
693 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
694
695 switch (preamble) {
696 case HTT_RX_LEGACY:
697 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
698 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
699 rate_idx = 0;
700
701 if (rate < 0x08 || rate > 0x0F)
702 break;
703
704 switch (band) {
705 case IEEE80211_BAND_2GHZ:
706 if (cck)
707 rate &= ~BIT(3);
708 rate_idx = rx_legacy_rate_idx[rate];
709 break;
710 case IEEE80211_BAND_5GHZ:
711 rate_idx = rx_legacy_rate_idx[rate];
712 /* We are using same rate table registering
713 HW - ath10k_rates[]. In case of 5GHz skip
714 CCK rates, so -4 here */
715 rate_idx -= 4;
716 break;
717 default:
718 break;
719 }
720
721 status->rate_idx = rate_idx;
722 break;
723 case HTT_RX_HT:
724 case HTT_RX_HT_WITH_TXBF:
725 /* HT-SIG - Table 20-11 in info1 and info2 */
726 mcs = info1 & 0x1F;
727 nss = mcs >> 3;
728 bw = (info1 >> 7) & 1;
729 sgi = (info2 >> 7) & 1;
730
731 status->rate_idx = mcs;
732 status->flag |= RX_FLAG_HT;
733 if (sgi)
734 status->flag |= RX_FLAG_SHORT_GI;
735 if (bw)
736 status->flag |= RX_FLAG_40MHZ;
737 break;
738 case HTT_RX_VHT:
739 case HTT_RX_VHT_WITH_TXBF:
740 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
741 TODO check this */
742 mcs = (info2 >> 4) & 0x0F;
743 nss = ((info1 >> 10) & 0x07) + 1;
744 bw = info1 & 3;
745 sgi = info2 & 1;
746
747 status->rate_idx = mcs;
748 status->vht_nss = nss;
749
750 if (sgi)
751 status->flag |= RX_FLAG_SHORT_GI;
752
753 switch (bw) {
754 /* 20MHZ */
755 case 0:
756 break;
757 /* 40MHZ */
758 case 1:
759 status->flag |= RX_FLAG_40MHZ;
760 break;
761 /* 80MHZ */
762 case 2:
763 status->vht_flag |= RX_VHT_FLAG_80MHZ;
764 }
765
766 status->flag |= RX_FLAG_VHT;
767 break;
768 default:
769 break;
770 }
771}
772
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100773static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100774 struct ieee80211_rx_status *rx_status,
775 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300776 enum htt_rx_mpdu_encrypt_type enctype,
777 enum rx_msdu_decap_format fmt,
778 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100779{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100780 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100781
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300782 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
783 RX_FLAG_IV_STRIPPED |
784 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100785
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300786 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100787 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300788
789 /*
790 * There's no explicit rx descriptor flag to indicate whether a given
791 * frame has been decrypted or not. We're forced to use the decap
792 * format as an implicit indication. However fragmentation rx is always
793 * raw and it probably never reports undecrypted raws.
794 *
795 * This makes sure sniffed frames are reported as-is without stripping
796 * the protected flag.
797 */
798 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
799 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100800
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100801 rx_status->flag |= RX_FLAG_DECRYPTED |
802 RX_FLAG_IV_STRIPPED |
803 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100804 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
805 ~IEEE80211_FCTL_PROTECTED);
806}
807
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100808static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
809 struct ieee80211_rx_status *status)
810{
811 struct ieee80211_channel *ch;
812
813 spin_lock_bh(&ar->data_lock);
814 ch = ar->scan_channel;
815 if (!ch)
816 ch = ar->rx_channel;
817 spin_unlock_bh(&ar->data_lock);
818
819 if (!ch)
820 return false;
821
822 status->band = ch->band;
823 status->freq = ch->center_freq;
824
825 return true;
826}
827
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300828static const char * const tid_to_ac[] = {
829 "BE",
830 "BK",
831 "BK",
832 "BE",
833 "VI",
834 "VI",
835 "VO",
836 "VO",
837};
838
839static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
840{
841 u8 *qc;
842 int tid;
843
844 if (!ieee80211_is_data_qos(hdr->frame_control))
845 return "";
846
847 qc = ieee80211_get_qos_ctl(hdr);
848 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
849 if (tid < 8)
850 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
851 else
852 snprintf(out, size, "tid %d", tid);
853
854 return out;
855}
856
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100857static void ath10k_process_rx(struct ath10k *ar,
858 struct ieee80211_rx_status *rx_status,
859 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100860{
861 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300862 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
863 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100864
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100865 status = IEEE80211_SKB_RXCB(skb);
866 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100867
Michal Kazior7aa7a722014-08-25 12:09:38 +0200868 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300869 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100870 skb,
871 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300872 ieee80211_get_SA(hdr),
873 ath10k_get_tid(hdr, tid, sizeof(tid)),
874 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
875 "mcast" : "ucast",
876 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100877 status->flag == 0 ? "legacy" : "",
878 status->flag & RX_FLAG_HT ? "ht" : "",
879 status->flag & RX_FLAG_VHT ? "vht" : "",
880 status->flag & RX_FLAG_40MHZ ? "40" : "",
881 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
882 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
883 status->rate_idx,
884 status->vht_nss,
885 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100886 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100887 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300888 !!(status->flag & RX_FLAG_MMIC_ERROR),
889 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200890 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100891 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100892
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100893 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100894}
895
Michal Kaziord960c362014-02-25 09:29:57 +0200896static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
897{
898 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
899 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
900}
901
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300902static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100903 struct ieee80211_rx_status *rx_status,
904 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300905{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200906 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300907 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100908 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300909 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300910 enum rx_msdu_decap_format fmt;
911 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300912 struct ieee80211_hdr *hdr;
Michal Kazior72bdeb82014-07-28 23:59:42 +0300913 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300914 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300915
916 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300917 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +0300918 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300919
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300920 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
921 hdr_len = ieee80211_hdrlen(hdr->frame_control);
922 memcpy(hdr_buf, hdr, hdr_len);
923 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300924
Kalle Valo5e3dd152013-06-12 20:52:10 +0300925 first = skb;
926 while (skb) {
927 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300928 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300929
930 rxd = (void *)skb->data - sizeof(*rxd);
931 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300932 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300933 decap_hdr = (void *)rxd->rx_hdr_status;
934
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300935 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
936
937 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300938 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300939 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200940 len += round_up(ath10k_htt_rx_crypto_param_len(ar,
941 enctype), 4);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300942 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300943 }
944
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300945 switch (fmt) {
946 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300947 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300948 skb_trim(skb, skb->len - FCS_LEN);
949 break;
950 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior72bdeb82014-07-28 23:59:42 +0300951 /* pull decapped header and copy SA & DA */
Michal Kazior784f69d2013-09-26 10:12:23 +0300952 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200953 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior72bdeb82014-07-28 23:59:42 +0300954 memcpy(da, ieee80211_get_DA(hdr), ETH_ALEN);
955 memcpy(sa, ieee80211_get_SA(hdr), ETH_ALEN);
Michal Kazior784f69d2013-09-26 10:12:23 +0300956 skb_pull(skb, hdr_len);
957
958 /* push original 802.11 header */
959 hdr = (struct ieee80211_hdr *)hdr_buf;
960 hdr_len = ieee80211_hdrlen(hdr->frame_control);
961 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
962
963 /* original A-MSDU header has the bit set but we're
964 * not including A-MSDU subframe header */
965 hdr = (struct ieee80211_hdr *)skb->data;
966 qos = ieee80211_get_qos_ctl(hdr);
967 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
968
Michal Kazior72bdeb82014-07-28 23:59:42 +0300969 /* original 802.11 header has a different DA and in
970 * case of 4addr it may also have different SA
971 */
972 memcpy(ieee80211_get_DA(hdr), da, ETH_ALEN);
973 memcpy(ieee80211_get_SA(hdr), sa, ETH_ALEN);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300974 break;
975 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300976 /* strip ethernet header and insert decapped 802.11
977 * header, amsdu subframe header and rfc1042 header */
978
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300979 len = 0;
980 len += sizeof(struct rfc1042_hdr);
981 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200982
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300983 skb_pull(skb, sizeof(struct ethhdr));
984 memcpy(skb_push(skb, len), decap_hdr, len);
985 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
986 break;
987 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300988 /* insert decapped 802.11 header making a singly
989 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300990 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
991 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300992 }
993
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100994 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300995 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
996 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300997 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100998 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300999
Kalle Valo652de352013-11-13 15:23:30 +02001000 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001001 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001002 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001003 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +02001004
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001005 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001006 }
1007
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001008 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
1009 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001010}
1011
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001012static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
1013 struct ieee80211_rx_status *rx_status,
1014 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001015{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001016 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001017 struct htt_rx_desc *rxd;
1018 struct ieee80211_hdr *hdr;
1019 enum rx_msdu_decap_format fmt;
1020 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001021 int hdr_len;
1022 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001023
1024 /* This shouldn't happen. If it does than it may be a FW bug. */
1025 if (skb->next) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001026 ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001027 ath10k_htt_rx_free_msdu_chain(skb->next);
1028 skb->next = NULL;
1029 }
1030
1031 rxd = (void *)skb->data - sizeof(*rxd);
1032 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001033 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001034 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +03001035 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001036 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1037 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001038
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001039 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
1040
Kalle Valo5e3dd152013-06-12 20:52:10 +03001041 switch (fmt) {
1042 case RX_MSDU_DECAP_RAW:
1043 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001044 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001045 break;
1046 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +03001047 /* Pull decapped header */
1048 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +02001049 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +03001050 skb_pull(skb, hdr_len);
1051
1052 /* Push original header */
1053 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1054 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1055 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001056 break;
1057 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001058 /* strip ethernet header and insert decapped 802.11 header and
1059 * rfc1042 header */
1060
1061 rfc1042 = hdr;
1062 rfc1042 += roundup(hdr_len, 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001063 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
1064 enctype), 4);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001065
1066 skb_pull(skb, sizeof(struct ethhdr));
1067 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1068 rfc1042, sizeof(struct rfc1042_hdr));
1069 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001070 break;
1071 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001072 /* remove A-MSDU subframe header and insert
1073 * decapped 802.11 header. rfc1042 header is already there */
1074
1075 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1076 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001077 break;
1078 }
1079
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001080 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001081
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001082 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001083}
1084
Michal Kazior605f81a2013-07-31 10:47:56 +02001085static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1086{
1087 struct htt_rx_desc *rxd;
1088 u32 flags, info;
1089 bool is_ip4, is_ip6;
1090 bool is_tcp, is_udp;
1091 bool ip_csum_ok, tcpudp_csum_ok;
1092
1093 rxd = (void *)skb->data - sizeof(*rxd);
1094 flags = __le32_to_cpu(rxd->attention.flags);
1095 info = __le32_to_cpu(rxd->msdu_start.info1);
1096
1097 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1098 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1099 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1100 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1101 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1102 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1103
1104 if (!is_ip4 && !is_ip6)
1105 return CHECKSUM_NONE;
1106 if (!is_tcp && !is_udp)
1107 return CHECKSUM_NONE;
1108 if (!ip_csum_ok)
1109 return CHECKSUM_NONE;
1110 if (!tcpudp_csum_ok)
1111 return CHECKSUM_NONE;
1112
1113 return CHECKSUM_UNNECESSARY;
1114}
1115
Ben Greearbfa35362014-03-03 14:07:09 -08001116static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1117{
1118 struct sk_buff *next = msdu_head->next;
1119 struct sk_buff *to_free = next;
1120 int space;
1121 int total_len = 0;
1122
1123 /* TODO: Might could optimize this by using
1124 * skb_try_coalesce or similar method to
1125 * decrease copying, or maybe get mac80211 to
1126 * provide a way to just receive a list of
1127 * skb?
1128 */
1129
1130 msdu_head->next = NULL;
1131
1132 /* Allocate total length all at once. */
1133 while (next) {
1134 total_len += next->len;
1135 next = next->next;
1136 }
1137
1138 space = total_len - skb_tailroom(msdu_head);
1139 if ((space > 0) &&
1140 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1141 /* TODO: bump some rx-oom error stat */
1142 /* put it back together so we can free the
1143 * whole list at once.
1144 */
1145 msdu_head->next = to_free;
1146 return -1;
1147 }
1148
1149 /* Walk list again, copying contents into
1150 * msdu_head
1151 */
1152 next = to_free;
1153 while (next) {
1154 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1155 next->len);
1156 next = next->next;
1157 }
1158
1159 /* If here, we have consolidated skb. Free the
1160 * fragments and pass the main skb on up the
1161 * stack.
1162 */
1163 ath10k_htt_rx_free_msdu_chain(to_free);
1164 return 0;
1165}
1166
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001167static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1168 struct sk_buff *head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001169 enum htt_rx_mpdu_status status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001170 bool channel_set,
1171 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001172{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001173 struct ath10k *ar = htt->ar;
1174
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001175 if (head->len == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001176 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001177 "htt rx dropping due to zero-len\n");
1178 return false;
1179 }
1180
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001181 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001182 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001183 "htt rx dropping due to decrypt-err\n");
1184 return false;
1185 }
1186
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001187 if (!channel_set) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001188 ath10k_warn(ar, "no channel configured; ignoring frame!\n");
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001189 return false;
1190 }
1191
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001192 /* Skip mgmt frames while we handle this in WMI */
1193 if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001194 attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001195 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001196 return false;
1197 }
1198
1199 if (status != HTT_RX_IND_MPDU_STATUS_OK &&
1200 status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
1201 status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
Michal Kazior1bbc0972014-04-08 09:45:47 +03001202 !htt->ar->monitor_started) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001203 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001204 "htt rx ignoring frame w/ status %d\n",
1205 status);
1206 return false;
1207 }
1208
1209 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001210 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001211 "htt rx CAC running\n");
1212 return false;
1213 }
1214
1215 return true;
1216}
1217
Kalle Valo5e3dd152013-06-12 20:52:10 +03001218static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1219 struct htt_rx_indication *rx)
1220{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001221 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001222 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001223 struct htt_rx_indication_mpdu_range *mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001224 struct htt_rx_desc *rxd;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001225 enum htt_rx_mpdu_status status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001226 struct ieee80211_hdr *hdr;
1227 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001228 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001229 int fw_desc_len;
1230 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001231 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001232 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001233 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001234
Michal Kazior45967082014-02-27 18:50:05 +02001235 lockdep_assert_held(&htt->rx_ring.lock);
1236
Kalle Valo5e3dd152013-06-12 20:52:10 +03001237 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1238 fw_desc = (u8 *)&rx->fw_desc;
1239
1240 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1241 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1242 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1243
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001244 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001245 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1246 memset(rx_status, 0, sizeof(*rx_status));
1247 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1248 rx->ppdu.combined_rssi;
1249 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001250
1251 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1252 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001253 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1254 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001255 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001256
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001257 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001258
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001259 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001260 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001261 rx->ppdu.info0,
1262 __le32_to_cpu(rx->ppdu.info1),
1263 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001264 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001265 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001266
Michal Kazior7aa7a722014-08-25 12:09:38 +02001267 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001268 rx, sizeof(*rx) +
1269 (sizeof(struct htt_rx_indication_mpdu_range) *
1270 num_mpdu_ranges));
1271
1272 for (i = 0; i < num_mpdu_ranges; i++) {
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001273 status = mpdu_ranges[i].mpdu_range_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001274
1275 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1276 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001277
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001278 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001279 msdu_head = NULL;
1280 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001281 ret = ath10k_htt_rx_amsdu_pop(htt,
1282 &fw_desc,
1283 &fw_desc_len,
1284 &msdu_head,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001285 &msdu_tail,
1286 &attention);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001287
1288 if (ret < 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001289 ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001290 ret);
1291 ath10k_htt_rx_free_msdu_chain(msdu_head);
1292 continue;
1293 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001294
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001295 rxd = container_of((void *)msdu_head->data,
1296 struct htt_rx_desc,
1297 msdu_payload);
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001298
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001299 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001300 status,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001301 channel_set,
1302 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001303 ath10k_htt_rx_free_msdu_chain(msdu_head);
1304 continue;
1305 }
1306
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001307 if (ret > 0 &&
1308 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001309 ath10k_htt_rx_free_msdu_chain(msdu_head);
1310 continue;
1311 }
1312
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001313 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001314 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001315 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001316 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001317
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001318 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001319 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001320 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001321 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001322
Kalle Valo5e3dd152013-06-12 20:52:10 +03001323 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1324
1325 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001326 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001327 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001328 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001329 }
1330 }
1331
Michal Kazior6e712d42013-09-24 10:18:36 +02001332 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001333}
1334
1335static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001336 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001337{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001338 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001339 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001340 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001341 struct htt_rx_desc *rxd;
1342 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001343 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001344 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001345 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001346 bool tkip_mic_err;
1347 bool decrypt_err;
1348 u8 *fw_desc;
1349 int fw_desc_len, hdrlen, paramlen;
1350 int trim;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001351 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001352
1353 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1354 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1355
1356 msdu_head = NULL;
1357 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001358
1359 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001360 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001361 &msdu_head, &msdu_tail,
1362 &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001363 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001364
Michal Kazior7aa7a722014-08-25 12:09:38 +02001365 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001366
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001367 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001368 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001369 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001370 ath10k_htt_rx_free_msdu_chain(msdu_head);
1371 return;
1372 }
1373
1374 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001375 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001376
1377 hdr = (struct ieee80211_hdr *)msdu_head->data;
1378 rxd = (void *)msdu_head->data - sizeof(*rxd);
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001379 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1380 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001381 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001382 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001383
1384 if (fmt != RX_MSDU_DECAP_RAW) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001385 ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001386 dev_kfree_skb_any(msdu_head);
1387 goto end;
1388 }
1389
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001390 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1391 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001392 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1393 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001394 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001395
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001396 if (tkip_mic_err)
Michal Kazior7aa7a722014-08-25 12:09:38 +02001397 ath10k_warn(ar, "tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001398
1399 if (decrypt_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001400 ath10k_warn(ar, "decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001401 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001402 goto end;
1403 }
1404
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001405 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001406 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001407 paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001408
1409 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001410 memmove((void *)msdu_head->data + paramlen,
1411 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001412 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001413 skb_pull(msdu_head, paramlen);
1414 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001415 }
1416
1417 /* remove trailing FCS */
1418 trim = 4;
1419
1420 /* remove crypto trailer */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001421 trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001422
1423 /* last fragment of TKIP frags has MIC */
1424 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001425 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001426 trim += 8;
1427
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001428 if (trim > msdu_head->len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001429 ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001430 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001431 goto end;
1432 }
1433
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001434 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001435
Michal Kazior7aa7a722014-08-25 12:09:38 +02001436 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001437 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001438 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001439
1440end:
1441 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001442 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001443 "expecting more fragmented rx in one indication %d\n",
1444 fw_desc_len);
1445 }
1446}
1447
Michal Kazior6c5151a2014-02-27 18:50:04 +02001448static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1449 struct sk_buff *skb)
1450{
1451 struct ath10k_htt *htt = &ar->htt;
1452 struct htt_resp *resp = (struct htt_resp *)skb->data;
1453 struct htt_tx_done tx_done = {};
1454 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1455 __le16 msdu_id;
1456 int i;
1457
Michal Kazior45967082014-02-27 18:50:05 +02001458 lockdep_assert_held(&htt->tx_lock);
1459
Michal Kazior6c5151a2014-02-27 18:50:04 +02001460 switch (status) {
1461 case HTT_DATA_TX_STATUS_NO_ACK:
1462 tx_done.no_ack = true;
1463 break;
1464 case HTT_DATA_TX_STATUS_OK:
1465 break;
1466 case HTT_DATA_TX_STATUS_DISCARD:
1467 case HTT_DATA_TX_STATUS_POSTPONE:
1468 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1469 tx_done.discard = true;
1470 break;
1471 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001472 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001473 tx_done.discard = true;
1474 break;
1475 }
1476
Michal Kazior7aa7a722014-08-25 12:09:38 +02001477 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001478 resp->data_tx_completion.num_msdus);
1479
1480 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1481 msdu_id = resp->data_tx_completion.msdus[i];
1482 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1483 ath10k_txrx_tx_unref(htt, &tx_done);
1484 }
1485}
1486
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001487static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1488{
1489 struct htt_rx_addba *ev = &resp->rx_addba;
1490 struct ath10k_peer *peer;
1491 struct ath10k_vif *arvif;
1492 u16 info0, tid, peer_id;
1493
1494 info0 = __le16_to_cpu(ev->info0);
1495 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1496 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1497
Michal Kazior7aa7a722014-08-25 12:09:38 +02001498 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001499 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1500 tid, peer_id, ev->window_size);
1501
1502 spin_lock_bh(&ar->data_lock);
1503 peer = ath10k_peer_find_by_id(ar, peer_id);
1504 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001505 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001506 peer_id);
1507 spin_unlock_bh(&ar->data_lock);
1508 return;
1509 }
1510
1511 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1512 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001513 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001514 peer->vdev_id);
1515 spin_unlock_bh(&ar->data_lock);
1516 return;
1517 }
1518
Michal Kazior7aa7a722014-08-25 12:09:38 +02001519 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001520 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1521 peer->addr, tid, ev->window_size);
1522
1523 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1524 spin_unlock_bh(&ar->data_lock);
1525}
1526
1527static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1528{
1529 struct htt_rx_delba *ev = &resp->rx_delba;
1530 struct ath10k_peer *peer;
1531 struct ath10k_vif *arvif;
1532 u16 info0, tid, peer_id;
1533
1534 info0 = __le16_to_cpu(ev->info0);
1535 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1536 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1537
Michal Kazior7aa7a722014-08-25 12:09:38 +02001538 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001539 "htt rx delba tid %hu peer_id %hu\n",
1540 tid, peer_id);
1541
1542 spin_lock_bh(&ar->data_lock);
1543 peer = ath10k_peer_find_by_id(ar, peer_id);
1544 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001545 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001546 peer_id);
1547 spin_unlock_bh(&ar->data_lock);
1548 return;
1549 }
1550
1551 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1552 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001553 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001554 peer->vdev_id);
1555 spin_unlock_bh(&ar->data_lock);
1556 return;
1557 }
1558
Michal Kazior7aa7a722014-08-25 12:09:38 +02001559 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001560 "htt rx stop rx ba session sta %pM tid %hu\n",
1561 peer->addr, tid);
1562
1563 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1564 spin_unlock_bh(&ar->data_lock);
1565}
1566
Kalle Valo5e3dd152013-06-12 20:52:10 +03001567void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1568{
Michal Kazioredb82362013-07-05 16:15:14 +03001569 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001570 struct htt_resp *resp = (struct htt_resp *)skb->data;
1571
1572 /* confirm alignment */
1573 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001574 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001575
Michal Kazior7aa7a722014-08-25 12:09:38 +02001576 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001577 resp->hdr.msg_type);
1578 switch (resp->hdr.msg_type) {
1579 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1580 htt->target_version_major = resp->ver_resp.major;
1581 htt->target_version_minor = resp->ver_resp.minor;
1582 complete(&htt->target_version_received);
1583 break;
1584 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001585 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001586 spin_lock_bh(&htt->rx_ring.lock);
1587 __skb_queue_tail(&htt->rx_compl_q, skb);
1588 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001589 tasklet_schedule(&htt->txrx_compl_task);
1590 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001591 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1592 struct htt_peer_map_event ev = {
1593 .vdev_id = resp->peer_map.vdev_id,
1594 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1595 };
1596 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1597 ath10k_peer_map_event(htt, &ev);
1598 break;
1599 }
1600 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1601 struct htt_peer_unmap_event ev = {
1602 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1603 };
1604 ath10k_peer_unmap_event(htt, &ev);
1605 break;
1606 }
1607 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1608 struct htt_tx_done tx_done = {};
1609 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1610
1611 tx_done.msdu_id =
1612 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1613
1614 switch (status) {
1615 case HTT_MGMT_TX_STATUS_OK:
1616 break;
1617 case HTT_MGMT_TX_STATUS_RETRY:
1618 tx_done.no_ack = true;
1619 break;
1620 case HTT_MGMT_TX_STATUS_DROP:
1621 tx_done.discard = true;
1622 break;
1623 }
1624
Michal Kazior6c5151a2014-02-27 18:50:04 +02001625 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001626 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001627 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001628 break;
1629 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001630 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1631 spin_lock_bh(&htt->tx_lock);
1632 __skb_queue_tail(&htt->tx_compl_q, skb);
1633 spin_unlock_bh(&htt->tx_lock);
1634 tasklet_schedule(&htt->txrx_compl_task);
1635 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001636 case HTT_T2H_MSG_TYPE_SEC_IND: {
1637 struct ath10k *ar = htt->ar;
1638 struct htt_security_indication *ev = &resp->security_indication;
1639
Michal Kazior7aa7a722014-08-25 12:09:38 +02001640 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001641 "sec ind peer_id %d unicast %d type %d\n",
1642 __le16_to_cpu(ev->peer_id),
1643 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1644 MS(ev->flags, HTT_SECURITY_TYPE));
1645 complete(&ar->install_key_done);
1646 break;
1647 }
1648 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001649 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001650 skb->data, skb->len);
1651 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1652 break;
1653 }
1654 case HTT_T2H_MSG_TYPE_TEST:
1655 /* FIX THIS */
1656 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001657 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001658 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001659 break;
1660 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001661 /* Firmware can return tx frames if it's unable to fully
1662 * process them and suspects host may be able to fix it. ath10k
1663 * sends all tx frames as already inspected so this shouldn't
1664 * happen unless fw has a bug.
1665 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001666 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001667 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001668 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001669 ath10k_htt_rx_addba(ar, resp);
1670 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001671 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001672 ath10k_htt_rx_delba(ar, resp);
1673 break;
1674 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1675 /* Ignore this event because mac80211 takes care of Rx
1676 * aggregation reordering.
1677 */
1678 break;
1679 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001680 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001681 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt event (%d) not handled\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001682 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001683 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001684 skb->data, skb->len);
1685 break;
1686 };
1687
1688 /* Free the indication buffer */
1689 dev_kfree_skb_any(skb);
1690}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001691
1692static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1693{
1694 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1695 struct htt_resp *resp;
1696 struct sk_buff *skb;
1697
Michal Kazior45967082014-02-27 18:50:05 +02001698 spin_lock_bh(&htt->tx_lock);
1699 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001700 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1701 dev_kfree_skb_any(skb);
1702 }
Michal Kazior45967082014-02-27 18:50:05 +02001703 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001704
Michal Kazior45967082014-02-27 18:50:05 +02001705 spin_lock_bh(&htt->rx_ring.lock);
1706 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001707 resp = (struct htt_resp *)skb->data;
1708 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1709 dev_kfree_skb_any(skb);
1710 }
Michal Kazior45967082014-02-27 18:50:05 +02001711 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001712}