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Kalle Valo5e3dd152013-06-12 20:52:10 +03001/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
Michal Kazioredb82362013-07-05 16:15:14 +030018#include "core.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030019#include "htc.h"
20#include "htt.h"
21#include "txrx.h"
22#include "debug.h"
Kalle Valoa9bf0502013-09-03 11:43:55 +030023#include "trace.h"
Michal Kazioraa5b4fb2014-07-23 12:20:33 +020024#include "mac.h"
Kalle Valo5e3dd152013-06-12 20:52:10 +030025
26#include <linux/log2.h>
27
28/* slightly larger than one large A-MPDU */
29#define HTT_RX_RING_SIZE_MIN 128
30
31/* roughly 20 ms @ 1 Gbps of 1500B MSDUs */
32#define HTT_RX_RING_SIZE_MAX 2048
33
34#define HTT_RX_AVG_FRM_BYTES 1000
35
36/* ms, very conservative */
37#define HTT_RX_HOST_LATENCY_MAX_MS 20
38
39/* ms, conservative */
40#define HTT_RX_HOST_LATENCY_WORST_LIKELY_MS 10
41
42/* when under memory pressure rx ring refill may fail and needs a retry */
43#define HTT_RX_RING_REFILL_RETRY_MS 50
44
Michal Kaziorf6dc2092013-09-26 10:12:22 +030045static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
Michal Kazior6c5151a2014-02-27 18:50:04 +020046static void ath10k_htt_txrx_compl_task(unsigned long ptr);
Michal Kaziorf6dc2092013-09-26 10:12:22 +030047
Kalle Valo5e3dd152013-06-12 20:52:10 +030048static int ath10k_htt_rx_ring_size(struct ath10k_htt *htt)
49{
50 int size;
51
52 /*
53 * It is expected that the host CPU will typically be able to
54 * service the rx indication from one A-MPDU before the rx
55 * indication from the subsequent A-MPDU happens, roughly 1-2 ms
56 * later. However, the rx ring should be sized very conservatively,
57 * to accomodate the worst reasonable delay before the host CPU
58 * services a rx indication interrupt.
59 *
60 * The rx ring need not be kept full of empty buffers. In theory,
61 * the htt host SW can dynamically track the low-water mark in the
62 * rx ring, and dynamically adjust the level to which the rx ring
63 * is filled with empty buffers, to dynamically meet the desired
64 * low-water mark.
65 *
66 * In contrast, it's difficult to resize the rx ring itself, once
67 * it's in use. Thus, the ring itself should be sized very
68 * conservatively, while the degree to which the ring is filled
69 * with empty buffers should be sized moderately conservatively.
70 */
71
72 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
73 size =
74 htt->max_throughput_mbps +
75 1000 /
76 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_MAX_MS;
77
78 if (size < HTT_RX_RING_SIZE_MIN)
79 size = HTT_RX_RING_SIZE_MIN;
80
81 if (size > HTT_RX_RING_SIZE_MAX)
82 size = HTT_RX_RING_SIZE_MAX;
83
84 size = roundup_pow_of_two(size);
85
86 return size;
87}
88
89static int ath10k_htt_rx_ring_fill_level(struct ath10k_htt *htt)
90{
91 int size;
92
93 /* 1e6 bps/mbps / 1e3 ms per sec = 1000 */
94 size =
95 htt->max_throughput_mbps *
96 1000 /
97 (8 * HTT_RX_AVG_FRM_BYTES) * HTT_RX_HOST_LATENCY_WORST_LIKELY_MS;
98
99 /*
100 * Make sure the fill level is at least 1 less than the ring size.
101 * Leaving 1 element empty allows the SW to easily distinguish
102 * between a full ring vs. an empty ring.
103 */
104 if (size >= htt->rx_ring.size)
105 size = htt->rx_ring.size - 1;
106
107 return size;
108}
109
110static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
111{
112 struct sk_buff *skb;
113 struct ath10k_skb_cb *cb;
114 int i;
115
116 for (i = 0; i < htt->rx_ring.fill_cnt; i++) {
117 skb = htt->rx_ring.netbufs_ring[i];
118 cb = ATH10K_SKB_CB(skb);
119 dma_unmap_single(htt->ar->dev, cb->paddr,
120 skb->len + skb_tailroom(skb),
121 DMA_FROM_DEVICE);
122 dev_kfree_skb_any(skb);
123 }
124
125 htt->rx_ring.fill_cnt = 0;
126}
127
128static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
129{
130 struct htt_rx_desc *rx_desc;
131 struct sk_buff *skb;
132 dma_addr_t paddr;
133 int ret = 0, idx;
134
Kalle Valo8cc7f262014-09-14 12:50:39 +0300135 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300136 while (num > 0) {
137 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
138 if (!skb) {
139 ret = -ENOMEM;
140 goto fail;
141 }
142
143 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
144 skb_pull(skb,
145 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
146 skb->data);
147
148 /* Clear rx_desc attention word before posting to Rx ring */
149 rx_desc = (struct htt_rx_desc *)skb->data;
150 rx_desc->attention.flags = __cpu_to_le32(0);
151
152 paddr = dma_map_single(htt->ar->dev, skb->data,
153 skb->len + skb_tailroom(skb),
154 DMA_FROM_DEVICE);
155
156 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
157 dev_kfree_skb_any(skb);
158 ret = -ENOMEM;
159 goto fail;
160 }
161
162 ATH10K_SKB_CB(skb)->paddr = paddr;
163 htt->rx_ring.netbufs_ring[idx] = skb;
164 htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
165 htt->rx_ring.fill_cnt++;
166
167 num--;
168 idx++;
169 idx &= htt->rx_ring.size_mask;
170 }
171
172fail:
Kalle Valo8cc7f262014-09-14 12:50:39 +0300173 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300174 return ret;
175}
176
177static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
178{
179 lockdep_assert_held(&htt->rx_ring.lock);
180 return __ath10k_htt_rx_ring_fill_n(htt, num);
181}
182
183static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
184{
Michal Kazior6e712d42013-09-24 10:18:36 +0200185 int ret, num_deficit, num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300186
Michal Kazior6e712d42013-09-24 10:18:36 +0200187 /* Refilling the whole RX ring buffer proves to be a bad idea. The
188 * reason is RX may take up significant amount of CPU cycles and starve
189 * other tasks, e.g. TX on an ethernet device while acting as a bridge
190 * with ath10k wlan interface. This ended up with very poor performance
191 * once CPU the host system was overwhelmed with RX on ath10k.
192 *
193 * By limiting the number of refills the replenishing occurs
194 * progressively. This in turns makes use of the fact tasklets are
195 * processed in FIFO order. This means actual RX processing can starve
196 * out refilling. If there's not enough buffers on RX ring FW will not
197 * report RX until it is refilled with enough buffers. This
198 * automatically balances load wrt to CPU power.
199 *
200 * This probably comes at a cost of lower maximum throughput but
201 * improves the avarage and stability. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300202 spin_lock_bh(&htt->rx_ring.lock);
Michal Kazior6e712d42013-09-24 10:18:36 +0200203 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
204 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
205 num_deficit -= num_to_fill;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300206 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
207 if (ret == -ENOMEM) {
208 /*
209 * Failed to fill it to the desired level -
210 * we'll start a timer and try again next time.
211 * As long as enough buffers are left in the ring for
212 * another A-MPDU rx, no special recovery is needed.
213 */
214 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
215 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
Michal Kazior6e712d42013-09-24 10:18:36 +0200216 } else if (num_deficit > 0) {
217 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300218 }
219 spin_unlock_bh(&htt->rx_ring.lock);
220}
221
222static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
223{
224 struct ath10k_htt *htt = (struct ath10k_htt *)arg;
Kalle Valoaf762c02014-09-14 12:50:17 +0300225
Kalle Valo5e3dd152013-06-12 20:52:10 +0300226 ath10k_htt_rx_msdu_buff_replenish(htt);
227}
228
Michal Kazior3e841fd2014-05-14 16:23:31 +0300229static void ath10k_htt_rx_ring_clean_up(struct ath10k_htt *htt)
230{
231 struct sk_buff *skb;
232 int i;
233
234 for (i = 0; i < htt->rx_ring.size; i++) {
235 skb = htt->rx_ring.netbufs_ring[i];
236 if (!skb)
237 continue;
238
239 dma_unmap_single(htt->ar->dev, ATH10K_SKB_CB(skb)->paddr,
240 skb->len + skb_tailroom(skb),
241 DMA_FROM_DEVICE);
242 dev_kfree_skb_any(skb);
243 htt->rx_ring.netbufs_ring[i] = NULL;
244 }
245}
246
Michal Kazior95bf21f2014-05-16 17:15:39 +0300247void ath10k_htt_rx_free(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300248{
Kalle Valo5e3dd152013-06-12 20:52:10 +0300249 del_timer_sync(&htt->rx_ring.refill_retry_timer);
Michal Kazior6e712d42013-09-24 10:18:36 +0200250 tasklet_kill(&htt->rx_replenish_task);
Michal Kazior6c5151a2014-02-27 18:50:04 +0200251 tasklet_kill(&htt->txrx_compl_task);
252
253 skb_queue_purge(&htt->tx_compl_q);
254 skb_queue_purge(&htt->rx_compl_q);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300255
Michal Kazior3e841fd2014-05-14 16:23:31 +0300256 ath10k_htt_rx_ring_clean_up(htt);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300257
258 dma_free_coherent(htt->ar->dev,
259 (htt->rx_ring.size *
260 sizeof(htt->rx_ring.paddrs_ring)),
261 htt->rx_ring.paddrs_ring,
262 htt->rx_ring.base_paddr);
263
264 dma_free_coherent(htt->ar->dev,
265 sizeof(*htt->rx_ring.alloc_idx.vaddr),
266 htt->rx_ring.alloc_idx.vaddr,
267 htt->rx_ring.alloc_idx.paddr);
268
269 kfree(htt->rx_ring.netbufs_ring);
270}
271
272static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
273{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200274 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300275 int idx;
276 struct sk_buff *msdu;
277
Michal Kazior45967082014-02-27 18:50:05 +0200278 lockdep_assert_held(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300279
Michal Kazior8d60ee82014-02-27 18:50:05 +0200280 if (htt->rx_ring.fill_cnt == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200281 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
Michal Kazior8d60ee82014-02-27 18:50:05 +0200282 return NULL;
283 }
Kalle Valo5e3dd152013-06-12 20:52:10 +0300284
285 idx = htt->rx_ring.sw_rd_idx.msdu_payld;
286 msdu = htt->rx_ring.netbufs_ring[idx];
Michal Kazior3e841fd2014-05-14 16:23:31 +0300287 htt->rx_ring.netbufs_ring[idx] = NULL;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300288
289 idx++;
290 idx &= htt->rx_ring.size_mask;
291 htt->rx_ring.sw_rd_idx.msdu_payld = idx;
292 htt->rx_ring.fill_cnt--;
293
Michal Kazior4de02802014-10-23 17:04:23 +0300294 dma_unmap_single(htt->ar->dev,
295 ATH10K_SKB_CB(msdu)->paddr,
296 msdu->len + skb_tailroom(msdu),
297 DMA_FROM_DEVICE);
298 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
299 msdu->data, msdu->len + skb_tailroom(msdu));
300 trace_ath10k_htt_rx_pop_msdu(ar, msdu->data, msdu->len +
301 skb_tailroom(msdu));
302
Kalle Valo5e3dd152013-06-12 20:52:10 +0300303 return msdu;
304}
305
306static void ath10k_htt_rx_free_msdu_chain(struct sk_buff *skb)
307{
308 struct sk_buff *next;
309
310 while (skb) {
311 next = skb->next;
312 dev_kfree_skb_any(skb);
313 skb = next;
314 }
315}
316
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100317/* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300318static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
319 u8 **fw_desc, int *fw_desc_len,
320 struct sk_buff **head_msdu,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300321 struct sk_buff **tail_msdu,
322 u32 *attention)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300323{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200324 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300325 int msdu_len, msdu_chaining = 0;
Kalle Valoaf762c02014-09-14 12:50:17 +0300326 struct sk_buff *msdu, *next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300327 struct htt_rx_desc *rx_desc;
328
Michal Kazior45967082014-02-27 18:50:05 +0200329 lockdep_assert_held(&htt->rx_ring.lock);
330
Kalle Valo5e3dd152013-06-12 20:52:10 +0300331 if (htt->rx_confused) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200332 ath10k_warn(ar, "htt is confused. refusing rx\n");
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100333 return -1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300334 }
335
336 msdu = *head_msdu = ath10k_htt_rx_netbuf_pop(htt);
337 while (msdu) {
338 int last_msdu, msdu_len_invalid, msdu_chained;
339
Kalle Valo5e3dd152013-06-12 20:52:10 +0300340 rx_desc = (struct htt_rx_desc *)msdu->data;
341
342 /* FIXME: we must report msdu payload since this is what caller
343 * expects now */
344 skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
345 skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
346
347 /*
348 * Sanity check - confirm the HW is finished filling in the
349 * rx data.
350 * If the HW and SW are working correctly, then it's guaranteed
351 * that the HW's MAC DMA is done before this point in the SW.
352 * To prevent the case that we handle a stale Rx descriptor,
353 * just assert for now until we have a way to recover.
354 */
355 if (!(__le32_to_cpu(rx_desc->attention.flags)
356 & RX_ATTENTION_FLAGS_MSDU_DONE)) {
357 ath10k_htt_rx_free_msdu_chain(*head_msdu);
358 *head_msdu = NULL;
359 msdu = NULL;
Michal Kazior7aa7a722014-08-25 12:09:38 +0200360 ath10k_err(ar, "htt rx stopped. cannot recover\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300361 htt->rx_confused = true;
362 break;
363 }
364
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +0300365 *attention |= __le32_to_cpu(rx_desc->attention.flags) &
366 (RX_ATTENTION_FLAGS_TKIP_MIC_ERR |
367 RX_ATTENTION_FLAGS_DECRYPT_ERR |
368 RX_ATTENTION_FLAGS_FCS_ERR |
369 RX_ATTENTION_FLAGS_MGMT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300370 /*
371 * Copy the FW rx descriptor for this MSDU from the rx
372 * indication message into the MSDU's netbuf. HL uses the
373 * same rx indication message definition as LL, and simply
374 * appends new info (fields from the HW rx desc, and the
375 * MSDU payload itself). So, the offset into the rx
376 * indication message only has to account for the standard
377 * offset of the per-MSDU FW rx desc info within the
378 * message, and how many bytes of the per-MSDU FW rx desc
379 * info have already been consumed. (And the endianness of
380 * the host, since for a big-endian host, the rx ind
381 * message contents, including the per-MSDU rx desc bytes,
382 * were byteswapped during upload.)
383 */
384 if (*fw_desc_len > 0) {
385 rx_desc->fw_desc.info0 = **fw_desc;
386 /*
387 * The target is expected to only provide the basic
388 * per-MSDU rx descriptors. Just to be sure, verify
389 * that the target has not attached extension data
390 * (e.g. LRO flow ID).
391 */
392
393 /* or more, if there's extension data */
394 (*fw_desc)++;
395 (*fw_desc_len)--;
396 } else {
397 /*
398 * When an oversized AMSDU happened, FW will lost
399 * some of MSDU status - in this case, the FW
400 * descriptors provided will be less than the
401 * actual MSDUs inside this MPDU. Mark the FW
402 * descriptors so that it will still deliver to
403 * upper stack, if no CRC error for this MPDU.
404 *
405 * FIX THIS - the FW descriptors are actually for
406 * MSDUs in the end of this A-MSDU instead of the
407 * beginning.
408 */
409 rx_desc->fw_desc.info0 = 0;
410 }
411
412 msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
413 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
414 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
415 msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.info0),
416 RX_MSDU_START_INFO0_MSDU_LENGTH);
417 msdu_chained = rx_desc->frag_info.ring2_more_count;
418
419 if (msdu_len_invalid)
420 msdu_len = 0;
421
422 skb_trim(msdu, 0);
423 skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
424 msdu_len -= msdu->len;
425
426 /* FIXME: Do chained buffers include htt_rx_desc or not? */
427 while (msdu_chained--) {
428 struct sk_buff *next = ath10k_htt_rx_netbuf_pop(htt);
429
Michal Kaziorb30595a2014-10-23 17:04:24 +0300430 if (!next) {
431 ath10k_warn(ar, "failed to pop chained msdu\n");
432 ath10k_htt_rx_free_msdu_chain(*head_msdu);
433 *head_msdu = NULL;
434 msdu = NULL;
435 htt->rx_confused = true;
436 break;
437 }
438
Kalle Valo5e3dd152013-06-12 20:52:10 +0300439 skb_trim(next, 0);
440 skb_put(next, min(msdu_len, HTT_RX_BUF_SIZE));
441 msdu_len -= next->len;
442
443 msdu->next = next;
444 msdu = next;
Michal Kaziorede9c8e2014-05-14 16:23:31 +0300445 msdu_chaining = 1;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300446 }
447
Kalle Valo5e3dd152013-06-12 20:52:10 +0300448 last_msdu = __le32_to_cpu(rx_desc->msdu_end.info0) &
449 RX_MSDU_END_INFO0_LAST_MSDU;
450
Michal Kaziorb04e2042014-10-23 17:04:27 +0300451 trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
Rajkumar Manoharana0883cf2014-10-03 08:02:47 +0300452 sizeof(*rx_desc) - sizeof(u32));
Kalle Valo5e3dd152013-06-12 20:52:10 +0300453 if (last_msdu) {
454 msdu->next = NULL;
455 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300456 }
Kalle Valod8bb26b2014-09-14 12:50:33 +0300457
458 next = ath10k_htt_rx_netbuf_pop(htt);
459 msdu->next = next;
460 msdu = next;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300461 }
462 *tail_msdu = msdu;
463
Janusz Dziedzicd84dd602014-03-24 21:23:20 +0100464 if (*head_msdu == NULL)
465 msdu_chaining = -1;
466
Kalle Valo5e3dd152013-06-12 20:52:10 +0300467 /*
468 * Don't refill the ring yet.
469 *
470 * First, the elements popped here are still in use - it is not
471 * safe to overwrite them until the matching call to
472 * mpdu_desc_list_next. Second, for efficiency it is preferable to
473 * refill the rx ring with 1 PPDU's worth of rx buffers (something
474 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
475 * (something like 3 buffers). Consequently, we'll rely on the txrx
476 * SW to tell us when it is done pulling all the PPDU's rx buffers
477 * out of the rx ring, and then refill it just once.
478 */
479
480 return msdu_chaining;
481}
482
Michal Kazior6e712d42013-09-24 10:18:36 +0200483static void ath10k_htt_rx_replenish_task(unsigned long ptr)
484{
485 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
Kalle Valoaf762c02014-09-14 12:50:17 +0300486
Michal Kazior6e712d42013-09-24 10:18:36 +0200487 ath10k_htt_rx_msdu_buff_replenish(htt);
488}
489
Michal Kazior95bf21f2014-05-16 17:15:39 +0300490int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300491{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200492 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300493 dma_addr_t paddr;
494 void *vaddr;
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300495 size_t size;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300496 struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
497
Michal Kazior51fc7d72014-10-23 17:04:24 +0300498 htt->rx_confused = false;
499
Kalle Valo5e3dd152013-06-12 20:52:10 +0300500 htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
501 if (!is_power_of_2(htt->rx_ring.size)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +0200502 ath10k_warn(ar, "htt rx ring size is not power of 2\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +0300503 return -EINVAL;
504 }
505
506 htt->rx_ring.size_mask = htt->rx_ring.size - 1;
507
508 /*
509 * Set the initial value for the level to which the rx ring
510 * should be filled, based on the max throughput and the
511 * worst likely latency for the host to fill the rx ring
512 * with new buffers. In theory, this fill level can be
513 * dynamically adjusted from the initial value set here, to
514 * reflect the actual host latency rather than a
515 * conservative assumption about the host latency.
516 */
517 htt->rx_ring.fill_level = ath10k_htt_rx_ring_fill_level(htt);
518
519 htt->rx_ring.netbufs_ring =
Michal Kazior3e841fd2014-05-14 16:23:31 +0300520 kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
Kalle Valo5e3dd152013-06-12 20:52:10 +0300521 GFP_KERNEL);
522 if (!htt->rx_ring.netbufs_ring)
523 goto err_netbuf;
524
Kalle Valobd8bdbb2014-09-14 12:50:00 +0300525 size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
526
527 vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_DMA);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300528 if (!vaddr)
529 goto err_dma_ring;
530
531 htt->rx_ring.paddrs_ring = vaddr;
532 htt->rx_ring.base_paddr = paddr;
533
534 vaddr = dma_alloc_coherent(htt->ar->dev,
535 sizeof(*htt->rx_ring.alloc_idx.vaddr),
536 &paddr, GFP_DMA);
537 if (!vaddr)
538 goto err_dma_idx;
539
540 htt->rx_ring.alloc_idx.vaddr = vaddr;
541 htt->rx_ring.alloc_idx.paddr = paddr;
542 htt->rx_ring.sw_rd_idx.msdu_payld = 0;
543 *htt->rx_ring.alloc_idx.vaddr = 0;
544
545 /* Initialize the Rx refill retry timer */
546 setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
547
548 spin_lock_init(&htt->rx_ring.lock);
549
550 htt->rx_ring.fill_cnt = 0;
551 if (__ath10k_htt_rx_ring_fill_n(htt, htt->rx_ring.fill_level))
552 goto err_fill_ring;
553
Michal Kazior6e712d42013-09-24 10:18:36 +0200554 tasklet_init(&htt->rx_replenish_task, ath10k_htt_rx_replenish_task,
555 (unsigned long)htt);
556
Michal Kazior6c5151a2014-02-27 18:50:04 +0200557 skb_queue_head_init(&htt->tx_compl_q);
558 skb_queue_head_init(&htt->rx_compl_q);
559
560 tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
561 (unsigned long)htt);
562
Michal Kazior7aa7a722014-08-25 12:09:38 +0200563 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +0300564 htt->rx_ring.size, htt->rx_ring.fill_level);
565 return 0;
566
567err_fill_ring:
568 ath10k_htt_rx_ring_free(htt);
569 dma_free_coherent(htt->ar->dev,
570 sizeof(*htt->rx_ring.alloc_idx.vaddr),
571 htt->rx_ring.alloc_idx.vaddr,
572 htt->rx_ring.alloc_idx.paddr);
573err_dma_idx:
574 dma_free_coherent(htt->ar->dev,
575 (htt->rx_ring.size *
576 sizeof(htt->rx_ring.paddrs_ring)),
577 htt->rx_ring.paddrs_ring,
578 htt->rx_ring.base_paddr);
579err_dma_ring:
580 kfree(htt->rx_ring.netbufs_ring);
581err_netbuf:
582 return -ENOMEM;
583}
584
Michal Kazior7aa7a722014-08-25 12:09:38 +0200585static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
586 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300587{
588 switch (type) {
Kalle Valo5e3dd152013-06-12 20:52:10 +0300589 case HTT_RX_MPDU_ENCRYPT_NONE:
590 return 0;
Michal Kazior890d3b22014-10-23 17:04:22 +0300591 case HTT_RX_MPDU_ENCRYPT_WEP40:
592 case HTT_RX_MPDU_ENCRYPT_WEP104:
593 return IEEE80211_WEP_IV_LEN;
594 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
595 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
596 return IEEE80211_TKIP_IV_LEN;
597 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
598 return IEEE80211_CCMP_HDR_LEN;
599 case HTT_RX_MPDU_ENCRYPT_WEP128:
600 case HTT_RX_MPDU_ENCRYPT_WAPI:
601 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300602 }
603
Michal Kazior890d3b22014-10-23 17:04:22 +0300604 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300605 return 0;
606}
607
Michal Kazior890d3b22014-10-23 17:04:22 +0300608#define MICHAEL_MIC_LEN 8
609
Michal Kazior7aa7a722014-08-25 12:09:38 +0200610static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
611 enum htt_rx_mpdu_encrypt_type type)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300612{
613 switch (type) {
614 case HTT_RX_MPDU_ENCRYPT_NONE:
Michal Kazior890d3b22014-10-23 17:04:22 +0300615 return 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300616 case HTT_RX_MPDU_ENCRYPT_WEP40:
617 case HTT_RX_MPDU_ENCRYPT_WEP104:
Michal Kazior890d3b22014-10-23 17:04:22 +0300618 return IEEE80211_WEP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300619 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
620 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
Michal Kazior890d3b22014-10-23 17:04:22 +0300621 return IEEE80211_TKIP_ICV_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300622 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
Michal Kazior890d3b22014-10-23 17:04:22 +0300623 return IEEE80211_CCMP_MIC_LEN;
624 case HTT_RX_MPDU_ENCRYPT_WEP128:
625 case HTT_RX_MPDU_ENCRYPT_WAPI:
626 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300627 }
628
Michal Kazior890d3b22014-10-23 17:04:22 +0300629 ath10k_warn(ar, "unsupported encryption type %d\n", type);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300630 return 0;
631}
632
633/* Applies for first msdu in chain, before altering it. */
634static struct ieee80211_hdr *ath10k_htt_rx_skb_get_hdr(struct sk_buff *skb)
635{
636 struct htt_rx_desc *rxd;
637 enum rx_msdu_decap_format fmt;
638
639 rxd = (void *)skb->data - sizeof(*rxd);
640 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +0300641 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300642
643 if (fmt == RX_MSDU_DECAP_RAW)
644 return (void *)skb->data;
Kalle Valod8bb26b2014-09-14 12:50:33 +0300645
646 return (void *)skb->data - RX_HTT_HDR_STATUS_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300647}
648
649/* This function only applies for first msdu in an msdu chain */
650static bool ath10k_htt_rx_hdr_is_amsdu(struct ieee80211_hdr *hdr)
651{
Kalle Valoaf762c02014-09-14 12:50:17 +0300652 u8 *qc;
653
Kalle Valo5e3dd152013-06-12 20:52:10 +0300654 if (ieee80211_is_data_qos(hdr->frame_control)) {
Kalle Valoaf762c02014-09-14 12:50:17 +0300655 qc = ieee80211_get_qos_ctl(hdr);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300656 if (qc[0] & 0x80)
657 return true;
658 }
659 return false;
660}
661
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300662struct rfc1042_hdr {
663 u8 llc_dsap;
664 u8 llc_ssap;
665 u8 llc_ctrl;
666 u8 snap_oui[3];
667 __be16 snap_type;
668} __packed;
669
670struct amsdu_subframe_hdr {
671 u8 dst[ETH_ALEN];
672 u8 src[ETH_ALEN];
673 __be16 len;
674} __packed;
675
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100676static const u8 rx_legacy_rate_idx[] = {
677 3, /* 0x00 - 11Mbps */
678 2, /* 0x01 - 5.5Mbps */
679 1, /* 0x02 - 2Mbps */
680 0, /* 0x03 - 1Mbps */
681 3, /* 0x04 - 11Mbps */
682 2, /* 0x05 - 5.5Mbps */
683 1, /* 0x06 - 2Mbps */
684 0, /* 0x07 - 1Mbps */
685 10, /* 0x08 - 48Mbps */
686 8, /* 0x09 - 24Mbps */
687 6, /* 0x0A - 12Mbps */
688 4, /* 0x0B - 6Mbps */
689 11, /* 0x0C - 54Mbps */
690 9, /* 0x0D - 36Mbps */
691 7, /* 0x0E - 18Mbps */
692 5, /* 0x0F - 9Mbps */
693};
694
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100695static void ath10k_htt_rx_h_rates(struct ath10k *ar,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100696 enum ieee80211_band band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100697 u8 info0, u32 info1, u32 info2,
Janusz Dziedziccfadd9b2014-03-24 21:23:16 +0100698 struct ieee80211_rx_status *status)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100699{
700 u8 cck, rate, rate_idx, bw, sgi, mcs, nss;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100701 u8 preamble = 0;
702
703 /* Check if valid fields */
704 if (!(info0 & HTT_RX_INDICATION_INFO0_START_VALID))
705 return;
706
707 preamble = MS(info1, HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE);
708
709 switch (preamble) {
710 case HTT_RX_LEGACY:
711 cck = info0 & HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK;
712 rate = MS(info0, HTT_RX_INDICATION_INFO0_LEGACY_RATE);
713 rate_idx = 0;
714
715 if (rate < 0x08 || rate > 0x0F)
716 break;
717
718 switch (band) {
719 case IEEE80211_BAND_2GHZ:
720 if (cck)
721 rate &= ~BIT(3);
722 rate_idx = rx_legacy_rate_idx[rate];
723 break;
724 case IEEE80211_BAND_5GHZ:
725 rate_idx = rx_legacy_rate_idx[rate];
726 /* We are using same rate table registering
727 HW - ath10k_rates[]. In case of 5GHz skip
728 CCK rates, so -4 here */
729 rate_idx -= 4;
730 break;
731 default:
732 break;
733 }
734
735 status->rate_idx = rate_idx;
736 break;
737 case HTT_RX_HT:
738 case HTT_RX_HT_WITH_TXBF:
739 /* HT-SIG - Table 20-11 in info1 and info2 */
740 mcs = info1 & 0x1F;
741 nss = mcs >> 3;
742 bw = (info1 >> 7) & 1;
743 sgi = (info2 >> 7) & 1;
744
745 status->rate_idx = mcs;
746 status->flag |= RX_FLAG_HT;
747 if (sgi)
748 status->flag |= RX_FLAG_SHORT_GI;
749 if (bw)
750 status->flag |= RX_FLAG_40MHZ;
751 break;
752 case HTT_RX_VHT:
753 case HTT_RX_VHT_WITH_TXBF:
754 /* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
755 TODO check this */
756 mcs = (info2 >> 4) & 0x0F;
757 nss = ((info1 >> 10) & 0x07) + 1;
758 bw = info1 & 3;
759 sgi = info2 & 1;
760
761 status->rate_idx = mcs;
762 status->vht_nss = nss;
763
764 if (sgi)
765 status->flag |= RX_FLAG_SHORT_GI;
766
767 switch (bw) {
768 /* 20MHZ */
769 case 0:
770 break;
771 /* 40MHZ */
772 case 1:
773 status->flag |= RX_FLAG_40MHZ;
774 break;
775 /* 80MHZ */
776 case 2:
777 status->vht_flag |= RX_VHT_FLAG_80MHZ;
778 }
779
780 status->flag |= RX_FLAG_VHT;
781 break;
782 default:
783 break;
784 }
785}
786
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100787static void ath10k_htt_rx_h_protected(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100788 struct ieee80211_rx_status *rx_status,
789 struct sk_buff *skb,
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300790 enum htt_rx_mpdu_encrypt_type enctype,
791 enum rx_msdu_decap_format fmt,
792 bool dot11frag)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100793{
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100794 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100795
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300796 rx_status->flag &= ~(RX_FLAG_DECRYPTED |
797 RX_FLAG_IV_STRIPPED |
798 RX_FLAG_MMIC_STRIPPED);
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100799
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300800 if (enctype == HTT_RX_MPDU_ENCRYPT_NONE)
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100801 return;
Michal Kaziorc071dcb2014-05-23 11:33:18 +0300802
803 /*
804 * There's no explicit rx descriptor flag to indicate whether a given
805 * frame has been decrypted or not. We're forced to use the decap
806 * format as an implicit indication. However fragmentation rx is always
807 * raw and it probably never reports undecrypted raws.
808 *
809 * This makes sure sniffed frames are reported as-is without stripping
810 * the protected flag.
811 */
812 if (fmt == RX_MSDU_DECAP_RAW && !dot11frag)
813 return;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100814
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100815 rx_status->flag |= RX_FLAG_DECRYPTED |
816 RX_FLAG_IV_STRIPPED |
817 RX_FLAG_MMIC_STRIPPED;
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100818 hdr->frame_control = __cpu_to_le16(__le16_to_cpu(hdr->frame_control) &
819 ~IEEE80211_FCTL_PROTECTED);
820}
821
Janusz Dziedzic36653f052014-03-24 21:23:18 +0100822static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
823 struct ieee80211_rx_status *status)
824{
825 struct ieee80211_channel *ch;
826
827 spin_lock_bh(&ar->data_lock);
828 ch = ar->scan_channel;
829 if (!ch)
830 ch = ar->rx_channel;
831 spin_unlock_bh(&ar->data_lock);
832
833 if (!ch)
834 return false;
835
836 status->band = ch->band;
837 status->freq = ch->center_freq;
838
839 return true;
840}
841
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300842static const char * const tid_to_ac[] = {
843 "BE",
844 "BK",
845 "BK",
846 "BE",
847 "VI",
848 "VI",
849 "VO",
850 "VO",
851};
852
853static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
854{
855 u8 *qc;
856 int tid;
857
858 if (!ieee80211_is_data_qos(hdr->frame_control))
859 return "";
860
861 qc = ieee80211_get_qos_ctl(hdr);
862 tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
863 if (tid < 8)
864 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
865 else
866 snprintf(out, size, "tid %d", tid);
867
868 return out;
869}
870
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100871static void ath10k_process_rx(struct ath10k *ar,
872 struct ieee80211_rx_status *rx_status,
873 struct sk_buff *skb)
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100874{
875 struct ieee80211_rx_status *status;
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300876 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
877 char tid[32];
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100878
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100879 status = IEEE80211_SKB_RXCB(skb);
880 *status = *rx_status;
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100881
Michal Kazior7aa7a722014-08-25 12:09:38 +0200882 ath10k_dbg(ar, ATH10K_DBG_DATA,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300883 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100884 skb,
885 skb->len,
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300886 ieee80211_get_SA(hdr),
887 ath10k_get_tid(hdr, tid, sizeof(tid)),
888 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
889 "mcast" : "ucast",
890 (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100891 status->flag == 0 ? "legacy" : "",
892 status->flag & RX_FLAG_HT ? "ht" : "",
893 status->flag & RX_FLAG_VHT ? "vht" : "",
894 status->flag & RX_FLAG_40MHZ ? "40" : "",
895 status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
896 status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
897 status->rate_idx,
898 status->vht_nss,
899 status->freq,
Janusz Dziedzic87326c92014-03-24 21:23:19 +0100900 status->band, status->flag,
Janusz Dziedzic78433f92014-03-24 21:23:21 +0100901 !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
Janusz Dziedzic76f53292014-07-28 23:59:43 +0300902 !!(status->flag & RX_FLAG_MMIC_ERROR),
903 !!(status->flag & RX_FLAG_AMSDU_MORE));
Michal Kazior7aa7a722014-08-25 12:09:38 +0200904 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100905 skb->data, skb->len);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100906
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100907 ieee80211_rx(ar->hw, skb);
Janusz Dziedzic73539b42014-03-24 21:23:15 +0100908}
909
Michal Kaziord960c362014-02-25 09:29:57 +0200910static int ath10k_htt_rx_nwifi_hdrlen(struct ieee80211_hdr *hdr)
911{
912 /* nwifi header is padded to 4 bytes. this fixes 4addr rx */
913 return round_up(ieee80211_hdrlen(hdr->frame_control), 4);
914}
915
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300916static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100917 struct ieee80211_rx_status *rx_status,
918 struct sk_buff *skb_in)
Kalle Valo5e3dd152013-06-12 20:52:10 +0300919{
Michal Kazior7aa7a722014-08-25 12:09:38 +0200920 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300921 struct htt_rx_desc *rxd;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +0100922 struct sk_buff *skb = skb_in;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300923 struct sk_buff *first;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300924 enum rx_msdu_decap_format fmt;
925 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300926 struct ieee80211_hdr *hdr;
Michal Kazior72bdeb82014-07-28 23:59:42 +0300927 u8 hdr_buf[64], da[ETH_ALEN], sa[ETH_ALEN], *qos;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300928 unsigned int hdr_len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300929
930 rxd = (void *)skb->data - sizeof(*rxd);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300931 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +0300932 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300933
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300934 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
935 hdr_len = ieee80211_hdrlen(hdr->frame_control);
936 memcpy(hdr_buf, hdr, hdr_len);
937 hdr = (struct ieee80211_hdr *)hdr_buf;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300938
Kalle Valo5e3dd152013-06-12 20:52:10 +0300939 first = skb;
940 while (skb) {
941 void *decap_hdr;
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300942 int len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300943
944 rxd = (void *)skb->data - sizeof(*rxd);
945 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300946 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +0300947 decap_hdr = (void *)rxd->rx_hdr_status;
948
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300949 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
950
951 /* First frame in an A-MSDU chain has more decapped data. */
Kalle Valo5e3dd152013-06-12 20:52:10 +0300952 if (skb == first) {
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300953 len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +0200954 len += round_up(ath10k_htt_rx_crypto_param_len(ar,
955 enctype), 4);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300956 decap_hdr += len;
Kalle Valo5e3dd152013-06-12 20:52:10 +0300957 }
958
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300959 switch (fmt) {
960 case RX_MSDU_DECAP_RAW:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300961 /* remove trailing FCS */
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300962 skb_trim(skb, skb->len - FCS_LEN);
963 break;
964 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior72bdeb82014-07-28 23:59:42 +0300965 /* pull decapped header and copy SA & DA */
Michal Kazior784f69d2013-09-26 10:12:23 +0300966 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +0200967 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Kalle Valob25f32c2014-09-14 12:50:49 +0300968 ether_addr_copy(da, ieee80211_get_DA(hdr));
969 ether_addr_copy(sa, ieee80211_get_SA(hdr));
Michal Kazior784f69d2013-09-26 10:12:23 +0300970 skb_pull(skb, hdr_len);
971
972 /* push original 802.11 header */
973 hdr = (struct ieee80211_hdr *)hdr_buf;
974 hdr_len = ieee80211_hdrlen(hdr->frame_control);
975 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
976
977 /* original A-MSDU header has the bit set but we're
978 * not including A-MSDU subframe header */
979 hdr = (struct ieee80211_hdr *)skb->data;
980 qos = ieee80211_get_qos_ctl(hdr);
981 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
982
Michal Kazior72bdeb82014-07-28 23:59:42 +0300983 /* original 802.11 header has a different DA and in
984 * case of 4addr it may also have different SA
985 */
Kalle Valob25f32c2014-09-14 12:50:49 +0300986 ether_addr_copy(ieee80211_get_DA(hdr), da);
987 ether_addr_copy(ieee80211_get_SA(hdr), sa);
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300988 break;
989 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +0300990 /* strip ethernet header and insert decapped 802.11
991 * header, amsdu subframe header and rfc1042 header */
992
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300993 len = 0;
994 len += sizeof(struct rfc1042_hdr);
995 len += sizeof(struct amsdu_subframe_hdr);
Michal Kaziordfa95b52013-08-13 07:59:37 +0200996
Michal Kaziorf6dc2092013-09-26 10:12:22 +0300997 skb_pull(skb, sizeof(struct ethhdr));
998 memcpy(skb_push(skb, len), decap_hdr, len);
999 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1000 break;
1001 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001002 /* insert decapped 802.11 header making a singly
1003 * A-MSDU */
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001004 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
1005 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001006 }
1007
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001008 skb_in = skb;
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001009 ath10k_htt_rx_h_protected(htt, rx_status, skb_in, enctype, fmt,
1010 false);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001011 skb = skb->next;
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001012 skb_in->next = NULL;
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001013
Kalle Valo652de352013-11-13 15:23:30 +02001014 if (skb)
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001015 rx_status->flag |= RX_FLAG_AMSDU_MORE;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001016 else
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001017 rx_status->flag &= ~RX_FLAG_AMSDU_MORE;
Kalle Valo652de352013-11-13 15:23:30 +02001018
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001019 ath10k_process_rx(htt->ar, rx_status, skb_in);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001020 }
1021
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001022 /* FIXME: It might be nice to re-assemble the A-MSDU when there's a
1023 * monitor interface active for sniffing purposes. */
Kalle Valo5e3dd152013-06-12 20:52:10 +03001024}
1025
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001026static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
1027 struct ieee80211_rx_status *rx_status,
1028 struct sk_buff *skb)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001029{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001030 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001031 struct htt_rx_desc *rxd;
1032 struct ieee80211_hdr *hdr;
1033 enum rx_msdu_decap_format fmt;
1034 enum htt_rx_mpdu_encrypt_type enctype;
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001035 int hdr_len;
1036 void *rfc1042;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001037
1038 /* This shouldn't happen. If it does than it may be a FW bug. */
1039 if (skb->next) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001040 ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001041 ath10k_htt_rx_free_msdu_chain(skb->next);
1042 skb->next = NULL;
1043 }
1044
1045 rxd = (void *)skb->data - sizeof(*rxd);
1046 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001047 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001048 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
Kalle Valo5b07e072014-09-14 12:50:06 +03001049 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001050 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1051 hdr_len = ieee80211_hdrlen(hdr->frame_control);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001052
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001053 skb->ip_summed = ath10k_htt_rx_get_csum_state(skb);
1054
Kalle Valo5e3dd152013-06-12 20:52:10 +03001055 switch (fmt) {
1056 case RX_MSDU_DECAP_RAW:
1057 /* remove trailing FCS */
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001058 skb_trim(skb, skb->len - FCS_LEN);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001059 break;
1060 case RX_MSDU_DECAP_NATIVE_WIFI:
Michal Kazior784f69d2013-09-26 10:12:23 +03001061 /* Pull decapped header */
1062 hdr = (struct ieee80211_hdr *)skb->data;
Michal Kaziord960c362014-02-25 09:29:57 +02001063 hdr_len = ath10k_htt_rx_nwifi_hdrlen(hdr);
Michal Kazior784f69d2013-09-26 10:12:23 +03001064 skb_pull(skb, hdr_len);
1065
1066 /* Push original header */
1067 hdr = (struct ieee80211_hdr *)rxd->rx_hdr_status;
1068 hdr_len = ieee80211_hdrlen(hdr->frame_control);
1069 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001070 break;
1071 case RX_MSDU_DECAP_ETHERNET2_DIX:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001072 /* strip ethernet header and insert decapped 802.11 header and
1073 * rfc1042 header */
1074
1075 rfc1042 = hdr;
1076 rfc1042 += roundup(hdr_len, 4);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001077 rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
1078 enctype), 4);
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001079
1080 skb_pull(skb, sizeof(struct ethhdr));
1081 memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
1082 rfc1042, sizeof(struct rfc1042_hdr));
1083 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001084 break;
1085 case RX_MSDU_DECAP_8023_SNAP_LLC:
Michal Kaziore3fbf8d2013-09-26 10:12:23 +03001086 /* remove A-MSDU subframe header and insert
1087 * decapped 802.11 header. rfc1042 header is already there */
1088
1089 skb_pull(skb, sizeof(struct amsdu_subframe_hdr));
1090 memcpy(skb_push(skb, hdr_len), hdr, hdr_len);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001091 break;
1092 }
1093
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001094 ath10k_htt_rx_h_protected(htt, rx_status, skb, enctype, fmt, false);
Michal Kaziorf6dc2092013-09-26 10:12:22 +03001095
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001096 ath10k_process_rx(htt->ar, rx_status, skb);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001097}
1098
Michal Kazior605f81a2013-07-31 10:47:56 +02001099static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
1100{
1101 struct htt_rx_desc *rxd;
1102 u32 flags, info;
1103 bool is_ip4, is_ip6;
1104 bool is_tcp, is_udp;
1105 bool ip_csum_ok, tcpudp_csum_ok;
1106
1107 rxd = (void *)skb->data - sizeof(*rxd);
1108 flags = __le32_to_cpu(rxd->attention.flags);
1109 info = __le32_to_cpu(rxd->msdu_start.info1);
1110
1111 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
1112 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
1113 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
1114 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
1115 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
1116 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
1117
1118 if (!is_ip4 && !is_ip6)
1119 return CHECKSUM_NONE;
1120 if (!is_tcp && !is_udp)
1121 return CHECKSUM_NONE;
1122 if (!ip_csum_ok)
1123 return CHECKSUM_NONE;
1124 if (!tcpudp_csum_ok)
1125 return CHECKSUM_NONE;
1126
1127 return CHECKSUM_UNNECESSARY;
1128}
1129
Ben Greearbfa35362014-03-03 14:07:09 -08001130static int ath10k_unchain_msdu(struct sk_buff *msdu_head)
1131{
1132 struct sk_buff *next = msdu_head->next;
1133 struct sk_buff *to_free = next;
1134 int space;
1135 int total_len = 0;
1136
1137 /* TODO: Might could optimize this by using
1138 * skb_try_coalesce or similar method to
1139 * decrease copying, or maybe get mac80211 to
1140 * provide a way to just receive a list of
1141 * skb?
1142 */
1143
1144 msdu_head->next = NULL;
1145
1146 /* Allocate total length all at once. */
1147 while (next) {
1148 total_len += next->len;
1149 next = next->next;
1150 }
1151
1152 space = total_len - skb_tailroom(msdu_head);
1153 if ((space > 0) &&
1154 (pskb_expand_head(msdu_head, 0, space, GFP_ATOMIC) < 0)) {
1155 /* TODO: bump some rx-oom error stat */
1156 /* put it back together so we can free the
1157 * whole list at once.
1158 */
1159 msdu_head->next = to_free;
1160 return -1;
1161 }
1162
1163 /* Walk list again, copying contents into
1164 * msdu_head
1165 */
1166 next = to_free;
1167 while (next) {
1168 skb_copy_from_linear_data(next, skb_put(msdu_head, next->len),
1169 next->len);
1170 next = next->next;
1171 }
1172
1173 /* If here, we have consolidated skb. Free the
1174 * fragments and pass the main skb on up the
1175 * stack.
1176 */
1177 ath10k_htt_rx_free_msdu_chain(to_free);
1178 return 0;
1179}
1180
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001181static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
1182 struct sk_buff *head,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001183 bool channel_set,
1184 u32 attention)
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001185{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001186 struct ath10k *ar = htt->ar;
1187
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001188 if (head->len == 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001189 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001190 "htt rx dropping due to zero-len\n");
1191 return false;
1192 }
1193
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001194 if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001195 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001196 "htt rx dropping due to decrypt-err\n");
1197 return false;
1198 }
1199
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001200 if (!channel_set) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001201 ath10k_warn(ar, "no channel configured; ignoring frame!\n");
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001202 return false;
1203 }
1204
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001205 /* Skip mgmt frames while we handle this in WMI */
Michal Kaziorf6b946e2014-10-23 17:04:22 +03001206 if (attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001207 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001208 return false;
1209 }
1210
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001211 if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001212 ath10k_dbg(ar, ATH10K_DBG_HTT,
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001213 "htt rx CAC running\n");
1214 return false;
1215 }
1216
1217 return true;
1218}
1219
Kalle Valo5e3dd152013-06-12 20:52:10 +03001220static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
1221 struct htt_rx_indication *rx)
1222{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001223 struct ath10k *ar = htt->ar;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001224 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001225 struct htt_rx_indication_mpdu_range *mpdu_ranges;
1226 struct ieee80211_hdr *hdr;
1227 int num_mpdu_ranges;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001228 u32 attention;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001229 int fw_desc_len;
1230 u8 *fw_desc;
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001231 bool channel_set;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001232 int i, j;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001233 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001234
Michal Kazior45967082014-02-27 18:50:05 +02001235 lockdep_assert_held(&htt->rx_ring.lock);
1236
Kalle Valo5e3dd152013-06-12 20:52:10 +03001237 fw_desc_len = __le16_to_cpu(rx->prefix.fw_rx_desc_bytes);
1238 fw_desc = (u8 *)&rx->fw_desc;
1239
1240 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
1241 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
1242 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
1243
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001244 /* Fill this once, while this is per-ppdu */
Janusz Dziedzic22891882014-03-24 21:24:58 +01001245 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_START_VALID) {
1246 memset(rx_status, 0, sizeof(*rx_status));
1247 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
1248 rx->ppdu.combined_rssi;
1249 }
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001250
1251 if (rx->ppdu.info0 & HTT_RX_INDICATION_INFO0_END_VALID) {
1252 /* TSF available only in 32-bit */
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001253 rx_status->mactime = __le32_to_cpu(rx->ppdu.tsf) & 0xffffffff;
1254 rx_status->flag |= RX_FLAG_MACTIME_END;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001255 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001256
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001257 channel_set = ath10k_htt_rx_h_channel(htt->ar, rx_status);
Janusz Dziedzic36653f052014-03-24 21:23:18 +01001258
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001259 if (channel_set) {
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001260 ath10k_htt_rx_h_rates(htt->ar, rx_status->band,
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001261 rx->ppdu.info0,
1262 __le32_to_cpu(rx->ppdu.info1),
1263 __le32_to_cpu(rx->ppdu.info2),
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001264 rx_status);
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001265 }
Janusz Dziedzice8dc1a92014-03-19 07:09:41 +01001266
Michal Kazior7aa7a722014-08-25 12:09:38 +02001267 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001268 rx, sizeof(*rx) +
1269 (sizeof(struct htt_rx_indication_mpdu_range) *
1270 num_mpdu_ranges));
1271
1272 for (i = 0; i < num_mpdu_ranges; i++) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001273 for (j = 0; j < mpdu_ranges[i].mpdu_count; j++) {
1274 struct sk_buff *msdu_head, *msdu_tail;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001275
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001276 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001277 msdu_head = NULL;
1278 msdu_tail = NULL;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001279 ret = ath10k_htt_rx_amsdu_pop(htt,
1280 &fw_desc,
1281 &fw_desc_len,
1282 &msdu_head,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001283 &msdu_tail,
1284 &attention);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001285
1286 if (ret < 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001287 ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001288 ret);
1289 ath10k_htt_rx_free_msdu_chain(msdu_head);
1290 continue;
1291 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001292
Janusz Dziedzic2acc4eb2014-03-19 07:09:40 +01001293 if (!ath10k_htt_rx_amsdu_allowed(htt, msdu_head,
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001294 channel_set,
1295 attention)) {
Marek Puzyniake8a50f82013-11-20 09:59:47 +02001296 ath10k_htt_rx_free_msdu_chain(msdu_head);
1297 continue;
1298 }
1299
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001300 if (ret > 0 &&
1301 ath10k_unchain_msdu(msdu_head) < 0) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001302 ath10k_htt_rx_free_msdu_chain(msdu_head);
1303 continue;
1304 }
1305
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001306 if (attention & RX_ATTENTION_FLAGS_FCS_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001307 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001308 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001309 rx_status->flag &= ~RX_FLAG_FAILED_FCS_CRC;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001310
Janusz Dziedzic78433f92014-03-24 21:23:21 +01001311 if (attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR)
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001312 rx_status->flag |= RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001313 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001314 rx_status->flag &= ~RX_FLAG_MMIC_ERROR;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001315
Kalle Valo5e3dd152013-06-12 20:52:10 +03001316 hdr = ath10k_htt_rx_skb_get_hdr(msdu_head);
1317
1318 if (ath10k_htt_rx_hdr_is_amsdu(hdr))
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001319 ath10k_htt_rx_amsdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001320 else
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001321 ath10k_htt_rx_msdu(htt, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001322 }
1323 }
1324
Michal Kazior6e712d42013-09-24 10:18:36 +02001325 tasklet_schedule(&htt->rx_replenish_task);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001326}
1327
1328static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
Kalle Valo5b07e072014-09-14 12:50:06 +03001329 struct htt_rx_fragment_indication *frag)
Kalle Valo5e3dd152013-06-12 20:52:10 +03001330{
Michal Kazior7aa7a722014-08-25 12:09:38 +02001331 struct ath10k *ar = htt->ar;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001332 struct sk_buff *msdu_head, *msdu_tail;
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001333 enum htt_rx_mpdu_encrypt_type enctype;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001334 struct htt_rx_desc *rxd;
1335 enum rx_msdu_decap_format fmt;
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001336 struct ieee80211_rx_status *rx_status = &htt->rx_status;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001337 struct ieee80211_hdr *hdr;
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001338 int ret;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001339 bool tkip_mic_err;
1340 bool decrypt_err;
1341 u8 *fw_desc;
1342 int fw_desc_len, hdrlen, paramlen;
1343 int trim;
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001344 u32 attention = 0;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001345
1346 fw_desc_len = __le16_to_cpu(frag->fw_rx_desc_bytes);
1347 fw_desc = (u8 *)frag->fw_msdu_rx_desc;
1348
1349 msdu_head = NULL;
1350 msdu_tail = NULL;
Michal Kazior45967082014-02-27 18:50:05 +02001351
1352 spin_lock_bh(&htt->rx_ring.lock);
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001353 ret = ath10k_htt_rx_amsdu_pop(htt, &fw_desc, &fw_desc_len,
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001354 &msdu_head, &msdu_tail,
1355 &attention);
Michal Kazior45967082014-02-27 18:50:05 +02001356 spin_unlock_bh(&htt->rx_ring.lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001357
Michal Kazior686687c2014-10-23 17:04:24 +03001358 tasklet_schedule(&htt->rx_replenish_task);
1359
Michal Kazior7aa7a722014-08-25 12:09:38 +02001360 ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001361
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001362 if (ret) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001363 ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
Janusz Dziedzicd84dd602014-03-24 21:23:20 +01001364 ret);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001365 ath10k_htt_rx_free_msdu_chain(msdu_head);
1366 return;
1367 }
1368
1369 /* FIXME: implement signal strength */
Ben Greear4b81d172014-05-26 12:46:04 +03001370 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001371
1372 hdr = (struct ieee80211_hdr *)msdu_head->data;
1373 rxd = (void *)msdu_head->data - sizeof(*rxd);
Janusz Dziedzic0ccb7a32014-07-25 11:28:50 +03001374 tkip_mic_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
1375 decrypt_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001376 fmt = MS(__le32_to_cpu(rxd->msdu_start.info1),
Kalle Valo5b07e072014-09-14 12:50:06 +03001377 RX_MSDU_START_INFO1_DECAP_FORMAT);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001378
1379 if (fmt != RX_MSDU_DECAP_RAW) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001380 ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001381 dev_kfree_skb_any(msdu_head);
1382 goto end;
1383 }
1384
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001385 enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
1386 RX_MPDU_START_INFO0_ENCRYPT_TYPE);
Michal Kaziorc071dcb2014-05-23 11:33:18 +03001387 ath10k_htt_rx_h_protected(htt, rx_status, msdu_head, enctype, fmt,
1388 true);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001389 msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001390
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001391 if (tkip_mic_err)
Michal Kazior7aa7a722014-08-25 12:09:38 +02001392 ath10k_warn(ar, "tkip mic error\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001393
1394 if (decrypt_err) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001395 ath10k_warn(ar, "decryption err in fragmented rx\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001396 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001397 goto end;
1398 }
1399
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001400 if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
Kalle Valo5e3dd152013-06-12 20:52:10 +03001401 hdrlen = ieee80211_hdrlen(hdr->frame_control);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001402 paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001403
1404 /* It is more efficient to move the header than the payload */
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001405 memmove((void *)msdu_head->data + paramlen,
1406 (void *)msdu_head->data,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001407 hdrlen);
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001408 skb_pull(msdu_head, paramlen);
1409 hdr = (struct ieee80211_hdr *)msdu_head->data;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001410 }
1411
1412 /* remove trailing FCS */
1413 trim = 4;
1414
1415 /* remove crypto trailer */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001416 trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001417
1418 /* last fragment of TKIP frags has MIC */
1419 if (!ieee80211_has_morefrags(hdr->frame_control) &&
Janusz Dziedzic87326c92014-03-24 21:23:19 +01001420 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
Michal Kazior890d3b22014-10-23 17:04:22 +03001421 trim += MICHAEL_MIC_LEN;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001422
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001423 if (trim > msdu_head->len) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001424 ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001425 dev_kfree_skb_any(msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001426 goto end;
1427 }
1428
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001429 skb_trim(msdu_head, msdu_head->len - trim);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001430
Michal Kazior7aa7a722014-08-25 12:09:38 +02001431 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
Janusz Dziedzic85f6d7c2014-03-24 21:23:22 +01001432 msdu_head->data, msdu_head->len);
Janusz Dziedzic6df92a32014-03-24 21:24:57 +01001433 ath10k_process_rx(htt->ar, rx_status, msdu_head);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001434
1435end:
1436 if (fw_desc_len > 0) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001437 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001438 "expecting more fragmented rx in one indication %d\n",
1439 fw_desc_len);
1440 }
1441}
1442
Michal Kazior6c5151a2014-02-27 18:50:04 +02001443static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
1444 struct sk_buff *skb)
1445{
1446 struct ath10k_htt *htt = &ar->htt;
1447 struct htt_resp *resp = (struct htt_resp *)skb->data;
1448 struct htt_tx_done tx_done = {};
1449 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
1450 __le16 msdu_id;
1451 int i;
1452
Michal Kazior45967082014-02-27 18:50:05 +02001453 lockdep_assert_held(&htt->tx_lock);
1454
Michal Kazior6c5151a2014-02-27 18:50:04 +02001455 switch (status) {
1456 case HTT_DATA_TX_STATUS_NO_ACK:
1457 tx_done.no_ack = true;
1458 break;
1459 case HTT_DATA_TX_STATUS_OK:
1460 break;
1461 case HTT_DATA_TX_STATUS_DISCARD:
1462 case HTT_DATA_TX_STATUS_POSTPONE:
1463 case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
1464 tx_done.discard = true;
1465 break;
1466 default:
Michal Kazior7aa7a722014-08-25 12:09:38 +02001467 ath10k_warn(ar, "unhandled tx completion status %d\n", status);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001468 tx_done.discard = true;
1469 break;
1470 }
1471
Michal Kazior7aa7a722014-08-25 12:09:38 +02001472 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
Michal Kazior6c5151a2014-02-27 18:50:04 +02001473 resp->data_tx_completion.num_msdus);
1474
1475 for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
1476 msdu_id = resp->data_tx_completion.msdus[i];
1477 tx_done.msdu_id = __le16_to_cpu(msdu_id);
1478 ath10k_txrx_tx_unref(htt, &tx_done);
1479 }
1480}
1481
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001482static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
1483{
1484 struct htt_rx_addba *ev = &resp->rx_addba;
1485 struct ath10k_peer *peer;
1486 struct ath10k_vif *arvif;
1487 u16 info0, tid, peer_id;
1488
1489 info0 = __le16_to_cpu(ev->info0);
1490 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1491 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1492
Michal Kazior7aa7a722014-08-25 12:09:38 +02001493 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001494 "htt rx addba tid %hu peer_id %hu size %hhu\n",
1495 tid, peer_id, ev->window_size);
1496
1497 spin_lock_bh(&ar->data_lock);
1498 peer = ath10k_peer_find_by_id(ar, peer_id);
1499 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001500 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001501 peer_id);
1502 spin_unlock_bh(&ar->data_lock);
1503 return;
1504 }
1505
1506 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1507 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001508 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001509 peer->vdev_id);
1510 spin_unlock_bh(&ar->data_lock);
1511 return;
1512 }
1513
Michal Kazior7aa7a722014-08-25 12:09:38 +02001514 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001515 "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
1516 peer->addr, tid, ev->window_size);
1517
1518 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1519 spin_unlock_bh(&ar->data_lock);
1520}
1521
1522static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
1523{
1524 struct htt_rx_delba *ev = &resp->rx_delba;
1525 struct ath10k_peer *peer;
1526 struct ath10k_vif *arvif;
1527 u16 info0, tid, peer_id;
1528
1529 info0 = __le16_to_cpu(ev->info0);
1530 tid = MS(info0, HTT_RX_BA_INFO0_TID);
1531 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
1532
Michal Kazior7aa7a722014-08-25 12:09:38 +02001533 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001534 "htt rx delba tid %hu peer_id %hu\n",
1535 tid, peer_id);
1536
1537 spin_lock_bh(&ar->data_lock);
1538 peer = ath10k_peer_find_by_id(ar, peer_id);
1539 if (!peer) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001540 ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001541 peer_id);
1542 spin_unlock_bh(&ar->data_lock);
1543 return;
1544 }
1545
1546 arvif = ath10k_get_arvif(ar, peer->vdev_id);
1547 if (!arvif) {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001548 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001549 peer->vdev_id);
1550 spin_unlock_bh(&ar->data_lock);
1551 return;
1552 }
1553
Michal Kazior7aa7a722014-08-25 12:09:38 +02001554 ath10k_dbg(ar, ATH10K_DBG_HTT,
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001555 "htt rx stop rx ba session sta %pM tid %hu\n",
1556 peer->addr, tid);
1557
1558 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
1559 spin_unlock_bh(&ar->data_lock);
1560}
1561
Kalle Valo5e3dd152013-06-12 20:52:10 +03001562void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
1563{
Michal Kazioredb82362013-07-05 16:15:14 +03001564 struct ath10k_htt *htt = &ar->htt;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001565 struct htt_resp *resp = (struct htt_resp *)skb->data;
1566
1567 /* confirm alignment */
1568 if (!IS_ALIGNED((unsigned long)skb->data, 4))
Michal Kazior7aa7a722014-08-25 12:09:38 +02001569 ath10k_warn(ar, "unaligned htt message, expect trouble\n");
Kalle Valo5e3dd152013-06-12 20:52:10 +03001570
Michal Kazior7aa7a722014-08-25 12:09:38 +02001571 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001572 resp->hdr.msg_type);
1573 switch (resp->hdr.msg_type) {
1574 case HTT_T2H_MSG_TYPE_VERSION_CONF: {
1575 htt->target_version_major = resp->ver_resp.major;
1576 htt->target_version_minor = resp->ver_resp.minor;
1577 complete(&htt->target_version_received);
1578 break;
1579 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001580 case HTT_T2H_MSG_TYPE_RX_IND:
Michal Kazior45967082014-02-27 18:50:05 +02001581 spin_lock_bh(&htt->rx_ring.lock);
1582 __skb_queue_tail(&htt->rx_compl_q, skb);
1583 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001584 tasklet_schedule(&htt->txrx_compl_task);
1585 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001586 case HTT_T2H_MSG_TYPE_PEER_MAP: {
1587 struct htt_peer_map_event ev = {
1588 .vdev_id = resp->peer_map.vdev_id,
1589 .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
1590 };
1591 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
1592 ath10k_peer_map_event(htt, &ev);
1593 break;
1594 }
1595 case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
1596 struct htt_peer_unmap_event ev = {
1597 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
1598 };
1599 ath10k_peer_unmap_event(htt, &ev);
1600 break;
1601 }
1602 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
1603 struct htt_tx_done tx_done = {};
1604 int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
1605
1606 tx_done.msdu_id =
1607 __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
1608
1609 switch (status) {
1610 case HTT_MGMT_TX_STATUS_OK:
1611 break;
1612 case HTT_MGMT_TX_STATUS_RETRY:
1613 tx_done.no_ack = true;
1614 break;
1615 case HTT_MGMT_TX_STATUS_DROP:
1616 tx_done.discard = true;
1617 break;
1618 }
1619
Michal Kazior6c5151a2014-02-27 18:50:04 +02001620 spin_lock_bh(&htt->tx_lock);
Michal Kazior0a89f8a2013-09-18 14:43:20 +02001621 ath10k_txrx_tx_unref(htt, &tx_done);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001622 spin_unlock_bh(&htt->tx_lock);
Kalle Valo5e3dd152013-06-12 20:52:10 +03001623 break;
1624 }
Michal Kazior6c5151a2014-02-27 18:50:04 +02001625 case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
1626 spin_lock_bh(&htt->tx_lock);
1627 __skb_queue_tail(&htt->tx_compl_q, skb);
1628 spin_unlock_bh(&htt->tx_lock);
1629 tasklet_schedule(&htt->txrx_compl_task);
1630 return;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001631 case HTT_T2H_MSG_TYPE_SEC_IND: {
1632 struct ath10k *ar = htt->ar;
1633 struct htt_security_indication *ev = &resp->security_indication;
1634
Michal Kazior7aa7a722014-08-25 12:09:38 +02001635 ath10k_dbg(ar, ATH10K_DBG_HTT,
Kalle Valo5e3dd152013-06-12 20:52:10 +03001636 "sec ind peer_id %d unicast %d type %d\n",
1637 __le16_to_cpu(ev->peer_id),
1638 !!(ev->flags & HTT_SECURITY_IS_UNICAST),
1639 MS(ev->flags, HTT_SECURITY_TYPE));
1640 complete(&ar->install_key_done);
1641 break;
1642 }
1643 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
Michal Kazior7aa7a722014-08-25 12:09:38 +02001644 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001645 skb->data, skb->len);
1646 ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
1647 break;
1648 }
1649 case HTT_T2H_MSG_TYPE_TEST:
1650 /* FIX THIS */
1651 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001652 case HTT_T2H_MSG_TYPE_STATS_CONF:
Michal Kaziord35a6c12014-09-02 11:00:21 +03001653 trace_ath10k_htt_stats(ar, skb->data, skb->len);
Kalle Valoa9bf0502013-09-03 11:43:55 +03001654 break;
1655 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
Michal Kazior708b9bd2014-07-21 20:52:59 +03001656 /* Firmware can return tx frames if it's unable to fully
1657 * process them and suspects host may be able to fix it. ath10k
1658 * sends all tx frames as already inspected so this shouldn't
1659 * happen unless fw has a bug.
1660 */
Michal Kazior7aa7a722014-08-25 12:09:38 +02001661 ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
Michal Kazior708b9bd2014-07-21 20:52:59 +03001662 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001663 case HTT_T2H_MSG_TYPE_RX_ADDBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001664 ath10k_htt_rx_addba(ar, resp);
1665 break;
Kalle Valo5e3dd152013-06-12 20:52:10 +03001666 case HTT_T2H_MSG_TYPE_RX_DELBA:
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001667 ath10k_htt_rx_delba(ar, resp);
1668 break;
Rajkumar Manoharanbfdd7932014-10-03 08:02:40 +03001669 case HTT_T2H_MSG_TYPE_PKTLOG: {
1670 struct ath10k_pktlog_hdr *hdr =
1671 (struct ath10k_pktlog_hdr *)resp->pktlog_msg.payload;
1672
1673 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
1674 sizeof(*hdr) +
1675 __le16_to_cpu(hdr->size));
1676 break;
1677 }
Michal Kazioraa5b4fb2014-07-23 12:20:33 +02001678 case HTT_T2H_MSG_TYPE_RX_FLUSH: {
1679 /* Ignore this event because mac80211 takes care of Rx
1680 * aggregation reordering.
1681 */
1682 break;
1683 }
Kalle Valo5e3dd152013-06-12 20:52:10 +03001684 default:
Michal Kazior2358a542014-10-02 13:32:55 +02001685 ath10k_warn(ar, "htt event (%d) not handled\n",
1686 resp->hdr.msg_type);
Michal Kazior7aa7a722014-08-25 12:09:38 +02001687 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
Kalle Valo5e3dd152013-06-12 20:52:10 +03001688 skb->data, skb->len);
1689 break;
1690 };
1691
1692 /* Free the indication buffer */
1693 dev_kfree_skb_any(skb);
1694}
Michal Kazior6c5151a2014-02-27 18:50:04 +02001695
1696static void ath10k_htt_txrx_compl_task(unsigned long ptr)
1697{
1698 struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
1699 struct htt_resp *resp;
1700 struct sk_buff *skb;
1701
Michal Kazior45967082014-02-27 18:50:05 +02001702 spin_lock_bh(&htt->tx_lock);
1703 while ((skb = __skb_dequeue(&htt->tx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001704 ath10k_htt_rx_frm_tx_compl(htt->ar, skb);
1705 dev_kfree_skb_any(skb);
1706 }
Michal Kazior45967082014-02-27 18:50:05 +02001707 spin_unlock_bh(&htt->tx_lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001708
Michal Kazior45967082014-02-27 18:50:05 +02001709 spin_lock_bh(&htt->rx_ring.lock);
1710 while ((skb = __skb_dequeue(&htt->rx_compl_q))) {
Michal Kazior6c5151a2014-02-27 18:50:04 +02001711 resp = (struct htt_resp *)skb->data;
1712 ath10k_htt_rx_handler(htt, &resp->rx_ind);
1713 dev_kfree_skb_any(skb);
1714 }
Michal Kazior45967082014-02-27 18:50:05 +02001715 spin_unlock_bh(&htt->rx_ring.lock);
Michal Kazior6c5151a2014-02-27 18:50:04 +02001716}