blob: 33f090ce0226479352d52d8c19bdf51bbe4498c1 [file] [log] [blame]
Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2007-2009 Texas Instruments
Tony Lindgren646e3ed2008-10-06 15:49:36 +03008 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070013 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000015 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
Tony Lindgren1dbae812005-11-10 14:26:51 +000019#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Paul Walmsley2f135ea2009-06-19 19:08:25 -060023#include <linux/clk.h>
Tomi Valkeinen91773a02009-08-03 15:06:36 +030024#include <linux/omapfb.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000025
Tony Lindgren120db2c2006-04-02 17:46:27 +010026#include <asm/tlb.h>
Tony Lindgren120db2c2006-04-02 17:46:27 +010027
28#include <asm/mach/map.h>
29
Tony Lindgrence491cf2009-10-20 09:40:47 -070030#include <plat/sram.h>
31#include <plat/sdrc.h>
Tony Lindgrence491cf2009-10-20 09:40:47 -070032#include <plat/serial.h>
Tony Lindgren646e3ed2008-10-06 15:49:36 +030033
Paul Walmsleye80a9722010-01-26 20:13:12 -070034#include "clock2xxx.h"
Paul Walmsley657ebfa2010-02-22 22:09:20 -070035#include "clock3xxx.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070036#include "clock44xx.h"
Tony Lindgren1dbae812005-11-10 14:26:51 +000037
Tony Lindgren4e653312011-11-10 22:45:17 +010038#include "common.h"
Tony Lindgrence491cf2009-10-20 09:40:47 -070039#include <plat/omap-pm.h>
Kevin Hilman81a60482011-03-16 14:25:45 -070040#include "voltage.h"
Paul Walmsley72e06d02010-12-21 21:05:16 -070041#include "powerdomain.h"
Paul Walmsley97171002008-08-19 11:08:40 +030042
Paul Walmsley1540f2142010-12-21 21:05:15 -070043#include "clockdomain.h"
Tony Lindgrence491cf2009-10-20 09:40:47 -070044#include <plat/omap_hwmod.h>
Tony Lindgren5d190c42010-12-09 15:49:23 -080045#include <plat/multi.h>
Tony Lindgren4e653312011-11-10 22:45:17 +010046#include "common.h"
Paul Walmsley02bfc032009-09-03 20:14:05 +030047
Tony Lindgren1dbae812005-11-10 14:26:51 +000048/*
49 * The machine specific code may provide the extra mapping besides the
50 * default mapping provided here.
51 */
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030052
Tony Lindgren088ef952010-02-12 12:26:47 -080053#ifdef CONFIG_ARCH_OMAP2
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030054static struct map_desc omap24xx_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000055 {
56 .virtual = L3_24XX_VIRT,
57 .pfn = __phys_to_pfn(L3_24XX_PHYS),
58 .length = L3_24XX_SIZE,
59 .type = MT_DEVICE
60 },
Kyungmin Park09f21ed2008-02-20 15:30:06 -080061 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030062 .virtual = L4_24XX_VIRT,
63 .pfn = __phys_to_pfn(L4_24XX_PHYS),
64 .length = L4_24XX_SIZE,
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080065 .type = MT_DEVICE
66 },
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030067};
68
Tony Lindgren59b479e2011-01-27 16:39:40 -080069#ifdef CONFIG_SOC_OMAP2420
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030070static struct map_desc omap242x_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000071 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070072 .virtual = DSP_MEM_2420_VIRT,
73 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
74 .length = DSP_MEM_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080075 .type = MT_DEVICE
76 },
77 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070078 .virtual = DSP_IPI_2420_VIRT,
79 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
80 .length = DSP_IPI_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080081 .type = MT_DEVICE
82 },
83 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070084 .virtual = DSP_MMU_2420_VIRT,
85 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
86 .length = DSP_MMU_2420_SIZE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000087 .type = MT_DEVICE
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030088 },
Tony Lindgren1dbae812005-11-10 14:26:51 +000089};
90
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030091#endif
92
Tony Lindgren59b479e2011-01-27 16:39:40 -080093#ifdef CONFIG_SOC_OMAP2430
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030094static struct map_desc omap243x_io_desc[] __initdata = {
95 {
96 .virtual = L4_WK_243X_VIRT,
97 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
98 .length = L4_WK_243X_SIZE,
99 .type = MT_DEVICE
100 },
101 {
102 .virtual = OMAP243X_GPMC_VIRT,
103 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
104 .length = OMAP243X_GPMC_SIZE,
105 .type = MT_DEVICE
106 },
107 {
108 .virtual = OMAP243X_SDRC_VIRT,
109 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
110 .length = OMAP243X_SDRC_SIZE,
111 .type = MT_DEVICE
112 },
113 {
114 .virtual = OMAP243X_SMS_VIRT,
115 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
116 .length = OMAP243X_SMS_SIZE,
117 .type = MT_DEVICE
118 },
119};
120#endif
121#endif
122
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800123#ifdef CONFIG_ARCH_OMAP3
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300124static struct map_desc omap34xx_io_desc[] __initdata = {
125 {
126 .virtual = L3_34XX_VIRT,
127 .pfn = __phys_to_pfn(L3_34XX_PHYS),
128 .length = L3_34XX_SIZE,
129 .type = MT_DEVICE
130 },
131 {
132 .virtual = L4_34XX_VIRT,
133 .pfn = __phys_to_pfn(L4_34XX_PHYS),
134 .length = L4_34XX_SIZE,
135 .type = MT_DEVICE
136 },
137 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300138 .virtual = OMAP34XX_GPMC_VIRT,
139 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
140 .length = OMAP34XX_GPMC_SIZE,
141 .type = MT_DEVICE
142 },
143 {
144 .virtual = OMAP343X_SMS_VIRT,
145 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
146 .length = OMAP343X_SMS_SIZE,
147 .type = MT_DEVICE
148 },
149 {
150 .virtual = OMAP343X_SDRC_VIRT,
151 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
152 .length = OMAP343X_SDRC_SIZE,
153 .type = MT_DEVICE
154 },
155 {
156 .virtual = L4_PER_34XX_VIRT,
157 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
158 .length = L4_PER_34XX_SIZE,
159 .type = MT_DEVICE
160 },
161 {
162 .virtual = L4_EMU_34XX_VIRT,
163 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
164 .length = L4_EMU_34XX_SIZE,
165 .type = MT_DEVICE
166 },
Tony Lindgrena4f57b82010-04-30 12:57:14 -0700167#if defined(CONFIG_DEBUG_LL) && \
168 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
169 {
170 .virtual = ZOOM_UART_VIRT,
171 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
172 .length = SZ_1M,
173 .type = MT_DEVICE
174 },
175#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300176};
177#endif
Hemant Pedanekar01001712011-02-16 08:31:39 -0800178
179#ifdef CONFIG_SOC_OMAPTI816X
180static struct map_desc omapti816x_io_desc[] __initdata = {
181 {
182 .virtual = L4_34XX_VIRT,
183 .pfn = __phys_to_pfn(L4_34XX_PHYS),
184 .length = L4_34XX_SIZE,
185 .type = MT_DEVICE
186 },
187};
188#endif
189
Santosh Shilimkar44169072009-05-28 14:16:04 -0700190#ifdef CONFIG_ARCH_OMAP4
191static struct map_desc omap44xx_io_desc[] __initdata = {
192 {
193 .virtual = L3_44XX_VIRT,
194 .pfn = __phys_to_pfn(L3_44XX_PHYS),
195 .length = L3_44XX_SIZE,
196 .type = MT_DEVICE,
197 },
198 {
199 .virtual = L4_44XX_VIRT,
200 .pfn = __phys_to_pfn(L4_44XX_PHYS),
201 .length = L4_44XX_SIZE,
202 .type = MT_DEVICE,
203 },
204 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700205 .virtual = OMAP44XX_GPMC_VIRT,
206 .pfn = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
207 .length = OMAP44XX_GPMC_SIZE,
208 .type = MT_DEVICE,
209 },
210 {
Santosh Shilimkarf5d2d652009-10-19 17:25:57 -0700211 .virtual = OMAP44XX_EMIF1_VIRT,
212 .pfn = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
213 .length = OMAP44XX_EMIF1_SIZE,
214 .type = MT_DEVICE,
215 },
216 {
217 .virtual = OMAP44XX_EMIF2_VIRT,
218 .pfn = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
219 .length = OMAP44XX_EMIF2_SIZE,
220 .type = MT_DEVICE,
221 },
222 {
223 .virtual = OMAP44XX_DMM_VIRT,
224 .pfn = __phys_to_pfn(OMAP44XX_DMM_PHYS),
225 .length = OMAP44XX_DMM_SIZE,
226 .type = MT_DEVICE,
227 },
228 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700229 .virtual = L4_PER_44XX_VIRT,
230 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
231 .length = L4_PER_44XX_SIZE,
232 .type = MT_DEVICE,
233 },
234 {
235 .virtual = L4_EMU_44XX_VIRT,
236 .pfn = __phys_to_pfn(L4_EMU_44XX_PHYS),
237 .length = L4_EMU_44XX_SIZE,
238 .type = MT_DEVICE,
239 },
240};
241#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300242
Tony Lindgren59b479e2011-01-27 16:39:40 -0800243#ifdef CONFIG_SOC_OMAP2420
Aaro Koskinen8185e462010-03-03 16:24:53 +0000244void __init omap242x_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800245{
246 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
247 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800248}
249#endif
250
Tony Lindgren59b479e2011-01-27 16:39:40 -0800251#ifdef CONFIG_SOC_OMAP2430
Aaro Koskinen8185e462010-03-03 16:24:53 +0000252void __init omap243x_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800253{
254 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
255 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800256}
257#endif
258
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800259#ifdef CONFIG_ARCH_OMAP3
Aaro Koskinen8185e462010-03-03 16:24:53 +0000260void __init omap34xx_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800261{
262 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800263}
264#endif
265
Hemant Pedanekar01001712011-02-16 08:31:39 -0800266#ifdef CONFIG_SOC_OMAPTI816X
267void __init omapti816x_map_common_io(void)
268{
269 iotable_init(omapti816x_io_desc, ARRAY_SIZE(omapti816x_io_desc));
Hemant Pedanekar01001712011-02-16 08:31:39 -0800270}
271#endif
272
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800273#ifdef CONFIG_ARCH_OMAP4
Aaro Koskinen8185e462010-03-03 16:24:53 +0000274void __init omap44xx_map_common_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800275{
276 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800277}
278#endif
279
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600280/*
281 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
282 *
283 * Sets the CORE DPLL3 M2 divider to the same value that it's at
284 * currently. This has the effect of setting the SDRC SDRAM AC timing
285 * registers to the values currently defined by the kernel. Currently
286 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
287 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
288 * or passes along the return value of clk_set_rate().
289 */
290static int __init _omap2_init_reprogram_sdrc(void)
291{
292 struct clk *dpll3_m2_ck;
293 int v = -EINVAL;
294 long rate;
295
296 if (!cpu_is_omap34xx())
297 return 0;
298
299 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
Aaro Koskinene281f7e2010-11-30 14:17:58 +0000300 if (IS_ERR(dpll3_m2_ck))
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600301 return -EINVAL;
302
303 rate = clk_get_rate(dpll3_m2_ck);
304 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
305 v = clk_set_rate(dpll3_m2_ck, rate);
306 if (v)
307 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
308
309 clk_put(dpll3_m2_ck);
310
311 return v;
312}
313
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700314static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
315{
316 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
317}
318
Tony Lindgren741e3a82011-05-17 03:51:26 -0700319/* See irq.c, omap4-common.c and entry-macro.S */
Russell King9f9605c2011-01-07 11:57:44 +0000320void __iomem *omap_irq_base;
321
Tony Lindgren7b250af2011-10-04 18:26:28 -0700322static void __init omap_common_init_early(void)
323{
324 omap2_check_revision();
Tony Lindgren8aca3ab2011-10-05 17:22:39 -0700325 omap_ioremap_init();
Arnd Bergmanndf804422011-11-01 13:47:27 +0100326 omap_init_consistent_dma_size();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700327}
328
329static void __init omap_hwmod_init_postsetup(void)
Tony Lindgren120db2c2006-04-02 17:46:27 +0100330{
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700331 u8 postsetup_state;
332
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700333 /* Set the default postsetup state for all hwmods */
334#ifdef CONFIG_PM_RUNTIME
335 postsetup_state = _HWMOD_STATE_IDLE;
336#else
337 postsetup_state = _HWMOD_STATE_ENABLED;
338#endif
339 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
Benoit Cousson55d2cb02010-05-12 17:54:36 +0200340
Paul Walmsleyff2516f2010-12-21 15:39:15 -0700341 /*
342 * Set the default postsetup state for unusual modules (like
343 * MPU WDT).
344 *
345 * The postsetup_state is not actually used until
346 * omap_hwmod_late_init(), so boards that desire full watchdog
347 * coverage of kernel initialization can reprogram the
348 * postsetup_state between the calls to
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700349 * omap2_init_common_infra() and omap_sdrc_init().
Paul Walmsleyff2516f2010-12-21 15:39:15 -0700350 *
351 * XXX ideally we could detect whether the MPU WDT was currently
352 * enabled here and make this conditional
353 */
354 postsetup_state = _HWMOD_STATE_DISABLED;
355 omap_hwmod_for_each_by_class("wd_timer",
356 _set_hwmod_postsetup_state,
357 &postsetup_state);
358
Kevin Hilman53da4ce2010-12-09 09:13:48 -0600359 omap_pm_if_early_init();
Paul Walmsley48057342010-12-21 15:25:10 -0700360}
361
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530362#ifdef CONFIG_ARCH_OMAP2
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700363void __init omap2420_init_early(void)
364{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700365 omap2_set_globals_242x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700366 omap_common_init_early();
367 omap2xxx_voltagedomains_init();
368 omap242x_powerdomains_init();
369 omap242x_clockdomains_init();
370 omap2420_hwmod_init();
371 omap_hwmod_init_postsetup();
372 omap2420_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700373}
374
375void __init omap2430_init_early(void)
376{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700377 omap2_set_globals_243x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700378 omap_common_init_early();
379 omap2xxx_voltagedomains_init();
380 omap243x_powerdomains_init();
381 omap243x_clockdomains_init();
382 omap2430_hwmod_init();
383 omap_hwmod_init_postsetup();
384 omap2430_clk_init();
385}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530386#endif
Tony Lindgren7b250af2011-10-04 18:26:28 -0700387
388/*
389 * Currently only board-omap3beagle.c should call this because of the
390 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
391 */
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530392#ifdef CONFIG_ARCH_OMAP3
Tony Lindgren7b250af2011-10-04 18:26:28 -0700393void __init omap3_init_early(void)
394{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700395 omap2_set_globals_3xxx();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700396 omap_common_init_early();
397 omap3xxx_voltagedomains_init();
398 omap3xxx_powerdomains_init();
399 omap3xxx_clockdomains_init();
400 omap3xxx_hwmod_init();
401 omap_hwmod_init_postsetup();
402 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700403}
404
405void __init omap3430_init_early(void)
406{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700407 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700408}
409
410void __init omap35xx_init_early(void)
411{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700412 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700413}
414
415void __init omap3630_init_early(void)
416{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700417 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700418}
419
420void __init am35xx_init_early(void)
421{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700422 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700423}
424
425void __init ti816x_init_early(void)
426{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700427 omap2_set_globals_ti816x();
428 omap_common_init_early();
429 omap3xxx_voltagedomains_init();
430 omap3xxx_powerdomains_init();
431 omap3xxx_clockdomains_init();
432 omap3xxx_hwmod_init();
433 omap_hwmod_init_postsetup();
434 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700435}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530436#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700437
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530438#ifdef CONFIG_ARCH_OMAP4
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700439void __init omap4430_init_early(void)
440{
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700441 omap2_set_globals_443x();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700442 omap_common_init_early();
443 omap44xx_voltagedomains_init();
444 omap44xx_powerdomains_init();
445 omap44xx_clockdomains_init();
446 omap44xx_hwmod_init();
447 omap_hwmod_init_postsetup();
448 omap4xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700449}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530450#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700451
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700452void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
Paul Walmsley48057342010-12-21 15:25:10 -0700453 struct omap_sdrc_params *sdrc_cs1)
454{
Tony Lindgrena66cb342011-10-04 13:52:57 -0700455 omap_sram_init();
456
Hemant Pedanekar01001712011-02-16 08:31:39 -0800457 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
Kevin Hilmanaa4b1f62010-03-10 17:16:31 +0000458 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
459 _omap2_init_reprogram_sdrc();
460 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000461}
Tony Lindgrendf1e9d12010-12-10 09:46:24 -0800462
463/*
464 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
465 */
466
467u8 omap_readb(u32 pa)
468{
469 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
470}
471EXPORT_SYMBOL(omap_readb);
472
473u16 omap_readw(u32 pa)
474{
475 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
476}
477EXPORT_SYMBOL(omap_readw);
478
479u32 omap_readl(u32 pa)
480{
481 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
482}
483EXPORT_SYMBOL(omap_readl);
484
485void omap_writeb(u8 v, u32 pa)
486{
487 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
488}
489EXPORT_SYMBOL(omap_writeb);
490
491void omap_writew(u16 v, u32 pa)
492{
493 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
494}
495EXPORT_SYMBOL(omap_writew);
496
497void omap_writel(u32 v, u32 pa)
498{
499 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
500}
501EXPORT_SYMBOL(omap_writel);