Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 13 | #include "imx51-pinfunc.h" |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 14 | #include <dt-bindings/clock/imx5-clock.h> |
Alexander Shiyan | bdb3eec | 2013-11-19 15:47:27 +0400 | [diff] [blame] | 15 | #include <dt-bindings/gpio/gpio.h> |
Alexander Shiyan | 72d86d2 | 2014-01-11 10:54:19 +0400 | [diff] [blame] | 16 | #include <dt-bindings/input/input.h> |
| 17 | #include <dt-bindings/interrupt-controller/irq.h> |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 18 | |
| 19 | / { |
Fabio Estevam | 7f10788 | 2016-11-12 13:30:35 -0200 | [diff] [blame] | 20 | #address-cells = <1>; |
| 21 | #size-cells = <1>; |
Fabio Estevam | a971c55 | 2017-01-23 14:54:10 -0200 | [diff] [blame] | 22 | /* |
| 23 | * The decompressor and also some bootloaders rely on a |
| 24 | * pre-existing /chosen node to be available to insert the |
| 25 | * command line and merge other ATAGS info. |
| 26 | * Also for U-Boot there must be a pre-existing /memory node. |
| 27 | */ |
| 28 | chosen {}; |
| 29 | memory { device_type = "memory"; reg = <0 0>; }; |
Fabio Estevam | 7f10788 | 2016-11-12 13:30:35 -0200 | [diff] [blame] | 30 | |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 31 | aliases { |
Marek Vasut | 2297007 | 2014-02-28 12:58:41 +0100 | [diff] [blame] | 32 | ethernet0 = &fec; |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 33 | gpio0 = &gpio1; |
| 34 | gpio1 = &gpio2; |
| 35 | gpio2 = &gpio3; |
| 36 | gpio3 = &gpio4; |
Sascha Hauer | e3b73c6 | 2013-06-25 15:51:55 +0200 | [diff] [blame] | 37 | i2c0 = &i2c1; |
| 38 | i2c1 = &i2c2; |
Sascha Hauer | f742c22 | 2014-01-16 13:44:21 +0100 | [diff] [blame] | 39 | mmc0 = &esdhc1; |
| 40 | mmc1 = &esdhc2; |
| 41 | mmc2 = &esdhc3; |
| 42 | mmc3 = &esdhc4; |
Sascha Hauer | e3b73c6 | 2013-06-25 15:51:55 +0200 | [diff] [blame] | 43 | serial0 = &uart1; |
| 44 | serial1 = &uart2; |
| 45 | serial2 = &uart3; |
| 46 | spi0 = &ecspi1; |
| 47 | spi1 = &ecspi2; |
| 48 | spi2 = &cspi; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 49 | }; |
| 50 | |
| 51 | tzic: tz-interrupt-controller@e0000000 { |
| 52 | compatible = "fsl,imx51-tzic", "fsl,tzic"; |
| 53 | interrupt-controller; |
| 54 | #interrupt-cells = <1>; |
| 55 | reg = <0xe0000000 0x4000>; |
| 56 | }; |
| 57 | |
| 58 | clocks { |
| 59 | #address-cells = <1>; |
| 60 | #size-cells = <0>; |
| 61 | |
| 62 | ckil { |
| 63 | compatible = "fsl,imx-ckil", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 64 | #clock-cells = <0>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 65 | clock-frequency = <32768>; |
| 66 | }; |
| 67 | |
| 68 | ckih1 { |
| 69 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 70 | #clock-cells = <0>; |
Alexander Shiyan | 677e28b | 2013-07-27 11:19:45 +0400 | [diff] [blame] | 71 | clock-frequency = <0>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 72 | }; |
| 73 | |
| 74 | ckih2 { |
| 75 | compatible = "fsl,imx-ckih2", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 76 | #clock-cells = <0>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 77 | clock-frequency = <0>; |
| 78 | }; |
| 79 | |
| 80 | osc { |
| 81 | compatible = "fsl,imx-osc", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 82 | #clock-cells = <0>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 83 | clock-frequency = <24000000>; |
| 84 | }; |
| 85 | }; |
| 86 | |
Markus Pargmann | 6f9d62d | 2013-04-07 21:56:45 +0200 | [diff] [blame] | 87 | cpus { |
| 88 | #address-cells = <1>; |
| 89 | #size-cells = <0>; |
Alexander Shiyan | 6acde88 | 2013-11-07 12:45:05 +0400 | [diff] [blame] | 90 | cpu: cpu@0 { |
Markus Pargmann | 6f9d62d | 2013-04-07 21:56:45 +0200 | [diff] [blame] | 91 | device_type = "cpu"; |
| 92 | compatible = "arm,cortex-a8"; |
| 93 | reg = <0>; |
Alexander Shiyan | 6acde88 | 2013-11-07 12:45:05 +0400 | [diff] [blame] | 94 | clock-latency = <62500>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 95 | clocks = <&clks IMX5_CLK_CPU_PODF>; |
Markus Pargmann | 6f9d62d | 2013-04-07 21:56:45 +0200 | [diff] [blame] | 96 | clock-names = "cpu"; |
| 97 | operating-points = < |
Alexander Shiyan | 6acde88 | 2013-11-07 12:45:05 +0400 | [diff] [blame] | 98 | 166000 1000000 |
| 99 | 600000 1050000 |
| 100 | 800000 1100000 |
Markus Pargmann | 6f9d62d | 2013-04-07 21:56:45 +0200 | [diff] [blame] | 101 | >; |
Alexander Shiyan | 6acde88 | 2013-11-07 12:45:05 +0400 | [diff] [blame] | 102 | voltage-tolerance = <5>; |
Markus Pargmann | 6f9d62d | 2013-04-07 21:56:45 +0200 | [diff] [blame] | 103 | }; |
| 104 | }; |
| 105 | |
Alexander Shiyan | 4e94230 | 2013-11-19 15:47:26 +0400 | [diff] [blame] | 106 | usbphy { |
| 107 | #address-cells = <1>; |
| 108 | #size-cells = <0>; |
| 109 | compatible = "simple-bus"; |
| 110 | |
| 111 | usbphy0: usbphy@0 { |
| 112 | compatible = "usb-nop-xceiv"; |
| 113 | reg = <0>; |
| 114 | clocks = <&clks IMX5_CLK_USB_PHY_GATE>; |
| 115 | clock-names = "main_clk"; |
Sascha Hauer | b5af6b1 | 2012-11-12 12:56:00 +0100 | [diff] [blame] | 116 | }; |
| 117 | }; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 118 | |
Philipp Zabel | de10e04 | 2014-03-05 10:20:59 +0100 | [diff] [blame] | 119 | display-subsystem { |
| 120 | compatible = "fsl,imx-display-subsystem"; |
| 121 | ports = <&ipu_di0>, <&ipu_di1>; |
| 122 | }; |
| 123 | |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 124 | soc { |
| 125 | #address-cells = <1>; |
| 126 | #size-cells = <1>; |
| 127 | compatible = "simple-bus"; |
| 128 | interrupt-parent = <&tzic>; |
| 129 | ranges; |
| 130 | |
Alexander Shiyan | da38ea3 | 2013-08-21 11:28:24 +0400 | [diff] [blame] | 131 | iram: iram@1ffe0000 { |
| 132 | compatible = "mmio-sram"; |
| 133 | reg = <0x1ffe0000 0x20000>; |
| 134 | }; |
| 135 | |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 136 | ipu: ipu@40000000 { |
Philipp Zabel | de10e04 | 2014-03-05 10:20:59 +0100 | [diff] [blame] | 137 | #address-cells = <1>; |
| 138 | #size-cells = <0>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 139 | compatible = "fsl,imx51-ipu"; |
| 140 | reg = <0x40000000 0x20000000>; |
| 141 | interrupts = <11 10>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 142 | clocks = <&clks IMX5_CLK_IPU_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 143 | <&clks IMX5_CLK_IPU_DI0_GATE>, |
| 144 | <&clks IMX5_CLK_IPU_DI1_GATE>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 145 | clock-names = "bus", "di0", "di1"; |
| 146 | resets = <&src 2>; |
Philipp Zabel | de10e04 | 2014-03-05 10:20:59 +0100 | [diff] [blame] | 147 | |
| 148 | ipu_di0: port@2 { |
| 149 | reg = <2>; |
| 150 | |
| 151 | ipu_di0_disp0: endpoint { |
| 152 | }; |
| 153 | }; |
| 154 | |
| 155 | ipu_di1: port@3 { |
| 156 | reg = <3>; |
| 157 | |
| 158 | ipu_di1_disp1: endpoint { |
| 159 | }; |
| 160 | }; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 161 | }; |
| 162 | |
| 163 | aips@70000000 { /* AIPS1 */ |
| 164 | compatible = "fsl,aips-bus", "simple-bus"; |
| 165 | #address-cells = <1>; |
| 166 | #size-cells = <1>; |
| 167 | reg = <0x70000000 0x10000000>; |
| 168 | ranges; |
| 169 | |
| 170 | spba@70000000 { |
| 171 | compatible = "fsl,spba-bus", "simple-bus"; |
| 172 | #address-cells = <1>; |
| 173 | #size-cells = <1>; |
| 174 | reg = <0x70000000 0x40000>; |
| 175 | ranges; |
| 176 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 177 | esdhc1: esdhc@70004000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 178 | compatible = "fsl,imx51-esdhc"; |
| 179 | reg = <0x70004000 0x4000>; |
| 180 | interrupts = <1>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 181 | clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 182 | <&clks IMX5_CLK_DUMMY>, |
| 183 | <&clks IMX5_CLK_ESDHC1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 184 | clock-names = "ipg", "ahb", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 185 | status = "disabled"; |
| 186 | }; |
| 187 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 188 | esdhc2: esdhc@70008000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 189 | compatible = "fsl,imx51-esdhc"; |
| 190 | reg = <0x70008000 0x4000>; |
| 191 | interrupts = <2>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 192 | clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 193 | <&clks IMX5_CLK_DUMMY>, |
| 194 | <&clks IMX5_CLK_ESDHC2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 195 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 196 | bus-width = <4>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 197 | status = "disabled"; |
| 198 | }; |
| 199 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 200 | uart3: serial@7000c000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 201 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 202 | reg = <0x7000c000 0x4000>; |
| 203 | interrupts = <33>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 204 | clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 205 | <&clks IMX5_CLK_UART3_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 206 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 207 | status = "disabled"; |
| 208 | }; |
| 209 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 210 | ecspi1: ecspi@70010000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 211 | #address-cells = <1>; |
| 212 | #size-cells = <0>; |
| 213 | compatible = "fsl,imx51-ecspi"; |
| 214 | reg = <0x70010000 0x4000>; |
| 215 | interrupts = <36>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 216 | clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 217 | <&clks IMX5_CLK_ECSPI1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 218 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 219 | status = "disabled"; |
| 220 | }; |
| 221 | |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 222 | ssi2: ssi@70014000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 223 | #sound-dai-cells = <0>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 224 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; |
| 225 | reg = <0x70014000 0x4000>; |
| 226 | interrupts = <30>; |
Fabio Estevam | 53ec874 | 2014-09-18 20:23:49 -0300 | [diff] [blame] | 227 | clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, |
| 228 | <&clks IMX5_CLK_SSI2_ROOT_GATE>; |
| 229 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 230 | dmas = <&sdma 24 1 0>, |
| 231 | <&sdma 25 1 0>; |
| 232 | dma-names = "rx", "tx"; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 233 | fsl,fifo-depth = <15>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 234 | status = "disabled"; |
| 235 | }; |
| 236 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 237 | esdhc3: esdhc@70020000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 238 | compatible = "fsl,imx51-esdhc"; |
| 239 | reg = <0x70020000 0x4000>; |
| 240 | interrupts = <3>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 241 | clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 242 | <&clks IMX5_CLK_DUMMY>, |
| 243 | <&clks IMX5_CLK_ESDHC3_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 244 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 245 | bus-width = <4>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 246 | status = "disabled"; |
| 247 | }; |
| 248 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 249 | esdhc4: esdhc@70024000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 250 | compatible = "fsl,imx51-esdhc"; |
| 251 | reg = <0x70024000 0x4000>; |
| 252 | interrupts = <4>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 253 | clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 254 | <&clks IMX5_CLK_DUMMY>, |
| 255 | <&clks IMX5_CLK_ESDHC4_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 256 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 257 | bus-width = <4>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 258 | status = "disabled"; |
| 259 | }; |
| 260 | }; |
| 261 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 262 | usbotg: usb@73f80000 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 263 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
| 264 | reg = <0x73f80000 0x0200>; |
| 265 | interrupts = <18>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 266 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 267 | fsl,usbmisc = <&usbmisc 0>; |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 268 | fsl,usbphy = <&usbphy0>; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 269 | status = "disabled"; |
| 270 | }; |
| 271 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 272 | usbh1: usb@73f80200 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 273 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
| 274 | reg = <0x73f80200 0x0200>; |
| 275 | interrupts = <14>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 276 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 277 | fsl,usbmisc = <&usbmisc 1>; |
Matt Porter | 3ec481e | 2015-02-27 09:06:00 -0500 | [diff] [blame] | 278 | dr_mode = "host"; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 279 | status = "disabled"; |
| 280 | }; |
| 281 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 282 | usbh2: usb@73f80400 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 283 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
| 284 | reg = <0x73f80400 0x0200>; |
| 285 | interrupts = <16>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 286 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 287 | fsl,usbmisc = <&usbmisc 2>; |
Matt Porter | 3ec481e | 2015-02-27 09:06:00 -0500 | [diff] [blame] | 288 | dr_mode = "host"; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 289 | status = "disabled"; |
| 290 | }; |
| 291 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 292 | usbh3: usb@73f80600 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 293 | compatible = "fsl,imx51-usb", "fsl,imx27-usb"; |
| 294 | reg = <0x73f80600 0x0200>; |
| 295 | interrupts = <17>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 296 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 297 | fsl,usbmisc = <&usbmisc 3>; |
Matt Porter | 3ec481e | 2015-02-27 09:06:00 -0500 | [diff] [blame] | 298 | dr_mode = "host"; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 299 | status = "disabled"; |
| 300 | }; |
| 301 | |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 302 | usbmisc: usbmisc@73f80800 { |
| 303 | #index-cells = <1>; |
| 304 | compatible = "fsl,imx51-usbmisc"; |
| 305 | reg = <0x73f80800 0x200>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 306 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 307 | }; |
| 308 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 309 | gpio1: gpio@73f84000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 310 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 311 | reg = <0x73f84000 0x4000>; |
| 312 | interrupts = <50 51>; |
| 313 | gpio-controller; |
| 314 | #gpio-cells = <2>; |
| 315 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 316 | #interrupt-cells = <2>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 317 | }; |
| 318 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 319 | gpio2: gpio@73f88000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 320 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 321 | reg = <0x73f88000 0x4000>; |
| 322 | interrupts = <52 53>; |
| 323 | gpio-controller; |
| 324 | #gpio-cells = <2>; |
| 325 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 326 | #interrupt-cells = <2>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 327 | }; |
| 328 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 329 | gpio3: gpio@73f8c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 330 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 331 | reg = <0x73f8c000 0x4000>; |
| 332 | interrupts = <54 55>; |
| 333 | gpio-controller; |
| 334 | #gpio-cells = <2>; |
| 335 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 336 | #interrupt-cells = <2>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 337 | }; |
| 338 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 339 | gpio4: gpio@73f90000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 340 | compatible = "fsl,imx51-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 341 | reg = <0x73f90000 0x4000>; |
| 342 | interrupts = <56 57>; |
| 343 | gpio-controller; |
| 344 | #gpio-cells = <2>; |
| 345 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 346 | #interrupt-cells = <2>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 347 | }; |
| 348 | |
Liu Ying | 6012555 | 2013-01-03 20:37:33 +0800 | [diff] [blame] | 349 | kpp: kpp@73f94000 { |
| 350 | compatible = "fsl,imx51-kpp", "fsl,imx21-kpp"; |
| 351 | reg = <0x73f94000 0x4000>; |
| 352 | interrupts = <60>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 353 | clocks = <&clks IMX5_CLK_DUMMY>; |
Liu Ying | 6012555 | 2013-01-03 20:37:33 +0800 | [diff] [blame] | 354 | status = "disabled"; |
| 355 | }; |
| 356 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 357 | wdog1: wdog@73f98000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 358 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; |
| 359 | reg = <0x73f98000 0x4000>; |
| 360 | interrupts = <58>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 361 | clocks = <&clks IMX5_CLK_DUMMY>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 362 | }; |
| 363 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 364 | wdog2: wdog@73f9c000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 365 | compatible = "fsl,imx51-wdt", "fsl,imx21-wdt"; |
| 366 | reg = <0x73f9c000 0x4000>; |
| 367 | interrupts = <59>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 368 | clocks = <&clks IMX5_CLK_DUMMY>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 369 | status = "disabled"; |
| 370 | }; |
| 371 | |
Sascha Hauer | ed73c63 | 2013-03-14 13:08:59 +0100 | [diff] [blame] | 372 | gpt: timer@73fa0000 { |
| 373 | compatible = "fsl,imx51-gpt", "fsl,imx31-gpt"; |
| 374 | reg = <0x73fa0000 0x4000>; |
| 375 | interrupts = <39>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 376 | clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 377 | <&clks IMX5_CLK_GPT_HF_GATE>; |
Sascha Hauer | ed73c63 | 2013-03-14 13:08:59 +0100 | [diff] [blame] | 378 | clock-names = "ipg", "per"; |
| 379 | }; |
| 380 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 381 | iomuxc: iomuxc@73fa8000 { |
Shawn Guo | b72cf10 | 2012-08-13 19:45:19 +0800 | [diff] [blame] | 382 | compatible = "fsl,imx51-iomuxc"; |
| 383 | reg = <0x73fa8000 0x4000>; |
Shawn Guo | b72cf10 | 2012-08-13 19:45:19 +0800 | [diff] [blame] | 384 | }; |
| 385 | |
Sascha Hauer | 82a618d | 2012-11-19 00:57:08 +0100 | [diff] [blame] | 386 | pwm1: pwm@73fb4000 { |
| 387 | #pwm-cells = <2>; |
| 388 | compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; |
| 389 | reg = <0x73fb4000 0x4000>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 390 | clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 391 | <&clks IMX5_CLK_PWM1_HF_GATE>; |
Sascha Hauer | 82a618d | 2012-11-19 00:57:08 +0100 | [diff] [blame] | 392 | clock-names = "ipg", "per"; |
| 393 | interrupts = <61>; |
| 394 | }; |
| 395 | |
| 396 | pwm2: pwm@73fb8000 { |
| 397 | #pwm-cells = <2>; |
| 398 | compatible = "fsl,imx51-pwm", "fsl,imx27-pwm"; |
| 399 | reg = <0x73fb8000 0x4000>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 400 | clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 401 | <&clks IMX5_CLK_PWM2_HF_GATE>; |
Sascha Hauer | 82a618d | 2012-11-19 00:57:08 +0100 | [diff] [blame] | 402 | clock-names = "ipg", "per"; |
| 403 | interrupts = <94>; |
| 404 | }; |
| 405 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 406 | uart1: serial@73fbc000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 407 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 408 | reg = <0x73fbc000 0x4000>; |
| 409 | interrupts = <31>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 410 | clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 411 | <&clks IMX5_CLK_UART1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 412 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 413 | status = "disabled"; |
| 414 | }; |
| 415 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 416 | uart2: serial@73fc0000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 417 | compatible = "fsl,imx51-uart", "fsl,imx21-uart"; |
| 418 | reg = <0x73fc0000 0x4000>; |
| 419 | interrupts = <32>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 420 | clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 421 | <&clks IMX5_CLK_UART2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 422 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 423 | status = "disabled"; |
| 424 | }; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 425 | |
Philipp Zabel | 8d84c37 | 2013-03-28 17:35:23 +0100 | [diff] [blame] | 426 | src: src@73fd0000 { |
| 427 | compatible = "fsl,imx51-src"; |
| 428 | reg = <0x73fd0000 0x4000>; |
| 429 | #reset-cells = <1>; |
| 430 | }; |
| 431 | |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 432 | clks: ccm@73fd4000{ |
| 433 | compatible = "fsl,imx51-ccm"; |
| 434 | reg = <0x73fd4000 0x4000>; |
| 435 | interrupts = <0 71 0x04 0 72 0x04>; |
| 436 | #clock-cells = <1>; |
| 437 | }; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 438 | }; |
| 439 | |
| 440 | aips@80000000 { /* AIPS2 */ |
| 441 | compatible = "fsl,aips-bus", "simple-bus"; |
| 442 | #address-cells = <1>; |
| 443 | #size-cells = <1>; |
| 444 | reg = <0x80000000 0x10000000>; |
| 445 | ranges; |
| 446 | |
Sascha Hauer | 6510ea25 | 2013-06-25 15:51:51 +0200 | [diff] [blame] | 447 | iim: iim@83f98000 { |
| 448 | compatible = "fsl,imx51-iim", "fsl,imx27-iim"; |
| 449 | reg = <0x83f98000 0x4000>; |
| 450 | interrupts = <69>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 451 | clocks = <&clks IMX5_CLK_IIM_GATE>; |
Sascha Hauer | 6510ea25 | 2013-06-25 15:51:51 +0200 | [diff] [blame] | 452 | }; |
| 453 | |
Alexander Shiyan | ad15f08 | 2013-08-21 11:28:25 +0400 | [diff] [blame] | 454 | owire: owire@83fa4000 { |
| 455 | compatible = "fsl,imx51-owire", "fsl,imx21-owire"; |
| 456 | reg = <0x83fa4000 0x4000>; |
| 457 | interrupts = <88>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 458 | clocks = <&clks IMX5_CLK_OWIRE_GATE>; |
Alexander Shiyan | ad15f08 | 2013-08-21 11:28:25 +0400 | [diff] [blame] | 459 | status = "disabled"; |
| 460 | }; |
| 461 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 462 | ecspi2: ecspi@83fac000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 463 | #address-cells = <1>; |
| 464 | #size-cells = <0>; |
| 465 | compatible = "fsl,imx51-ecspi"; |
| 466 | reg = <0x83fac000 0x4000>; |
| 467 | interrupts = <37>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 468 | clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 469 | <&clks IMX5_CLK_ECSPI2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 470 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 471 | status = "disabled"; |
| 472 | }; |
| 473 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 474 | sdma: sdma@83fb0000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 475 | compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; |
| 476 | reg = <0x83fb0000 0x4000>; |
| 477 | interrupts = <6>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 478 | clocks = <&clks IMX5_CLK_SDMA_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 479 | <&clks IMX5_CLK_SDMA_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 480 | clock-names = "ipg", "ahb"; |
Huang Shijie | fb72bb2 | 2013-07-02 10:15:29 +0800 | [diff] [blame] | 481 | #dma-cells = <3>; |
Fabio Estevam | 7e4f036 | 2012-08-08 11:28:07 -0300 | [diff] [blame] | 482 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 483 | }; |
| 484 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 485 | cspi: cspi@83fc0000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 486 | #address-cells = <1>; |
| 487 | #size-cells = <0>; |
| 488 | compatible = "fsl,imx51-cspi", "fsl,imx35-cspi"; |
| 489 | reg = <0x83fc0000 0x4000>; |
| 490 | interrupts = <38>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 491 | clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 492 | <&clks IMX5_CLK_CSPI_IPG_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 493 | clock-names = "ipg", "per"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 494 | status = "disabled"; |
| 495 | }; |
| 496 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 497 | i2c2: i2c@83fc4000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 498 | #address-cells = <1>; |
| 499 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 500 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 501 | reg = <0x83fc4000 0x4000>; |
| 502 | interrupts = <63>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 503 | clocks = <&clks IMX5_CLK_I2C2_GATE>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 504 | status = "disabled"; |
| 505 | }; |
| 506 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 507 | i2c1: i2c@83fc8000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 508 | #address-cells = <1>; |
| 509 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 510 | compatible = "fsl,imx51-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 511 | reg = <0x83fc8000 0x4000>; |
| 512 | interrupts = <62>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 513 | clocks = <&clks IMX5_CLK_I2C1_GATE>; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 514 | status = "disabled"; |
| 515 | }; |
| 516 | |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 517 | ssi1: ssi@83fcc000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 518 | #sound-dai-cells = <0>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 519 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; |
| 520 | reg = <0x83fcc000 0x4000>; |
| 521 | interrupts = <29>; |
Fabio Estevam | 53ec874 | 2014-09-18 20:23:49 -0300 | [diff] [blame] | 522 | clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, |
| 523 | <&clks IMX5_CLK_SSI1_ROOT_GATE>; |
| 524 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 525 | dmas = <&sdma 28 0 0>, |
| 526 | <&sdma 29 0 0>; |
| 527 | dma-names = "rx", "tx"; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 528 | fsl,fifo-depth = <15>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 529 | status = "disabled"; |
| 530 | }; |
| 531 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 532 | audmux: audmux@83fd0000 { |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 533 | compatible = "fsl,imx51-audmux", "fsl,imx31-audmux"; |
| 534 | reg = <0x83fd0000 0x4000>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 535 | clocks = <&clks IMX5_CLK_DUMMY>; |
Alexander Shiyan | e030df9 | 2013-11-07 12:45:06 +0400 | [diff] [blame] | 536 | clock-names = "audmux"; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 537 | status = "disabled"; |
| 538 | }; |
| 539 | |
Alexander Shiyan | edd0528 | 2013-07-13 08:30:57 +0400 | [diff] [blame] | 540 | weim: weim@83fda000 { |
| 541 | #address-cells = <2>; |
| 542 | #size-cells = <1>; |
| 543 | compatible = "fsl,imx51-weim"; |
| 544 | reg = <0x83fda000 0x1000>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 545 | clocks = <&clks IMX5_CLK_EMI_SLOW_GATE>; |
Alexander Shiyan | edd0528 | 2013-07-13 08:30:57 +0400 | [diff] [blame] | 546 | ranges = < |
| 547 | 0 0 0xb0000000 0x08000000 |
| 548 | 1 0 0xb8000000 0x08000000 |
| 549 | 2 0 0xc0000000 0x08000000 |
| 550 | 3 0 0xc8000000 0x04000000 |
| 551 | 4 0 0xcc000000 0x02000000 |
| 552 | 5 0 0xce000000 0x02000000 |
| 553 | >; |
| 554 | status = "disabled"; |
| 555 | }; |
| 556 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 557 | nfc: nand@83fdb000 { |
Alexander Shiyan | f0e3f89 | 2014-04-16 11:24:50 +0400 | [diff] [blame] | 558 | #address-cells = <1>; |
| 559 | #size-cells = <1>; |
Sascha Hauer | 75453a0 | 2012-06-06 12:33:16 +0200 | [diff] [blame] | 560 | compatible = "fsl,imx51-nand"; |
| 561 | reg = <0x83fdb000 0x1000 0xcfff0000 0x10000>; |
| 562 | interrupts = <8>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 563 | clocks = <&clks IMX5_CLK_NFC_GATE>; |
Sascha Hauer | 75453a0 | 2012-06-06 12:33:16 +0200 | [diff] [blame] | 564 | status = "disabled"; |
| 565 | }; |
| 566 | |
Sascha Hauer | 718a3500 | 2013-04-04 11:25:09 +0200 | [diff] [blame] | 567 | pata: pata@83fe0000 { |
| 568 | compatible = "fsl,imx51-pata", "fsl,imx27-pata"; |
| 569 | reg = <0x83fe0000 0x4000>; |
| 570 | interrupts = <70>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 571 | clocks = <&clks IMX5_CLK_PATA_GATE>; |
Sascha Hauer | 718a3500 | 2013-04-04 11:25:09 +0200 | [diff] [blame] | 572 | status = "disabled"; |
| 573 | }; |
| 574 | |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 575 | ssi3: ssi@83fe8000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 576 | #sound-dai-cells = <0>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 577 | compatible = "fsl,imx51-ssi", "fsl,imx21-ssi"; |
| 578 | reg = <0x83fe8000 0x4000>; |
| 579 | interrupts = <96>; |
Fabio Estevam | 53ec874 | 2014-09-18 20:23:49 -0300 | [diff] [blame] | 580 | clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, |
| 581 | <&clks IMX5_CLK_SSI3_ROOT_GATE>; |
| 582 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 583 | dmas = <&sdma 46 0 0>, |
| 584 | <&sdma 47 0 0>; |
| 585 | dma-names = "rx", "tx"; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 586 | fsl,fifo-depth = <15>; |
Shawn Guo | a15d9f8 | 2012-05-11 13:08:46 +0800 | [diff] [blame] | 587 | status = "disabled"; |
| 588 | }; |
| 589 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 590 | fec: ethernet@83fec000 { |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 591 | compatible = "fsl,imx51-fec", "fsl,imx27-fec"; |
| 592 | reg = <0x83fec000 0x4000>; |
| 593 | interrupts = <87>; |
Lucas Stach | ff65d4c | 2013-11-14 11:18:59 +0100 | [diff] [blame] | 594 | clocks = <&clks IMX5_CLK_FEC_GATE>, |
Jagan Teki | 4631170 | 2016-10-26 15:31:01 +0530 | [diff] [blame] | 595 | <&clks IMX5_CLK_FEC_GATE>, |
| 596 | <&clks IMX5_CLK_FEC_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 597 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 9daaf31 | 2011-10-17 08:42:17 +0800 | [diff] [blame] | 598 | status = "disabled"; |
| 599 | }; |
| 600 | }; |
| 601 | }; |
| 602 | }; |