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Thierry Redingd8f4a9e2012-11-15 21:28:22 +00001/*
2 * Copyright (C) 2012 Avionic Design GmbH
Terje Bergstromd43f81c2013-03-22 16:34:09 +02003 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
Thierry Redingd8f4a9e2012-11-15 21:28:22 +00004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
Thierry Reding776dc382013-10-14 14:43:22 +020010#include <linux/host1x.h>
Thierry Redingdf06b752014-06-26 21:41:53 +020011#include <linux/iommu.h>
Thierry Reding776dc382013-10-14 14:43:22 +020012
Thierry Reding1503ca42014-11-24 17:41:23 +010013#include <drm/drm_atomic.h>
Thierry Reding07866962014-11-24 17:08:06 +010014#include <drm/drm_atomic_helper.h>
15
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000016#include "drm.h"
Arto Merilainende2ba662013-03-22 16:34:08 +020017#include "gem.h"
Thierry Redingd8f4a9e2012-11-15 21:28:22 +000018
19#define DRIVER_NAME "tegra"
20#define DRIVER_DESC "NVIDIA Tegra graphics"
21#define DRIVER_DATE "20120330"
22#define DRIVER_MAJOR 0
23#define DRIVER_MINOR 0
24#define DRIVER_PATCHLEVEL 0
25
Thierry Reding08943e62013-09-26 16:08:18 +020026struct tegra_drm_file {
27 struct list_head contexts;
28};
29
Thierry Reding1503ca42014-11-24 17:41:23 +010030static void tegra_atomic_schedule(struct tegra_drm *tegra,
31 struct drm_atomic_state *state)
32{
33 tegra->commit.state = state;
34 schedule_work(&tegra->commit.work);
35}
36
37static void tegra_atomic_complete(struct tegra_drm *tegra,
38 struct drm_atomic_state *state)
39{
40 struct drm_device *drm = tegra->drm;
41
42 /*
43 * Everything below can be run asynchronously without the need to grab
44 * any modeset locks at all under one condition: It must be guaranteed
45 * that the asynchronous work has either been cancelled (if the driver
46 * supports it, which at least requires that the framebuffers get
47 * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
48 * before the new state gets committed on the software side with
49 * drm_atomic_helper_swap_state().
50 *
51 * This scheme allows new atomic state updates to be prepared and
52 * checked in parallel to the asynchronous completion of the previous
53 * update. Which is important since compositors need to figure out the
54 * composition of the next frame right after having submitted the
55 * current layout.
56 */
57
Daniel Vetter1af434a2015-02-22 12:24:19 +010058 drm_atomic_helper_commit_modeset_disables(drm, state);
Daniel Vetteraef9dbb2015-09-08 12:02:07 +020059 drm_atomic_helper_commit_planes(drm, state, false);
Daniel Vetter1af434a2015-02-22 12:24:19 +010060 drm_atomic_helper_commit_modeset_enables(drm, state);
Thierry Reding1503ca42014-11-24 17:41:23 +010061
62 drm_atomic_helper_wait_for_vblanks(drm, state);
63
64 drm_atomic_helper_cleanup_planes(drm, state);
65 drm_atomic_state_free(state);
66}
67
68static void tegra_atomic_work(struct work_struct *work)
69{
70 struct tegra_drm *tegra = container_of(work, struct tegra_drm,
71 commit.work);
72
73 tegra_atomic_complete(tegra, tegra->commit.state);
74}
75
76static int tegra_atomic_commit(struct drm_device *drm,
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020077 struct drm_atomic_state *state, bool nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010078{
79 struct tegra_drm *tegra = drm->dev_private;
80 int err;
81
82 err = drm_atomic_helper_prepare_planes(drm, state);
83 if (err)
84 return err;
85
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020086 /* serialize outstanding nonblocking commits */
Thierry Reding1503ca42014-11-24 17:41:23 +010087 mutex_lock(&tegra->commit.lock);
88 flush_work(&tegra->commit.work);
89
90 /*
91 * This is the point of no return - everything below never fails except
92 * when the hw goes bonghits. Which means we can commit the new state on
93 * the software side now.
94 */
95
Daniel Vetter5e84c262016-06-10 00:06:32 +020096 drm_atomic_helper_swap_state(state, true);
Thierry Reding1503ca42014-11-24 17:41:23 +010097
Maarten Lankhorst2dacdd72016-04-26 16:11:42 +020098 if (nonblock)
Thierry Reding1503ca42014-11-24 17:41:23 +010099 tegra_atomic_schedule(tegra, state);
100 else
101 tegra_atomic_complete(tegra, state);
102
103 mutex_unlock(&tegra->commit.lock);
104 return 0;
105}
106
Thierry Redingf9914212014-11-26 13:03:57 +0100107static const struct drm_mode_config_funcs tegra_drm_mode_funcs = {
108 .fb_create = tegra_fb_create,
Archit Tanejab110ef32015-10-27 13:40:59 +0530109#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Redingf9914212014-11-26 13:03:57 +0100110 .output_poll_changed = tegra_fb_output_poll_changed,
111#endif
Thierry Reding07866962014-11-24 17:08:06 +0100112 .atomic_check = drm_atomic_helper_check,
Thierry Reding1503ca42014-11-24 17:41:23 +0100113 .atomic_commit = tegra_atomic_commit,
Thierry Redingf9914212014-11-26 13:03:57 +0100114};
115
Thierry Reding776dc382013-10-14 14:43:22 +0200116static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000117{
Thierry Reding776dc382013-10-14 14:43:22 +0200118 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Reding386a2a72013-09-24 13:22:17 +0200119 struct tegra_drm *tegra;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000120 int err;
121
Thierry Reding776dc382013-10-14 14:43:22 +0200122 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
Thierry Reding386a2a72013-09-24 13:22:17 +0200123 if (!tegra)
Terje Bergstrom692e6d72013-03-22 16:34:07 +0200124 return -ENOMEM;
125
Thierry Redingdf06b752014-06-26 21:41:53 +0200126 if (iommu_present(&platform_bus_type)) {
Thierry Reding4553f732015-01-19 16:15:04 +0100127 struct iommu_domain_geometry *geometry;
128 u64 start, end;
129
Thierry Redingdf06b752014-06-26 21:41:53 +0200130 tegra->domain = iommu_domain_alloc(&platform_bus_type);
Dan Carpenterbf19b882014-12-04 14:00:35 +0300131 if (!tegra->domain) {
132 err = -ENOMEM;
Thierry Redingdf06b752014-06-26 21:41:53 +0200133 goto free;
134 }
135
Thierry Reding4553f732015-01-19 16:15:04 +0100136 geometry = &tegra->domain->geometry;
137 start = geometry->aperture_start;
138 end = geometry->aperture_end;
139
Thierry Redingd2d8c352015-11-23 16:46:30 +0100140 DRM_DEBUG_DRIVER("IOMMU aperture initialized (%#llx-%#llx)\n",
141 start, end);
Thierry Reding4553f732015-01-19 16:15:04 +0100142 drm_mm_init(&tegra->mm, start, end - start + 1);
Thierry Redingdf06b752014-06-26 21:41:53 +0200143 }
144
Thierry Reding386a2a72013-09-24 13:22:17 +0200145 mutex_init(&tegra->clients_lock);
146 INIT_LIST_HEAD(&tegra->clients);
Thierry Reding1503ca42014-11-24 17:41:23 +0100147
148 mutex_init(&tegra->commit.lock);
149 INIT_WORK(&tegra->commit.work, tegra_atomic_work);
150
Thierry Reding386a2a72013-09-24 13:22:17 +0200151 drm->dev_private = tegra;
152 tegra->drm = drm;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000153
154 drm_mode_config_init(drm);
155
Thierry Redingf9914212014-11-26 13:03:57 +0100156 drm->mode_config.min_width = 0;
157 drm->mode_config.min_height = 0;
158
159 drm->mode_config.max_width = 4096;
160 drm->mode_config.max_height = 4096;
161
162 drm->mode_config.funcs = &tegra_drm_mode_funcs;
163
Thierry Redinge2215322014-06-27 17:19:25 +0200164 err = tegra_drm_fb_prepare(drm);
165 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100166 goto config;
Thierry Redinge2215322014-06-27 17:19:25 +0200167
168 drm_kms_helper_poll_init(drm);
169
Thierry Reding776dc382013-10-14 14:43:22 +0200170 err = host1x_device_init(device);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000171 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100172 goto fbdev;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000173
Thierry Reding603f0cc2013-04-22 21:22:14 +0200174 /*
175 * We don't use the drm_irq_install() helpers provided by the DRM
176 * core, so we need to set this manually in order to allow the
177 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
178 */
Ville Syrjälä44238432013-10-04 14:53:37 +0300179 drm->irq_enabled = true;
Thierry Reding603f0cc2013-04-22 21:22:14 +0200180
Thierry Reding42e9ce02015-01-28 14:43:05 +0100181 /* syncpoints are used for full 32-bit hardware VBLANK counters */
Thierry Reding42e9ce02015-01-28 14:43:05 +0100182 drm->max_vblank_count = 0xffffffff;
183
Thierry Reding6e5ff992012-11-28 11:45:47 +0100184 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
185 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100186 goto device;
Thierry Reding6e5ff992012-11-28 11:45:47 +0100187
Thierry Reding31930d42015-07-02 17:04:06 +0200188 drm_mode_config_reset(drm);
189
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000190 err = tegra_drm_fb_init(drm);
191 if (err < 0)
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100192 goto vblank;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000193
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000194 return 0;
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100195
196vblank:
197 drm_vblank_cleanup(drm);
198device:
199 host1x_device_exit(device);
200fbdev:
201 drm_kms_helper_poll_fini(drm);
202 tegra_drm_fb_free(drm);
203config:
204 drm_mode_config_cleanup(drm);
Thierry Redingdf06b752014-06-26 21:41:53 +0200205
206 if (tegra->domain) {
207 iommu_domain_free(tegra->domain);
208 drm_mm_takedown(&tegra->mm);
209 }
210free:
Thierry Reding1d1e6fe2014-11-06 14:12:08 +0100211 kfree(tegra);
212 return err;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000213}
214
215static int tegra_drm_unload(struct drm_device *drm)
216{
Thierry Reding776dc382013-10-14 14:43:22 +0200217 struct host1x_device *device = to_host1x_device(drm->dev);
Thierry Redingdf06b752014-06-26 21:41:53 +0200218 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding776dc382013-10-14 14:43:22 +0200219 int err;
220
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000221 drm_kms_helper_poll_fini(drm);
222 tegra_drm_fb_exit(drm);
Thierry Redingf002abc2013-10-14 14:06:02 +0200223 drm_mode_config_cleanup(drm);
Thierry Reding4aa3df72014-11-24 16:27:13 +0100224 drm_vblank_cleanup(drm);
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000225
Thierry Reding776dc382013-10-14 14:43:22 +0200226 err = host1x_device_exit(device);
227 if (err < 0)
228 return err;
229
Thierry Redingdf06b752014-06-26 21:41:53 +0200230 if (tegra->domain) {
231 iommu_domain_free(tegra->domain);
232 drm_mm_takedown(&tegra->mm);
233 }
234
Thierry Reding1053f4dd2014-11-04 16:17:55 +0100235 kfree(tegra);
236
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000237 return 0;
238}
239
240static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
241{
Thierry Reding08943e62013-09-26 16:08:18 +0200242 struct tegra_drm_file *fpriv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200243
244 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
245 if (!fpriv)
246 return -ENOMEM;
247
248 INIT_LIST_HEAD(&fpriv->contexts);
249 filp->driver_priv = fpriv;
250
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000251 return 0;
252}
253
Thierry Redingc88c3632013-09-26 16:08:22 +0200254static void tegra_drm_context_free(struct tegra_drm_context *context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200255{
256 context->client->ops->close_channel(context);
257 kfree(context);
258}
259
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000260static void tegra_drm_lastclose(struct drm_device *drm)
261{
Archit Tanejab110ef32015-10-27 13:40:59 +0530262#ifdef CONFIG_DRM_FBDEV_EMULATION
Thierry Reding386a2a72013-09-24 13:22:17 +0200263 struct tegra_drm *tegra = drm->dev_private;
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000264
Thierry Reding386a2a72013-09-24 13:22:17 +0200265 tegra_fbdev_restore_mode(tegra->fbdev);
Thierry Reding60c2f702013-10-31 13:28:50 +0100266#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000267}
268
Thierry Redingc40f0f12013-10-10 11:00:33 +0200269static struct host1x_bo *
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100270host1x_bo_lookup(struct drm_file *file, u32 handle)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200271{
272 struct drm_gem_object *gem;
273 struct tegra_bo *bo;
274
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100275 gem = drm_gem_object_lookup(file, handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200276 if (!gem)
277 return NULL;
278
Daniel Vettera07cdfe2015-11-23 10:32:48 +0100279 drm_gem_object_unreference_unlocked(gem);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200280
281 bo = to_tegra_bo(gem);
282 return &bo->base;
283}
284
Thierry Reding961e3be2014-06-10 10:25:00 +0200285static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
286 struct drm_tegra_reloc __user *src,
287 struct drm_device *drm,
288 struct drm_file *file)
289{
290 u32 cmdbuf, target;
291 int err;
292
293 err = get_user(cmdbuf, &src->cmdbuf.handle);
294 if (err < 0)
295 return err;
296
297 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
298 if (err < 0)
299 return err;
300
301 err = get_user(target, &src->target.handle);
302 if (err < 0)
303 return err;
304
David Ung31f40f82015-01-20 18:37:35 -0800305 err = get_user(dest->target.offset, &src->target.offset);
Thierry Reding961e3be2014-06-10 10:25:00 +0200306 if (err < 0)
307 return err;
308
309 err = get_user(dest->shift, &src->shift);
310 if (err < 0)
311 return err;
312
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100313 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
Thierry Reding961e3be2014-06-10 10:25:00 +0200314 if (!dest->cmdbuf.bo)
315 return -ENOENT;
316
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100317 dest->target.bo = host1x_bo_lookup(file, target);
Thierry Reding961e3be2014-06-10 10:25:00 +0200318 if (!dest->target.bo)
319 return -ENOENT;
320
321 return 0;
322}
323
Thierry Redingc40f0f12013-10-10 11:00:33 +0200324int tegra_drm_submit(struct tegra_drm_context *context,
325 struct drm_tegra_submit *args, struct drm_device *drm,
326 struct drm_file *file)
327{
328 unsigned int num_cmdbufs = args->num_cmdbufs;
329 unsigned int num_relocs = args->num_relocs;
330 unsigned int num_waitchks = args->num_waitchks;
331 struct drm_tegra_cmdbuf __user *cmdbufs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100332 (void __user *)(uintptr_t)args->cmdbufs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200333 struct drm_tegra_reloc __user *relocs =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100334 (void __user *)(uintptr_t)args->relocs;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200335 struct drm_tegra_waitchk __user *waitchks =
Thierry Redinga7ed68f2013-11-08 13:15:43 +0100336 (void __user *)(uintptr_t)args->waitchks;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200337 struct drm_tegra_syncpt syncpt;
338 struct host1x_job *job;
339 int err;
340
341 /* We don't yet support other than one syncpt_incr struct per submit */
342 if (args->num_syncpts != 1)
343 return -EINVAL;
344
345 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
346 args->num_relocs, args->num_waitchks);
347 if (!job)
348 return -ENOMEM;
349
350 job->num_relocs = args->num_relocs;
351 job->num_waitchk = args->num_waitchks;
352 job->client = (u32)args->context;
353 job->class = context->client->base.class;
354 job->serialize = true;
355
356 while (num_cmdbufs) {
357 struct drm_tegra_cmdbuf cmdbuf;
358 struct host1x_bo *bo;
359
Dan Carpenter9a991602013-11-08 13:07:37 +0300360 if (copy_from_user(&cmdbuf, cmdbufs, sizeof(cmdbuf))) {
361 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200362 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300363 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200364
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100365 bo = host1x_bo_lookup(file, cmdbuf.handle);
Thierry Redingc40f0f12013-10-10 11:00:33 +0200366 if (!bo) {
367 err = -ENOENT;
368 goto fail;
369 }
370
371 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
372 num_cmdbufs--;
373 cmdbufs++;
374 }
375
Thierry Reding961e3be2014-06-10 10:25:00 +0200376 /* copy and resolve relocations from submit */
Thierry Redingc40f0f12013-10-10 11:00:33 +0200377 while (num_relocs--) {
Thierry Reding961e3be2014-06-10 10:25:00 +0200378 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
379 &relocs[num_relocs], drm,
380 file);
381 if (err < 0)
Thierry Redingc40f0f12013-10-10 11:00:33 +0200382 goto fail;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200383 }
384
Dan Carpenter9a991602013-11-08 13:07:37 +0300385 if (copy_from_user(job->waitchk, waitchks,
386 sizeof(*waitchks) * num_waitchks)) {
387 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200388 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300389 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200390
Dan Carpenter9a991602013-11-08 13:07:37 +0300391 if (copy_from_user(&syncpt, (void __user *)(uintptr_t)args->syncpts,
392 sizeof(syncpt))) {
393 err = -EFAULT;
Thierry Redingc40f0f12013-10-10 11:00:33 +0200394 goto fail;
Dan Carpenter9a991602013-11-08 13:07:37 +0300395 }
Thierry Redingc40f0f12013-10-10 11:00:33 +0200396
397 job->is_addr_reg = context->client->ops->is_addr_reg;
398 job->syncpt_incrs = syncpt.incrs;
399 job->syncpt_id = syncpt.id;
400 job->timeout = 10000;
401
402 if (args->timeout && args->timeout < 10000)
403 job->timeout = args->timeout;
404
405 err = host1x_job_pin(job, context->client->base.dev);
406 if (err)
407 goto fail;
408
409 err = host1x_job_submit(job);
410 if (err)
411 goto fail_submit;
412
413 args->fence = job->syncpt_end;
414
415 host1x_job_put(job);
416 return 0;
417
418fail_submit:
419 host1x_job_unpin(job);
420fail:
421 host1x_job_put(job);
422 return err;
423}
424
425
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200426#ifdef CONFIG_DRM_TEGRA_STAGING
Thierry Redingc88c3632013-09-26 16:08:22 +0200427static struct tegra_drm_context *tegra_drm_get_context(__u64 context)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200428{
Thierry Redingc88c3632013-09-26 16:08:22 +0200429 return (struct tegra_drm_context *)(uintptr_t)context;
430}
431
432static bool tegra_drm_file_owns_context(struct tegra_drm_file *file,
433 struct tegra_drm_context *context)
434{
435 struct tegra_drm_context *ctx;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200436
437 list_for_each_entry(ctx, &file->contexts, list)
438 if (ctx == context)
439 return true;
440
441 return false;
442}
443
444static int tegra_gem_create(struct drm_device *drm, void *data,
445 struct drm_file *file)
446{
447 struct drm_tegra_gem_create *args = data;
448 struct tegra_bo *bo;
449
Thierry Reding773af772013-10-04 22:34:01 +0200450 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200451 &args->handle);
452 if (IS_ERR(bo))
453 return PTR_ERR(bo);
454
455 return 0;
456}
457
458static int tegra_gem_mmap(struct drm_device *drm, void *data,
459 struct drm_file *file)
460{
461 struct drm_tegra_gem_mmap *args = data;
462 struct drm_gem_object *gem;
463 struct tegra_bo *bo;
464
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100465 gem = drm_gem_object_lookup(file, args->handle);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200466 if (!gem)
467 return -EINVAL;
468
469 bo = to_tegra_bo(gem);
470
David Herrmann2bc7b0c2013-08-13 14:19:58 +0200471 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200472
Daniel Vetter11533302015-11-23 10:32:40 +0100473 drm_gem_object_unreference_unlocked(gem);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200474
475 return 0;
476}
477
478static int tegra_syncpt_read(struct drm_device *drm, void *data,
479 struct drm_file *file)
480{
Thierry Reding776dc382013-10-14 14:43:22 +0200481 struct host1x *host = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200482 struct drm_tegra_syncpt_read *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200483 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200484
Thierry Reding776dc382013-10-14 14:43:22 +0200485 sp = host1x_syncpt_get(host, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200486 if (!sp)
487 return -EINVAL;
488
489 args->value = host1x_syncpt_read_min(sp);
490 return 0;
491}
492
493static int tegra_syncpt_incr(struct drm_device *drm, void *data,
494 struct drm_file *file)
495{
Thierry Reding776dc382013-10-14 14:43:22 +0200496 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200497 struct drm_tegra_syncpt_incr *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200498 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200499
Thierry Reding776dc382013-10-14 14:43:22 +0200500 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200501 if (!sp)
502 return -EINVAL;
503
Arto Merilainenebae30b2013-05-29 13:26:08 +0300504 return host1x_syncpt_incr(sp);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200505}
506
507static int tegra_syncpt_wait(struct drm_device *drm, void *data,
508 struct drm_file *file)
509{
Thierry Reding776dc382013-10-14 14:43:22 +0200510 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200511 struct drm_tegra_syncpt_wait *args = data;
Thierry Reding776dc382013-10-14 14:43:22 +0200512 struct host1x_syncpt *sp;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200513
Thierry Reding776dc382013-10-14 14:43:22 +0200514 sp = host1x_syncpt_get(host1x, args->id);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200515 if (!sp)
516 return -EINVAL;
517
518 return host1x_syncpt_wait(sp, args->thresh, args->timeout,
519 &args->value);
520}
521
522static int tegra_open_channel(struct drm_device *drm, void *data,
523 struct drm_file *file)
524{
Thierry Reding08943e62013-09-26 16:08:18 +0200525 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding386a2a72013-09-24 13:22:17 +0200526 struct tegra_drm *tegra = drm->dev_private;
527 struct drm_tegra_open_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200528 struct tegra_drm_context *context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200529 struct tegra_drm_client *client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200530 int err = -ENODEV;
531
532 context = kzalloc(sizeof(*context), GFP_KERNEL);
533 if (!context)
534 return -ENOMEM;
535
Thierry Reding776dc382013-10-14 14:43:22 +0200536 list_for_each_entry(client, &tegra->clients, list)
Thierry Reding53fa7f72013-09-24 15:35:40 +0200537 if (client->base.class == args->client) {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200538 err = client->ops->open_channel(client, context);
539 if (err)
540 break;
541
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200542 list_add(&context->list, &fpriv->contexts);
543 args->context = (uintptr_t)context;
Thierry Reding53fa7f72013-09-24 15:35:40 +0200544 context->client = client;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200545 return 0;
546 }
547
548 kfree(context);
549 return err;
550}
551
552static int tegra_close_channel(struct drm_device *drm, void *data,
553 struct drm_file *file)
554{
Thierry Reding08943e62013-09-26 16:08:18 +0200555 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Reding776dc382013-10-14 14:43:22 +0200556 struct drm_tegra_close_channel *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200557 struct tegra_drm_context *context;
558
559 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200560
Thierry Reding08943e62013-09-26 16:08:18 +0200561 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200562 return -EINVAL;
563
564 list_del(&context->list);
Thierry Redingc88c3632013-09-26 16:08:22 +0200565 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200566
567 return 0;
568}
569
570static int tegra_get_syncpt(struct drm_device *drm, void *data,
571 struct drm_file *file)
572{
Thierry Reding08943e62013-09-26 16:08:18 +0200573 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200574 struct drm_tegra_get_syncpt *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200575 struct tegra_drm_context *context;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200576 struct host1x_syncpt *syncpt;
577
Thierry Redingc88c3632013-09-26 16:08:22 +0200578 context = tegra_drm_get_context(args->context);
579
Thierry Reding08943e62013-09-26 16:08:18 +0200580 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200581 return -ENODEV;
582
Thierry Reding53fa7f72013-09-24 15:35:40 +0200583 if (args->index >= context->client->base.num_syncpts)
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200584 return -EINVAL;
585
Thierry Reding53fa7f72013-09-24 15:35:40 +0200586 syncpt = context->client->base.syncpts[args->index];
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200587 args->id = host1x_syncpt_id(syncpt);
588
589 return 0;
590}
591
592static int tegra_submit(struct drm_device *drm, void *data,
593 struct drm_file *file)
594{
Thierry Reding08943e62013-09-26 16:08:18 +0200595 struct tegra_drm_file *fpriv = file->driver_priv;
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200596 struct drm_tegra_submit *args = data;
Thierry Redingc88c3632013-09-26 16:08:22 +0200597 struct tegra_drm_context *context;
598
599 context = tegra_drm_get_context(args->context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200600
Thierry Reding08943e62013-09-26 16:08:18 +0200601 if (!tegra_drm_file_owns_context(fpriv, context))
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200602 return -ENODEV;
603
604 return context->client->ops->submit(context, args, drm, file);
605}
Arto Merilainenc54a1692013-10-14 15:21:54 +0300606
607static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
608 struct drm_file *file)
609{
610 struct tegra_drm_file *fpriv = file->driver_priv;
611 struct drm_tegra_get_syncpt_base *args = data;
612 struct tegra_drm_context *context;
613 struct host1x_syncpt_base *base;
614 struct host1x_syncpt *syncpt;
615
616 context = tegra_drm_get_context(args->context);
617
618 if (!tegra_drm_file_owns_context(fpriv, context))
619 return -ENODEV;
620
621 if (args->syncpt >= context->client->base.num_syncpts)
622 return -EINVAL;
623
624 syncpt = context->client->base.syncpts[args->syncpt];
625
626 base = host1x_syncpt_get_base(syncpt);
627 if (!base)
628 return -ENXIO;
629
630 args->id = host1x_syncpt_base_id(base);
631
632 return 0;
633}
Thierry Reding7678d712014-06-03 14:56:57 +0200634
635static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
636 struct drm_file *file)
637{
638 struct drm_tegra_gem_set_tiling *args = data;
639 enum tegra_bo_tiling_mode mode;
640 struct drm_gem_object *gem;
641 unsigned long value = 0;
642 struct tegra_bo *bo;
643
644 switch (args->mode) {
645 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
646 mode = TEGRA_BO_TILING_MODE_PITCH;
647
648 if (args->value != 0)
649 return -EINVAL;
650
651 break;
652
653 case DRM_TEGRA_GEM_TILING_MODE_TILED:
654 mode = TEGRA_BO_TILING_MODE_TILED;
655
656 if (args->value != 0)
657 return -EINVAL;
658
659 break;
660
661 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
662 mode = TEGRA_BO_TILING_MODE_BLOCK;
663
664 if (args->value > 5)
665 return -EINVAL;
666
667 value = args->value;
668 break;
669
670 default:
671 return -EINVAL;
672 }
673
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100674 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200675 if (!gem)
676 return -ENOENT;
677
678 bo = to_tegra_bo(gem);
679
680 bo->tiling.mode = mode;
681 bo->tiling.value = value;
682
Daniel Vetter11533302015-11-23 10:32:40 +0100683 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200684
685 return 0;
686}
687
688static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
689 struct drm_file *file)
690{
691 struct drm_tegra_gem_get_tiling *args = data;
692 struct drm_gem_object *gem;
693 struct tegra_bo *bo;
694 int err = 0;
695
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100696 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7678d712014-06-03 14:56:57 +0200697 if (!gem)
698 return -ENOENT;
699
700 bo = to_tegra_bo(gem);
701
702 switch (bo->tiling.mode) {
703 case TEGRA_BO_TILING_MODE_PITCH:
704 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
705 args->value = 0;
706 break;
707
708 case TEGRA_BO_TILING_MODE_TILED:
709 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
710 args->value = 0;
711 break;
712
713 case TEGRA_BO_TILING_MODE_BLOCK:
714 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
715 args->value = bo->tiling.value;
716 break;
717
718 default:
719 err = -EINVAL;
720 break;
721 }
722
Daniel Vetter11533302015-11-23 10:32:40 +0100723 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7678d712014-06-03 14:56:57 +0200724
725 return err;
726}
Thierry Reding7b129082014-06-10 12:04:03 +0200727
728static int tegra_gem_set_flags(struct drm_device *drm, void *data,
729 struct drm_file *file)
730{
731 struct drm_tegra_gem_set_flags *args = data;
732 struct drm_gem_object *gem;
733 struct tegra_bo *bo;
734
735 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
736 return -EINVAL;
737
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100738 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200739 if (!gem)
740 return -ENOENT;
741
742 bo = to_tegra_bo(gem);
743 bo->flags = 0;
744
745 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
746 bo->flags |= TEGRA_BO_BOTTOM_UP;
747
Daniel Vetter11533302015-11-23 10:32:40 +0100748 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200749
750 return 0;
751}
752
753static int tegra_gem_get_flags(struct drm_device *drm, void *data,
754 struct drm_file *file)
755{
756 struct drm_tegra_gem_get_flags *args = data;
757 struct drm_gem_object *gem;
758 struct tegra_bo *bo;
759
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100760 gem = drm_gem_object_lookup(file, args->handle);
Thierry Reding7b129082014-06-10 12:04:03 +0200761 if (!gem)
762 return -ENOENT;
763
764 bo = to_tegra_bo(gem);
765 args->flags = 0;
766
767 if (bo->flags & TEGRA_BO_BOTTOM_UP)
768 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
769
Daniel Vetter11533302015-11-23 10:32:40 +0100770 drm_gem_object_unreference_unlocked(gem);
Thierry Reding7b129082014-06-10 12:04:03 +0200771
772 return 0;
773}
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200774#endif
775
Rob Clarkbaa70942013-08-02 13:27:49 -0400776static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200777#ifdef CONFIG_DRM_TEGRA_STAGING
Daniel Vetterf8c47142015-09-08 13:56:30 +0200778 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create, 0),
779 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap, 0),
780 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read, 0),
781 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr, 0),
782 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait, 0),
783 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel, 0),
784 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel, 0),
785 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt, 0),
786 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit, 0),
787 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base, 0),
788 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling, 0),
789 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling, 0),
790 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags, 0),
791 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags, 0),
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200792#endif
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000793};
794
795static const struct file_operations tegra_drm_fops = {
796 .owner = THIS_MODULE,
797 .open = drm_open,
798 .release = drm_release,
799 .unlocked_ioctl = drm_ioctl,
Arto Merilainende2ba662013-03-22 16:34:08 +0200800 .mmap = tegra_drm_mmap,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000801 .poll = drm_poll,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000802 .read = drm_read,
803#ifdef CONFIG_COMPAT
804 .compat_ioctl = drm_compat_ioctl,
805#endif
806 .llseek = noop_llseek,
807};
808
Thierry Redinged7dae52014-12-16 16:03:13 +0100809static struct drm_crtc *tegra_crtc_from_pipe(struct drm_device *drm,
810 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100811{
812 struct drm_crtc *crtc;
813
814 list_for_each_entry(crtc, &drm->mode_config.crtc_list, head) {
Thierry Redinged7dae52014-12-16 16:03:13 +0100815 if (pipe == drm_crtc_index(crtc))
Thierry Reding6e5ff992012-11-28 11:45:47 +0100816 return crtc;
817 }
818
819 return NULL;
820}
821
Thierry Reding88e72712015-09-24 18:35:31 +0200822static u32 tegra_drm_get_vblank_counter(struct drm_device *drm,
823 unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100824{
Thierry Redinged7dae52014-12-16 16:03:13 +0100825 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
Thierry Reding42e9ce02015-01-28 14:43:05 +0100826 struct tegra_dc *dc = to_tegra_dc(crtc);
Thierry Redinged7dae52014-12-16 16:03:13 +0100827
828 if (!crtc)
829 return 0;
830
Thierry Reding42e9ce02015-01-28 14:43:05 +0100831 return tegra_dc_get_vblank_counter(dc);
Thierry Reding6e5ff992012-11-28 11:45:47 +0100832}
833
Thierry Reding88e72712015-09-24 18:35:31 +0200834static int tegra_drm_enable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100835{
836 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
837 struct tegra_dc *dc = to_tegra_dc(crtc);
838
839 if (!crtc)
840 return -ENODEV;
841
842 tegra_dc_enable_vblank(dc);
843
844 return 0;
845}
846
Thierry Reding88e72712015-09-24 18:35:31 +0200847static void tegra_drm_disable_vblank(struct drm_device *drm, unsigned int pipe)
Thierry Reding6e5ff992012-11-28 11:45:47 +0100848{
849 struct drm_crtc *crtc = tegra_crtc_from_pipe(drm, pipe);
850 struct tegra_dc *dc = to_tegra_dc(crtc);
851
852 if (crtc)
853 tegra_dc_disable_vblank(dc);
854}
855
Thierry Reding3c03c462012-11-28 12:00:18 +0100856static void tegra_drm_preclose(struct drm_device *drm, struct drm_file *file)
857{
Thierry Reding08943e62013-09-26 16:08:18 +0200858 struct tegra_drm_file *fpriv = file->driver_priv;
Thierry Redingc88c3632013-09-26 16:08:22 +0200859 struct tegra_drm_context *context, *tmp;
Thierry Reding3c03c462012-11-28 12:00:18 +0100860
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200861 list_for_each_entry_safe(context, tmp, &fpriv->contexts, list)
Thierry Redingc88c3632013-09-26 16:08:22 +0200862 tegra_drm_context_free(context);
Terje Bergstromd43f81c2013-03-22 16:34:09 +0200863
864 kfree(fpriv);
Thierry Reding3c03c462012-11-28 12:00:18 +0100865}
866
Thierry Redinge450fcc2013-02-13 16:13:16 +0100867#ifdef CONFIG_DEBUG_FS
868static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
869{
870 struct drm_info_node *node = (struct drm_info_node *)s->private;
871 struct drm_device *drm = node->minor->dev;
872 struct drm_framebuffer *fb;
873
874 mutex_lock(&drm->mode_config.fb_lock);
875
876 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
877 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
878 fb->base.id, fb->width, fb->height, fb->depth,
879 fb->bits_per_pixel,
Dave Airlie747a5982016-04-15 15:10:35 +1000880 drm_framebuffer_read_refcount(fb));
Thierry Redinge450fcc2013-02-13 16:13:16 +0100881 }
882
883 mutex_unlock(&drm->mode_config.fb_lock);
884
885 return 0;
886}
887
Thierry Reding28c23372015-01-23 09:16:03 +0100888static int tegra_debugfs_iova(struct seq_file *s, void *data)
889{
890 struct drm_info_node *node = (struct drm_info_node *)s->private;
891 struct drm_device *drm = node->minor->dev;
892 struct tegra_drm *tegra = drm->dev_private;
893
894 return drm_mm_dump_table(s, &tegra->mm);
895}
896
Thierry Redinge450fcc2013-02-13 16:13:16 +0100897static struct drm_info_list tegra_debugfs_list[] = {
898 { "framebuffers", tegra_debugfs_framebuffers, 0 },
Thierry Reding28c23372015-01-23 09:16:03 +0100899 { "iova", tegra_debugfs_iova, 0 },
Thierry Redinge450fcc2013-02-13 16:13:16 +0100900};
901
902static int tegra_debugfs_init(struct drm_minor *minor)
903{
904 return drm_debugfs_create_files(tegra_debugfs_list,
905 ARRAY_SIZE(tegra_debugfs_list),
906 minor->debugfs_root, minor);
907}
908
909static void tegra_debugfs_cleanup(struct drm_minor *minor)
910{
911 drm_debugfs_remove_files(tegra_debugfs_list,
912 ARRAY_SIZE(tegra_debugfs_list), minor);
913}
914#endif
915
Thierry Reding9b57f5f2013-11-08 13:17:14 +0100916static struct drm_driver tegra_drm_driver = {
Thierry Redingad906592015-09-24 18:38:09 +0200917 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
918 DRIVER_ATOMIC,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000919 .load = tegra_drm_load,
920 .unload = tegra_drm_unload,
921 .open = tegra_drm_open,
Thierry Reding3c03c462012-11-28 12:00:18 +0100922 .preclose = tegra_drm_preclose,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000923 .lastclose = tegra_drm_lastclose,
924
Thierry Reding6e5ff992012-11-28 11:45:47 +0100925 .get_vblank_counter = tegra_drm_get_vblank_counter,
926 .enable_vblank = tegra_drm_enable_vblank,
927 .disable_vblank = tegra_drm_disable_vblank,
928
Thierry Redinge450fcc2013-02-13 16:13:16 +0100929#if defined(CONFIG_DEBUG_FS)
930 .debugfs_init = tegra_debugfs_init,
931 .debugfs_cleanup = tegra_debugfs_cleanup,
932#endif
933
Daniel Vetter1ddbdbd2016-04-26 19:30:00 +0200934 .gem_free_object_unlocked = tegra_bo_free_object,
Arto Merilainende2ba662013-03-22 16:34:08 +0200935 .gem_vm_ops = &tegra_bo_vm_ops,
Thierry Reding38003912013-12-12 10:00:43 +0100936
937 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
938 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
939 .gem_prime_export = tegra_gem_prime_export,
940 .gem_prime_import = tegra_gem_prime_import,
941
Arto Merilainende2ba662013-03-22 16:34:08 +0200942 .dumb_create = tegra_bo_dumb_create,
943 .dumb_map_offset = tegra_bo_dumb_map_offset,
Daniel Vetter43387b32013-07-16 09:12:04 +0200944 .dumb_destroy = drm_gem_dumb_destroy,
Thierry Redingd8f4a9e2012-11-15 21:28:22 +0000945
946 .ioctls = tegra_drm_ioctls,
947 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
948 .fops = &tegra_drm_fops,
949
950 .name = DRIVER_NAME,
951 .desc = DRIVER_DESC,
952 .date = DRIVER_DATE,
953 .major = DRIVER_MAJOR,
954 .minor = DRIVER_MINOR,
955 .patchlevel = DRIVER_PATCHLEVEL,
956};
Thierry Reding776dc382013-10-14 14:43:22 +0200957
958int tegra_drm_register_client(struct tegra_drm *tegra,
959 struct tegra_drm_client *client)
960{
961 mutex_lock(&tegra->clients_lock);
962 list_add_tail(&client->list, &tegra->clients);
963 mutex_unlock(&tegra->clients_lock);
964
965 return 0;
966}
967
968int tegra_drm_unregister_client(struct tegra_drm *tegra,
969 struct tegra_drm_client *client)
970{
971 mutex_lock(&tegra->clients_lock);
972 list_del_init(&client->list);
973 mutex_unlock(&tegra->clients_lock);
974
975 return 0;
976}
977
Thierry Reding9910f5c2014-05-22 09:57:15 +0200978static int host1x_drm_probe(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +0200979{
Thierry Reding9910f5c2014-05-22 09:57:15 +0200980 struct drm_driver *driver = &tegra_drm_driver;
981 struct drm_device *drm;
982 int err;
983
984 drm = drm_dev_alloc(driver, &dev->dev);
985 if (!drm)
986 return -ENOMEM;
987
Thierry Reding9910f5c2014-05-22 09:57:15 +0200988 dev_set_drvdata(&dev->dev, drm);
989
990 err = drm_dev_register(drm, 0);
991 if (err < 0)
992 goto unref;
993
994 DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", driver->name,
995 driver->major, driver->minor, driver->patchlevel,
996 driver->date, drm->primary->index);
997
998 return 0;
999
1000unref:
1001 drm_dev_unref(drm);
1002 return err;
Thierry Reding776dc382013-10-14 14:43:22 +02001003}
1004
Thierry Reding9910f5c2014-05-22 09:57:15 +02001005static int host1x_drm_remove(struct host1x_device *dev)
Thierry Reding776dc382013-10-14 14:43:22 +02001006{
Thierry Reding9910f5c2014-05-22 09:57:15 +02001007 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1008
1009 drm_dev_unregister(drm);
1010 drm_dev_unref(drm);
Thierry Reding776dc382013-10-14 14:43:22 +02001011
1012 return 0;
1013}
1014
Thierry Reding359ae682014-12-18 17:15:25 +01001015#ifdef CONFIG_PM_SLEEP
1016static int host1x_drm_suspend(struct device *dev)
1017{
1018 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001019 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001020
1021 drm_kms_helper_poll_disable(drm);
Thierry Reding986c58d2015-08-11 13:11:49 +02001022 tegra_drm_fb_suspend(drm);
1023
1024 tegra->state = drm_atomic_helper_suspend(drm);
1025 if (IS_ERR(tegra->state)) {
1026 tegra_drm_fb_resume(drm);
1027 drm_kms_helper_poll_enable(drm);
1028 return PTR_ERR(tegra->state);
1029 }
Thierry Reding359ae682014-12-18 17:15:25 +01001030
1031 return 0;
1032}
1033
1034static int host1x_drm_resume(struct device *dev)
1035{
1036 struct drm_device *drm = dev_get_drvdata(dev);
Thierry Reding986c58d2015-08-11 13:11:49 +02001037 struct tegra_drm *tegra = drm->dev_private;
Thierry Reding359ae682014-12-18 17:15:25 +01001038
Thierry Reding986c58d2015-08-11 13:11:49 +02001039 drm_atomic_helper_resume(drm, tegra->state);
1040 tegra_drm_fb_resume(drm);
Thierry Reding359ae682014-12-18 17:15:25 +01001041 drm_kms_helper_poll_enable(drm);
1042
1043 return 0;
1044}
1045#endif
1046
Thierry Redinga13f1dc2015-08-11 13:22:44 +02001047static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1048 host1x_drm_resume);
Thierry Reding359ae682014-12-18 17:15:25 +01001049
Thierry Reding776dc382013-10-14 14:43:22 +02001050static const struct of_device_id host1x_drm_subdevs[] = {
1051 { .compatible = "nvidia,tegra20-dc", },
1052 { .compatible = "nvidia,tegra20-hdmi", },
1053 { .compatible = "nvidia,tegra20-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001054 { .compatible = "nvidia,tegra20-gr3d", },
Thierry Reding776dc382013-10-14 14:43:22 +02001055 { .compatible = "nvidia,tegra30-dc", },
1056 { .compatible = "nvidia,tegra30-hdmi", },
1057 { .compatible = "nvidia,tegra30-gr2d", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001058 { .compatible = "nvidia,tegra30-gr3d", },
Thierry Redingdec72732013-09-03 08:45:46 +02001059 { .compatible = "nvidia,tegra114-dsi", },
Mikko Perttunen7d1d28a2013-09-30 16:54:47 +02001060 { .compatible = "nvidia,tegra114-hdmi", },
Thierry Reding5f60ed02013-02-28 08:08:01 +01001061 { .compatible = "nvidia,tegra114-gr3d", },
Thierry Reding8620fc62013-12-12 11:03:59 +01001062 { .compatible = "nvidia,tegra124-dc", },
Thierry Reding6b6b6042013-11-15 16:06:05 +01001063 { .compatible = "nvidia,tegra124-sor", },
Thierry Redingfb7be702013-11-15 16:07:32 +01001064 { .compatible = "nvidia,tegra124-hdmi", },
Thierry Reding7d338582015-04-10 11:35:21 +02001065 { .compatible = "nvidia,tegra124-dsi", },
Thierry Redingc06c7932015-04-10 11:35:21 +02001066 { .compatible = "nvidia,tegra132-dsi", },
Thierry Reding5b4f5162015-03-27 10:31:58 +01001067 { .compatible = "nvidia,tegra210-dc", },
Thierry Redingddfb4062015-04-08 16:56:22 +02001068 { .compatible = "nvidia,tegra210-dsi", },
Thierry Reding3309ac82015-07-30 10:32:46 +02001069 { .compatible = "nvidia,tegra210-sor", },
Thierry Reding459cc2c2015-07-30 10:34:24 +02001070 { .compatible = "nvidia,tegra210-sor1", },
Thierry Reding776dc382013-10-14 14:43:22 +02001071 { /* sentinel */ }
1072};
1073
1074static struct host1x_driver host1x_drm_driver = {
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001075 .driver = {
1076 .name = "drm",
Thierry Reding359ae682014-12-18 17:15:25 +01001077 .pm = &host1x_drm_pm_ops,
Thierry Redingf4c5cf82014-12-18 15:29:14 +01001078 },
Thierry Reding776dc382013-10-14 14:43:22 +02001079 .probe = host1x_drm_probe,
1080 .remove = host1x_drm_remove,
1081 .subdevs = host1x_drm_subdevs,
1082};
1083
Thierry Reding473112e2015-09-10 16:07:14 +02001084static struct platform_driver * const drivers[] = {
1085 &tegra_dc_driver,
1086 &tegra_hdmi_driver,
1087 &tegra_dsi_driver,
1088 &tegra_dpaux_driver,
1089 &tegra_sor_driver,
1090 &tegra_gr2d_driver,
1091 &tegra_gr3d_driver,
1092};
1093
Thierry Reding776dc382013-10-14 14:43:22 +02001094static int __init host1x_drm_init(void)
1095{
1096 int err;
1097
1098 err = host1x_driver_register(&host1x_drm_driver);
1099 if (err < 0)
1100 return err;
1101
Thierry Reding473112e2015-09-10 16:07:14 +02001102 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001103 if (err < 0)
1104 goto unregister_host1x;
1105
Thierry Reding776dc382013-10-14 14:43:22 +02001106 return 0;
1107
Thierry Reding776dc382013-10-14 14:43:22 +02001108unregister_host1x:
1109 host1x_driver_unregister(&host1x_drm_driver);
1110 return err;
1111}
1112module_init(host1x_drm_init);
1113
1114static void __exit host1x_drm_exit(void)
1115{
Thierry Reding473112e2015-09-10 16:07:14 +02001116 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Thierry Reding776dc382013-10-14 14:43:22 +02001117 host1x_driver_unregister(&host1x_drm_driver);
1118}
1119module_exit(host1x_drm_exit);
1120
1121MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1122MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1123MODULE_LICENSE("GPL v2");