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gerrit-public.fairphone.software / kernel / msm-4.9 / 002e1ec56d1171e2987c7ce5a865cf21a686a4bf / . / arch / arm / boot / dts / omap2.dtsi
blob: 37aa7487d4d86791be2ad6f51065708f31fcaa80 [file] [log] [blame]
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]1/*
2 * Device Tree Source for OMAP2 SoC
3 *
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
10
11/include/ "skeleton.dtsi"
12
13/ {
14 compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
Benoit Cousson4c94ac22012-10-24 10:47:52 +0200[diff] [blame]15 interrupt-parent = <&intc>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]16
17 aliases {
18 serial0 = &uart1;
19 serial1 = &uart2;
20 serial2 = &uart3;
21 };
22
23 cpus {
24 cpu@0 {
25 compatible = "arm,arm1136jf-s";
26 };
27 };
28
Jon Hunter9b07b472012-10-18 09:28:52 -0500[diff] [blame]29 pmu {
30 compatible = "arm,arm1136-pmu";
31 interrupts = <3>;
32 };
33
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]34 soc {
35 compatible = "ti,omap-infra";
36 mpu {
37 compatible = "ti,omap2-mpu";
38 ti,hwmods = "mpu";
39 };
40 };
41
42 ocp {
43 compatible = "simple-bus";
44 #address-cells = <1>;
45 #size-cells = <1>;
46 ranges;
47 ti,hwmods = "l3_main";
48
49 intc: interrupt-controller@1 {
50 compatible = "ti,omap2-intc";
51 interrupt-controller;
52 #interrupt-cells = <1>;
Jon Hunter95dca122012-06-12 19:40:46 -0500[diff] [blame]53 ti,intc-size = <96>;
54 reg = <0x480FE000 0x1000>;
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]55 };
56
Jon Hunter2c2dc542012-04-26 13:47:59 -0500[diff] [blame]57 sdma: dma-controller@48056000 {
58 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
59 reg = <0x48056000 0x1000>;
60 interrupts = <12>,
61 <13>,
62 <14>,
63 <15>;
64 #dma-cells = <1>;
65 #dma-channels = <32>;
66 #dma-requests = <64>;
67 };
68
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]69 uart1: serial@4806a000 {
70 compatible = "ti,omap2-uart";
71 ti,hwmods = "uart1";
72 clock-frequency = <48000000>;
73 };
74
75 uart2: serial@4806c000 {
76 compatible = "ti,omap2-uart";
77 ti,hwmods = "uart2";
78 clock-frequency = <48000000>;
79 };
80
81 uart3: serial@4806e000 {
82 compatible = "ti,omap2-uart";
83 ti,hwmods = "uart3";
84 clock-frequency = <48000000>;
85 };
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]86
87 timer2: timer@4802a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]88 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]89 reg = <0x4802a000 0x400>;
90 interrupts = <38>;
91 ti,hwmods = "timer2";
92 };
93
94 timer3: timer@48078000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]95 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]96 reg = <0x48078000 0x400>;
97 interrupts = <39>;
98 ti,hwmods = "timer3";
99 };
100
101 timer4: timer@4807a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]102 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]103 reg = <0x4807a000 0x400>;
104 interrupts = <40>;
105 ti,hwmods = "timer4";
106 };
107
108 timer5: timer@4807c000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]109 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]110 reg = <0x4807c000 0x400>;
111 interrupts = <41>;
112 ti,hwmods = "timer5";
113 ti,timer-dsp;
114 };
115
116 timer6: timer@4807e000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]117 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]118 reg = <0x4807e000 0x400>;
119 interrupts = <42>;
120 ti,hwmods = "timer6";
121 ti,timer-dsp;
122 };
123
124 timer7: timer@48080000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]125 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]126 reg = <0x48080000 0x400>;
127 interrupts = <43>;
128 ti,hwmods = "timer7";
129 ti,timer-dsp;
130 };
131
132 timer8: timer@48082000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]133 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]134 reg = <0x48082000 0x400>;
135 interrupts = <44>;
136 ti,hwmods = "timer8";
137 ti,timer-dsp;
138 };
139
140 timer9: timer@48084000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]141 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]142 reg = <0x48084000 0x400>;
143 interrupts = <45>;
144 ti,hwmods = "timer9";
145 ti,timer-pwm;
146 };
147
148 timer10: timer@48086000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]149 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]150 reg = <0x48086000 0x400>;
151 interrupts = <46>;
152 ti,hwmods = "timer10";
153 ti,timer-pwm;
154 };
155
156 timer11: timer@48088000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]157 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]158 reg = <0x48088000 0x400>;
159 interrupts = <47>;
160 ti,hwmods = "timer11";
161 ti,timer-pwm;
162 };
163
164 timer12: timer@4808a000 {
Jon Hunter002e1ec2013-03-19 12:38:18 -0500[diff] [blame^]165 compatible = "ti,omap2420-timer";
Jon Hunterfab8ad02012-10-19 09:59:00 -0500[diff] [blame]166 reg = <0x4808a000 0x400>;
167 interrupts = <48>;
168 ti,hwmods = "timer12";
169 ti,timer-pwm;
170 };
Tony Lindgrenf20b9332011-12-16 14:13:09 -0800[diff] [blame]171 };
172};