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Nicolas Ferre467f1cf2012-01-26 11:59:20 +01001/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
Ludovic Desroches05dcd362012-09-12 08:42:16 +020030 i2c0 = &i2c0;
31 i2c1 = &i2c1;
32 i2c2 = &i2c2;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010033 };
34 cpus {
35 cpu@0 {
36 compatible = "arm,arm926ejs";
37 };
38 };
39
Ludovic Desrochesdcce6ce2012-04-02 20:44:20 +020040 memory {
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010041 reg = <0x20000000 0x10000000>;
42 };
43
44 ahb {
45 compatible = "simple-bus";
46 #address-cells = <1>;
47 #size-cells = <1>;
48 ranges;
49
50 apb {
51 compatible = "simple-bus";
52 #address-cells = <1>;
53 #size-cells = <1>;
54 ranges;
55
56 aic: interrupt-controller@fffff000 {
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020057 #interrupt-cells = <3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010058 compatible = "atmel,at91rm9200-aic";
59 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010060 reg = <0xfffff000 0x200>;
Jean-Christophe PLAGNIOL-VILLARDc6573942012-04-09 19:36:36 +080061 atmel,external-irqs = <31>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010062 };
63
Jean-Christophe PLAGNIOL-VILLARDa7776ec2012-03-02 20:54:37 +080064 ramc0: ramc@ffffe800 {
65 compatible = "atmel,at91sam9g45-ddramc";
66 reg = <0xffffe800 0x200>;
67 };
68
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +080069 pmc: pmc@fffffc00 {
70 compatible = "atmel,at91rm9200-pmc";
71 reg = <0xfffffc00 0x100>;
72 };
73
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +080074 rstc@fffffe00 {
75 compatible = "atmel,at91sam9g45-rstc";
76 reg = <0xfffffe00 0x10>;
77 };
78
Jean-Christophe PLAGNIOL-VILLARD82015c42012-03-02 21:01:00 +080079 shdwc@fffffe10 {
80 compatible = "atmel,at91sam9x5-shdwc";
81 reg = <0xfffffe10 0x10>;
82 };
83
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010084 pit: timer@fffffe30 {
85 compatible = "atmel,at91sam9260-pit";
86 reg = <0xfffffe30 0xf>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020087 interrupts = <1 4 7>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010088 };
89
90 tcb0: timer@f8008000 {
91 compatible = "atmel,at91sam9x5-tcb";
92 reg = <0xf8008000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020093 interrupts = <17 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +010094 };
95
96 tcb1: timer@f800c000 {
97 compatible = "atmel,at91sam9x5-tcb";
98 reg = <0xf800c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +020099 interrupts = <17 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100100 };
101
102 dma0: dma-controller@ffffec00 {
103 compatible = "atmel,at91sam9g45-dma";
104 reg = <0xffffec00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200105 interrupts = <20 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100106 };
107
108 dma1: dma-controller@ffffee00 {
109 compatible = "atmel,at91sam9g45-dma";
110 reg = <0xffffee00 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200111 interrupts = <21 4 0>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100112 };
113
114 pioA: gpio@fffff400 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200115 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100116 reg = <0xfffff400 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200117 interrupts = <2 4 1>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100118 #gpio-cells = <2>;
119 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100120 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100121 };
122
123 pioB: gpio@fffff600 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200124 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100125 reg = <0xfffff600 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200126 interrupts = <2 4 1>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100127 #gpio-cells = <2>;
128 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100129 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100130 };
131
132 pioC: gpio@fffff800 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200133 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100134 reg = <0xfffff800 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200135 interrupts = <3 4 1>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100136 #gpio-cells = <2>;
137 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100138 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100139 };
140
141 pioD: gpio@fffffa00 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200142 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100143 reg = <0xfffffa00 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200144 interrupts = <3 4 1>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100145 #gpio-cells = <2>;
146 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100147 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100148 };
149
150 dbgu: serial@fffff200 {
151 compatible = "atmel,at91sam9260-usart";
152 reg = <0xfffff200 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200153 interrupts = <1 4 7>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100154 status = "disabled";
155 };
156
157 usart0: serial@f801c000 {
158 compatible = "atmel,at91sam9260-usart";
159 reg = <0xf801c000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200160 interrupts = <5 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100161 atmel,use-dma-rx;
162 atmel,use-dma-tx;
163 status = "disabled";
164 };
165
166 usart1: serial@f8020000 {
167 compatible = "atmel,at91sam9260-usart";
168 reg = <0xf8020000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200169 interrupts = <6 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100170 atmel,use-dma-rx;
171 atmel,use-dma-tx;
172 status = "disabled";
173 };
174
175 usart2: serial@f8024000 {
176 compatible = "atmel,at91sam9260-usart";
177 reg = <0xf8024000 0x200>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200178 interrupts = <7 4 5>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100179 atmel,use-dma-rx;
180 atmel,use-dma-tx;
181 status = "disabled";
182 };
183
184 macb0: ethernet@f802c000 {
185 compatible = "cdns,at32ap7000-macb", "cdns,macb";
186 reg = <0xf802c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200187 interrupts = <24 4 3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100188 status = "disabled";
189 };
190
191 macb1: ethernet@f8030000 {
192 compatible = "cdns,at32ap7000-macb", "cdns,macb";
193 reg = <0xf8030000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200194 interrupts = <27 4 3>;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100195 status = "disabled";
196 };
Maxime Ripardd029f372012-05-11 15:35:39 +0200197
Ludovic Desroches05dcd362012-09-12 08:42:16 +0200198 i2c0: i2c@f8010000 {
199 compatible = "atmel,at91sam9x5-i2c";
200 reg = <0xf8010000 0x100>;
201 interrupts = <9 4 6>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 status = "disabled";
205 };
206
207 i2c1: i2c@f8014000 {
208 compatible = "atmel,at91sam9x5-i2c";
209 reg = <0xf8014000 0x100>;
210 interrupts = <10 4 6>;
211 #address-cells = <1>;
212 #size-cells = <0>;
213 status = "disabled";
214 };
215
216 i2c2: i2c@f8018000 {
217 compatible = "atmel,at91sam9x5-i2c";
218 reg = <0xf8018000 0x100>;
219 interrupts = <11 4 6>;
220 #address-cells = <1>;
221 #size-cells = <0>;
222 status = "disabled";
223 };
224
Maxime Ripardd029f372012-05-11 15:35:39 +0200225 adc0: adc@f804c000 {
226 compatible = "atmel,at91sam9260-adc";
227 reg = <0xf804c000 0x100>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200228 interrupts = <19 4 0>;
Maxime Ripardd029f372012-05-11 15:35:39 +0200229 atmel,adc-use-external;
230 atmel,adc-channels-used = <0xffff>;
231 atmel,adc-vref = <3300>;
232 atmel,adc-num-channels = <12>;
233 atmel,adc-startup-time = <40>;
234 atmel,adc-channel-base = <0x50>;
235 atmel,adc-drdy-mask = <0x1000000>;
236 atmel,adc-status-register = <0x30>;
237 atmel,adc-trigger-register = <0xc0>;
238
239 trigger@0 {
240 trigger-name = "external-rising";
241 trigger-value = <0x1>;
242 trigger-external;
243 };
244
245 trigger@1 {
246 trigger-name = "external-falling";
247 trigger-value = <0x2>;
248 trigger-external;
249 };
250
251 trigger@2 {
252 trigger-name = "external-any";
253 trigger-value = <0x3>;
254 trigger-external;
255 };
256
257 trigger@3 {
258 trigger-name = "continuous";
259 trigger-value = <0x6>;
260 };
261 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100262 };
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800263
264 nand0: nand@40000000 {
265 compatible = "atmel,at91rm9200-nand";
266 #address-cells = <1>;
267 #size-cells = <1>;
268 reg = <0x40000000 0x10000000
269 >;
270 atmel,nand-addr-offset = <21>;
271 atmel,nand-cmd-offset = <22>;
Nicolas Ferre43528082012-03-22 14:47:40 +0100272 gpios = <&pioD 5 0
273 &pioD 4 0
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800274 0
275 >;
276 status = "disabled";
277 };
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800278
279 usb0: ohci@00600000 {
280 compatible = "atmel,at91rm9200-ohci", "usb-ohci";
281 reg = <0x00600000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200282 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD6a062452011-11-21 06:55:18 +0800283 status = "disabled";
284 };
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800285
286 usb1: ehci@00700000 {
287 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
288 reg = <0x00700000 0x100000>;
Ludovic Desrochesf8a073e2012-06-20 16:13:30 +0200289 interrupts = <22 4 2>;
Jean-Christophe PLAGNIOL-VILLARD62c55532011-11-22 12:11:13 +0800290 status = "disabled";
291 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100292 };
Jean-Christophe PLAGNIOL-VILLARD10f71c22012-02-23 22:50:32 +0800293
294 i2c@0 {
295 compatible = "i2c-gpio";
296 gpios = <&pioA 30 0 /* sda */
297 &pioA 31 0 /* scl */
298 >;
299 i2c-gpio,sda-open-drain;
300 i2c-gpio,scl-open-drain;
301 i2c-gpio,delay-us = <2>; /* ~100 kHz */
302 #address-cells = <1>;
303 #size-cells = <0>;
304 status = "disabled";
305 };
306
307 i2c@1 {
308 compatible = "i2c-gpio";
309 gpios = <&pioC 0 0 /* sda */
310 &pioC 1 0 /* scl */
311 >;
312 i2c-gpio,sda-open-drain;
313 i2c-gpio,scl-open-drain;
314 i2c-gpio,delay-us = <2>; /* ~100 kHz */
315 #address-cells = <1>;
316 #size-cells = <0>;
317 status = "disabled";
318 };
319
320 i2c@2 {
321 compatible = "i2c-gpio";
322 gpios = <&pioB 4 0 /* sda */
323 &pioB 5 0 /* scl */
324 >;
325 i2c-gpio,sda-open-drain;
326 i2c-gpio,scl-open-drain;
327 i2c-gpio,delay-us = <2>; /* ~100 kHz */
328 #address-cells = <1>;
329 #size-cells = <0>;
330 status = "disabled";
331 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100332};