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Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Robin Murphyf8d54962015-07-29 19:46:04 +010026 # SWIOTLB guarantees a dma_to_phys() implementation
27 depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB)
Will Deacone1d3c0f2014-11-14 17:18:23 +000028 help
29 Enable support for the ARM long descriptor pagetable format.
30 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
31 sizes at both stage-1 and stage-2, as well as address spaces
32 up to 48-bits in size.
33
Will Deaconfe4b9912014-11-17 23:31:12 +000034config IOMMU_IO_PGTABLE_LPAE_SELFTEST
35 bool "LPAE selftests"
36 depends on IOMMU_IO_PGTABLE_LPAE
37 help
38 Enable self-tests for LPAE page table allocator. This performs
39 a series of page-table consistency checks during boot.
40
41 If unsure, say N here.
42
Will Deaconfdb1d7b2014-11-14 17:16:49 +000043endmenu
44
Robin Murphy114150d2015-01-12 17:51:13 +000045config IOMMU_IOVA
Sakari Ailus15bbdec2015-07-13 14:31:30 +030046 tristate
Robin Murphy114150d2015-01-12 17:51:13 +000047
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030048config OF_IOMMU
49 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010050 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030051
Varun Sethi695093e2013-07-15 10:20:57 +053052config FSL_PAMU
53 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010054 depends on PPC32
55 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053056 select IOMMU_API
57 select GENERIC_ALLOCATOR
58 help
59 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
60 PAMU can authorize memory access, remap the memory address, and remap I/O
61 transaction types.
62
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030063# MSM IOMMU support
64config MSM_IOMMU
65 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010066 depends on ARM
67 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010068 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030069 select IOMMU_API
70 help
71 Support for the IOMMUs found on certain Qualcomm SOCs.
72 These IOMMUs allow virtualization of the address space used by most
73 cores within the multimedia subsystem.
74
75 If unsure, say N here.
76
77config IOMMU_PGTABLES_L2
78 def_bool y
79 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030080
81# AMD IOMMU support
82config AMD_IOMMU
83 bool "AMD IOMMU support"
84 select SWIOTLB
85 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010086 select PCI_ATS
87 select PCI_PRI
88 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030089 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020090 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030091 ---help---
92 With this option you can enable support for AMD IOMMU hardware in
93 your system. An IOMMU is a hardware component which provides
94 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090095 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030096 system from misbehaving device drivers or hardware.
97
98 You can find out if your system has an AMD IOMMU if you look into
99 your BIOS for an option to enable it or if you have an IVRS ACPI
100 table.
101
102config AMD_IOMMU_STATS
103 bool "Export AMD IOMMU statistics to debugfs"
104 depends on AMD_IOMMU
105 select DEBUG_FS
106 ---help---
107 This option enables code in the AMD IOMMU driver to collect various
108 statistics about whats happening in the driver and exports that
109 information to userspace via debugfs.
110 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300111
Joerg Roedele3c495c2011-11-09 12:31:15 +0100112config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800113 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200114 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100115 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100116 ---help---
117 This option enables support for the AMD IOMMUv2 features of the IOMMU
118 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900119 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100120
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300121# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700122config DMAR_TABLE
123 bool
124
125config INTEL_IOMMU
126 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300127 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
128 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000129 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700130 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300131 help
132 DMA remapping (DMAR) devices support enables independent address
133 translations for Direct Memory Access (DMA) from devices.
134 These DMA remapping devices are reported via ACPI tables
135 and include PCI device scope covered by these DMA
136 remapping devices.
137
Suresh Siddhad3f13812011-08-23 17:05:25 -0700138config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300139 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700140 prompt "Enable Intel DMA Remapping Devices by default"
141 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300142 help
143 Selecting this option will enable a DMAR device at boot time if
144 one is found. If this option is not selected, DMAR support can
145 be enabled by passing intel_iommu=on to the kernel.
146
Suresh Siddhad3f13812011-08-23 17:05:25 -0700147config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300148 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700149 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300150 ---help---
151 Current Graphics drivers tend to use physical address
152 for DMA and avoid using DMA APIs. Setting this config
153 option permits the IOMMU driver to set a unity map for
154 all the OS-visible memory. Hence the driver can continue
155 to use physical addresses for DMA, at least until this
156 option is removed in the 2.6.32 kernel.
157
Suresh Siddhad3f13812011-08-23 17:05:25 -0700158config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300159 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700160 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300161 ---help---
162 Floppy disk drivers are known to bypass DMA API calls
163 thereby failing to work when IOMMU is enabled. This
164 workaround will setup a 1:1 mapping for the first
165 16MiB to make floppy (an ISA device) work.
166
Suresh Siddhad3f13812011-08-23 17:05:25 -0700167config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800168 bool "Support for Interrupt Remapping"
169 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700170 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300171 ---help---
172 Supports Interrupt remapping for IO-APIC and MSI devices.
173 To use x2apic mode in the CPU's which support x2APIC enhancements or
174 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200175
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300176# OMAP IOMMU support
177config OMAP_IOMMU
178 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100179 depends on ARM && MMU
180 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300181 select IOMMU_API
Gerd Hoffmann06b718c2014-11-11 09:17:00 +0100182 ---help---
183 The OMAP3 media platform drivers depend on iommu support,
184 if you need them say Y here.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300185
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300186config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500187 bool "Export OMAP IOMMU internals in DebugFS"
188 depends on OMAP_IOMMU && DEBUG_FS
189 ---help---
190 Select this to see extensive information about
191 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300192
Suman Anna61c75352014-10-22 17:22:30 -0500193 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300194
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800195config ROCKCHIP_IOMMU
196 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100197 depends on ARM
198 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800199 select IOMMU_API
200 select ARM_DMA_USE_IOMMU
201 help
202 Support for IOMMUs found on Rockchip rk32xx SOCs.
203 These IOMMUs allow virtualization of the address space used by most
204 cores within the multimedia subsystem.
205 Say Y here if you are using a Rockchip SoC that includes an IOMMU
206 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300207
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200208config TEGRA_IOMMU_GART
209 bool "Tegra GART IOMMU Support"
210 depends on ARCH_TEGRA_2x_SOC
211 select IOMMU_API
212 help
213 Enables support for remapping discontiguous physical memory
214 shared with the operating system into contiguous I/O virtual
215 space through the GART (Graphics Address Relocation Table)
216 hardware included on Tegra SoCs.
217
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200218config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200219 bool "NVIDIA Tegra SMMU Support"
220 depends on ARCH_TEGRA
221 depends on TEGRA_AHB
222 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200223 select IOMMU_API
224 help
Thierry Reding89184652014-04-16 09:24:44 +0200225 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
Thierry Reding588c43a2015-03-23 10:45:12 +0100226 SoCs (Tegra30 up to Tegra210).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200227
KyongHo Cho2a965362012-05-12 05:56:09 +0900228config EXYNOS_IOMMU
229 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100230 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900231 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530232 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900233 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530234 Support for the IOMMU (System MMU) of Samsung Exynos application
235 processor family. This enables H/W multimedia accelerators to see
236 non-linear physical memory chunks as linear memory in their
237 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900238
239 If unsure, say N here.
240
241config EXYNOS_IOMMU_DEBUG
242 bool "Debugging log for Exynos IOMMU"
243 depends on EXYNOS_IOMMU
244 help
245 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530246 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900247
Sachin Kamat5455d702014-05-22 09:50:55 +0530248 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900249
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900250config SHMOBILE_IPMMU
251 bool
252
253config SHMOBILE_IPMMU_TLB
254 bool
255
256config SHMOBILE_IOMMU
257 bool "IOMMU for Renesas IPMMU/IPMMUI"
258 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100259 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100260 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900261 select IOMMU_API
262 select ARM_DMA_USE_IOMMU
263 select SHMOBILE_IPMMU
264 select SHMOBILE_IPMMU_TLB
265 help
266 Support for Renesas IPMMU/IPMMUI. This option enables
267 remapping of DMA memory accesses from all of the IP blocks
268 on the ICB.
269
270 Warning: Drivers (including userspace drivers of UIO
271 devices) of the IP blocks on the ICB *must* use addresses
272 allocated from the IPMMU (iova) for DMA with this option
273 enabled.
274
275 If unsure, say N.
276
277choice
278 prompt "IPMMU/IPMMUI address space size"
279 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
280 depends on SHMOBILE_IOMMU
281 help
282 This option sets IPMMU/IPMMUI address space size by
283 adjusting the 1st level page table size. The page table size
284 is calculated as follows:
285
286 page table size = number of page table entries * 4 bytes
287 number of page table entries = address space size / 1 MiB
288
289 For example, when the address space size is 2048 MiB, the
290 1st level page table size is 8192 bytes.
291
292 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
293 bool "2 GiB"
294
295 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
296 bool "1 GiB"
297
298 config SHMOBILE_IOMMU_ADDRSIZE_512MB
299 bool "512 MiB"
300
301 config SHMOBILE_IOMMU_ADDRSIZE_256MB
302 bool "256 MiB"
303
304 config SHMOBILE_IOMMU_ADDRSIZE_128MB
305 bool "128 MiB"
306
307 config SHMOBILE_IOMMU_ADDRSIZE_64MB
308 bool "64 MiB"
309
310 config SHMOBILE_IOMMU_ADDRSIZE_32MB
311 bool "32 MiB"
312
313endchoice
314
315config SHMOBILE_IOMMU_L1SIZE
316 int
317 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
318 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
319 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
320 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
321 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
322 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
323 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
324
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200325config IPMMU_VMSA
326 bool "Renesas VMSA-compatible IPMMU"
327 depends on ARM_LPAE
328 depends on ARCH_SHMOBILE || COMPILE_TEST
329 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200330 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200331 select ARM_DMA_USE_IOMMU
332 help
333 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
334 R-Mobile APE6 and R-Car H2/M2 SoCs.
335
336 If unsure, say N.
337
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000338config SPAPR_TCE_IOMMU
339 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000340 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000341 select IOMMU_API
342 help
343 Enables bits of IOMMU API required by VFIO. The iommu_ops
344 is not implemented as it is not necessary for VFIO.
345
Will Deacon48ec83b2015-05-27 17:25:59 +0100346# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100347config ARM_SMMU
348 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100349 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100350 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000351 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100352 select ARM_DMA_USE_IOMMU if ARM
353 help
354 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000355 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100356
357 Say Y here if your SoC includes an IOMMU device implementing
358 the ARM SMMU architecture.
359
Will Deacon48ec83b2015-05-27 17:25:59 +0100360config ARM_SMMU_V3
361 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
362 depends on ARM64 && PCI
363 select IOMMU_API
364 select IOMMU_IO_PGTABLE_LPAE
365 help
366 Support for implementations of the ARM System MMU architecture
367 version 3 providing translation support to a PCIe root complex.
368
369 Say Y here if your system includes an IOMMU device implementing
370 the ARM SMMUv3 architecture.
371
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300372endif # IOMMU_SUPPORT