blob: 7414f33acfbadebd000444e7e955cbf7049c0054 [file] [log] [blame]
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +01007 depends on MMU
Joerg Roedel68255b62011-06-14 15:51:54 +02008 default y
9 ---help---
10 Say Y here if you want to compile device drivers for IO Memory
11 Management Units into the kernel. These devices usually allow to
12 remap DMA requests and/or remap interrupts from other devices on the
13 system.
14
15if IOMMU_SUPPORT
16
Will Deaconfdb1d7b2014-11-14 17:16:49 +000017menu "Generic IOMMU Pagetable Support"
18
19# Selected by the actual pagetable implementations
20config IOMMU_IO_PGTABLE
21 bool
22
Will Deacone1d3c0f2014-11-14 17:18:23 +000023config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE
Robin Murphyf8d54962015-07-29 19:46:04 +010026 # SWIOTLB guarantees a dma_to_phys() implementation
27 depends on ARM || ARM64 || (COMPILE_TEST && SWIOTLB)
Will Deacone1d3c0f2014-11-14 17:18:23 +000028 help
29 Enable support for the ARM long descriptor pagetable format.
30 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
31 sizes at both stage-1 and stage-2, as well as address spaces
32 up to 48-bits in size.
33
Will Deaconfe4b9912014-11-17 23:31:12 +000034config IOMMU_IO_PGTABLE_LPAE_SELFTEST
35 bool "LPAE selftests"
36 depends on IOMMU_IO_PGTABLE_LPAE
37 help
38 Enable self-tests for LPAE page table allocator. This performs
39 a series of page-table consistency checks during boot.
40
41 If unsure, say N here.
42
Will Deaconfdb1d7b2014-11-14 17:16:49 +000043endmenu
44
Robin Murphy114150d2015-01-12 17:51:13 +000045config IOMMU_IOVA
Sakari Ailus15bbdec2015-07-13 14:31:30 +030046 tristate
Robin Murphy114150d2015-01-12 17:51:13 +000047
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030048config OF_IOMMU
49 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010050 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030051
Robin Murphy0db2e5d2015-10-01 20:13:58 +010052# IOMMU-agnostic DMA-mapping layer
53config IOMMU_DMA
54 bool
55 depends on NEED_SG_DMA_LENGTH
56 select IOMMU_API
57 select IOMMU_IOVA
58
Varun Sethi695093e2013-07-15 10:20:57 +053059config FSL_PAMU
60 bool "Freescale IOMMU support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010061 depends on PPC32
62 depends on PPC_E500MC || COMPILE_TEST
Varun Sethi695093e2013-07-15 10:20:57 +053063 select IOMMU_API
64 select GENERIC_ALLOCATOR
65 help
66 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
67 PAMU can authorize memory access, remap the memory address, and remap I/O
68 transaction types.
69
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030070# MSM IOMMU support
71config MSM_IOMMU
72 bool "MSM IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +010073 depends on ARM
74 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
Thierry Redinga3f447a2015-02-06 11:44:08 +010075 depends on BROKEN
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030076 select IOMMU_API
77 help
78 Support for the IOMMUs found on certain Qualcomm SOCs.
79 These IOMMUs allow virtualization of the address space used by most
80 cores within the multimedia subsystem.
81
82 If unsure, say N here.
83
84config IOMMU_PGTABLES_L2
85 def_bool y
86 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030087
88# AMD IOMMU support
89config AMD_IOMMU
90 bool "AMD IOMMU support"
91 select SWIOTLB
92 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010093 select PCI_ATS
94 select PCI_PRI
95 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030096 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020097 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030098 ---help---
99 With this option you can enable support for AMD IOMMU hardware in
100 your system. An IOMMU is a hardware component which provides
101 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +0900102 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +0300103 system from misbehaving device drivers or hardware.
104
105 You can find out if your system has an AMD IOMMU if you look into
106 your BIOS for an option to enable it or if you have an IVRS ACPI
107 table.
108
109config AMD_IOMMU_STATS
110 bool "Export AMD IOMMU statistics to debugfs"
111 depends on AMD_IOMMU
112 select DEBUG_FS
113 ---help---
114 This option enables code in the AMD IOMMU driver to collect various
115 statistics about whats happening in the driver and exports that
116 information to userspace via debugfs.
117 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300118
Joerg Roedele3c495c2011-11-09 12:31:15 +0100119config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800120 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200121 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100122 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100123 ---help---
124 This option enables support for the AMD IOMMUv2 features of the IOMMU
125 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900126 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100127
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300128# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700129config DMAR_TABLE
130 bool
131
132config INTEL_IOMMU
133 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300134 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
135 select IOMMU_API
Robin Murphy114150d2015-01-12 17:51:13 +0000136 select IOMMU_IOVA
Suresh Siddhad3f13812011-08-23 17:05:25 -0700137 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300138 help
139 DMA remapping (DMAR) devices support enables independent address
140 translations for Direct Memory Access (DMA) from devices.
141 These DMA remapping devices are reported via ACPI tables
142 and include PCI device scope covered by these DMA
143 remapping devices.
144
Suresh Siddhad3f13812011-08-23 17:05:25 -0700145config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300146 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700147 prompt "Enable Intel DMA Remapping Devices by default"
148 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300149 help
150 Selecting this option will enable a DMAR device at boot time if
151 one is found. If this option is not selected, DMAR support can
152 be enabled by passing intel_iommu=on to the kernel.
153
Suresh Siddhad3f13812011-08-23 17:05:25 -0700154config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300155 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700156 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300157 ---help---
158 Current Graphics drivers tend to use physical address
159 for DMA and avoid using DMA APIs. Setting this config
160 option permits the IOMMU driver to set a unity map for
161 all the OS-visible memory. Hence the driver can continue
162 to use physical addresses for DMA, at least until this
163 option is removed in the 2.6.32 kernel.
164
Suresh Siddhad3f13812011-08-23 17:05:25 -0700165config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300166 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700167 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300168 ---help---
169 Floppy disk drivers are known to bypass DMA API calls
170 thereby failing to work when IOMMU is enabled. This
171 workaround will setup a 1:1 mapping for the first
172 16MiB to make floppy (an ISA device) work.
173
Suresh Siddhad3f13812011-08-23 17:05:25 -0700174config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800175 bool "Support for Interrupt Remapping"
176 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700177 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300178 ---help---
179 Supports Interrupt remapping for IO-APIC and MSI devices.
180 To use x2apic mode in the CPU's which support x2APIC enhancements or
181 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200182
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300183# OMAP IOMMU support
184config OMAP_IOMMU
185 bool "OMAP IOMMU Support"
Joerg Roedel477ab7a2015-01-20 16:13:33 +0100186 depends on ARM && MMU
187 depends on ARCH_OMAP2PLUS || COMPILE_TEST
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300188 select IOMMU_API
Gerd Hoffmann06b718c2014-11-11 09:17:00 +0100189 ---help---
190 The OMAP3 media platform drivers depend on iommu support,
191 if you need them say Y here.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300192
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300193config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500194 bool "Export OMAP IOMMU internals in DebugFS"
195 depends on OMAP_IOMMU && DEBUG_FS
196 ---help---
197 Select this to see extensive information about
198 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300199
Suman Anna61c75352014-10-22 17:22:30 -0500200 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300201
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800202config ROCKCHIP_IOMMU
203 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100204 depends on ARM
205 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800206 select IOMMU_API
207 select ARM_DMA_USE_IOMMU
208 help
209 Support for IOMMUs found on Rockchip rk32xx SOCs.
210 These IOMMUs allow virtualization of the address space used by most
211 cores within the multimedia subsystem.
212 Say Y here if you are using a Rockchip SoC that includes an IOMMU
213 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300214
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200215config TEGRA_IOMMU_GART
216 bool "Tegra GART IOMMU Support"
217 depends on ARCH_TEGRA_2x_SOC
218 select IOMMU_API
219 help
220 Enables support for remapping discontiguous physical memory
221 shared with the operating system into contiguous I/O virtual
222 space through the GART (Graphics Address Relocation Table)
223 hardware included on Tegra SoCs.
224
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200225config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200226 bool "NVIDIA Tegra SMMU Support"
227 depends on ARCH_TEGRA
228 depends on TEGRA_AHB
229 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200230 select IOMMU_API
231 help
Thierry Reding89184652014-04-16 09:24:44 +0200232 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
Thierry Reding588c43a2015-03-23 10:45:12 +0100233 SoCs (Tegra30 up to Tegra210).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200234
KyongHo Cho2a965362012-05-12 05:56:09 +0900235config EXYNOS_IOMMU
236 bool "Exynos IOMMU Support"
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100237 depends on ARCH_EXYNOS && ARM && MMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900238 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530239 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900240 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530241 Support for the IOMMU (System MMU) of Samsung Exynos application
242 processor family. This enables H/W multimedia accelerators to see
243 non-linear physical memory chunks as linear memory in their
244 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900245
246 If unsure, say N here.
247
248config EXYNOS_IOMMU_DEBUG
249 bool "Debugging log for Exynos IOMMU"
250 depends on EXYNOS_IOMMU
251 help
252 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530253 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900254
Sachin Kamat5455d702014-05-22 09:50:55 +0530255 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900256
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900257config SHMOBILE_IPMMU
258 bool
259
260config SHMOBILE_IPMMU_TLB
261 bool
262
263config SHMOBILE_IOMMU
264 bool "IOMMU for Renesas IPMMU/IPMMUI"
265 default n
Arnd Bergmanne5144c92015-01-28 15:45:53 +0100266 depends on ARM && MMU
Paul Bolleb8354432014-02-08 22:21:54 +0100267 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900268 select IOMMU_API
269 select ARM_DMA_USE_IOMMU
270 select SHMOBILE_IPMMU
271 select SHMOBILE_IPMMU_TLB
272 help
273 Support for Renesas IPMMU/IPMMUI. This option enables
274 remapping of DMA memory accesses from all of the IP blocks
275 on the ICB.
276
277 Warning: Drivers (including userspace drivers of UIO
278 devices) of the IP blocks on the ICB *must* use addresses
279 allocated from the IPMMU (iova) for DMA with this option
280 enabled.
281
282 If unsure, say N.
283
284choice
285 prompt "IPMMU/IPMMUI address space size"
286 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
287 depends on SHMOBILE_IOMMU
288 help
289 This option sets IPMMU/IPMMUI address space size by
290 adjusting the 1st level page table size. The page table size
291 is calculated as follows:
292
293 page table size = number of page table entries * 4 bytes
294 number of page table entries = address space size / 1 MiB
295
296 For example, when the address space size is 2048 MiB, the
297 1st level page table size is 8192 bytes.
298
299 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
300 bool "2 GiB"
301
302 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
303 bool "1 GiB"
304
305 config SHMOBILE_IOMMU_ADDRSIZE_512MB
306 bool "512 MiB"
307
308 config SHMOBILE_IOMMU_ADDRSIZE_256MB
309 bool "256 MiB"
310
311 config SHMOBILE_IOMMU_ADDRSIZE_128MB
312 bool "128 MiB"
313
314 config SHMOBILE_IOMMU_ADDRSIZE_64MB
315 bool "64 MiB"
316
317 config SHMOBILE_IOMMU_ADDRSIZE_32MB
318 bool "32 MiB"
319
320endchoice
321
322config SHMOBILE_IOMMU_L1SIZE
323 int
324 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
325 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
326 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
327 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
328 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
329 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
330 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
331
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200332config IPMMU_VMSA
333 bool "Renesas VMSA-compatible IPMMU"
334 depends on ARM_LPAE
335 depends on ARCH_SHMOBILE || COMPILE_TEST
336 select IOMMU_API
Laurent Pinchartf20ed392015-01-20 18:30:04 +0200337 select IOMMU_IO_PGTABLE_LPAE
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200338 select ARM_DMA_USE_IOMMU
339 help
340 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
341 R-Mobile APE6 and R-Car H2/M2 SoCs.
342
343 If unsure, say N.
344
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000345config SPAPR_TCE_IOMMU
346 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000347 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000348 select IOMMU_API
349 help
350 Enables bits of IOMMU API required by VFIO. The iommu_ops
351 is not implemented as it is not necessary for VFIO.
352
Will Deacon48ec83b2015-05-27 17:25:59 +0100353# ARM IOMMU support
Will Deacon45ae7cf2013-06-24 18:31:25 +0100354config ARM_SMMU
355 bool "ARM Ltd. System MMU (SMMU) Support"
Joerg Roedela20cc762015-02-04 16:53:44 +0100356 depends on (ARM64 || ARM) && MMU
Will Deacon45ae7cf2013-06-24 18:31:25 +0100357 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000358 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100359 select ARM_DMA_USE_IOMMU if ARM
360 help
361 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000362 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100363
364 Say Y here if your SoC includes an IOMMU device implementing
365 the ARM SMMU architecture.
366
Will Deacon48ec83b2015-05-27 17:25:59 +0100367config ARM_SMMU_V3
368 bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support"
369 depends on ARM64 && PCI
370 select IOMMU_API
371 select IOMMU_IO_PGTABLE_LPAE
372 help
373 Support for implementations of the ARM System MMU architecture
374 version 3 providing translation support to a PCIe root complex.
375
376 Say Y here if your system includes an IOMMU device implementing
377 the ARM SMMUv3 architecture.
378
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300379endif # IOMMU_SUPPORT