Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1 | /* Copyright (c) 2017, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include "skeleton64.dtsi" |
| 14 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 15 | #include <dt-bindings/clock/qcom,gcc-sdm845.h> |
| 16 | #include <dt-bindings/clock/qcom,camcc-sdm845.h> |
| 17 | #include <dt-bindings/clock/qcom,dispcc-sdm845.h> |
| 18 | #include <dt-bindings/clock/qcom,gpucc-sdm845.h> |
| 19 | #include <dt-bindings/clock/qcom,videocc-sdm845.h> |
| 20 | #include <dt-bindings/clock/qcom,cpucc-sdm845.h> |
| 21 | #include <dt-bindings/clock/qcom,rpmh.h> |
Maulik Shah | c77d1d2 | 2017-06-15 14:04:50 +0530 | [diff] [blame] | 22 | #include <dt-bindings/soc/qcom,tcs-mbox.h> |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 23 | #include <dt-bindings/regulator/qcom,rpmh-regulator.h> |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 24 | |
| 25 | / { |
| 26 | model = "Qualcomm Technologies, Inc. SDM670"; |
| 27 | compatible = "qcom,sdm670"; |
| 28 | qcom,msm-id = <336 0x0>; |
Maulik Shah | 30ebbde | 2017-06-15 10:02:54 +0530 | [diff] [blame] | 29 | interrupt-parent = <&pdc>; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 30 | |
Sayali Lokhande | 099af9c | 2017-06-08 10:18:29 +0530 | [diff] [blame] | 31 | aliases { |
| 32 | ufshc1 = &ufshc_mem; /* Embedded UFS slot */ |
Vijay Viswanath | eac7272 | 2017-06-05 11:01:38 +0530 | [diff] [blame] | 33 | sdhc1 = &sdhc_1; /* SDC1 eMMC slot */ |
Sayali Lokhande | 099af9c | 2017-06-08 10:18:29 +0530 | [diff] [blame] | 34 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 35 | |
Mukesh Kumar Savaliya | 7b27254 | 2017-07-10 19:35:29 +0530 | [diff] [blame] | 36 | aliases { |
| 37 | serial0 = &qupv3_se12_2uart; |
| 38 | spi0 = &qupv3_se8_spi; |
| 39 | i2c0 = &qupv3_se10_i2c; |
| 40 | i2c1 = &qupv3_se3_i2c; |
| 41 | hsuart0 = &qupv3_se6_4uart; |
| 42 | }; |
| 43 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 44 | cpus { |
| 45 | #address-cells = <2>; |
| 46 | #size-cells = <0>; |
| 47 | |
| 48 | CPU0: cpu@0 { |
| 49 | device_type = "cpu"; |
| 50 | compatible = "arm,armv8"; |
| 51 | reg = <0x0 0x0>; |
| 52 | enable-method = "psci"; |
| 53 | efficiency = <1024>; |
| 54 | cache-size = <0x8000>; |
| 55 | cpu-release-addr = <0x0 0x90000000>; |
| 56 | next-level-cache = <&L2_0>; |
| 57 | L2_0: l2-cache { |
| 58 | compatible = "arm,arch-cache"; |
| 59 | cache-size = <0x20000>; |
| 60 | cache-level = <2>; |
| 61 | next-level-cache = <&L3_0>; |
| 62 | L3_0: l3-cache { |
| 63 | compatible = "arm,arch-cache"; |
| 64 | cache-size = <0x100000>; |
| 65 | cache-level = <3>; |
| 66 | }; |
| 67 | }; |
| 68 | L1_I_0: l1-icache { |
| 69 | compatible = "arm,arch-cache"; |
| 70 | qcom,dump-size = <0x9000>; |
| 71 | }; |
| 72 | L1_D_0: l1-dcache { |
| 73 | compatible = "arm,arch-cache"; |
| 74 | qcom,dump-size = <0x9000>; |
| 75 | }; |
| 76 | }; |
| 77 | |
| 78 | CPU1: cpu@100 { |
| 79 | device_type = "cpu"; |
| 80 | compatible = "arm,armv8"; |
| 81 | reg = <0x0 0x100>; |
| 82 | enable-method = "psci"; |
| 83 | efficiency = <1024>; |
| 84 | cache-size = <0x8000>; |
| 85 | cpu-release-addr = <0x0 0x90000000>; |
| 86 | next-level-cache = <&L2_100>; |
| 87 | L2_100: l2-cache { |
| 88 | compatible = "arm,arch-cache"; |
| 89 | cache-size = <0x20000>; |
| 90 | cache-level = <2>; |
| 91 | next-level-cache = <&L3_0>; |
| 92 | }; |
| 93 | L1_I_100: l1-icache { |
| 94 | compatible = "arm,arch-cache"; |
| 95 | qcom,dump-size = <0x9000>; |
| 96 | }; |
| 97 | L1_D_100: l1-dcache { |
| 98 | compatible = "arm,arch-cache"; |
| 99 | qcom,dump-size = <0x9000>; |
| 100 | }; |
| 101 | }; |
| 102 | |
| 103 | CPU2: cpu@200 { |
| 104 | device_type = "cpu"; |
| 105 | compatible = "arm,armv8"; |
| 106 | reg = <0x0 0x200>; |
| 107 | enable-method = "psci"; |
| 108 | efficiency = <1024>; |
| 109 | cache-size = <0x8000>; |
| 110 | cpu-release-addr = <0x0 0x90000000>; |
| 111 | next-level-cache = <&L2_200>; |
| 112 | L2_200: l2-cache { |
| 113 | compatible = "arm,arch-cache"; |
| 114 | cache-size = <0x20000>; |
| 115 | cache-level = <2>; |
| 116 | next-level-cache = <&L3_0>; |
| 117 | }; |
| 118 | L1_I_200: l1-icache { |
| 119 | compatible = "arm,arch-cache"; |
| 120 | qcom,dump-size = <0x9000>; |
| 121 | }; |
| 122 | L1_D_200: l1-dcache { |
| 123 | compatible = "arm,arch-cache"; |
| 124 | qcom,dump-size = <0x9000>; |
| 125 | }; |
| 126 | }; |
| 127 | |
| 128 | CPU3: cpu@300 { |
| 129 | device_type = "cpu"; |
| 130 | compatible = "arm,armv8"; |
| 131 | reg = <0x0 0x300>; |
| 132 | enable-method = "psci"; |
| 133 | efficiency = <1024>; |
| 134 | cache-size = <0x8000>; |
| 135 | cpu-release-addr = <0x0 0x90000000>; |
| 136 | next-level-cache = <&L2_300>; |
| 137 | L2_300: l2-cache { |
| 138 | compatible = "arm,arch-cache"; |
| 139 | cache-size = <0x20000>; |
| 140 | cache-level = <2>; |
| 141 | next-level-cache = <&L3_0>; |
| 142 | }; |
| 143 | L1_I_300: l1-icache { |
| 144 | compatible = "arm,arch-cache"; |
| 145 | qcom,dump-size = <0x9000>; |
| 146 | }; |
| 147 | L1_D_300: l1-dcache { |
| 148 | compatible = "arm,arch-cache"; |
| 149 | qcom,dump-size = <0x9000>; |
| 150 | }; |
| 151 | }; |
| 152 | |
| 153 | CPU4: cpu@400 { |
| 154 | device_type = "cpu"; |
| 155 | compatible = "arm,armv8"; |
| 156 | reg = <0x0 0x400>; |
| 157 | enable-method = "psci"; |
| 158 | efficiency = <1024>; |
| 159 | cache-size = <0x8000>; |
| 160 | cpu-release-addr = <0x0 0x90000000>; |
| 161 | next-level-cache = <&L2_400>; |
| 162 | L2_400: l2-cache { |
| 163 | compatible = "arm,arch-cache"; |
| 164 | cache-size = <0x20000>; |
| 165 | cache-level = <2>; |
| 166 | next-level-cache = <&L3_0>; |
| 167 | }; |
| 168 | L1_I_400: l1-icache { |
| 169 | compatible = "arm,arch-cache"; |
| 170 | qcom,dump-size = <0x9000>; |
| 171 | }; |
| 172 | L1_D_400: l1-dcache { |
| 173 | compatible = "arm,arch-cache"; |
| 174 | qcom,dump-size = <0x9000>; |
| 175 | }; |
| 176 | }; |
| 177 | |
| 178 | CPU5: cpu@500 { |
| 179 | device_type = "cpu"; |
| 180 | compatible = "arm,armv8"; |
| 181 | reg = <0x0 0x500>; |
| 182 | enable-method = "psci"; |
| 183 | efficiency = <1024>; |
| 184 | cache-size = <0x8000>; |
| 185 | cpu-release-addr = <0x0 0x90000000>; |
| 186 | next-level-cache = <&L2_500>; |
| 187 | L2_500: l2-cache { |
| 188 | compatible = "arm,arch-cache"; |
| 189 | cache-size = <0x20000>; |
| 190 | cache-level = <2>; |
| 191 | next-level-cache = <&L3_0>; |
| 192 | }; |
| 193 | L1_I_500: l1-icache { |
| 194 | compatible = "arm,arch-cache"; |
| 195 | qcom,dump-size = <0x9000>; |
| 196 | }; |
| 197 | L1_D_500: l1-dcache { |
| 198 | compatible = "arm,arch-cache"; |
| 199 | qcom,dump-size = <0x9000>; |
| 200 | }; |
| 201 | }; |
| 202 | |
| 203 | CPU6: cpu@600 { |
| 204 | device_type = "cpu"; |
| 205 | compatible = "arm,armv8"; |
| 206 | reg = <0x0 0x600>; |
| 207 | enable-method = "psci"; |
| 208 | efficiency = <1740>; |
| 209 | cache-size = <0x10000>; |
| 210 | cpu-release-addr = <0x0 0x90000000>; |
| 211 | next-level-cache = <&L2_600>; |
| 212 | L2_600: l2-cache { |
| 213 | compatible = "arm,arch-cache"; |
| 214 | cache-size = <0x40000>; |
| 215 | cache-level = <2>; |
| 216 | next-level-cache = <&L3_0>; |
| 217 | }; |
| 218 | L1_I_600: l1-icache { |
| 219 | compatible = "arm,arch-cache"; |
| 220 | qcom,dump-size = <0x12000>; |
| 221 | }; |
| 222 | L1_D_600: l1-dcache { |
| 223 | compatible = "arm,arch-cache"; |
| 224 | qcom,dump-size = <0x12000>; |
| 225 | }; |
| 226 | }; |
| 227 | |
| 228 | CPU7: cpu@700 { |
| 229 | device_type = "cpu"; |
| 230 | compatible = "arm,armv8"; |
| 231 | reg = <0x0 0x700>; |
| 232 | enable-method = "psci"; |
| 233 | efficiency = <1740>; |
| 234 | cache-size = <0x10000>; |
| 235 | cpu-release-addr = <0x0 0x90000000>; |
| 236 | next-level-cache = <&L2_700>; |
| 237 | L2_700: l2-cache { |
| 238 | compatible = "arm,arch-cache"; |
| 239 | cache-size = <0x40000>; |
| 240 | cache-level = <2>; |
| 241 | next-level-cache = <&L3_0>; |
| 242 | }; |
| 243 | L1_I_700: l1-icache { |
| 244 | compatible = "arm,arch-cache"; |
| 245 | qcom,dump-size = <0x12000>; |
| 246 | }; |
| 247 | L1_D_700: l1-dcache { |
| 248 | compatible = "arm,arch-cache"; |
| 249 | qcom,dump-size = <0x12000>; |
| 250 | }; |
| 251 | }; |
| 252 | |
| 253 | cpu-map { |
| 254 | cluster0 { |
| 255 | core0 { |
| 256 | cpu = <&CPU0>; |
| 257 | }; |
| 258 | |
| 259 | core1 { |
| 260 | cpu = <&CPU1>; |
| 261 | }; |
| 262 | |
| 263 | core2 { |
| 264 | cpu = <&CPU2>; |
| 265 | }; |
| 266 | |
| 267 | core3 { |
| 268 | cpu = <&CPU3>; |
| 269 | }; |
| 270 | |
| 271 | core4 { |
| 272 | cpu = <&CPU4>; |
| 273 | }; |
| 274 | |
| 275 | core5 { |
| 276 | cpu = <&CPU5>; |
| 277 | }; |
| 278 | }; |
| 279 | cluster1 { |
| 280 | core0 { |
| 281 | cpu = <&CPU6>; |
| 282 | }; |
| 283 | |
| 284 | core1 { |
| 285 | cpu = <&CPU7>; |
| 286 | }; |
| 287 | }; |
| 288 | }; |
| 289 | }; |
| 290 | |
| 291 | psci { |
| 292 | compatible = "arm,psci-1.0"; |
| 293 | method = "smc"; |
| 294 | }; |
| 295 | |
| 296 | soc: soc { }; |
| 297 | |
| 298 | reserved-memory { |
| 299 | #address-cells = <2>; |
| 300 | #size-cells = <2>; |
| 301 | ranges; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 302 | |
| 303 | removed_regions: removed_regions@85700000 { |
| 304 | compatible = "removed-dma-pool"; |
| 305 | no-map; |
| 306 | reg = <0 0x85700000 0 0x3800000>; |
| 307 | }; |
| 308 | |
| 309 | pil_camera_mem: camera_region@8ab00000 { |
| 310 | compatible = "removed-dma-pool"; |
| 311 | no-map; |
| 312 | reg = <0 0x8ab00000 0 0x500000>; |
| 313 | }; |
| 314 | |
| 315 | pil_modem_mem: modem_region@8b000000 { |
| 316 | compatible = "removed-dma-pool"; |
| 317 | no-map; |
| 318 | reg = <0 0x8b000000 0 0x7e00000>; |
| 319 | }; |
| 320 | |
| 321 | pil_video_mem: pil_video_region@92e00000 { |
| 322 | compatible = "removed-dma-pool"; |
| 323 | no-map; |
| 324 | reg = <0 0x92e00000 0 0x500000>; |
| 325 | }; |
| 326 | |
| 327 | pil_cdsp_mem: cdsp_regions@93300000 { |
| 328 | compatible = "removed-dma-pool"; |
| 329 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 330 | reg = <0 0x93300000 0 0x800000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 331 | }; |
| 332 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 333 | pil_mba_mem: pil_mba_region@0x93b00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 334 | compatible = "removed-dma-pool"; |
| 335 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 336 | reg = <0 0x93b00000 0 0x200000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 337 | }; |
| 338 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 339 | pil_adsp_mem: pil_adsp_region@93d00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 340 | compatible = "removed-dma-pool"; |
| 341 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 342 | reg = <0 0x93d00000 0 0x1e00000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 343 | }; |
| 344 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 345 | pil_ipa_fw_mem: pil_ipa_fw_region@95b00000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 346 | compatible = "removed-dma-pool"; |
| 347 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 348 | reg = <0 0x95b00000 0 0x10000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 349 | }; |
| 350 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 351 | pil_ipa_gsi_mem: pil_ipa_gsi_region@95b10000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 352 | compatible = "removed-dma-pool"; |
| 353 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 354 | reg = <0 0x95b10000 0 0x5000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 355 | }; |
| 356 | |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 357 | pil_gpu_mem: pil_gpu_region@95b15000 { |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 358 | compatible = "removed-dma-pool"; |
| 359 | no-map; |
Vijayanand Jitta | 29d1a78 | 2017-07-03 15:17:09 +0530 | [diff] [blame] | 360 | reg = <0 0x95b15000 0 0x1000>; |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 361 | }; |
| 362 | |
| 363 | adsp_mem: adsp_region { |
| 364 | compatible = "shared-dma-pool"; |
| 365 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 366 | reusable; |
| 367 | alignment = <0 0x400000>; |
| 368 | size = <0 0xc00000>; |
| 369 | }; |
| 370 | |
| 371 | qseecom_mem: qseecom_region { |
| 372 | compatible = "shared-dma-pool"; |
| 373 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 374 | reusable; |
| 375 | alignment = <0 0x400000>; |
| 376 | size = <0 0x1400000>; |
| 377 | }; |
| 378 | |
| 379 | sp_mem: sp_region { /* SPSS-HLOS ION shared mem */ |
| 380 | compatible = "shared-dma-pool"; |
| 381 | alloc-ranges = <0 0x00000000 0 0xffffffff>; /* 32-bit */ |
| 382 | reusable; |
| 383 | alignment = <0 0x400000>; |
| 384 | size = <0 0x800000>; |
| 385 | }; |
| 386 | |
| 387 | secure_display_memory: secure_display_region { |
| 388 | compatible = "shared-dma-pool"; |
| 389 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 390 | reusable; |
| 391 | alignment = <0 0x400000>; |
| 392 | size = <0 0x5c00000>; |
| 393 | }; |
| 394 | |
| 395 | /* global autoconfigured region for contiguous allocations */ |
| 396 | linux,cma { |
| 397 | compatible = "shared-dma-pool"; |
| 398 | alloc-ranges = <0 0x00000000 0 0xffffffff>; |
| 399 | reusable; |
| 400 | alignment = <0 0x400000>; |
| 401 | size = <0 0x2000000>; |
| 402 | linux,cma-default; |
| 403 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 404 | }; |
| 405 | }; |
| 406 | |
Vijayanand Jitta | a1ee786 | 2017-06-07 12:06:39 +0530 | [diff] [blame] | 407 | #include "sdm670-ion.dtsi" |
| 408 | |
Dhoat Harpal | 92d63dea | 2017-06-06 21:20:26 +0530 | [diff] [blame] | 409 | #include "sdm670-smp2p.dtsi" |
| 410 | |
Mukesh Kumar Savaliya | 065ca48 | 2017-06-06 14:44:45 +0530 | [diff] [blame] | 411 | #include "sdm670-qupv3.dtsi" |
| 412 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 413 | &soc { |
| 414 | #address-cells = <1>; |
| 415 | #size-cells = <1>; |
| 416 | ranges = <0 0 0 0xffffffff>; |
| 417 | compatible = "simple-bus"; |
| 418 | |
| 419 | intc: interrupt-controller@17a00000 { |
| 420 | compatible = "arm,gic-v3"; |
| 421 | #interrupt-cells = <3>; |
| 422 | interrupt-controller; |
| 423 | #redistributor-regions = <1>; |
| 424 | redistributor-stride = <0x0 0x20000>; |
| 425 | reg = <0x17a00000 0x10000>, /* GICD */ |
| 426 | <0x17a60000 0x100000>; /* GICR * 8 */ |
| 427 | interrupts = <1 9 4>; |
Maulik Shah | 30ebbde | 2017-06-15 10:02:54 +0530 | [diff] [blame] | 428 | interrupt-parent = <&intc>; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 429 | }; |
| 430 | |
| 431 | timer { |
| 432 | compatible = "arm,armv8-timer"; |
| 433 | interrupts = <1 1 0xf08>, |
| 434 | <1 2 0xf08>, |
| 435 | <1 3 0xf08>, |
| 436 | <1 0 0xf08>; |
| 437 | clock-frequency = <19200000>; |
| 438 | }; |
| 439 | |
Lakshmi Sunkara | bbd6989 | 2017-06-09 13:17:10 +0530 | [diff] [blame] | 440 | qcom,sps { |
| 441 | compatible = "qcom,msm_sps_4k"; |
| 442 | qcom,pipe-attr-ee; |
| 443 | }; |
| 444 | |
Rama Krishna Phani A | a3c0e78 | 2017-07-17 20:09:15 +0530 | [diff] [blame] | 445 | thermal_zones: thermal-zones { |
| 446 | aoss0-usr { |
| 447 | polling-delay-passive = <0>; |
| 448 | polling-delay = <0>; |
| 449 | thermal-governor = "user_space"; |
| 450 | thermal-sensors = <&tsens0 0>; |
| 451 | trips { |
| 452 | active-config0 { |
| 453 | temperature = <125000>; |
| 454 | hysteresis = <1000>; |
| 455 | type = "passive"; |
| 456 | }; |
| 457 | }; |
| 458 | }; |
| 459 | |
| 460 | cpu0-silver-usr { |
| 461 | polling-delay-passive = <0>; |
| 462 | polling-delay = <0>; |
| 463 | thermal-governor = "user_space"; |
| 464 | thermal-sensors = <&tsens0 1>; |
| 465 | trips { |
| 466 | active-config0 { |
| 467 | temperature = <125000>; |
| 468 | hysteresis = <1000>; |
| 469 | type = "passive"; |
| 470 | }; |
| 471 | }; |
| 472 | }; |
| 473 | |
| 474 | cpu1-silver-usr { |
| 475 | polling-delay-passive = <0>; |
| 476 | polling-delay = <0>; |
| 477 | thermal-governor = "user_space"; |
| 478 | thermal-sensors = <&tsens0 2>; |
| 479 | trips { |
| 480 | active-config0 { |
| 481 | temperature = <125000>; |
| 482 | hysteresis = <1000>; |
| 483 | type = "passive"; |
| 484 | }; |
| 485 | }; |
| 486 | }; |
| 487 | |
| 488 | cpu2-silver-usr { |
| 489 | polling-delay-passive = <0>; |
| 490 | polling-delay = <0>; |
| 491 | thermal-governor = "user_space"; |
| 492 | thermal-sensors = <&tsens0 3>; |
| 493 | trips { |
| 494 | active-config0 { |
| 495 | temperature = <125000>; |
| 496 | hysteresis = <1000>; |
| 497 | type = "passive"; |
| 498 | }; |
| 499 | }; |
| 500 | }; |
| 501 | |
| 502 | cpu3-silver-usr { |
| 503 | polling-delay-passive = <0>; |
| 504 | polling-delay = <0>; |
| 505 | thermal-sensors = <&tsens0 4>; |
| 506 | thermal-governor = "user_space"; |
| 507 | trips { |
| 508 | active-config0 { |
| 509 | temperature = <125000>; |
| 510 | hysteresis = <1000>; |
| 511 | type = "passive"; |
| 512 | }; |
| 513 | }; |
| 514 | }; |
| 515 | |
| 516 | cpu4-silver-usr { |
| 517 | polling-delay-passive = <0>; |
| 518 | polling-delay = <0>; |
| 519 | thermal-sensors = <&tsens0 5>; |
| 520 | thermal-governor = "user_space"; |
| 521 | trips { |
| 522 | active-config0 { |
| 523 | temperature = <125000>; |
| 524 | hysteresis = <1000>; |
| 525 | type = "passive"; |
| 526 | }; |
| 527 | }; |
| 528 | }; |
| 529 | |
| 530 | cpu5-silver-usr { |
| 531 | polling-delay-passive = <0>; |
| 532 | polling-delay = <0>; |
| 533 | thermal-sensors = <&tsens0 6>; |
| 534 | thermal-governor = "user_space"; |
| 535 | trips { |
| 536 | active-config0 { |
| 537 | temperature = <125000>; |
| 538 | hysteresis = <1000>; |
| 539 | type = "passive"; |
| 540 | }; |
| 541 | }; |
| 542 | }; |
| 543 | |
| 544 | kryo-l3-0-usr { |
| 545 | polling-delay-passive = <0>; |
| 546 | polling-delay = <0>; |
| 547 | thermal-sensors = <&tsens0 7>; |
| 548 | thermal-governor = "user_space"; |
| 549 | trips { |
| 550 | active-config0 { |
| 551 | temperature = <125000>; |
| 552 | hysteresis = <1000>; |
| 553 | type = "passive"; |
| 554 | }; |
| 555 | }; |
| 556 | }; |
| 557 | |
| 558 | kryo-l3-1-usr { |
| 559 | polling-delay-passive = <0>; |
| 560 | polling-delay = <0>; |
| 561 | thermal-sensors = <&tsens0 8>; |
| 562 | thermal-governor = "user_space"; |
| 563 | trips { |
| 564 | active-config0 { |
| 565 | temperature = <125000>; |
| 566 | hysteresis = <1000>; |
| 567 | type = "passive"; |
| 568 | }; |
| 569 | }; |
| 570 | }; |
| 571 | |
| 572 | cpu0-gold-usr { |
| 573 | polling-delay-passive = <0>; |
| 574 | polling-delay = <0>; |
| 575 | thermal-sensors = <&tsens0 9>; |
| 576 | thermal-governor = "user_space"; |
| 577 | trips { |
| 578 | active-config0 { |
| 579 | temperature = <125000>; |
| 580 | hysteresis = <1000>; |
| 581 | type = "passive"; |
| 582 | }; |
| 583 | }; |
| 584 | }; |
| 585 | |
| 586 | cpu1-gold-usr { |
| 587 | polling-delay-passive = <0>; |
| 588 | polling-delay = <0>; |
| 589 | thermal-sensors = <&tsens0 10>; |
| 590 | thermal-governor = "user_space"; |
| 591 | trips { |
| 592 | active-config0 { |
| 593 | temperature = <125000>; |
| 594 | hysteresis = <1000>; |
| 595 | type = "passive"; |
| 596 | }; |
| 597 | }; |
| 598 | }; |
| 599 | |
| 600 | gpu0-usr { |
| 601 | polling-delay-passive = <0>; |
| 602 | polling-delay = <0>; |
| 603 | thermal-sensors = <&tsens0 11>; |
| 604 | thermal-governor = "user_space"; |
| 605 | trips { |
| 606 | active-config0 { |
| 607 | temperature = <125000>; |
| 608 | hysteresis = <1000>; |
| 609 | type = "passive"; |
| 610 | }; |
| 611 | }; |
| 612 | }; |
| 613 | |
| 614 | gpu1-usr { |
| 615 | polling-delay-passive = <0>; |
| 616 | polling-delay = <0>; |
| 617 | thermal-governor = "user_space"; |
| 618 | thermal-sensors = <&tsens0 12>; |
| 619 | trips { |
| 620 | active-config0 { |
| 621 | temperature = <125000>; |
| 622 | hysteresis = <1000>; |
| 623 | type = "passive"; |
| 624 | }; |
| 625 | }; |
| 626 | }; |
| 627 | |
| 628 | aoss1-usr { |
| 629 | polling-delay-passive = <0>; |
| 630 | polling-delay = <0>; |
| 631 | thermal-sensors = <&tsens1 0>; |
| 632 | thermal-governor = "user_space"; |
| 633 | trips { |
| 634 | active-config0 { |
| 635 | temperature = <125000>; |
| 636 | hysteresis = <1000>; |
| 637 | type = "passive"; |
| 638 | }; |
| 639 | }; |
| 640 | }; |
| 641 | |
| 642 | mdm-dsp-usr { |
| 643 | polling-delay-passive = <0>; |
| 644 | polling-delay = <0>; |
| 645 | thermal-sensors = <&tsens1 1>; |
| 646 | thermal-governor = "user_space"; |
| 647 | trips { |
| 648 | active-config0 { |
| 649 | temperature = <125000>; |
| 650 | hysteresis = <1000>; |
| 651 | type = "passive"; |
| 652 | }; |
| 653 | }; |
| 654 | }; |
| 655 | |
| 656 | ddr-usr { |
| 657 | polling-delay-passive = <0>; |
| 658 | polling-delay = <0>; |
| 659 | thermal-sensors = <&tsens1 2>; |
| 660 | thermal-governor = "user_space"; |
| 661 | trips { |
| 662 | active-config0 { |
| 663 | temperature = <125000>; |
| 664 | hysteresis = <1000>; |
| 665 | type = "passive"; |
| 666 | }; |
| 667 | }; |
| 668 | }; |
| 669 | |
| 670 | wlan-usr { |
| 671 | polling-delay-passive = <0>; |
| 672 | polling-delay = <0>; |
| 673 | thermal-sensors = <&tsens1 3>; |
| 674 | thermal-governor = "user_space"; |
| 675 | trips { |
| 676 | active-config0 { |
| 677 | temperature = <125000>; |
| 678 | hysteresis = <1000>; |
| 679 | type = "passive"; |
| 680 | }; |
| 681 | }; |
| 682 | }; |
| 683 | |
| 684 | compute-hvx-usr { |
| 685 | polling-delay-passive = <0>; |
| 686 | polling-delay = <0>; |
| 687 | thermal-sensors = <&tsens1 4>; |
| 688 | thermal-governor = "user_space"; |
| 689 | trips { |
| 690 | active-config0 { |
| 691 | temperature = <125000>; |
| 692 | hysteresis = <1000>; |
| 693 | type = "passive"; |
| 694 | }; |
| 695 | }; |
| 696 | }; |
| 697 | |
| 698 | camera-usr { |
| 699 | polling-delay-passive = <0>; |
| 700 | polling-delay = <0>; |
| 701 | thermal-sensors = <&tsens1 5>; |
| 702 | thermal-governor = "user_space"; |
| 703 | trips { |
| 704 | active-config0 { |
| 705 | temperature = <125000>; |
| 706 | hysteresis = <1000>; |
| 707 | type = "passive"; |
| 708 | }; |
| 709 | }; |
| 710 | }; |
| 711 | |
| 712 | mmss-usr { |
| 713 | polling-delay-passive = <0>; |
| 714 | polling-delay = <0>; |
| 715 | thermal-sensors = <&tsens1 6>; |
| 716 | thermal-governor = "user_space"; |
| 717 | trips { |
| 718 | active-config0 { |
| 719 | temperature = <125000>; |
| 720 | hysteresis = <1000>; |
| 721 | type = "passive"; |
| 722 | }; |
| 723 | }; |
| 724 | }; |
| 725 | |
| 726 | mdm-core-usr { |
| 727 | polling-delay-passive = <0>; |
| 728 | polling-delay = <0>; |
| 729 | thermal-sensors = <&tsens1 7>; |
| 730 | thermal-governor = "user_space"; |
| 731 | trips { |
| 732 | active-config0 { |
| 733 | temperature = <125000>; |
| 734 | hysteresis = <1000>; |
| 735 | type = "passive"; |
| 736 | }; |
| 737 | }; |
| 738 | }; |
| 739 | }; |
| 740 | |
| 741 | tsens0: tsens@c222000 { |
| 742 | compatible = "qcom,tsens24xx"; |
| 743 | reg = <0xc222000 0x4>, |
| 744 | <0xc263000 0x1ff>; |
| 745 | reg-names = "tsens_srot_physical", |
| 746 | "tsens_tm_physical"; |
| 747 | interrupts = <0 506 0>, <0 508 0>; |
| 748 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 749 | #thermal-sensor-cells = <1>; |
| 750 | }; |
| 751 | |
| 752 | tsens1: tsens@c223000 { |
| 753 | compatible = "qcom,tsens24xx"; |
| 754 | reg = <0xc223000 0x4>, |
| 755 | <0xc265000 0x1ff>; |
| 756 | reg-names = "tsens_srot_physical", |
| 757 | "tsens_tm_physical"; |
| 758 | interrupts = <0 507 0>, <0 509 0>; |
| 759 | interrupt-names = "tsens-upper-lower", "tsens-critical"; |
| 760 | #thermal-sensor-cells = <1>; |
| 761 | }; |
| 762 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 763 | timer@0x17c90000{ |
| 764 | #address-cells = <1>; |
| 765 | #size-cells = <1>; |
| 766 | ranges; |
| 767 | compatible = "arm,armv7-timer-mem"; |
| 768 | reg = <0x17c90000 0x1000>; |
| 769 | clock-frequency = <19200000>; |
| 770 | |
| 771 | frame@0x17ca0000 { |
| 772 | frame-number = <0>; |
| 773 | interrupts = <0 7 0x4>, |
| 774 | <0 6 0x4>; |
| 775 | reg = <0x17ca0000 0x1000>, |
| 776 | <0x17cb0000 0x1000>; |
| 777 | }; |
| 778 | |
| 779 | frame@17cc0000 { |
| 780 | frame-number = <1>; |
| 781 | interrupts = <0 8 0x4>; |
| 782 | reg = <0x17cc0000 0x1000>; |
| 783 | status = "disabled"; |
| 784 | }; |
| 785 | |
| 786 | frame@17cd0000 { |
| 787 | frame-number = <2>; |
| 788 | interrupts = <0 9 0x4>; |
| 789 | reg = <0x17cd0000 0x1000>; |
| 790 | status = "disabled"; |
| 791 | }; |
| 792 | |
| 793 | frame@17ce0000 { |
| 794 | frame-number = <3>; |
| 795 | interrupts = <0 10 0x4>; |
| 796 | reg = <0x17ce0000 0x1000>; |
| 797 | status = "disabled"; |
| 798 | }; |
| 799 | |
| 800 | frame@17cf0000 { |
| 801 | frame-number = <4>; |
| 802 | interrupts = <0 11 0x4>; |
| 803 | reg = <0x17cf0000 0x1000>; |
| 804 | status = "disabled"; |
| 805 | }; |
| 806 | |
| 807 | frame@17d00000 { |
| 808 | frame-number = <5>; |
| 809 | interrupts = <0 12 0x4>; |
| 810 | reg = <0x17d00000 0x1000>; |
| 811 | status = "disabled"; |
| 812 | }; |
| 813 | |
| 814 | frame@17d10000 { |
| 815 | frame-number = <6>; |
| 816 | interrupts = <0 13 0x4>; |
| 817 | reg = <0x17d10000 0x1000>; |
| 818 | status = "disabled"; |
| 819 | }; |
| 820 | }; |
| 821 | |
| 822 | restart@10ac000 { |
| 823 | compatible = "qcom,pshold"; |
| 824 | reg = <0xC264000 0x4>, |
| 825 | <0x1fd3000 0x4>; |
| 826 | reg-names = "pshold-base", "tcsr-boot-misc-detect"; |
| 827 | }; |
| 828 | |
Maulik Shah | 6bf7d5d | 2017-07-27 09:48:42 +0530 | [diff] [blame] | 829 | aop-msg-client { |
| 830 | compatible = "qcom,debugfs-qmp-client"; |
| 831 | mboxes = <&qmp_aop 0>; |
| 832 | mbox-names = "aop"; |
| 833 | }; |
| 834 | |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 835 | clock_rpmh: qcom,rpmhclk { |
| 836 | compatible = "qcom,dummycc"; |
| 837 | clock-output-names = "rpmh_clocks"; |
| 838 | #clock-cells = <1>; |
| 839 | }; |
| 840 | |
| 841 | clock_gcc: qcom,gcc@100000 { |
| 842 | compatible = "qcom,dummycc"; |
| 843 | clock-output-names = "gcc_clocks"; |
| 844 | #clock-cells = <1>; |
| 845 | #reset-cells = <1>; |
| 846 | }; |
| 847 | |
| 848 | clock_videocc: qcom,videocc@ab00000 { |
| 849 | compatible = "qcom,dummycc"; |
| 850 | clock-output-names = "videocc_clocks"; |
| 851 | #clock-cells = <1>; |
| 852 | #reset-cells = <1>; |
| 853 | }; |
| 854 | |
| 855 | clock_camcc: qcom,camcc@ad00000 { |
| 856 | compatible = "qcom,dummycc"; |
| 857 | clock-output-names = "camcc_clocks"; |
| 858 | #clock-cells = <1>; |
| 859 | #reset-cells = <1>; |
| 860 | }; |
| 861 | |
| 862 | clock_dispcc: qcom,dispcc@af00000 { |
| 863 | compatible = "qcom,dummycc"; |
| 864 | clock-output-names = "dispcc_clocks"; |
| 865 | #clock-cells = <1>; |
| 866 | #reset-cells = <1>; |
| 867 | }; |
| 868 | |
| 869 | clock_gpucc: qcom,gpucc@5090000 { |
| 870 | compatible = "qcom,dummycc"; |
| 871 | clock-output-names = "gpucc_clocks"; |
| 872 | #clock-cells = <1>; |
| 873 | #reset-cells = <1>; |
| 874 | }; |
| 875 | |
| 876 | clock_gfx: qcom,gfxcc@5090000 { |
| 877 | compatible = "qcom,dummycc"; |
| 878 | clock-output-names = "gfxcc_clocks"; |
| 879 | #clock-cells = <1>; |
| 880 | #reset-cells = <1>; |
| 881 | }; |
| 882 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 883 | clock_cpucc: qcom,cpucc { |
| 884 | compatible = "qcom,dummycc"; |
| 885 | clock-output-names = "cpucc_clocks"; |
| 886 | #clock-cells = <1>; |
| 887 | #reset-cells = <1>; |
| 888 | }; |
| 889 | |
Shrey Vijay | 6b6b3a5 | 2017-06-21 15:06:03 +0530 | [diff] [blame] | 890 | slim_aud: slim@62dc0000 { |
| 891 | cell-index = <1>; |
| 892 | compatible = "qcom,slim-ngd"; |
| 893 | reg = <0x62dc0000 0x2c000>, |
| 894 | <0x62d84000 0x2a000>; |
| 895 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 896 | interrupts = <0 163 0>, <0 164 0>; |
| 897 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
| 898 | qcom,apps-ch-pipes = <0x780000>; |
| 899 | qcom,ea-pc = <0x290>; |
| 900 | status = "disabled"; |
| 901 | }; |
| 902 | |
| 903 | slim_qca: slim@62e40000 { |
| 904 | cell-index = <3>; |
| 905 | compatible = "qcom,slim-ngd"; |
| 906 | reg = <0x62e40000 0x2c000>, |
| 907 | <0x62e04000 0x20000>; |
| 908 | reg-names = "slimbus_physical", "slimbus_bam_physical"; |
| 909 | interrupts = <0 291 0>, <0 292 0>; |
| 910 | interrupt-names = "slimbus_irq", "slimbus_bam_irq"; |
| 911 | status = "disabled"; |
| 912 | }; |
| 913 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 914 | wdog: qcom,wdt@17980000{ |
| 915 | compatible = "qcom,msm-watchdog"; |
| 916 | reg = <0x17980000 0x1000>; |
| 917 | reg-names = "wdt-base"; |
| 918 | interrupts = <0 3 0>, <0 4 0>; |
| 919 | qcom,bark-time = <11000>; |
| 920 | qcom,pet-time = <10000>; |
| 921 | qcom,ipi-ping; |
| 922 | qcom,wakeup-enable; |
| 923 | }; |
| 924 | |
| 925 | qcom,msm-rtb { |
| 926 | compatible = "qcom,msm-rtb"; |
| 927 | qcom,rtb-size = <0x100000>; |
| 928 | }; |
| 929 | |
| 930 | qcom,msm-imem@146bf000 { |
| 931 | compatible = "qcom,msm-imem"; |
| 932 | reg = <0x146bf000 0x1000>; |
| 933 | ranges = <0x0 0x146bf000 0x1000>; |
| 934 | #address-cells = <1>; |
| 935 | #size-cells = <1>; |
| 936 | |
| 937 | mem_dump_table@10 { |
| 938 | compatible = "qcom,msm-imem-mem_dump_table"; |
| 939 | reg = <0x10 8>; |
| 940 | }; |
| 941 | |
| 942 | restart_reason@65c { |
| 943 | compatible = "qcom,msm-imem-restart_reason"; |
| 944 | reg = <0x65c 4>; |
| 945 | }; |
| 946 | |
| 947 | pil@94c { |
| 948 | compatible = "qcom,msm-imem-pil"; |
| 949 | reg = <0x94c 200>; |
| 950 | }; |
| 951 | |
| 952 | kaslr_offset@6d0 { |
| 953 | compatible = "qcom,msm-imem-kaslr_offset"; |
| 954 | reg = <0x6d0 12>; |
| 955 | }; |
| 956 | }; |
| 957 | |
Rama Krishna Phani A | 2acd96a | 2017-07-03 17:12:46 +0530 | [diff] [blame] | 958 | gpi_dma0: qcom,gpi-dma@0x800000 { |
| 959 | #dma-cells = <6>; |
| 960 | compatible = "qcom,gpi-dma"; |
| 961 | reg = <0x800000 0x60000>; |
| 962 | reg-names = "gpi-top"; |
| 963 | interrupts = <0 244 0>, <0 245 0>, <0 246 0>, <0 247 0>, |
| 964 | <0 248 0>, <0 249 0>, <0 250 0>, <0 251 0>, |
| 965 | <0 252 0>, <0 253 0>, <0 254 0>, <0 255 0>, |
| 966 | <0 256 0>; |
| 967 | qcom,max-num-gpii = <13>; |
| 968 | qcom,gpii-mask = <0xfa>; |
| 969 | qcom,ev-factor = <2>; |
| 970 | iommus = <&apps_smmu 0x0016 0x0>; |
| 971 | status = "ok"; |
| 972 | }; |
| 973 | |
| 974 | gpi_dma1: qcom,gpi-dma@0xa00000 { |
| 975 | #dma-cells = <6>; |
| 976 | compatible = "qcom,gpi-dma"; |
| 977 | reg = <0xa00000 0x60000>; |
| 978 | reg-names = "gpi-top"; |
| 979 | interrupts = <0 279 0>, <0 280 0>, <0 281 0>, <0 282 0>, |
| 980 | <0 283 0>, <0 284 0>, <0 293 0>, <0 294 0>, |
| 981 | <0 295 0>, <0 296 0>, <0 297 0>, <0 298 0>, |
| 982 | <0 299 0>; |
| 983 | qcom,max-num-gpii = <13>; |
| 984 | qcom,gpii-mask = <0xfa>; |
| 985 | qcom,ev-factor = <2>; |
| 986 | iommus = <&apps_smmu 0x06d6 0x0>; |
| 987 | status = "ok"; |
| 988 | }; |
| 989 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 990 | cpuss_dump { |
| 991 | compatible = "qcom,cpuss-dump"; |
| 992 | qcom,l1_i_cache0 { |
| 993 | qcom,dump-node = <&L1_I_0>; |
| 994 | qcom,dump-id = <0x60>; |
| 995 | }; |
| 996 | qcom,l1_i_cache1 { |
| 997 | qcom,dump-node = <&L1_I_100>; |
| 998 | qcom,dump-id = <0x61>; |
| 999 | }; |
| 1000 | qcom,l1_i_cache2 { |
| 1001 | qcom,dump-node = <&L1_I_200>; |
| 1002 | qcom,dump-id = <0x62>; |
| 1003 | }; |
| 1004 | qcom,l1_i_cache3 { |
| 1005 | qcom,dump-node = <&L1_I_300>; |
| 1006 | qcom,dump-id = <0x63>; |
| 1007 | }; |
| 1008 | qcom,l1_i_cache100 { |
| 1009 | qcom,dump-node = <&L1_I_400>; |
| 1010 | qcom,dump-id = <0x64>; |
| 1011 | }; |
| 1012 | qcom,l1_i_cache101 { |
| 1013 | qcom,dump-node = <&L1_I_500>; |
| 1014 | qcom,dump-id = <0x65>; |
| 1015 | }; |
| 1016 | qcom,l1_i_cache102 { |
| 1017 | qcom,dump-node = <&L1_I_600>; |
| 1018 | qcom,dump-id = <0x66>; |
| 1019 | }; |
| 1020 | qcom,l1_i_cache103 { |
| 1021 | qcom,dump-node = <&L1_I_700>; |
| 1022 | qcom,dump-id = <0x67>; |
| 1023 | }; |
| 1024 | qcom,l1_d_cache0 { |
| 1025 | qcom,dump-node = <&L1_D_0>; |
| 1026 | qcom,dump-id = <0x80>; |
| 1027 | }; |
| 1028 | qcom,l1_d_cache1 { |
| 1029 | qcom,dump-node = <&L1_D_100>; |
| 1030 | qcom,dump-id = <0x81>; |
| 1031 | }; |
| 1032 | qcom,l1_d_cache2 { |
| 1033 | qcom,dump-node = <&L1_D_200>; |
| 1034 | qcom,dump-id = <0x82>; |
| 1035 | }; |
| 1036 | qcom,l1_d_cache3 { |
| 1037 | qcom,dump-node = <&L1_D_300>; |
| 1038 | qcom,dump-id = <0x83>; |
| 1039 | }; |
| 1040 | qcom,l1_d_cache100 { |
| 1041 | qcom,dump-node = <&L1_D_400>; |
| 1042 | qcom,dump-id = <0x84>; |
| 1043 | }; |
| 1044 | qcom,l1_d_cache101 { |
| 1045 | qcom,dump-node = <&L1_D_500>; |
| 1046 | qcom,dump-id = <0x85>; |
| 1047 | }; |
| 1048 | qcom,l1_d_cache102 { |
| 1049 | qcom,dump-node = <&L1_D_600>; |
| 1050 | qcom,dump-id = <0x86>; |
| 1051 | }; |
| 1052 | qcom,l1_d_cache103 { |
| 1053 | qcom,dump-node = <&L1_D_700>; |
| 1054 | qcom,dump-id = <0x87>; |
| 1055 | }; |
Lingutla Chandrasekhar | ee4f187 | 2017-06-07 13:50:53 +0530 | [diff] [blame] | 1056 | qcom,llcc1_d_cache { |
| 1057 | qcom,dump-node = <&LLCC_1>; |
| 1058 | qcom,dump-id = <0x140>; |
| 1059 | }; |
| 1060 | qcom,llcc2_d_cache { |
| 1061 | qcom,dump-node = <&LLCC_2>; |
| 1062 | qcom,dump-id = <0x141>; |
| 1063 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1064 | }; |
| 1065 | |
| 1066 | kryo3xx-erp { |
| 1067 | compatible = "arm,arm64-kryo3xx-cpu-erp"; |
| 1068 | interrupts = <1 6 4>, |
| 1069 | <1 7 4>, |
| 1070 | <0 34 4>, |
| 1071 | <0 35 4>; |
| 1072 | |
| 1073 | interrupt-names = "l1-l2-faultirq", |
| 1074 | "l1-l2-errirq", |
| 1075 | "l3-scu-errirq", |
| 1076 | "l3-scu-faultirq"; |
| 1077 | }; |
| 1078 | |
Dhoat Harpal | a24cb2c | 2017-06-06 20:39:54 +0530 | [diff] [blame] | 1079 | qcom,ipc-spinlock@1f40000 { |
| 1080 | compatible = "qcom,ipc-spinlock-sfpb"; |
| 1081 | reg = <0x1f40000 0x8000>; |
| 1082 | qcom,num-locks = <8>; |
| 1083 | }; |
| 1084 | |
Dhoat Harpal | dd9bfaf | 2017-06-06 20:43:16 +0530 | [diff] [blame] | 1085 | qcom,smem@86000000 { |
| 1086 | compatible = "qcom,smem"; |
| 1087 | reg = <0x86000000 0x200000>, |
| 1088 | <0x17911008 0x4>, |
| 1089 | <0x778000 0x7000>, |
| 1090 | <0x1fd4000 0x8>; |
| 1091 | reg-names = "smem", "irq-reg-base", "aux-mem1", |
| 1092 | "smem_targ_info_reg"; |
| 1093 | qcom,mpu-enabled; |
| 1094 | }; |
| 1095 | |
Dhoat Harpal | ebc9e56 | 2017-07-30 20:53:03 +0530 | [diff] [blame] | 1096 | qmp_aop: qcom,qmp-aop@c300000 { |
Dhoat Harpal | 5f909ef | 2017-06-09 21:18:00 +0530 | [diff] [blame] | 1097 | compatible = "qcom,qmp-mbox"; |
| 1098 | label = "aop"; |
| 1099 | reg = <0xc300000 0x100000>, |
| 1100 | <0x1799000c 0x4>; |
| 1101 | reg-names = "msgram", "irq-reg-base"; |
| 1102 | qcom,irq-mask = <0x1>; |
| 1103 | interrupts = <0 389 1>; |
Dhoat Harpal | ebc9e56 | 2017-07-30 20:53:03 +0530 | [diff] [blame] | 1104 | priority = <0>; |
Dhoat Harpal | 5f909ef | 2017-06-09 21:18:00 +0530 | [diff] [blame] | 1105 | mbox-desc-offset = <0x0>; |
| 1106 | #mbox-cells = <1>; |
| 1107 | }; |
| 1108 | |
Dhoat Harpal | 466ffcc | 2017-06-06 20:54:51 +0530 | [diff] [blame] | 1109 | qcom,glink-smem-native-xprt-modem@86000000 { |
| 1110 | compatible = "qcom,glink-smem-native-xprt"; |
| 1111 | reg = <0x86000000 0x200000>, |
| 1112 | <0x1799000c 0x4>; |
| 1113 | reg-names = "smem", "irq-reg-base"; |
| 1114 | qcom,irq-mask = <0x1000>; |
| 1115 | interrupts = <GIC_SPI 449 IRQ_TYPE_EDGE_RISING>; |
| 1116 | label = "mpss"; |
| 1117 | }; |
| 1118 | |
| 1119 | qcom,glink-smem-native-xprt-adsp@86000000 { |
| 1120 | compatible = "qcom,glink-smem-native-xprt"; |
| 1121 | reg = <0x86000000 0x200000>, |
| 1122 | <0x1799000c 0x4>; |
| 1123 | reg-names = "smem", "irq-reg-base"; |
Dhoat Harpal | 3adebbe | 2017-07-06 15:59:13 +0530 | [diff] [blame] | 1124 | qcom,irq-mask = <0x1000000>; |
| 1125 | interrupts = <GIC_SPI 170 IRQ_TYPE_EDGE_RISING>; |
Dhoat Harpal | 466ffcc | 2017-06-06 20:54:51 +0530 | [diff] [blame] | 1126 | label = "lpass"; |
| 1127 | qcom,qos-config = <&glink_qos_adsp>; |
| 1128 | qcom,ramp-time = <0xaf>; |
| 1129 | }; |
| 1130 | |
| 1131 | glink_qos_adsp: qcom,glink-qos-config-adsp { |
| 1132 | compatible = "qcom,glink-qos-config"; |
| 1133 | qcom,flow-info = <0x3c 0x0>, |
| 1134 | <0x3c 0x0>, |
| 1135 | <0x3c 0x0>, |
| 1136 | <0x3c 0x0>; |
| 1137 | qcom,mtu-size = <0x800>; |
| 1138 | qcom,tput-stats-cycle = <0xa>; |
| 1139 | }; |
| 1140 | |
| 1141 | glink_spi_xprt_wdsp: qcom,glink-spi-xprt-wdsp { |
| 1142 | compatible = "qcom,glink-spi-xprt"; |
| 1143 | label = "wdsp"; |
| 1144 | qcom,remote-fifo-config = <&glink_fifo_wdsp>; |
| 1145 | qcom,qos-config = <&glink_qos_wdsp>; |
| 1146 | qcom,ramp-time = <0x10>, |
| 1147 | <0x20>, |
| 1148 | <0x30>, |
| 1149 | <0x40>; |
| 1150 | }; |
| 1151 | |
| 1152 | glink_fifo_wdsp: qcom,glink-fifo-config-wdsp { |
| 1153 | compatible = "qcom,glink-fifo-config"; |
| 1154 | qcom,out-read-idx-reg = <0x12000>; |
| 1155 | qcom,out-write-idx-reg = <0x12004>; |
| 1156 | qcom,in-read-idx-reg = <0x1200C>; |
| 1157 | qcom,in-write-idx-reg = <0x12010>; |
| 1158 | }; |
| 1159 | |
| 1160 | glink_qos_wdsp: qcom,glink-qos-config-wdsp { |
| 1161 | compatible = "qcom,glink-qos-config"; |
| 1162 | qcom,flow-info = <0x80 0x0>, |
| 1163 | <0x70 0x1>, |
| 1164 | <0x60 0x2>, |
| 1165 | <0x50 0x3>; |
| 1166 | qcom,mtu-size = <0x800>; |
| 1167 | qcom,tput-stats-cycle = <0xa>; |
| 1168 | }; |
| 1169 | |
| 1170 | qcom,glink-smem-native-xprt-cdsp@86000000 { |
| 1171 | compatible = "qcom,glink-smem-native-xprt"; |
| 1172 | reg = <0x86000000 0x200000>, |
| 1173 | <0x1799000c 0x4>; |
| 1174 | reg-names = "smem", "irq-reg-base"; |
| 1175 | qcom,irq-mask = <0x10>; |
| 1176 | interrupts = <GIC_SPI 574 IRQ_TYPE_EDGE_RISING>; |
| 1177 | label = "cdsp"; |
| 1178 | }; |
| 1179 | |
Dhoat Harpal | 9cb73cc | 2017-06-06 20:58:14 +0530 | [diff] [blame] | 1180 | glink_mpss: qcom,glink-ssr-modem { |
| 1181 | compatible = "qcom,glink_ssr"; |
| 1182 | label = "modem"; |
| 1183 | qcom,edge = "mpss"; |
| 1184 | qcom,notify-edges = <&glink_lpass>, <&glink_cdsp>; |
| 1185 | qcom,xprt = "smem"; |
| 1186 | }; |
| 1187 | |
| 1188 | glink_lpass: qcom,glink-ssr-adsp { |
| 1189 | compatible = "qcom,glink_ssr"; |
| 1190 | label = "adsp"; |
| 1191 | qcom,edge = "lpass"; |
| 1192 | qcom,notify-edges = <&glink_mpss>, <&glink_cdsp>; |
| 1193 | qcom,xprt = "smem"; |
| 1194 | }; |
| 1195 | |
| 1196 | glink_cdsp: qcom,glink-ssr-cdsp { |
| 1197 | compatible = "qcom,glink_ssr"; |
| 1198 | label = "cdsp"; |
| 1199 | qcom,edge = "cdsp"; |
| 1200 | qcom,notify-edges = <&glink_mpss>, <&glink_lpass>; |
| 1201 | qcom,xprt = "smem"; |
| 1202 | }; |
| 1203 | |
Dhoat Harpal | 22dafa9 | 2017-06-06 21:03:34 +0530 | [diff] [blame] | 1204 | qcom,ipc_router { |
| 1205 | compatible = "qcom,ipc_router"; |
| 1206 | qcom,node-id = <1>; |
| 1207 | }; |
| 1208 | |
| 1209 | qcom,ipc_router_modem_xprt { |
| 1210 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1211 | qcom,ch-name = "IPCRTR"; |
| 1212 | qcom,xprt-remote = "mpss"; |
| 1213 | qcom,glink-xprt = "smem"; |
| 1214 | qcom,xprt-linkid = <1>; |
| 1215 | qcom,xprt-version = <1>; |
| 1216 | qcom,fragmented-data; |
| 1217 | }; |
| 1218 | |
| 1219 | qcom,ipc_router_q6_xprt { |
| 1220 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1221 | qcom,ch-name = "IPCRTR"; |
| 1222 | qcom,xprt-remote = "lpass"; |
| 1223 | qcom,glink-xprt = "smem"; |
| 1224 | qcom,xprt-linkid = <1>; |
| 1225 | qcom,xprt-version = <1>; |
| 1226 | qcom,fragmented-data; |
| 1227 | }; |
| 1228 | |
| 1229 | qcom,ipc_router_cdsp_xprt { |
| 1230 | compatible = "qcom,ipc_router_glink_xprt"; |
| 1231 | qcom,ch-name = "IPCRTR"; |
| 1232 | qcom,xprt-remote = "cdsp"; |
| 1233 | qcom,glink-xprt = "smem"; |
| 1234 | qcom,xprt-linkid = <1>; |
| 1235 | qcom,xprt-version = <1>; |
| 1236 | qcom,fragmented-data; |
| 1237 | }; |
| 1238 | |
Dhoat Harpal | 11d3448 | 2017-06-06 21:00:14 +0530 | [diff] [blame] | 1239 | qcom,glink_pkt { |
| 1240 | compatible = "qcom,glinkpkt"; |
| 1241 | |
| 1242 | qcom,glinkpkt-at-mdm0 { |
| 1243 | qcom,glinkpkt-transport = "smem"; |
| 1244 | qcom,glinkpkt-edge = "mpss"; |
| 1245 | qcom,glinkpkt-ch-name = "DS"; |
| 1246 | qcom,glinkpkt-dev-name = "at_mdm0"; |
| 1247 | }; |
| 1248 | |
| 1249 | qcom,glinkpkt-loopback_cntl { |
| 1250 | qcom,glinkpkt-transport = "lloop"; |
| 1251 | qcom,glinkpkt-edge = "local"; |
| 1252 | qcom,glinkpkt-ch-name = "LOCAL_LOOPBACK_CLNT"; |
| 1253 | qcom,glinkpkt-dev-name = "glink_pkt_loopback_ctrl"; |
| 1254 | }; |
| 1255 | |
| 1256 | qcom,glinkpkt-loopback_data { |
| 1257 | qcom,glinkpkt-transport = "lloop"; |
| 1258 | qcom,glinkpkt-edge = "local"; |
| 1259 | qcom,glinkpkt-ch-name = "glink_pkt_lloop_CLNT"; |
| 1260 | qcom,glinkpkt-dev-name = "glink_pkt_loopback"; |
| 1261 | }; |
| 1262 | |
| 1263 | qcom,glinkpkt-apr-apps2 { |
| 1264 | qcom,glinkpkt-transport = "smem"; |
| 1265 | qcom,glinkpkt-edge = "adsp"; |
| 1266 | qcom,glinkpkt-ch-name = "apr_apps2"; |
| 1267 | qcom,glinkpkt-dev-name = "apr_apps2"; |
| 1268 | }; |
| 1269 | |
| 1270 | qcom,glinkpkt-data40-cntl { |
| 1271 | qcom,glinkpkt-transport = "smem"; |
| 1272 | qcom,glinkpkt-edge = "mpss"; |
| 1273 | qcom,glinkpkt-ch-name = "DATA40_CNTL"; |
| 1274 | qcom,glinkpkt-dev-name = "smdcntl8"; |
| 1275 | }; |
| 1276 | |
| 1277 | qcom,glinkpkt-data1 { |
| 1278 | qcom,glinkpkt-transport = "smem"; |
| 1279 | qcom,glinkpkt-edge = "mpss"; |
| 1280 | qcom,glinkpkt-ch-name = "DATA1"; |
| 1281 | qcom,glinkpkt-dev-name = "smd7"; |
| 1282 | }; |
| 1283 | |
| 1284 | qcom,glinkpkt-data4 { |
| 1285 | qcom,glinkpkt-transport = "smem"; |
| 1286 | qcom,glinkpkt-edge = "mpss"; |
| 1287 | qcom,glinkpkt-ch-name = "DATA4"; |
| 1288 | qcom,glinkpkt-dev-name = "smd8"; |
| 1289 | }; |
| 1290 | |
| 1291 | qcom,glinkpkt-data11 { |
| 1292 | qcom,glinkpkt-transport = "smem"; |
| 1293 | qcom,glinkpkt-edge = "mpss"; |
| 1294 | qcom,glinkpkt-ch-name = "DATA11"; |
| 1295 | qcom,glinkpkt-dev-name = "smd11"; |
| 1296 | }; |
| 1297 | }; |
| 1298 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1299 | qcom,chd_sliver { |
| 1300 | compatible = "qcom,core-hang-detect"; |
| 1301 | label = "silver"; |
| 1302 | qcom,threshold-arr = <0x17e00058 0x17e10058 0x17e20058 |
| 1303 | 0x17e30058 0x17e40058 0x17e50058>; |
| 1304 | qcom,config-arr = <0x17e00060 0x17e10060 0x17e20060 |
| 1305 | 0x17e30060 0x17e40060 0x17e50060>; |
| 1306 | }; |
| 1307 | |
| 1308 | qcom,chd_gold { |
| 1309 | compatible = "qcom,core-hang-detect"; |
| 1310 | label = "gold"; |
| 1311 | qcom,threshold-arr = <0x17e60058 0x17e70058>; |
| 1312 | qcom,config-arr = <0x17e60060 0x17e70060>; |
| 1313 | }; |
| 1314 | |
| 1315 | qcom,ghd { |
| 1316 | compatible = "qcom,gladiator-hang-detect-v2"; |
| 1317 | qcom,threshold-arr = <0x1799041c 0x17990420>; |
| 1318 | qcom,config-reg = <0x17990434>; |
| 1319 | }; |
| 1320 | |
| 1321 | qcom,msm-gladiator-v3@17900000 { |
| 1322 | compatible = "qcom,msm-gladiator-v3"; |
| 1323 | reg = <0x17900000 0xd080>; |
| 1324 | reg-names = "gladiator_base"; |
| 1325 | interrupts = <0 17 0>; |
| 1326 | }; |
| 1327 | |
Lingutla Chandrasekhar | ee4f187 | 2017-06-07 13:50:53 +0530 | [diff] [blame] | 1328 | qcom,llcc@1100000 { |
| 1329 | compatible = "qcom,llcc-core", "syscon", "simple-mfd"; |
| 1330 | reg = <0x1100000 0x250000>; |
| 1331 | reg-names = "llcc_base"; |
| 1332 | qcom,llcc-banks-off = <0x0 0x80000 >; |
| 1333 | qcom,llcc-broadcast-off = <0x200000>; |
| 1334 | |
| 1335 | llcc: qcom,sdm670-llcc { |
| 1336 | compatible = "qcom,sdm670-llcc"; |
| 1337 | #cache-cells = <1>; |
| 1338 | max-slices = <32>; |
| 1339 | qcom,dump-size = <0x80000>; |
| 1340 | }; |
| 1341 | |
| 1342 | qcom,llcc-erp { |
| 1343 | compatible = "qcom,llcc-erp"; |
| 1344 | interrupt-names = "ecc_irq"; |
| 1345 | interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; |
| 1346 | }; |
| 1347 | |
| 1348 | qcom,llcc-amon { |
| 1349 | compatible = "qcom,llcc-amon"; |
| 1350 | }; |
| 1351 | |
| 1352 | LLCC_1: llcc_1_dcache { |
| 1353 | qcom,dump-size = <0xd8000>; |
| 1354 | }; |
| 1355 | |
| 1356 | LLCC_2: llcc_2_dcache { |
| 1357 | qcom,dump-size = <0xd8000>; |
| 1358 | }; |
| 1359 | }; |
| 1360 | |
Maulik Shah | 210773d | 2017-06-15 09:49:12 +0530 | [diff] [blame] | 1361 | cmd_db: qcom,cmd-db@c3f000c { |
| 1362 | compatible = "qcom,cmd-db"; |
| 1363 | reg = <0xc3f000c 0x8>; |
| 1364 | }; |
| 1365 | |
Maulik Shah | c77d1d2 | 2017-06-15 14:04:50 +0530 | [diff] [blame] | 1366 | apps_rsc: mailbox@179e0000 { |
| 1367 | compatible = "qcom,tcs-drv"; |
| 1368 | label = "apps_rsc"; |
| 1369 | reg = <0x179e0000 0x100>, <0x179e0d00 0x3000>; |
| 1370 | interrupts = <0 5 0>; |
| 1371 | #mbox-cells = <1>; |
| 1372 | qcom,drv-id = <2>; |
| 1373 | qcom,tcs-config = <ACTIVE_TCS 2>, |
| 1374 | <SLEEP_TCS 3>, |
| 1375 | <WAKE_TCS 3>, |
| 1376 | <CONTROL_TCS 1>; |
| 1377 | }; |
| 1378 | |
Maulik Shah | da3941f | 2017-06-15 09:41:38 +0530 | [diff] [blame] | 1379 | disp_rsc: mailbox@af20000 { |
| 1380 | compatible = "qcom,tcs-drv"; |
| 1381 | label = "display_rsc"; |
| 1382 | reg = <0xaf20000 0x100>, <0xaf21c00 0x3000>; |
| 1383 | interrupts = <0 129 0>; |
| 1384 | #mbox-cells = <1>; |
| 1385 | qcom,drv-id = <0>; |
| 1386 | qcom,tcs-config = <SLEEP_TCS 1>, |
| 1387 | <WAKE_TCS 1>, |
| 1388 | <ACTIVE_TCS 0>, |
| 1389 | <CONTROL_TCS 1>; |
| 1390 | }; |
| 1391 | |
Maulik Shah | 0dd203f | 2017-06-15 09:44:59 +0530 | [diff] [blame] | 1392 | system_pm { |
| 1393 | compatible = "qcom,system-pm"; |
| 1394 | mboxes = <&apps_rsc 0>; |
| 1395 | }; |
| 1396 | |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1397 | dcc: dcc_v2@10a2000 { |
| 1398 | compatible = "qcom,dcc_v2"; |
| 1399 | reg = <0x10a2000 0x1000>, |
| 1400 | <0x10ae000 0x2000>; |
| 1401 | reg-names = "dcc-base", "dcc-ram-base"; |
| 1402 | }; |
| 1403 | |
Tirupathi Reddy | 9ae4c89 | 2017-06-09 12:30:31 +0530 | [diff] [blame] | 1404 | spmi_bus: qcom,spmi@c440000 { |
| 1405 | compatible = "qcom,spmi-pmic-arb"; |
| 1406 | reg = <0xc440000 0x1100>, |
| 1407 | <0xc600000 0x2000000>, |
| 1408 | <0xe600000 0x100000>, |
| 1409 | <0xe700000 0xa0000>, |
| 1410 | <0xc40a000 0x26000>; |
| 1411 | reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; |
| 1412 | interrupt-names = "periph_irq"; |
| 1413 | interrupts = <GIC_SPI 481 IRQ_TYPE_NONE>; |
| 1414 | qcom,ee = <0>; |
| 1415 | qcom,channel = <0>; |
| 1416 | #address-cells = <2>; |
| 1417 | #size-cells = <0>; |
| 1418 | interrupt-controller; |
| 1419 | #interrupt-cells = <4>; |
| 1420 | cell-index = <0>; |
| 1421 | }; |
Sayali Lokhande | 099af9c | 2017-06-08 10:18:29 +0530 | [diff] [blame] | 1422 | |
| 1423 | ufsphy_mem: ufsphy_mem@1d87000 { |
| 1424 | reg = <0x1d87000 0xe00>; /* PHY regs */ |
| 1425 | reg-names = "phy_mem"; |
| 1426 | #phy-cells = <0>; |
| 1427 | |
| 1428 | lanes-per-direction = <1>; |
| 1429 | |
| 1430 | clock-names = "ref_clk_src", |
| 1431 | "ref_clk", |
| 1432 | "ref_aux_clk"; |
| 1433 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
| 1434 | <&clock_gcc GCC_UFS_MEM_CLKREF_CLK>, |
| 1435 | <&clock_gcc GCC_UFS_PHY_PHY_AUX_HW_CTL_CLK>; |
| 1436 | |
| 1437 | status = "disabled"; |
| 1438 | }; |
| 1439 | |
| 1440 | ufshc_mem: ufshc@1d84000 { |
| 1441 | compatible = "qcom,ufshc"; |
| 1442 | reg = <0x1d84000 0x3000>; |
| 1443 | interrupts = <0 265 0>; |
| 1444 | phys = <&ufsphy_mem>; |
| 1445 | phy-names = "ufsphy"; |
| 1446 | |
| 1447 | lanes-per-direction = <1>; |
| 1448 | dev-ref-clk-freq = <0>; /* 19.2 MHz */ |
| 1449 | |
| 1450 | clock-names = |
| 1451 | "core_clk", |
| 1452 | "bus_aggr_clk", |
| 1453 | "iface_clk", |
| 1454 | "core_clk_unipro", |
| 1455 | "core_clk_ice", |
| 1456 | "ref_clk", |
| 1457 | "tx_lane0_sync_clk", |
| 1458 | "rx_lane0_sync_clk"; |
| 1459 | clocks = |
| 1460 | <&clock_gcc GCC_UFS_PHY_AXI_HW_CTL_CLK>, |
| 1461 | <&clock_gcc GCC_AGGRE_UFS_PHY_AXI_HW_CTL_CLK>, |
| 1462 | <&clock_gcc GCC_UFS_PHY_AHB_CLK>, |
| 1463 | <&clock_gcc GCC_UFS_PHY_UNIPRO_CORE_HW_CTL_CLK>, |
| 1464 | <&clock_gcc GCC_UFS_PHY_ICE_CORE_HW_CTL_CLK>, |
| 1465 | <&clock_rpmh RPMH_CXO_CLK>, |
| 1466 | <&clock_gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>, |
| 1467 | <&clock_gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>; |
| 1468 | freq-table-hz = |
| 1469 | <50000000 200000000>, |
| 1470 | <0 0>, |
| 1471 | <0 0>, |
| 1472 | <37500000 150000000>, |
| 1473 | <75000000 300000000>, |
| 1474 | <0 0>, |
| 1475 | <0 0>, |
| 1476 | <0 0>; |
| 1477 | |
| 1478 | resets = <&clock_gcc GCC_UFS_PHY_BCR>; |
| 1479 | reset-names = "core_reset"; |
| 1480 | |
| 1481 | status = "disabled"; |
| 1482 | }; |
Gaurav Kohli | b28d556 | 2017-06-12 11:26:27 +0530 | [diff] [blame] | 1483 | |
| 1484 | qcom,lpass@62400000 { |
| 1485 | compatible = "qcom,pil-tz-generic"; |
| 1486 | reg = <0x62400000 0x00100>; |
| 1487 | interrupts = <0 162 1>; |
| 1488 | |
| 1489 | vdd_cx-supply = <&pm660l_l9_level>; |
| 1490 | qcom,proxy-reg-names = "vdd_cx"; |
| 1491 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
| 1492 | |
| 1493 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 1494 | clock-names = "xo"; |
| 1495 | qcom,proxy-clock-names = "xo"; |
| 1496 | |
| 1497 | qcom,pas-id = <1>; |
| 1498 | qcom,proxy-timeout-ms = <10000>; |
| 1499 | qcom,smem-id = <423>; |
| 1500 | qcom,sysmon-id = <1>; |
| 1501 | qcom,ssctl-instance-id = <0x14>; |
| 1502 | qcom,firmware-name = "adsp"; |
| 1503 | memory-region = <&pil_adsp_mem>; |
| 1504 | |
| 1505 | /* GPIO inputs from lpass */ |
| 1506 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_2_in 0 0>; |
| 1507 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_2_in 2 0>; |
| 1508 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_2_in 1 0>; |
| 1509 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_2_in 3 0>; |
| 1510 | |
| 1511 | /* GPIO output to lpass */ |
| 1512 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_2_out 0 0>; |
| 1513 | status = "ok"; |
| 1514 | }; |
Mohammed Javid | 736c25c | 2017-06-19 13:23:18 +0530 | [diff] [blame] | 1515 | |
| 1516 | qcom,rmnet-ipa { |
| 1517 | compatible = "qcom,rmnet-ipa3"; |
| 1518 | qcom,rmnet-ipa-ssr; |
| 1519 | qcom,ipa-loaduC; |
| 1520 | qcom,ipa-advertise-sg-support; |
| 1521 | qcom,ipa-napi-enable; |
| 1522 | }; |
| 1523 | |
| 1524 | ipa_hw: qcom,ipa@01e00000 { |
| 1525 | compatible = "qcom,ipa"; |
| 1526 | reg = <0x1e00000 0x34000>, |
| 1527 | <0x1e04000 0x2c000>; |
| 1528 | reg-names = "ipa-base", "gsi-base"; |
| 1529 | interrupts = |
| 1530 | <0 311 0>, |
| 1531 | <0 432 0>; |
| 1532 | interrupt-names = "ipa-irq", "gsi-irq"; |
| 1533 | qcom,ipa-hw-ver = <13>; /* IPA core version = IPAv3.5.1 */ |
| 1534 | qcom,ipa-hw-mode = <1>; |
| 1535 | qcom,ee = <0>; |
| 1536 | qcom,use-ipa-tethering-bridge; |
| 1537 | qcom,modem-cfg-emb-pipe-flt; |
| 1538 | qcom,ipa-wdi2; |
| 1539 | qcom,use-64-bit-dma-mask; |
| 1540 | qcom,arm-smmu; |
| 1541 | qcom,smmu-s1-bypass; |
| 1542 | qcom,bandwidth-vote-for-ipa; |
| 1543 | qcom,msm-bus,name = "ipa"; |
| 1544 | qcom,msm-bus,num-cases = <4>; |
| 1545 | qcom,msm-bus,num-paths = <4>; |
| 1546 | qcom,msm-bus,vectors-KBps = |
| 1547 | /* No vote */ |
| 1548 | <90 512 0 0>, |
| 1549 | <90 585 0 0>, |
| 1550 | <1 676 0 0>, |
| 1551 | <143 777 0 0>, |
| 1552 | /* SVS */ |
| 1553 | <90 512 80000 640000>, |
| 1554 | <90 585 80000 640000>, |
| 1555 | <1 676 80000 80000>, |
| 1556 | <143 777 0 150000>, |
| 1557 | /* NOMINAL */ |
| 1558 | <90 512 206000 960000>, |
| 1559 | <90 585 206000 960000>, |
| 1560 | <1 676 206000 160000>, |
| 1561 | <143 777 0 300000>, |
| 1562 | /* TURBO */ |
| 1563 | <90 512 206000 3600000>, |
| 1564 | <90 585 206000 3600000>, |
| 1565 | <1 676 206000 300000>, |
| 1566 | <143 777 0 355333>; |
| 1567 | qcom,bus-vector-names = "MIN", "SVS", "NOMINAL", "TURBO"; |
| 1568 | |
| 1569 | /* IPA RAM mmap */ |
| 1570 | qcom,ipa-ram-mmap = < |
| 1571 | 0x280 /* ofst_start; */ |
| 1572 | 0x0 /* nat_ofst; */ |
| 1573 | 0x0 /* nat_size; */ |
| 1574 | 0x288 /* v4_flt_hash_ofst; */ |
| 1575 | 0x78 /* v4_flt_hash_size; */ |
| 1576 | 0x4000 /* v4_flt_hash_size_ddr; */ |
| 1577 | 0x308 /* v4_flt_nhash_ofst; */ |
| 1578 | 0x78 /* v4_flt_nhash_size; */ |
| 1579 | 0x4000 /* v4_flt_nhash_size_ddr; */ |
| 1580 | 0x388 /* v6_flt_hash_ofst; */ |
| 1581 | 0x78 /* v6_flt_hash_size; */ |
| 1582 | 0x4000 /* v6_flt_hash_size_ddr; */ |
| 1583 | 0x408 /* v6_flt_nhash_ofst; */ |
| 1584 | 0x78 /* v6_flt_nhash_size; */ |
| 1585 | 0x4000 /* v6_flt_nhash_size_ddr; */ |
| 1586 | 0xf /* v4_rt_num_index; */ |
| 1587 | 0x0 /* v4_modem_rt_index_lo; */ |
| 1588 | 0x7 /* v4_modem_rt_index_hi; */ |
| 1589 | 0x8 /* v4_apps_rt_index_lo; */ |
| 1590 | 0xe /* v4_apps_rt_index_hi; */ |
| 1591 | 0x488 /* v4_rt_hash_ofst; */ |
| 1592 | 0x78 /* v4_rt_hash_size; */ |
| 1593 | 0x4000 /* v4_rt_hash_size_ddr; */ |
| 1594 | 0x508 /* v4_rt_nhash_ofst; */ |
| 1595 | 0x78 /* v4_rt_nhash_size; */ |
| 1596 | 0x4000 /* v4_rt_nhash_size_ddr; */ |
| 1597 | 0xf /* v6_rt_num_index; */ |
| 1598 | 0x0 /* v6_modem_rt_index_lo; */ |
| 1599 | 0x7 /* v6_modem_rt_index_hi; */ |
| 1600 | 0x8 /* v6_apps_rt_index_lo; */ |
| 1601 | 0xe /* v6_apps_rt_index_hi; */ |
| 1602 | 0x588 /* v6_rt_hash_ofst; */ |
| 1603 | 0x78 /* v6_rt_hash_size; */ |
| 1604 | 0x4000 /* v6_rt_hash_size_ddr; */ |
| 1605 | 0x608 /* v6_rt_nhash_ofst; */ |
| 1606 | 0x78 /* v6_rt_nhash_size; */ |
| 1607 | 0x4000 /* v6_rt_nhash_size_ddr; */ |
| 1608 | 0x688 /* modem_hdr_ofst; */ |
| 1609 | 0x140 /* modem_hdr_size; */ |
| 1610 | 0x7c8 /* apps_hdr_ofst; */ |
| 1611 | 0x0 /* apps_hdr_size; */ |
| 1612 | 0x800 /* apps_hdr_size_ddr; */ |
| 1613 | 0x7d0 /* modem_hdr_proc_ctx_ofst; */ |
| 1614 | 0x200 /* modem_hdr_proc_ctx_size; */ |
| 1615 | 0x9d0 /* apps_hdr_proc_ctx_ofst; */ |
| 1616 | 0x200 /* apps_hdr_proc_ctx_size; */ |
| 1617 | 0x0 /* apps_hdr_proc_ctx_size_ddr; */ |
| 1618 | 0x0 /* modem_comp_decomp_ofst; diff */ |
| 1619 | 0x0 /* modem_comp_decomp_size; diff */ |
| 1620 | 0xbd8 /* modem_ofst; */ |
| 1621 | 0x1024 /* modem_size; */ |
| 1622 | 0x2000 /* apps_v4_flt_hash_ofst; */ |
| 1623 | 0x0 /* apps_v4_flt_hash_size; */ |
| 1624 | 0x2000 /* apps_v4_flt_nhash_ofst; */ |
| 1625 | 0x0 /* apps_v4_flt_nhash_size; */ |
| 1626 | 0x2000 /* apps_v6_flt_hash_ofst; */ |
| 1627 | 0x0 /* apps_v6_flt_hash_size; */ |
| 1628 | 0x2000 /* apps_v6_flt_nhash_ofst; */ |
| 1629 | 0x0 /* apps_v6_flt_nhash_size; */ |
| 1630 | 0x80 /* uc_info_ofst; */ |
| 1631 | 0x200 /* uc_info_size; */ |
| 1632 | 0x2000 /* end_ofst; */ |
| 1633 | 0x2000 /* apps_v4_rt_hash_ofst; */ |
| 1634 | 0x0 /* apps_v4_rt_hash_size; */ |
| 1635 | 0x2000 /* apps_v4_rt_nhash_ofst; */ |
| 1636 | 0x0 /* apps_v4_rt_nhash_size; */ |
| 1637 | 0x2000 /* apps_v6_rt_hash_ofst; */ |
| 1638 | 0x0 /* apps_v6_rt_hash_size; */ |
| 1639 | 0x2000 /* apps_v6_rt_nhash_ofst; */ |
| 1640 | 0x0 /* apps_v6_rt_nhash_size; */ |
| 1641 | 0x1c00 /* uc_event_ring_ofst; */ |
| 1642 | 0x400 /* uc_event_ring_size; */ |
| 1643 | >; |
| 1644 | |
| 1645 | /* smp2p gpio information */ |
| 1646 | qcom,smp2pgpio_map_ipa_1_out { |
| 1647 | compatible = "qcom,smp2pgpio-map-ipa-1-out"; |
| 1648 | gpios = <&smp2pgpio_ipa_1_out 0 0>; |
| 1649 | }; |
| 1650 | |
| 1651 | qcom,smp2pgpio_map_ipa_1_in { |
| 1652 | compatible = "qcom,smp2pgpio-map-ipa-1-in"; |
| 1653 | gpios = <&smp2pgpio_ipa_1_in 0 0>; |
| 1654 | }; |
| 1655 | |
| 1656 | ipa_smmu_ap: ipa_smmu_ap { |
| 1657 | compatible = "qcom,ipa-smmu-ap-cb"; |
| 1658 | iommus = <&apps_smmu 0x720 0x0>; |
| 1659 | qcom,iova-mapping = <0x20000000 0x40000000>; |
| 1660 | }; |
| 1661 | |
| 1662 | ipa_smmu_wlan: ipa_smmu_wlan { |
| 1663 | compatible = "qcom,ipa-smmu-wlan-cb"; |
| 1664 | iommus = <&apps_smmu 0x721 0x0>; |
| 1665 | }; |
| 1666 | |
| 1667 | ipa_smmu_uc: ipa_smmu_uc { |
| 1668 | compatible = "qcom,ipa-smmu-uc-cb"; |
| 1669 | iommus = <&apps_smmu 0x722 0x0>; |
| 1670 | qcom,iova-mapping = <0x40000000 0x20000000>; |
| 1671 | }; |
| 1672 | }; |
| 1673 | |
| 1674 | qcom,ipa_fws { |
| 1675 | compatible = "qcom,pil-tz-generic"; |
| 1676 | qcom,pas-id = <0xf>; |
| 1677 | qcom,firmware-name = "ipa_fws"; |
| 1678 | }; |
Gaurav Kohli | 04a55af | 2017-07-19 17:25:30 +0530 | [diff] [blame] | 1679 | |
| 1680 | pil_modem: qcom,mss@4080000 { |
| 1681 | compatible = "qcom,pil-q6v55-mss"; |
| 1682 | reg = <0x4080000 0x100>, |
| 1683 | <0x1f63000 0x008>, |
| 1684 | <0x1f65000 0x008>, |
| 1685 | <0x1f64000 0x008>, |
| 1686 | <0x4180000 0x020>, |
| 1687 | <0xc2b0000 0x004>, |
| 1688 | <0xb2e0100 0x004>, |
| 1689 | <0x4180044 0x004>; |
| 1690 | reg-names = "qdsp6_base", "halt_q6", "halt_modem", |
| 1691 | "halt_nc", "rmb_base", "restart_reg", |
| 1692 | "pdc_sync", "alt_reset"; |
| 1693 | |
| 1694 | clocks = <&clock_rpmh RPMH_CXO_CLK>, |
| 1695 | <&clock_gcc GCC_MSS_CFG_AHB_CLK>, |
| 1696 | <&clock_gcc GCC_MSS_Q6_MEMNOC_AXI_CLK>, |
| 1697 | <&clock_gcc GCC_BOOT_ROM_AHB_CLK>, |
| 1698 | <&clock_gcc GCC_MSS_GPLL0_DIV_CLK_SRC>, |
| 1699 | <&clock_gcc GCC_MSS_SNOC_AXI_CLK>, |
| 1700 | <&clock_gcc GCC_MSS_MFAB_AXIS_CLK>, |
| 1701 | <&clock_gcc GCC_PRNG_AHB_CLK>; |
| 1702 | clock-names = "xo", "iface_clk", "bus_clk", |
| 1703 | "mem_clk", "gpll0_mss_clk", "snoc_axi_clk", |
| 1704 | "mnoc_axi_clk", "prng_clk"; |
| 1705 | qcom,proxy-clock-names = "xo", "prng_clk"; |
| 1706 | qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk", |
| 1707 | "gpll0_mss_clk", "snoc_axi_clk", |
| 1708 | "mnoc_axi_clk"; |
| 1709 | |
| 1710 | interrupts = <0 266 1>; |
| 1711 | vdd_cx-supply = <&pm660l_s3_level>; |
| 1712 | vdd_cx-voltage = <RPMH_REGULATOR_LEVEL_TURBO>; |
| 1713 | vdd_mx-supply = <&pm660l_s1_level>; |
| 1714 | vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO>; |
| 1715 | qcom,firmware-name = "modem"; |
| 1716 | qcom,pil-self-auth; |
| 1717 | qcom,sysmon-id = <0>; |
| 1718 | qcom,ssctl-instance-id = <0x12>; |
| 1719 | qcom,override-acc; |
| 1720 | qcom,qdsp6v65-1-0; |
| 1721 | status = "ok"; |
| 1722 | memory-region = <&pil_modem_mem>; |
| 1723 | qcom,mem-protect-id = <0xF>; |
| 1724 | |
| 1725 | /* GPIO inputs from mss */ |
| 1726 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; |
| 1727 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; |
| 1728 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; |
| 1729 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; |
| 1730 | qcom,gpio-shutdown-ack = <&smp2pgpio_ssr_smp2p_1_in 7 0>; |
| 1731 | |
| 1732 | /* GPIO output to mss */ |
| 1733 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; |
| 1734 | qcom,mba-mem@0 { |
| 1735 | compatible = "qcom,pil-mba-mem"; |
| 1736 | memory-region = <&pil_mba_mem>; |
| 1737 | }; |
| 1738 | }; |
Gaurav Kohli | 985a99d | 2017-07-25 18:46:45 +0530 | [diff] [blame] | 1739 | |
| 1740 | qcom,venus@aae0000 { |
| 1741 | compatible = "qcom,pil-tz-generic"; |
| 1742 | reg = <0xaae0000 0x4000>; |
| 1743 | |
| 1744 | vdd-supply = <&venus_gdsc>; |
| 1745 | qcom,proxy-reg-names = "vdd"; |
| 1746 | |
| 1747 | clocks = <&clock_videocc VIDEO_CC_VENUS_CTL_CORE_CLK>, |
| 1748 | <&clock_videocc VIDEO_CC_VENUS_AHB_CLK>, |
| 1749 | <&clock_videocc VIDEO_CC_VENUS_CTL_AXI_CLK>; |
| 1750 | clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1751 | qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk"; |
| 1752 | |
| 1753 | qcom,pas-id = <9>; |
| 1754 | qcom,msm-bus,name = "pil-venus"; |
| 1755 | qcom,msm-bus,num-cases = <2>; |
| 1756 | qcom,msm-bus,num-paths = <1>; |
| 1757 | qcom,msm-bus,vectors-KBps = |
| 1758 | <63 512 0 0>, |
| 1759 | <63 512 0 304000>; |
| 1760 | qcom,proxy-timeout-ms = <100>; |
| 1761 | qcom,firmware-name = "venus"; |
| 1762 | memory-region = <&pil_video_mem>; |
| 1763 | status = "ok"; |
| 1764 | }; |
Gaurav Kohli | 106f488 | 2017-06-29 12:29:12 +0530 | [diff] [blame] | 1765 | |
| 1766 | qcom,turing@8300000 { |
| 1767 | compatible = "qcom,pil-tz-generic"; |
| 1768 | reg = <0x8300000 0x100000>; |
| 1769 | interrupts = <0 578 1>; |
| 1770 | |
| 1771 | vdd_cx-supply = <&pm660l_s3_level>; |
| 1772 | qcom,proxy-reg-names = "vdd_cx"; |
| 1773 | qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; |
| 1774 | |
| 1775 | clocks = <&clock_rpmh RPMH_CXO_CLK>; |
| 1776 | clock-names = "xo"; |
| 1777 | qcom,proxy-clock-names = "xo"; |
| 1778 | |
| 1779 | qcom,pas-id = <18>; |
| 1780 | qcom,proxy-timeout-ms = <10000>; |
| 1781 | qcom,smem-id = <601>; |
| 1782 | qcom,sysmon-id = <7>; |
| 1783 | qcom,ssctl-instance-id = <0x17>; |
| 1784 | qcom,firmware-name = "cdsp"; |
| 1785 | memory-region = <&pil_cdsp_mem>; |
| 1786 | |
| 1787 | /* GPIO inputs from turing */ |
| 1788 | qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_5_in 0 0>; |
| 1789 | qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_5_in 2 0>; |
| 1790 | qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_5_in 1 0>; |
| 1791 | qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_5_in 3 0>; |
| 1792 | |
| 1793 | /* GPIO output to turing*/ |
| 1794 | qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_5_out 0 0>; |
| 1795 | status = "ok"; |
| 1796 | }; |
Vijay Viswanath | eac7272 | 2017-06-05 11:01:38 +0530 | [diff] [blame] | 1797 | |
| 1798 | sdhc_1: sdhci@7c4000 { |
| 1799 | compatible = "qcom,sdhci-msm-v5"; |
| 1800 | reg = <0x7C4000 0x1000>, <0x7C5000 0x1000>; |
| 1801 | reg-names = "hc_mem", "cmdq_mem"; |
| 1802 | |
| 1803 | interrupts = <0 641 0>, <0 644 0>; |
| 1804 | interrupt-names = "hc_irq", "pwr_irq"; |
| 1805 | |
| 1806 | qcom,bus-width = <8>; |
| 1807 | qcom,large-address-bus; |
| 1808 | |
| 1809 | clocks = <&clock_gcc GCC_SDCC1_AHB_CLK>, |
| 1810 | <&clock_gcc GCC_SDCC1_APPS_CLK>; |
| 1811 | clock-names = "iface_clk", "core_clk"; |
| 1812 | |
| 1813 | qcom,nonremovable; |
| 1814 | |
| 1815 | qcom,scaling-lower-bus-speed-mode = "DDR52"; |
| 1816 | status = "disabled"; |
| 1817 | }; |
Imran Khan | 04f0831 | 2017-03-30 15:07:43 +0530 | [diff] [blame] | 1818 | }; |
| 1819 | |
| 1820 | #include "sdm670-pinctrl.dtsi" |
Vijayanand Jitta | d48c408 | 2017-06-07 15:07:51 +0530 | [diff] [blame] | 1821 | #include "msm-arm-smmu-sdm670.dtsi" |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1822 | #include "msm-gdsc-sdm845.dtsi" |
Maulik Shah | d313ea8 | 2017-06-14 13:10:52 +0530 | [diff] [blame] | 1823 | #include "sdm670-pm.dtsi" |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1824 | |
| 1825 | &usb30_prim_gdsc { |
| 1826 | status = "ok"; |
| 1827 | }; |
| 1828 | |
| 1829 | &ufs_phy_gdsc { |
| 1830 | status = "ok"; |
| 1831 | }; |
| 1832 | |
| 1833 | &hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc { |
| 1834 | status = "ok"; |
| 1835 | }; |
| 1836 | |
| 1837 | &hlos1_vote_aggre_noc_mmu_tbu1_gdsc { |
| 1838 | status = "ok"; |
| 1839 | }; |
| 1840 | |
| 1841 | &hlos1_vote_aggre_noc_mmu_tbu2_gdsc { |
| 1842 | status = "ok"; |
| 1843 | }; |
| 1844 | |
Odelu Kukatla | 1186d2e | 2017-08-04 17:28:46 +0530 | [diff] [blame] | 1845 | &hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc { |
| 1846 | status = "ok"; |
| 1847 | }; |
| 1848 | |
| 1849 | &hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc { |
| 1850 | status = "ok"; |
| 1851 | }; |
| 1852 | |
| 1853 | &hlos1_vote_mmnoc_mmu_tbu_sf_gdsc { |
| 1854 | status = "ok"; |
| 1855 | }; |
| 1856 | |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1857 | &bps_gdsc { |
| 1858 | status = "ok"; |
| 1859 | }; |
| 1860 | |
| 1861 | &ife_0_gdsc { |
| 1862 | status = "ok"; |
| 1863 | }; |
| 1864 | |
| 1865 | &ife_1_gdsc { |
| 1866 | status = "ok"; |
| 1867 | }; |
| 1868 | |
| 1869 | &ipe_0_gdsc { |
| 1870 | status = "ok"; |
| 1871 | }; |
| 1872 | |
| 1873 | &ipe_1_gdsc { |
| 1874 | status = "ok"; |
| 1875 | }; |
| 1876 | |
| 1877 | &titan_top_gdsc { |
| 1878 | status = "ok"; |
| 1879 | }; |
| 1880 | |
| 1881 | &mdss_core_gdsc { |
| 1882 | status = "ok"; |
| 1883 | }; |
| 1884 | |
| 1885 | &gpu_cx_gdsc { |
| 1886 | status = "ok"; |
| 1887 | }; |
| 1888 | |
| 1889 | &gpu_gx_gdsc { |
| 1890 | clock-names = "core_root_clk"; |
| 1891 | clocks = <&clock_gfx GPU_CC_GX_GFX3D_CLK_SRC>; |
| 1892 | qcom,force-enable-root-clk; |
Odelu Kukatla | 1186d2e | 2017-08-04 17:28:46 +0530 | [diff] [blame] | 1893 | parent-supply = <&pm660l_s2_level>; |
Odelu Kukatla | 1fe3a22 | 2017-06-01 16:24:59 +0530 | [diff] [blame] | 1894 | status = "ok"; |
| 1895 | }; |
| 1896 | |
| 1897 | &vcodec0_gdsc { |
| 1898 | qcom,support-hw-trigger; |
| 1899 | status = "ok"; |
| 1900 | }; |
| 1901 | |
| 1902 | &vcodec1_gdsc { |
| 1903 | qcom,support-hw-trigger; |
| 1904 | status = "ok"; |
| 1905 | }; |
| 1906 | |
| 1907 | &venus_gdsc { |
| 1908 | status = "ok"; |
| 1909 | }; |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 1910 | |
Tirupathi Reddy | 242bd80 | 2017-06-09 11:31:05 +0530 | [diff] [blame] | 1911 | #include "pm660.dtsi" |
| 1912 | #include "pm660l.dtsi" |
Tirupathi Reddy | 0cfe208 | 2017-06-08 14:24:13 +0530 | [diff] [blame] | 1913 | #include "sdm670-regulator.dtsi" |
Rohit Kumar | 1405128 | 2017-07-12 11:18:48 +0530 | [diff] [blame^] | 1914 | #include "sdm670-audio.dtsi" |