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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata-legacy.c - Legacy port PATA/SATA controller driver.
Alan Coxab771632008-10-27 15:09:10 +00003 * Copyright 2005/2006 Red Hat, all rights reserved.
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 * An ATA driver for the legacy ATA ports.
20 *
21 * Data Sources:
22 * Opti 82C465/82C611 support: Data sheets at opti-inc.com
23 * HT6560 series:
24 * Promise 20230/20620:
25 * http://www.ryston.cz/petr/vlb/pdc20230b.html
26 * http://www.ryston.cz/petr/vlb/pdc20230c.html
27 * http://www.ryston.cz/petr/vlb/pdc20630.html
28 *
29 * Unsupported but docs exist:
30 * Appian/Adaptec AIC25VL01/Cirrus Logic PD7220
Jeff Garzik669a5db2006-08-29 18:12:40 -040031 *
32 * This driver handles legacy (that is "ISA/VLB side") IDE ports found
33 * on PC class systems. There are three hybrid devices that are exceptions
34 * The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
35 * the MPIIX where the tuning is PCI side but the IDE is "ISA side".
36 *
37 * Specific support is included for the ht6560a/ht6560b/opti82c611a/
Alan Coxb8325482008-01-19 15:47:23 +000038 * opti82c465mv/promise 20230c/20630/winbond83759A
Jeff Garzik669a5db2006-08-29 18:12:40 -040039 *
40 * Use the autospeed and pio_mask options with:
41 * Appian ADI/2 aka CLPD7220 or AIC25VL01.
42 * Use the jumpers, autospeed and set pio_mask to the mode on the jumpers with
43 * Goldstar GM82C711, PIC-1288A-125, UMC 82C871F, Winbond W83759,
44 * Winbond W83759A, Promise PDC20230-B
45 *
46 * For now use autospeed and pio_mask as above with the W83759A. This may
47 * change.
48 *
Jeff Garzik669a5db2006-08-29 18:12:40 -040049 */
50
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/pci.h>
54#include <linux/init.h>
55#include <linux/blkdev.h>
56#include <linux/delay.h>
57#include <scsi/scsi_host.h>
58#include <linux/ata.h>
59#include <linux/libata.h>
60#include <linux/platform_device.h>
61
62#define DRV_NAME "pata_legacy"
Alan Coxb8325482008-01-19 15:47:23 +000063#define DRV_VERSION "0.6.5"
Jeff Garzik669a5db2006-08-29 18:12:40 -040064
65#define NR_HOST 6
66
Alan Coxdefc9cd2008-01-10 14:33:10 -080067static int all;
68module_param(all, int, 0444);
69MODULE_PARM_DESC(all, "Grab all legacy port devices, even if PCI(0=off, 1=on)");
Jeff Garzik669a5db2006-08-29 18:12:40 -040070
71struct legacy_data {
72 unsigned long timing;
73 u8 clock[2];
74 u8 last;
75 int fast;
76 struct platform_device *platform_dev;
77
78};
79
Alan Coxdefc9cd2008-01-10 14:33:10 -080080enum controller {
81 BIOS = 0,
82 SNOOP = 1,
83 PDC20230 = 2,
84 HT6560A = 3,
85 HT6560B = 4,
86 OPTI611A = 5,
87 OPTI46X = 6,
88 QDI6500 = 7,
89 QDI6580 = 8,
90 QDI6580DP = 9, /* Dual channel mode is different */
Alan Coxb8325482008-01-19 15:47:23 +000091 W83759A = 10,
Alan Coxdefc9cd2008-01-10 14:33:10 -080092
93 UNKNOWN = -1
94};
95
96
97struct legacy_probe {
98 unsigned char *name;
99 unsigned long port;
100 unsigned int irq;
101 unsigned int slot;
102 enum controller type;
103 unsigned long private;
104};
105
106struct legacy_controller {
107 const char *name;
108 struct ata_port_operations *ops;
109 unsigned int pio_mask;
110 unsigned int flags;
Alan Coxe3cf95d2009-04-09 17:31:17 +0100111 unsigned int pflags;
Alan Coxb8325482008-01-19 15:47:23 +0000112 int (*setup)(struct platform_device *, struct legacy_probe *probe,
113 struct legacy_data *data);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800114};
115
116static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
117
118static struct legacy_probe probe_list[NR_HOST];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400119static struct legacy_data legacy_data[NR_HOST];
120static struct ata_host *legacy_host[NR_HOST];
121static int nr_legacy_host;
122
123
Alan Coxdefc9cd2008-01-10 14:33:10 -0800124static int probe_all; /* Set to check all ISA port ranges */
125static int ht6560a; /* HT 6560A on primary 1, second 2, both 3 */
126static int ht6560b; /* HT 6560A on primary 1, second 2, both 3 */
127static int opti82c611a; /* Opti82c611A on primary 1, sec 2, both 3 */
128static int opti82c46x; /* Opti 82c465MV present(pri/sec autodetect) */
129static int qdi; /* Set to probe QDI controllers */
Alan Coxb8325482008-01-19 15:47:23 +0000130static int winbond; /* Set to probe Winbond controllers,
Alan Cox83972482008-02-08 15:23:38 +0000131 give I/O port if non standard */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800132static int autospeed; /* Chip present which snoops speed changes */
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100133static int pio_mask = ATA_PIO4; /* PIO range for autospeed devices */
Alan Coxf834e492007-02-07 13:46:00 -0800134static int iordy_mask = 0xFFFFFFFF; /* Use iordy if available */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400135
136/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800137 * legacy_probe_add - Add interface to probe list
138 * @port: Controller port
139 * @irq: IRQ number
140 * @type: Controller type
141 * @private: Controller specific info
142 *
143 * Add an entry into the probe list for ATA controllers. This is used
144 * to add the default ISA slots and then to build up the table
145 * further according to other ISA/VLB/Weird device scans
146 *
147 * An I/O port list is used to keep ordering stable and sane, as we
148 * don't have any good way to talk about ordering otherwise
149 */
150
151static int legacy_probe_add(unsigned long port, unsigned int irq,
152 enum controller type, unsigned long private)
153{
154 struct legacy_probe *lp = &probe_list[0];
155 int i;
156 struct legacy_probe *free = NULL;
157
158 for (i = 0; i < NR_HOST; i++) {
159 if (lp->port == 0 && free == NULL)
160 free = lp;
161 /* Matching port, or the correct slot for ordering */
162 if (lp->port == port || legacy_port[i] == port) {
163 free = lp;
164 break;
165 }
166 lp++;
167 }
168 if (free == NULL) {
169 printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
170 return -1;
171 }
172 /* Fill in the entry for later probing */
173 free->port = port;
174 free->irq = irq;
175 free->type = type;
176 free->private = private;
177 return 0;
178}
179
180
181/**
Jeff Garzik669a5db2006-08-29 18:12:40 -0400182 * legacy_set_mode - mode setting
Tejun Heo02607312007-08-06 18:36:23 +0900183 * @link: IDE link
Alanb229a7b2007-01-24 11:47:07 +0000184 * @unused: Device that failed when error is returned
Jeff Garzik669a5db2006-08-29 18:12:40 -0400185 *
186 * Use a non standard set_mode function. We don't want to be tuned.
187 *
188 * The BIOS configured everything. Our job is not to fiddle. Just use
189 * whatever PIO the hardware is using and leave it at that. When we
190 * get some kind of nice user driven API for control then we can
191 * expand on this as per hdparm in the base kernel.
192 */
193
Tejun Heo02607312007-08-06 18:36:23 +0900194static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400195{
Tejun Heof58229f2007-08-06 18:36:23 +0900196 struct ata_device *dev;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400197
Tejun Heo1eca4362008-11-03 20:03:17 +0900198 ata_for_each_dev(dev, link, ENABLED) {
199 ata_dev_printk(dev, KERN_INFO, "configured for PIO\n");
200 dev->pio_mode = XFER_PIO_0;
201 dev->xfer_mode = XFER_PIO_0;
202 dev->xfer_shift = ATA_SHIFT_PIO;
203 dev->flags |= ATA_DFLAG_PIO;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400204 }
Alanb229a7b2007-01-24 11:47:07 +0000205 return 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400206}
207
208static struct scsi_host_template legacy_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900209 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400210};
211
Tejun Heo029cfd62008-03-25 12:22:49 +0900212static const struct ata_port_operations legacy_base_port_ops = {
213 .inherits = &ata_sff_port_ops,
214 .cable_detect = ata_cable_40wire,
215};
216
Jeff Garzik669a5db2006-08-29 18:12:40 -0400217/*
218 * These ops are used if the user indicates the hardware
219 * snoops the commands to decide on the mode and handles the
220 * mode selection "magically" itself. Several legacy controllers
221 * do this. The mode range can be set if it is not 0x1F by setting
222 * pio_mask as well.
223 */
224
225static struct ata_port_operations simple_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900226 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900227 .sff_data_xfer = ata_sff_data_xfer_noirq,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400228};
229
230static struct ata_port_operations legacy_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900231 .inherits = &legacy_base_port_ops,
Tejun Heo5682ed32008-04-07 22:47:16 +0900232 .sff_data_xfer = ata_sff_data_xfer_noirq,
Tejun Heo029cfd62008-03-25 12:22:49 +0900233 .set_mode = legacy_set_mode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400234};
235
236/*
237 * Promise 20230C and 20620 support
238 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800239 * This controller supports PIO0 to PIO2. We set PIO timings
240 * conservatively to allow for 50MHz Vesa Local Bus. The 20620 DMA
241 * support is weird being DMA to controller and PIO'd to the host
242 * and not supported.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400243 */
244
245static void pdc20230_set_piomode(struct ata_port *ap, struct ata_device *adev)
246{
247 int tries = 5;
248 int pio = adev->pio_mode - XFER_PIO_0;
249 u8 rt;
250 unsigned long flags;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400251
Jeff Garzik669a5db2006-08-29 18:12:40 -0400252 /* Safe as UP only. Force I/Os to occur together */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400253
Jeff Garzik669a5db2006-08-29 18:12:40 -0400254 local_irq_save(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400255
Jeff Garzik669a5db2006-08-29 18:12:40 -0400256 /* Unlock the control interface */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800257 do {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400258 inb(0x1F5);
259 outb(inb(0x1F2) | 0x80, 0x1F2);
260 inb(0x1F2);
261 inb(0x3F6);
262 inb(0x3F6);
263 inb(0x1F2);
264 inb(0x1F2);
265 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800266 while ((inb(0x1F2) & 0x80) && --tries);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400267
268 local_irq_restore(flags);
Jeff Garzik85cd7252006-08-31 00:03:49 -0400269
Jeff Garzik669a5db2006-08-29 18:12:40 -0400270 outb(inb(0x1F4) & 0x07, 0x1F4);
271
272 rt = inb(0x1F3);
273 rt &= 0x07 << (3 * adev->devno);
274 if (pio)
275 rt |= (1 + 3 * pio) << (3 * adev->devno);
276
277 udelay(100);
278 outb(inb(0x1F2) | 0x01, 0x1F2);
279 udelay(100);
280 inb(0x1F5);
281
282}
283
Tejun Heo55dba312007-12-05 16:43:07 +0900284static unsigned int pdc_data_xfer_vlb(struct ata_device *dev,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800285 unsigned char *buf, unsigned int buflen, int rw)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400286{
Alan Coxc55af1f2009-02-11 13:08:42 -0800287 int slop = buflen & 3;
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800288 struct ata_port *ap = dev->link->ap;
289
Alan Coxc55af1f2009-02-11 13:08:42 -0800290 /* 32bit I/O capable *and* we need to write a whole number of dwords */
Alan Coxe3cf95d2009-04-09 17:31:17 +0100291 if (ata_id_has_dword_io(dev->id) && (slop == 0 || slop == 3)
292 && (ap->pflags & ATA_PFLAG_PIO32)) {
Tejun Heo55dba312007-12-05 16:43:07 +0900293 unsigned long flags;
294
Jeff Garzik669a5db2006-08-29 18:12:40 -0400295 local_irq_save(flags);
296
297 /* Perform the 32bit I/O synchronization sequence */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900298 ioread8(ap->ioaddr.nsect_addr);
299 ioread8(ap->ioaddr.nsect_addr);
300 ioread8(ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400301
302 /* Now the data */
Tejun Heo55dba312007-12-05 16:43:07 +0900303 if (rw == READ)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900304 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Tejun Heo55dba312007-12-05 16:43:07 +0900305 else
306 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400307
308 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700309 __le32 pad;
Tejun Heo55dba312007-12-05 16:43:07 +0900310 if (rw == READ) {
Al Virob50e56d2008-01-12 14:16:14 +0000311 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Jeff Garzik669a5db2006-08-29 18:12:40 -0400312 memcpy(buf + buflen - slop, &pad, slop);
Tejun Heo55dba312007-12-05 16:43:07 +0900313 } else {
314 memcpy(&pad, buf + buflen - slop, slop);
315 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400316 }
Tejun Heo55dba312007-12-05 16:43:07 +0900317 buflen += 4 - slop;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400318 }
319 local_irq_restore(flags);
Tejun Heo55dba312007-12-05 16:43:07 +0900320 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900321 buflen = ata_sff_data_xfer_noirq(dev, buf, buflen, rw);
Tejun Heo55dba312007-12-05 16:43:07 +0900322
323 return buflen;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400324}
325
326static struct ata_port_operations pdc20230_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900327 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400328 .set_piomode = pdc20230_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900329 .sff_data_xfer = pdc_data_xfer_vlb,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400330};
331
332/*
333 * Holtek 6560A support
334 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800335 * This controller supports PIO0 to PIO2 (no IORDY even though higher
336 * timings can be loaded).
Jeff Garzik669a5db2006-08-29 18:12:40 -0400337 */
338
339static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
340{
341 u8 active, recover;
342 struct ata_timing t;
343
344 /* Get the timing data in cycles. For now play safe at 50Mhz */
345 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
346
Harvey Harrison07633b52008-05-14 16:17:00 -0700347 active = clamp_val(t.active, 2, 15);
348 recover = clamp_val(t.recover, 4, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400349
350 inb(0x3E6);
351 inb(0x3E6);
352 inb(0x3E6);
353 inb(0x3E6);
354
Tejun Heo0d5ff562007-02-01 15:06:36 +0900355 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
356 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400357}
358
359static struct ata_port_operations ht6560a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900360 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400361 .set_piomode = ht6560a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400362};
363
364/*
365 * Holtek 6560B support
366 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800367 * This controller supports PIO0 to PIO4. We honour the BIOS/jumper FIFO
368 * setting unless we see an ATAPI device in which case we force it off.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400369 *
370 * FIXME: need to implement 2nd channel support.
371 */
372
373static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
374{
375 u8 active, recover;
376 struct ata_timing t;
377
378 /* Get the timing data in cycles. For now play safe at 50Mhz */
379 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
380
Harvey Harrison07633b52008-05-14 16:17:00 -0700381 active = clamp_val(t.active, 2, 15);
382 recover = clamp_val(t.recover, 2, 16);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400383 recover &= 0x15;
384
385 inb(0x3E6);
386 inb(0x3E6);
387 inb(0x3E6);
388 inb(0x3E6);
389
Tejun Heo0d5ff562007-02-01 15:06:36 +0900390 iowrite8(recover << 4 | active, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400391
392 if (adev->class != ATA_DEV_ATA) {
393 u8 rconf = inb(0x3E6);
394 if (rconf & 0x24) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800395 rconf &= ~0x24;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400396 outb(rconf, 0x3E6);
397 }
398 }
Tejun Heo0d5ff562007-02-01 15:06:36 +0900399 ioread8(ap->ioaddr.status_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400400}
401
402static struct ata_port_operations ht6560b_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900403 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400404 .set_piomode = ht6560b_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400405};
406
407/*
408 * Opti core chipset helpers
409 */
Jeff Garzik85cd7252006-08-31 00:03:49 -0400410
Jeff Garzik669a5db2006-08-29 18:12:40 -0400411/**
412 * opti_syscfg - read OPTI chipset configuration
413 * @reg: Configuration register to read
414 *
415 * Returns the value of an OPTI system board configuration register.
416 */
417
418static u8 opti_syscfg(u8 reg)
419{
420 unsigned long flags;
421 u8 r;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400422
Jeff Garzik669a5db2006-08-29 18:12:40 -0400423 /* Uniprocessor chipset and must force cycles adjancent */
424 local_irq_save(flags);
425 outb(reg, 0x22);
426 r = inb(0x24);
427 local_irq_restore(flags);
428 return r;
429}
430
431/*
432 * Opti 82C611A
433 *
434 * This controller supports PIO0 to PIO3.
435 */
436
Alan Coxdefc9cd2008-01-10 14:33:10 -0800437static void opti82c611a_set_piomode(struct ata_port *ap,
438 struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400439{
440 u8 active, recover, setup;
441 struct ata_timing t;
442 struct ata_device *pair = ata_dev_pair(adev);
443 int clock;
444 int khz[4] = { 50000, 40000, 33000, 25000 };
445 u8 rc;
446
447 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900448 ioread16(ap->ioaddr.error_addr);
449 ioread16(ap->ioaddr.error_addr);
450 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400451
452 /* Read VLB clock strapping */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900453 clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
Jeff Garzik669a5db2006-08-29 18:12:40 -0400454
455 /* Get the timing data in cycles */
456 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
457
458 /* Setup timing is shared */
459 if (pair) {
460 struct ata_timing tp;
461 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
462
463 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
464 }
465
Harvey Harrison07633b52008-05-14 16:17:00 -0700466 active = clamp_val(t.active, 2, 17) - 2;
467 recover = clamp_val(t.recover, 1, 16) - 1;
468 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400469
470 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900471 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400472 rc &= 0x7F;
473 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900474 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400475
476 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900477 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400478
479 /* Select the right bank for read timings, also
480 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900481 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400482 rc &= 0xC0;
483 rc |= adev->devno; /* Index select */
484 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900485 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400486
487 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900488 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400489
490 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900491 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400492 rc &= 0x73;
493 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900494 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400495
496 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900497 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400498}
499
500
501static struct ata_port_operations opti82c611a_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900502 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400503 .set_piomode = opti82c611a_set_piomode,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400504};
505
506/*
507 * Opti 82C465MV
508 *
509 * This controller supports PIO0 to PIO3. Unlike the 611A the MVB
510 * version is dual channel but doesn't have a lot of unique registers.
511 */
512
513static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
514{
515 u8 active, recover, setup;
516 struct ata_timing t;
517 struct ata_device *pair = ata_dev_pair(adev);
518 int clock;
519 int khz[4] = { 50000, 40000, 33000, 25000 };
520 u8 rc;
521 u8 sysclk;
522
523 /* Get the clock */
524 sysclk = opti_syscfg(0xAC) & 0xC0; /* BIOS set */
525
526 /* Enter configuration mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900527 ioread16(ap->ioaddr.error_addr);
528 ioread16(ap->ioaddr.error_addr);
529 iowrite8(3, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400530
531 /* Read VLB clock strapping */
532 clock = 1000000000 / khz[sysclk];
533
534 /* Get the timing data in cycles */
535 ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
536
537 /* Setup timing is shared */
538 if (pair) {
539 struct ata_timing tp;
540 ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
541
542 ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
543 }
544
Harvey Harrison07633b52008-05-14 16:17:00 -0700545 active = clamp_val(t.active, 2, 17) - 2;
546 recover = clamp_val(t.recover, 1, 16) - 1;
547 setup = clamp_val(t.setup, 1, 4) - 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400548
549 /* Select the right timing bank for write timing */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900550 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400551 rc &= 0x7F;
552 rc |= (adev->devno << 7);
Tejun Heo0d5ff562007-02-01 15:06:36 +0900553 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400554
555 /* Write the timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900556 iowrite8(active << 4 | recover, ap->ioaddr.error_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400557
558 /* Select the right bank for read timings, also
559 load the shared timings for address */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900560 rc = ioread8(ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400561 rc &= 0xC0;
562 rc |= adev->devno; /* Index select */
563 rc |= (setup << 4) | 0x04;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900564 iowrite8(rc, ap->ioaddr.device_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400565
566 /* Load the read timings */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900567 iowrite8(active << 4 | recover, ap->ioaddr.data_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400568
569 /* Ensure the timing register mode is right */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900570 rc = ioread8(ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400571 rc &= 0x73;
572 rc |= 0x84;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900573 iowrite8(rc, ap->ioaddr.lbal_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400574
575 /* Exit command mode */
Tejun Heo0d5ff562007-02-01 15:06:36 +0900576 iowrite8(0x83, ap->ioaddr.nsect_addr);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400577
578 /* We need to know this for quad device on the MVB */
579 ap->host->private_data = ap;
580}
581
582/**
Tejun Heo9363c382008-04-07 22:47:16 +0900583 * opt82c465mv_qc_issue - command issue
Jeff Garzik669a5db2006-08-29 18:12:40 -0400584 * @qc: command pending
585 *
586 * Called when the libata layer is about to issue a command. We wrap
587 * this interface so that we can load the correct ATA timings. The
588 * MVB has a single set of timing registers and these are shared
589 * across channels. As there are two registers we really ought to
590 * track the last two used values as a sort of register window. For
591 * now we just reload on a channel switch. On the single channel
592 * setup this condition never fires so we do nothing extra.
593 *
594 * FIXME: dual channel needs ->serialize support
595 */
596
Tejun Heo9363c382008-04-07 22:47:16 +0900597static unsigned int opti82c46x_qc_issue(struct ata_queued_cmd *qc)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400598{
599 struct ata_port *ap = qc->ap;
600 struct ata_device *adev = qc->dev;
601
602 /* If timings are set and for the wrong channel (2nd test is
603 due to a libata shortcoming and will eventually go I hope) */
604 if (ap->host->private_data != ap->host
605 && ap->host->private_data != NULL)
606 opti82c46x_set_piomode(ap, adev);
607
Tejun Heo9363c382008-04-07 22:47:16 +0900608 return ata_sff_qc_issue(qc);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400609}
610
611static struct ata_port_operations opti82c46x_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900612 .inherits = &legacy_base_port_ops,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400613 .set_piomode = opti82c46x_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900614 .qc_issue = opti82c46x_qc_issue,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400615};
616
Alan Coxdefc9cd2008-01-10 14:33:10 -0800617static void qdi6500_set_piomode(struct ata_port *ap, struct ata_device *adev)
618{
619 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800620 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800621 int active, recovery;
622 u8 timing;
623
624 /* Get the timing data in cycles */
625 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
626
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800627 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700628 active = 8 - clamp_val(t.active, 1, 8);
629 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800630 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700631 active = 9 - clamp_val(t.active, 2, 9);
632 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800633 }
634 timing = (recovery << 4) | active | 0x08;
635
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800636 ld_qdi->clock[adev->devno] = timing;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800637
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800638 outb(timing, ld_qdi->timing);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800639}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400640
641/**
Alan Coxdefc9cd2008-01-10 14:33:10 -0800642 * qdi6580dp_set_piomode - PIO setup for dual channel
643 * @ap: Port
644 * @adev: Device
Jeff Garzik669a5db2006-08-29 18:12:40 -0400645 *
Alan Coxdefc9cd2008-01-10 14:33:10 -0800646 * In dual channel mode the 6580 has one clock per channel and we have
Tejun Heo9363c382008-04-07 22:47:16 +0900647 * to software clockswitch in qc_issue.
Jeff Garzik669a5db2006-08-29 18:12:40 -0400648 */
649
Alan Coxdefc9cd2008-01-10 14:33:10 -0800650static void qdi6580dp_set_piomode(struct ata_port *ap, struct ata_device *adev)
Jeff Garzik669a5db2006-08-29 18:12:40 -0400651{
Alan Coxdefc9cd2008-01-10 14:33:10 -0800652 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800653 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800654 int active, recovery;
655 u8 timing;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400656
Alan Coxdefc9cd2008-01-10 14:33:10 -0800657 /* Get the timing data in cycles */
658 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
Tejun Heo24dc5f32007-01-20 16:00:28 +0900659
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800660 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700661 active = 8 - clamp_val(t.active, 1, 8);
662 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800663 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700664 active = 9 - clamp_val(t.active, 2, 9);
665 recovery = 15 - clamp_val(t.recover, 0, 15);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400666 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800667 timing = (recovery << 4) | active | 0x08;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400668
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800669 ld_qdi->clock[adev->devno] = timing;
Jeff Garzik85cd7252006-08-31 00:03:49 -0400670
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800671 outb(timing, ld_qdi->timing + 2 * ap->port_no);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800672 /* Clear the FIFO */
673 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800674 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800675}
676
677/**
678 * qdi6580_set_piomode - PIO setup for single channel
679 * @ap: Port
680 * @adev: Device
681 *
682 * In single channel mode the 6580 has one clock per device and we can
683 * avoid the requirement to clock switch. We also have to load the timing
684 * into the right clock according to whether we are master or slave.
685 */
686
687static void qdi6580_set_piomode(struct ata_port *ap, struct ata_device *adev)
688{
689 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800690 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800691 int active, recovery;
692 u8 timing;
693
694 /* Get the timing data in cycles */
695 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
696
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800697 if (ld_qdi->fast) {
Harvey Harrison07633b52008-05-14 16:17:00 -0700698 active = 8 - clamp_val(t.active, 1, 8);
699 recovery = 18 - clamp_val(t.recover, 3, 18);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800700 } else {
Harvey Harrison07633b52008-05-14 16:17:00 -0700701 active = 9 - clamp_val(t.active, 2, 9);
702 recovery = 15 - clamp_val(t.recover, 0, 15);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800703 }
704 timing = (recovery << 4) | active | 0x08;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800705 ld_qdi->clock[adev->devno] = timing;
706 outb(timing, ld_qdi->timing + 2 * adev->devno);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800707 /* Clear the FIFO */
708 if (adev->class != ATA_DEV_ATA)
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800709 outb(0x5F, ld_qdi->timing + 3);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800710}
711
712/**
Tejun Heo9363c382008-04-07 22:47:16 +0900713 * qdi_qc_issue - command issue
Alan Coxdefc9cd2008-01-10 14:33:10 -0800714 * @qc: command pending
715 *
716 * Called when the libata layer is about to issue a command. We wrap
717 * this interface so that we can load the correct ATA timings.
718 */
719
Tejun Heo9363c382008-04-07 22:47:16 +0900720static unsigned int qdi_qc_issue(struct ata_queued_cmd *qc)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800721{
722 struct ata_port *ap = qc->ap;
723 struct ata_device *adev = qc->dev;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800724 struct legacy_data *ld_qdi = ap->host->private_data;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800725
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800726 if (ld_qdi->clock[adev->devno] != ld_qdi->last) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800727 if (adev->pio_mode) {
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800728 ld_qdi->last = ld_qdi->clock[adev->devno];
729 outb(ld_qdi->clock[adev->devno], ld_qdi->timing +
Alan Coxdefc9cd2008-01-10 14:33:10 -0800730 2 * ap->port_no);
731 }
732 }
Tejun Heo9363c382008-04-07 22:47:16 +0900733 return ata_sff_qc_issue(qc);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800734}
735
Alan Coxb8325482008-01-19 15:47:23 +0000736static unsigned int vlb32_data_xfer(struct ata_device *adev, unsigned char *buf,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800737 unsigned int buflen, int rw)
738{
739 struct ata_port *ap = adev->link->ap;
740 int slop = buflen & 3;
741
Alan Coxe3cf95d2009-04-09 17:31:17 +0100742 if (ata_id_has_dword_io(adev->id) && (slop == 0 || slop == 3)
743 && (ap->pflags & ATA_PFLAG_PIO32)) {
Alan Coxdefc9cd2008-01-10 14:33:10 -0800744 if (rw == WRITE)
745 iowrite32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
746 else
747 ioread32_rep(ap->ioaddr.data_addr, buf, buflen >> 2);
748
749 if (unlikely(slop)) {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700750 __le32 pad;
Alan Coxdefc9cd2008-01-10 14:33:10 -0800751 if (rw == WRITE) {
752 memcpy(&pad, buf + buflen - slop, slop);
Harvey Harrison6ad67402008-06-18 17:16:43 -0700753 iowrite32(le32_to_cpu(pad), ap->ioaddr.data_addr);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800754 } else {
Harvey Harrison6ad67402008-06-18 17:16:43 -0700755 pad = cpu_to_le32(ioread32(ap->ioaddr.data_addr));
Alan Coxdefc9cd2008-01-10 14:33:10 -0800756 memcpy(buf + buflen - slop, &pad, slop);
757 }
758 }
759 return (buflen + 3) & ~3;
760 } else
Tejun Heo9363c382008-04-07 22:47:16 +0900761 return ata_sff_data_xfer(adev, buf, buflen, rw);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800762}
763
Alan Coxb8325482008-01-19 15:47:23 +0000764static int qdi_port(struct platform_device *dev,
765 struct legacy_probe *lp, struct legacy_data *ld)
766{
767 if (devm_request_region(&dev->dev, lp->private, 4, "qdi") == NULL)
768 return -EBUSY;
769 ld->timing = lp->private;
770 return 0;
771}
772
Alan Coxdefc9cd2008-01-10 14:33:10 -0800773static struct ata_port_operations qdi6500_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900774 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800775 .set_piomode = qdi6500_set_piomode,
Tejun Heo9363c382008-04-07 22:47:16 +0900776 .qc_issue = qdi_qc_issue,
Tejun Heo5682ed32008-04-07 22:47:16 +0900777 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800778};
779
780static struct ata_port_operations qdi6580_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900781 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800782 .set_piomode = qdi6580_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900783 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800784};
785
786static struct ata_port_operations qdi6580dp_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900787 .inherits = &legacy_base_port_ops,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800788 .set_piomode = qdi6580dp_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900789 .sff_data_xfer = vlb32_data_xfer,
Alan Coxdefc9cd2008-01-10 14:33:10 -0800790};
791
Alan Coxb8325482008-01-19 15:47:23 +0000792static DEFINE_SPINLOCK(winbond_lock);
793
794static void winbond_writecfg(unsigned long port, u8 reg, u8 val)
795{
796 unsigned long flags;
797 spin_lock_irqsave(&winbond_lock, flags);
798 outb(reg, port + 0x01);
799 outb(val, port + 0x02);
800 spin_unlock_irqrestore(&winbond_lock, flags);
801}
802
803static u8 winbond_readcfg(unsigned long port, u8 reg)
804{
805 u8 val;
806
807 unsigned long flags;
808 spin_lock_irqsave(&winbond_lock, flags);
809 outb(reg, port + 0x01);
810 val = inb(port + 0x02);
811 spin_unlock_irqrestore(&winbond_lock, flags);
812
813 return val;
814}
815
816static void winbond_set_piomode(struct ata_port *ap, struct ata_device *adev)
817{
818 struct ata_timing t;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800819 struct legacy_data *ld_winbond = ap->host->private_data;
Alan Coxb8325482008-01-19 15:47:23 +0000820 int active, recovery;
821 u8 reg;
822 int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
823
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800824 reg = winbond_readcfg(ld_winbond->timing, 0x81);
Alan Coxb8325482008-01-19 15:47:23 +0000825
826 /* Get the timing data in cycles */
827 if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
828 ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
829 else
830 ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
831
Harvey Harrison07633b52008-05-14 16:17:00 -0700832 active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
833 recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
Alan Coxb8325482008-01-19 15:47:23 +0000834 timing = (active << 4) | recovery;
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800835 winbond_writecfg(ld_winbond->timing, timing, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000836
837 /* Load the setup timing */
838
839 reg = 0x35;
840 if (adev->class != ATA_DEV_ATA)
841 reg |= 0x08; /* FIFO off */
842 if (!ata_pio_need_iordy(adev))
843 reg |= 0x02; /* IORDY off */
Harvey Harrison07633b52008-05-14 16:17:00 -0700844 reg |= (clamp_val(t.setup, 0, 3) << 6);
Harvey Harrisoncb616dd2008-02-14 09:36:32 -0800845 winbond_writecfg(ld_winbond->timing, timing + 1, reg);
Alan Coxb8325482008-01-19 15:47:23 +0000846}
847
848static int winbond_port(struct platform_device *dev,
849 struct legacy_probe *lp, struct legacy_data *ld)
850{
851 if (devm_request_region(&dev->dev, lp->private, 4, "winbond") == NULL)
852 return -EBUSY;
853 ld->timing = lp->private;
854 return 0;
855}
856
857static struct ata_port_operations winbond_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900858 .inherits = &legacy_base_port_ops,
Alan Coxb8325482008-01-19 15:47:23 +0000859 .set_piomode = winbond_set_piomode,
Tejun Heo5682ed32008-04-07 22:47:16 +0900860 .sff_data_xfer = vlb32_data_xfer,
Alan Coxb8325482008-01-19 15:47:23 +0000861};
862
Alan Coxdefc9cd2008-01-10 14:33:10 -0800863static struct legacy_controller controllers[] = {
864 {"BIOS", &legacy_port_ops, 0x1F,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100865 ATA_FLAG_NO_IORDY, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800866 {"Snooping", &simple_port_ops, 0x1F,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100867 0, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800868 {"PDC20230", &pdc20230_port_ops, 0x7,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100869 ATA_FLAG_NO_IORDY,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800870 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800871 {"HT6560A", &ht6560a_port_ops, 0x07,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100872 ATA_FLAG_NO_IORDY, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800873 {"HT6560B", &ht6560b_port_ops, 0x1F,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100874 ATA_FLAG_NO_IORDY, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800875 {"OPTI82C611A", &opti82c611a_port_ops, 0x0F,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100876 0, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800877 {"OPTI82C46X", &opti82c46x_port_ops, 0x0F,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100878 0, 0, NULL },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800879 {"QDI6500", &qdi6500_port_ops, 0x07,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100880 ATA_FLAG_NO_IORDY,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800881 ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800882 {"QDI6580", &qdi6580_port_ops, 0x1F,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800883 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Alan Coxdefc9cd2008-01-10 14:33:10 -0800884 {"QDI6580DP", &qdi6580dp_port_ops, 0x1F,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800885 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE, qdi_port },
Alan Coxb8325482008-01-19 15:47:23 +0000886 {"W83759A", &winbond_port_ops, 0x1F,
Zhenwen Xu16e6aec2009-04-17 15:32:59 +0800887 0, ATA_PFLAG_PIO32 | ATA_PFLAG_PIO32CHANGE,
Alan Coxe3cf95d2009-04-09 17:31:17 +0100888 winbond_port }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800889};
890
891/**
892 * probe_chip_type - Discover controller
893 * @probe: Probe entry to check
894 *
895 * Probe an ATA port and identify the type of controller. We don't
896 * check if the controller appears to be driveless at this point.
897 */
898
Alan Coxb8325482008-01-19 15:47:23 +0000899static __init int probe_chip_type(struct legacy_probe *probe)
Alan Coxdefc9cd2008-01-10 14:33:10 -0800900{
901 int mask = 1 << probe->slot;
902
Alan Coxb8325482008-01-19 15:47:23 +0000903 if (winbond && (probe->port == 0x1F0 || probe->port == 0x170)) {
904 u8 reg = winbond_readcfg(winbond, 0x81);
905 reg |= 0x80; /* jumpered mode off */
906 winbond_writecfg(winbond, 0x81, reg);
907 reg = winbond_readcfg(winbond, 0x83);
908 reg |= 0xF0; /* local control */
909 winbond_writecfg(winbond, 0x83, reg);
910 reg = winbond_readcfg(winbond, 0x85);
911 reg |= 0xF0; /* programmable timing */
912 winbond_writecfg(winbond, 0x85, reg);
913
914 reg = winbond_readcfg(winbond, 0x81);
915
916 if (reg & mask)
917 return W83759A;
918 }
Alan Coxdefc9cd2008-01-10 14:33:10 -0800919 if (probe->port == 0x1F0) {
Jeff Garzik669a5db2006-08-29 18:12:40 -0400920 unsigned long flags;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400921 local_irq_save(flags);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400922 /* Probes */
Jeff Garzik669a5db2006-08-29 18:12:40 -0400923 outb(inb(0x1F2) | 0x80, 0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800924 inb(0x1F5);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400925 inb(0x1F2);
926 inb(0x3F6);
927 inb(0x3F6);
928 inb(0x1F2);
929 inb(0x1F2);
930
931 if ((inb(0x1F2) & 0x80) == 0) {
932 /* PDC20230c or 20630 ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -0800933 printk(KERN_INFO "PDC20230-C/20630 VLB ATA controller"
934 " detected.\n");
Jeff Garzik669a5db2006-08-29 18:12:40 -0400935 udelay(100);
936 inb(0x1F5);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800937 local_irq_restore(flags);
938 return PDC20230;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400939 } else {
940 outb(0x55, 0x1F2);
941 inb(0x1F2);
942 inb(0x1F2);
Alan Coxdefc9cd2008-01-10 14:33:10 -0800943 if (inb(0x1F2) == 0x00)
944 printk(KERN_INFO "PDC20230-B VLB ATA "
945 "controller detected.\n");
946 local_irq_restore(flags);
947 return BIOS;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400948 }
949 local_irq_restore(flags);
950 }
951
Alan Coxdefc9cd2008-01-10 14:33:10 -0800952 if (ht6560a & mask)
953 return HT6560A;
954 if (ht6560b & mask)
955 return HT6560B;
956 if (opti82c611a & mask)
957 return OPTI611A;
958 if (opti82c46x & mask)
959 return OPTI46X;
960 if (autospeed & mask)
961 return SNOOP;
962 return BIOS;
963}
Jeff Garzik669a5db2006-08-29 18:12:40 -0400964
Alan Coxdefc9cd2008-01-10 14:33:10 -0800965
966/**
967 * legacy_init_one - attach a legacy interface
968 * @pl: probe record
969 *
970 * Register an ISA bus IDE interface. Such interfaces are PIO and we
971 * assume do not support IRQ sharing.
972 */
973
974static __init int legacy_init_one(struct legacy_probe *probe)
975{
976 struct legacy_controller *controller = &controllers[probe->type];
977 int pio_modes = controller->pio_mask;
978 unsigned long io = probe->port;
979 u32 mask = (1 << probe->slot);
980 struct ata_port_operations *ops = controller->ops;
981 struct legacy_data *ld = &legacy_data[probe->slot];
982 struct ata_host *host = NULL;
983 struct ata_port *ap;
984 struct platform_device *pdev;
985 struct ata_device *dev;
986 void __iomem *io_addr, *ctrl_addr;
987 u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
988 int ret;
989
990 iordy |= controller->flags;
991
992 pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
993 if (IS_ERR(pdev))
994 return PTR_ERR(pdev);
995
996 ret = -EBUSY;
997 if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
998 devm_request_region(&pdev->dev, io + 0x0206, 1,
999 "pata_legacy") == NULL)
1000 goto fail;
Alan Coxf834e492007-02-07 13:46:00 -08001001
Tejun Heo5d728822007-04-17 23:44:08 +09001002 ret = -ENOMEM;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001003 io_addr = devm_ioport_map(&pdev->dev, io, 8);
1004 ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
1005 if (!io_addr || !ctrl_addr)
1006 goto fail;
1007 if (controller->setup)
Alan Coxb8325482008-01-19 15:47:23 +00001008 if (controller->setup(pdev, probe, ld) < 0)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001009 goto fail;
Tejun Heo5d728822007-04-17 23:44:08 +09001010 host = ata_host_alloc(&pdev->dev, 1);
1011 if (!host)
1012 goto fail;
1013 ap = host->ports[0];
Jeff Garzik669a5db2006-08-29 18:12:40 -04001014
Tejun Heo5d728822007-04-17 23:44:08 +09001015 ap->ops = ops;
1016 ap->pio_mask = pio_modes;
1017 ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
Alan Coxe3cf95d2009-04-09 17:31:17 +01001018 ap->pflags |= controller->pflags;
Tejun Heo5d728822007-04-17 23:44:08 +09001019 ap->ioaddr.cmd_addr = io_addr;
1020 ap->ioaddr.altstatus_addr = ctrl_addr;
1021 ap->ioaddr.ctl_addr = ctrl_addr;
Tejun Heo9363c382008-04-07 22:47:16 +09001022 ata_sff_std_ports(&ap->ioaddr);
Alan Coxb8325482008-01-19 15:47:23 +00001023 ap->host->private_data = ld;
Tejun Heo5d728822007-04-17 23:44:08 +09001024
Alan Coxdefc9cd2008-01-10 14:33:10 -08001025 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
Tejun Heocbcdd872007-08-18 13:14:55 +09001026
Tejun Heo9363c382008-04-07 22:47:16 +09001027 ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
1028 &legacy_sht);
Tejun Heo5d728822007-04-17 23:44:08 +09001029 if (ret)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001030 goto fail;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001031 ld->platform_dev = pdev;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001032
Alan Coxdefc9cd2008-01-10 14:33:10 -08001033 /* Nothing found means we drop the port as its probably not there */
1034
1035 ret = -ENODEV;
Tejun Heo1eca4362008-11-03 20:03:17 +09001036 ata_for_each_dev(dev, &ap->link, ALL) {
Alan Coxdefc9cd2008-01-10 14:33:10 -08001037 if (!ata_dev_absent(dev)) {
1038 legacy_host[probe->slot] = host;
1039 ld->platform_dev = pdev;
1040 return 0;
1041 }
1042 }
Tejun Heo20cbf5f2009-04-14 12:59:03 +09001043 ata_host_detach(host);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001044fail:
1045 platform_device_unregister(pdev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001046 return ret;
1047}
1048
1049/**
1050 * legacy_check_special_cases - ATA special cases
1051 * @p: PCI device to check
1052 * @master: set this if we find an ATA master
1053 * @master: set this if we find an ATA secondary
1054 *
Alan Coxdefc9cd2008-01-10 14:33:10 -08001055 * A small number of vendors implemented early PCI ATA interfaces
1056 * on bridge logic without the ATA interface being PCI visible.
1057 * Where we have a matching PCI driver we must skip the relevant
1058 * device here. If we don't know about it then the legacy driver
1059 * is the right driver anyway.
Jeff Garzik669a5db2006-08-29 18:12:40 -04001060 */
1061
Alan Coxb8325482008-01-19 15:47:23 +00001062static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
Alan Coxdefc9cd2008-01-10 14:33:10 -08001063 int *secondary)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001064{
1065 /* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
1066 if (p->vendor == 0x1078 && p->device == 0x0000) {
1067 *primary = *secondary = 1;
1068 return;
1069 }
1070 /* Cyrix CS5520 pre SFF MWDMA ATA on the bridge */
1071 if (p->vendor == 0x1078 && p->device == 0x0002) {
1072 *primary = *secondary = 1;
1073 return;
1074 }
1075 /* Intel MPIIX - PIO ATA on non PCI side of bridge */
1076 if (p->vendor == 0x8086 && p->device == 0x1234) {
1077 u16 r;
1078 pci_read_config_word(p, 0x6C, &r);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001079 if (r & 0x8000) {
1080 /* ATA port enabled */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001081 if (r & 0x4000)
1082 *secondary = 1;
1083 else
1084 *primary = 1;
1085 }
1086 return;
1087 }
1088}
1089
Alan Coxdefc9cd2008-01-10 14:33:10 -08001090static __init void probe_opti_vlb(void)
1091{
1092 /* If an OPTI 82C46X is present find out where the channels are */
1093 static const char *optis[4] = {
1094 "3/463MV", "5MV",
1095 "5MVA", "5MVB"
1096 };
1097 u8 chans = 1;
1098 u8 ctrl = (opti_syscfg(0x30) & 0xC0) >> 6;
1099
1100 opti82c46x = 3; /* Assume master and slave first */
1101 printk(KERN_INFO DRV_NAME ": Opti 82C46%s chipset support.\n",
1102 optis[ctrl]);
1103 if (ctrl == 3)
1104 chans = (opti_syscfg(0x3F) & 0x20) ? 2 : 1;
1105 ctrl = opti_syscfg(0xAC);
1106 /* Check enabled and this port is the 465MV port. On the
1107 MVB we may have two channels */
1108 if (ctrl & 8) {
1109 if (chans == 2) {
1110 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1111 legacy_probe_add(0x170, 15, OPTI46X, 0);
1112 }
1113 if (ctrl & 4)
1114 legacy_probe_add(0x170, 15, OPTI46X, 0);
1115 else
1116 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1117 } else
1118 legacy_probe_add(0x1F0, 14, OPTI46X, 0);
1119}
1120
1121static __init void qdi65_identify_port(u8 r, u8 res, unsigned long port)
1122{
1123 static const unsigned long ide_port[2] = { 0x170, 0x1F0 };
1124 /* Check card type */
1125 if ((r & 0xF0) == 0xC0) {
1126 /* QD6500: single channel */
Alan Coxb8325482008-01-19 15:47:23 +00001127 if (r & 8)
Alan Coxdefc9cd2008-01-10 14:33:10 -08001128 /* Disabled ? */
Alan Coxdefc9cd2008-01-10 14:33:10 -08001129 return;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001130 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1131 QDI6500, port);
1132 }
1133 if (((r & 0xF0) == 0xA0) || (r & 0xF0) == 0x50) {
1134 /* QD6580: dual channel */
1135 if (!request_region(port + 2 , 2, "pata_qdi")) {
1136 release_region(port, 2);
1137 return;
1138 }
1139 res = inb(port + 3);
1140 /* Single channel mode ? */
1141 if (res & 1)
1142 legacy_probe_add(ide_port[r & 0x01], 14 + (r & 0x01),
1143 QDI6580, port);
1144 else { /* Dual channel mode */
1145 legacy_probe_add(0x1F0, 14, QDI6580DP, port);
1146 /* port + 0x02, r & 0x04 */
1147 legacy_probe_add(0x170, 15, QDI6580DP, port + 2);
1148 }
Alan Coxb8325482008-01-19 15:47:23 +00001149 release_region(port + 2, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001150 }
1151}
1152
1153static __init void probe_qdi_vlb(void)
1154{
1155 unsigned long flags;
1156 static const unsigned long qd_port[2] = { 0x30, 0xB0 };
1157 int i;
1158
1159 /*
1160 * Check each possible QD65xx base address
1161 */
1162
1163 for (i = 0; i < 2; i++) {
1164 unsigned long port = qd_port[i];
1165 u8 r, res;
1166
1167
1168 if (request_region(port, 2, "pata_qdi")) {
1169 /* Check for a card */
1170 local_irq_save(flags);
1171 /* I have no h/w that needs this delay but it
1172 is present in the historic code */
1173 r = inb(port);
1174 udelay(1);
1175 outb(0x19, port);
1176 udelay(1);
1177 res = inb(port);
1178 udelay(1);
1179 outb(r, port);
1180 udelay(1);
1181 local_irq_restore(flags);
1182
1183 /* Fail */
1184 if (res == 0x19) {
1185 release_region(port, 2);
1186 continue;
1187 }
1188 /* Passes the presence test */
1189 r = inb(port + 1);
1190 udelay(1);
1191 /* Check port agrees with port set */
Alan Coxb8325482008-01-19 15:47:23 +00001192 if ((r & 2) >> 1 == i)
1193 qdi65_identify_port(r, res, port);
1194 release_region(port, 2);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001195 }
1196 }
1197}
Jeff Garzik669a5db2006-08-29 18:12:40 -04001198
1199/**
1200 * legacy_init - attach legacy interfaces
1201 *
1202 * Attach legacy IDE interfaces by scanning the usual IRQ/port suspects.
1203 * Right now we do not scan the ide0 and ide1 address but should do so
1204 * for non PCI systems or systems with no PCI IDE legacy mode devices.
1205 * If you fix that note there are special cases to consider like VLB
1206 * drivers and CS5510/20.
1207 */
1208
1209static __init int legacy_init(void)
1210{
1211 int i;
1212 int ct = 0;
1213 int primary = 0;
1214 int secondary = 0;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001215 int pci_present = 0;
1216 struct legacy_probe *pl = &probe_list[0];
1217 int slot = 0;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001218
1219 struct pci_dev *p = NULL;
1220
1221 for_each_pci_dev(p) {
1222 int r;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001223 /* Check for any overlap of the system ATA mappings. Native
1224 mode controllers stuck on these addresses or some devices
1225 in 'raid' mode won't be found by the storage class test */
Jeff Garzik669a5db2006-08-29 18:12:40 -04001226 for (r = 0; r < 6; r++) {
1227 if (pci_resource_start(p, r) == 0x1f0)
1228 primary = 1;
1229 if (pci_resource_start(p, r) == 0x170)
1230 secondary = 1;
1231 }
1232 /* Check for special cases */
1233 legacy_check_special_cases(p, &primary, &secondary);
1234
Alan Coxdefc9cd2008-01-10 14:33:10 -08001235 /* If PCI bus is present then don't probe for tertiary
1236 legacy ports */
1237 pci_present = 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -04001238 }
1239
Alan Coxb8325482008-01-19 15:47:23 +00001240 if (winbond == 1)
1241 winbond = 0x130; /* Default port, alt is 1B0 */
1242
Alan Coxdefc9cd2008-01-10 14:33:10 -08001243 if (primary == 0 || all)
1244 legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
1245 if (secondary == 0 || all)
1246 legacy_probe_add(0x170, 15, UNKNOWN, 0);
Jeff Garzik85cd7252006-08-31 00:03:49 -04001247
Alan Coxdefc9cd2008-01-10 14:33:10 -08001248 if (probe_all || !pci_present) {
1249 /* ISA/VLB extra ports */
1250 legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
1251 legacy_probe_add(0x168, 10, UNKNOWN, 0);
1252 legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
1253 legacy_probe_add(0x160, 12, UNKNOWN, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001254 }
1255
Alan Coxdefc9cd2008-01-10 14:33:10 -08001256 if (opti82c46x)
1257 probe_opti_vlb();
1258 if (qdi)
1259 probe_qdi_vlb();
1260
Alan Coxdefc9cd2008-01-10 14:33:10 -08001261 for (i = 0; i < NR_HOST; i++, pl++) {
1262 if (pl->port == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001263 continue;
Alan Coxdefc9cd2008-01-10 14:33:10 -08001264 if (pl->type == UNKNOWN)
1265 pl->type = probe_chip_type(pl);
1266 pl->slot = slot++;
1267 if (legacy_init_one(pl) == 0)
Jeff Garzik669a5db2006-08-29 18:12:40 -04001268 ct++;
1269 }
1270 if (ct != 0)
1271 return 0;
1272 return -ENODEV;
1273}
1274
1275static __exit void legacy_exit(void)
1276{
1277 int i;
1278
1279 for (i = 0; i < nr_legacy_host; i++) {
1280 struct legacy_data *ld = &legacy_data[i];
Tejun Heo24dc5f32007-01-20 16:00:28 +09001281 ata_host_detach(legacy_host[i]);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001282 platform_device_unregister(ld->platform_dev);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001283 }
1284}
1285
1286MODULE_AUTHOR("Alan Cox");
1287MODULE_DESCRIPTION("low-level driver for legacy ATA");
1288MODULE_LICENSE("GPL");
1289MODULE_VERSION(DRV_VERSION);
1290
1291module_param(probe_all, int, 0);
1292module_param(autospeed, int, 0);
1293module_param(ht6560a, int, 0);
1294module_param(ht6560b, int, 0);
1295module_param(opti82c611a, int, 0);
1296module_param(opti82c46x, int, 0);
Alan Coxdefc9cd2008-01-10 14:33:10 -08001297module_param(qdi, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001298module_param(pio_mask, int, 0);
Alan Coxf834e492007-02-07 13:46:00 -08001299module_param(iordy_mask, int, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -04001300
1301module_init(legacy_init);
1302module_exit(legacy_exit);